Features Configuration Bits RAM map SFR map

PIC16LF15344
Bank 0 | Bank 1 | Bank 2 | Bank 3 | Bank 4 | Bank 5 | Bank 6 | Bank 7 | Bank 11 | Bank 12 | Bank 14 | Bank 15 | Bank 16 | Bank 17 | Bank 18 | Bank 19 | Bank 20 | Bank 60 | Bank 61 | Bank 62 | Bank 63
--- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | ---

INDF0 | 0x000
INDF1 | 0x001
PCL | 0x002
STATUS | 0x003
FSR0FSR0L | 0x004
FSR0H | 0x005
FSR1FSR1L | 0x006
FSR1H | 0x007
BSR | 0x008
WREG | 0x009
PCLATH | 0x00A
INTCON | 0x00B
PORTA | 0x00C
PORTB | 0x00D
PORTC | 0x00E
TRISA | 0x012
TRISB | 0x013
TRISC | 0x014
LATA | 0x018
LATB | 0x019
LATC | 0x01A

ADRESADRESL | 0x09B
ADRESH | 0x09C
ADCON0 | 0x09D
ADCON1 | 0x09E
ADACT | 0x09F

RC1REGRCREG RCREG1 | 0x119
TX1REGTXREG TXREG1 | 0x11A
SP1BRGSP1BRGL SPBRG SPBRG1 SPBRGL | 0x11B
SP1BRGHSPBRGH SPBRGH1 | 0x11C
RC1STARCSTA RCSTA1 | 0x11D
TX1STATXSTA TXSTA1 | 0x11E
BAUD1CONBAUDCON BAUDCON1 BAUDCTL BAUDCTL1 | 0x11F

SSP1BUF | 0x18C
SSP1ADD | 0x18D
SSP1MSK | 0x18E
SSP1STAT | 0x18F
SSP1CON1 | 0x190
SSP1CON2 | 0x191
SSP1CON3 | 0x192

TMR1TMR1L | 0x20C
TMR1H | 0x20D
T1CON | 0x20E
PR1T1GCON | 0x20F
T1GATETMR1GATE | 0x210
T1CLKTMR1CLK | 0x211

T2TMRTMR2 | 0x28C
PR2T2PR | 0x28D
T2CON | 0x28E
T2HLT | 0x28F
T2CLKCON | 0x290
T2RST | 0x291

CCPR1CCPR1L | 0x30C
CCPR1H | 0x30D
CCP1CON | 0x30E
CCP1CAP | 0x30F
CCPR2CCPR2L | 0x310
CCPR2H | 0x311
CCP2CON | 0x312
CCP2CAP | 0x313
PWM3DCL | 0x314
PWM3DCH | 0x315
PWM3CON | 0x316
PWM4DCL | 0x318
PWM4DCH | 0x319
PWM4CON | 0x31A
PWM5DCL | 0x31C
PWM5DCH | 0x31D
PWM5CON | 0x31E

PWM6DCL | 0x38C
PWM6DCH | 0x38D
PWM6CON | 0x38E

NCO1ACCNCO1ACCL | 0x58C
NCO1ACCH | 0x58D
NCO1ACCU | 0x58E
NCO1INCNCO1INCL | 0x58F
NCO1INCH | 0x590
NCO1INCU | 0x591
NCO1CON | 0x592
NCO1CLK | 0x593
TMR0TMR0L | 0x59C
PR0TMR0H | 0x59D
T0CON0 | 0x59E
T0CON1 | 0x59F

CWG1CLKCON | 0x60C
CWG1DAT | 0x60D
CWG1DBR | 0x60E
CWG1DBF | 0x60F
CWG1CON0 | 0x610
CWG1CON1 | 0x611
CWG1AS0 | 0x612
CWG1AS1 | 0x613
CWG1STR | 0x614

PIR0 | 0x70C
PIR1 | 0x70D
PIR2 | 0x70E
PIR3 | 0x70F
PIR4 | 0x710
PIR5 | 0x711
PIR6 | 0x712
PIR7 | 0x713
PIE0 | 0x716
PIE1 | 0x717
PIE2 | 0x718
PIE3 | 0x719
PIE4 | 0x71A
PIE5 | 0x71B
PIE6 | 0x71C
PIE7 | 0x71D

PMD0 | 0x796
PMD1 | 0x797
PMD2 | 0x798
PMD3 | 0x799
PMD4 | 0x79A
PMD5 | 0x79B

WDTCON0 | 0x80C
WDTCON1 | 0x80D
WDTPSL | 0x80E
WDTPSH | 0x80F
WDTTMR | 0x810
BORCON | 0x811
PCON0 | 0x813
PCON1 | 0x814
NVMADRNVMADRL | 0x81A
NVMADRH | 0x81B
NVMDATNVMDATL | 0x81C
NVMDATH | 0x81D
NVMCON1 | 0x81E
NVMCON2 | 0x81F

CPUDOZE | 0x88C
OSCCON1 | 0x88D
OSCCON2 | 0x88E
OSCCON3 | 0x88F
OSCSTAT | 0x890
OSCEN | 0x891
OSCTUNE | 0x892
OSCFRQ | 0x893
CLKRCON | 0x895
CLKRCLK | 0x896

FVRCON | 0x90C
DAC1CON0 | 0x90E
DAC1CON1 | 0x90F
ZCDCON | 0x91F

CMOUTCMSTAT | 0x98F
CM1CON0 | 0x990
CM1CON1 | 0x991
CM1NCH | 0x992
CM1PCH | 0x993
CM2CON0 | 0x994
CM2CON1 | 0x995
CM2NCH | 0x996
CM2PCH | 0x997

RC2REGRCREG2 | 0xA19
TX2REGTXREG2 | 0xA1A
SP2BRGSP2BRGL SPBRG2 | 0xA1B
SP2BRGHSPBRGH2 | 0xA1C
RC2STARCSTA2 | 0xA1D
TX2STATXSTA2 | 0xA1E
BAUD2CONBAUDCON2 BAUDCTL2 | 0xA1F

CLCDATA | 0x1E0F
CLC1CON | 0x1E10
CLC1POL | 0x1E11
CLC1SEL0 | 0x1E12
CLC1SEL1 | 0x1E13
CLC1SEL2 | 0x1E14
CLC1SEL3 | 0x1E15
CLC1GLS0 | 0x1E16
CLC1GLS1 | 0x1E17
CLC1GLS2 | 0x1E18
CLC1GLS3 | 0x1E19
CLC2CON | 0x1E1A
CLC2POL | 0x1E1B
CLC2SEL0 | 0x1E1C
CLC2SEL1 | 0x1E1D
CLC2SEL2 | 0x1E1E
CLC2SEL3 | 0x1E1F
CLC2GLS0 | 0x1E20
CLC2GLS1 | 0x1E21
CLC2GLS2 | 0x1E22
CLC2GLS3 | 0x1E23
CLC3CON | 0x1E24
CLC3POL | 0x1E25
CLC3SEL0 | 0x1E26
CLC3SEL1 | 0x1E27
CLC3SEL2 | 0x1E28
CLC3SEL3 | 0x1E29
CLC3GLS0 | 0x1E2A
CLC3GLS1 | 0x1E2B
CLC3GLS2 | 0x1E2C
CLC3GLS3 | 0x1E2D
CLC4CON | 0x1E2E
CLC4POL | 0x1E2F
CLC4SEL0 | 0x1E30
CLC4SEL1 | 0x1E31
CLC4SEL2 | 0x1E32
CLC4SEL3 | 0x1E33
CLC4GLS0 | 0x1E34
CLC4GLS1 | 0x1E35
CLC4GLS2 | 0x1E36
CLC4GLS3 | 0x1E37

PPSLOCK | 0x1E8F
INTPPS | 0x1E90
T0CKIPPS | 0x1E91
T1CKIPPS | 0x1E92
T1GPPS | 0x1E93
T2INPPS | 0x1E9C
CCP1PPS | 0x1EA1
CCP2PPS | 0x1EA2
CWG1PPS | 0x1EB1
CLCIN0PPS | 0x1EBB
CLCIN1PPS | 0x1EBC
CLCIN2PPS | 0x1EBD
CLCIN3PPS | 0x1EBE
ADACTPPS | 0x1EC3
SSP1CLKPPS | 0x1EC5
SSP1DATPPS | 0x1EC6
SSP1SSPPS | 0x1EC7
RX1DTPPS | 0x1ECB
TX1CKPPS | 0x1ECC
RX2DTPPS | 0x1ECD
TX2CKPPS | 0x1ECE

RA0PPS | 0x1F10
RA1PPS | 0x1F11
RA2PPS | 0x1F12
RA3PPS | 0x1F13
RA4PPS | 0x1F14
RA5PPS | 0x1F15
RB4PPS | 0x1F1C
RB5PPS | 0x1F1D
RB6PPS | 0x1F1E
RB7PPS | 0x1F1F
RC0PPS | 0x1F20
RC1PPS | 0x1F21
RC2PPS | 0x1F22
RC3PPS | 0x1F23
RC4PPS | 0x1F24
RC5PPS | 0x1F25
RC6PPS | 0x1F26
RC7PPS | 0x1F27
ANSELA | 0x1F38
WPUA | 0x1F39
ODCONA | 0x1F3A
SLRCONA | 0x1F3B
INLVLA | 0x1F3C
IOCAP | 0x1F3D
IOCAN | 0x1F3E
IOCAF | 0x1F3F
ANSELB | 0x1F43
WPUB | 0x1F44
ODCONB | 0x1F45
SLRCONB | 0x1F46
INLVLB | 0x1F47
IOCBP | 0x1F48
IOCBN | 0x1F49
IOCBF | 0x1F4A
ANSELC | 0x1F4E
WPUC | 0x1F4F
ODCONC | 0x1F50
SLRCONC | 0x1F51
INLVLC | 0x1F52
IOCCP | 0x1F53
IOCCN | 0x1F54
IOCCF | 0x1F55

STATUS_SHAD | 0x1FE4
WREG_SHAD | 0x1FE5
BSR_SHAD | 0x1FE6
PCLATH_SHAD | 0x1FE7
FSR0L_SHADFSR0_SHAD | 0x1FE8
FSR0H_SHAD | 0x1FE9
FSR1L_SHADFSR1_SHAD | 0x1FEA
FSR1H_SHAD | 0x1FEB
STKPTR | 0x1FED
TOSL | 0x1FEE
TOSH | 0x1FEF

The mirror of [PCL, PCLATH, ...] are not shown.

SFR

SFR with alias name.

This page generated automatically by the device-help.pl program (2022-01-30 15:56:10 UTC) from the 8bit_device.info file (rev: 1.44) of mpasmx and from the gputils source package (rev: svn Unversioned directory). The mpasmx is included in the MPLAB X.