Features Configuration Bits RAM map SFR map

PIC18F67K22
Bank 15

PMD3 | 0xF16
PMD2 | 0xF17
PMD1 | 0xF18
PMD0 | 0xF19
PSTR3CON | 0xF1A
PSTR2CON | 0xF1B
TXREG2 | 0xF1C
RCREG2 | 0xF1D
SPBRG2 | 0xF1E
SPBRGH2 | 0xF1F
BAUDCON2 | 0xF20
TXSTA2 | 0xF21
RCSTA2 | 0xF22
ANCON2 | 0xF23
ANCON1 | 0xF24
ANCON0 | 0xF25
ODCON3 | 0xF27
ODCON2 | 0xF28
ODCON1 | 0xF29
REFOCON | 0xF2A
CCPTMRS2 | 0xF2B
CCPTMRS1 | 0xF2C
CCPTMRS0 | 0xF2D
CM3CONCM3CON1 | 0xF2E
CM2CONCM2CON1 | 0xF2F
T12CON | 0xF30
PR12 | 0xF31
TMR12 | 0xF32
T10CON | 0xF33
PR10 | 0xF34
TMR10 | 0xF35
T8CON | 0xF36
PR8 | 0xF37
TMR8 | 0xF38
T6CON | 0xF39
PR6 | 0xF3A
TMR6 | 0xF3B
T7GCON | 0xF3C
T7CON | 0xF3D
TMR7TMR7L | 0xF3E
TMR7H | 0xF3F
CCP10CON | 0xF40
CCPR10CCPR10L | 0xF41
CCPR10H | 0xF42
CCP9CON | 0xF43
CCPR9CCPR9L | 0xF44
CCPR9H | 0xF45
CCP8CON | 0xF46
CCPR8CCPR8L | 0xF47
CCPR8H | 0xF48
CCP3CON | 0xF49
CCPR3CCPR3L | 0xF4A
CCPR3H | 0xF4B
ECCP3DEL | 0xF4C
ECCP3AS | 0xF4D
CCP2CONECCP2CON | 0xF4E
CCPR2CCPR2L | 0xF4F
CCPR2H | 0xF50
ECCP2DELPWM2CON | 0xF51
ECCP2AS | 0xF52
PADCFG1 | 0xF53
CM1CONCM1CON1 | 0xF54
CTMUICON | 0xF55
CTMUCONL | 0xF56
CTMUCONH | 0xF57
ALRMVALALRMVALL | 0xF58
ALRMVALH | 0xF59
ALRMRPT | 0xF5A
ALRMCFG | 0xF5B
RTCVALRTCVALL | 0xF5C
RTCVALH | 0xF5D
RTCCAL | 0xF5E
RTCCFG | 0xF5F
PIE6 | 0xF60
EEDATA | 0xF61
EEADR | 0xF62
EEADRH | 0xF63
OSCCON2 | 0xF64
BAUDCONBAUDCON1 BAUDCTL | 0xF65
SSP2CON2 | 0xF66
SSP2CON1 | 0xF67
SSP2STAT | 0xF68
SSP2ADDSSP2MSK | 0xF69
SSP2BUF | 0xF6A
T4CON | 0xF6B
PR4 | 0xF6C
TMR4 | 0xF6D
CCP7CON | 0xF6E
CCPR7CCPR7L | 0xF6F
CCPR7H | 0xF70
CCP6CON | 0xF71
CCPR6CCPR6L | 0xF72
CCPR6H | 0xF73
CCP5CON | 0xF74
CCPR5CCPR5L | 0xF75
CCPR5H | 0xF76
CCP4CON | 0xF77
CCPR4CCPR4L | 0xF78
CCPR4H | 0xF79
T5GCON | 0xF7A
T5CON | 0xF7B
TMR5TMR5L | 0xF7C
TMR5H | 0xF7D
EECON2 | 0xF7E
EECON1 | 0xF7F
PORTA | 0xF80
PORTB | 0xF81
PORTC | 0xF82
PORTD | 0xF83
PORTE | 0xF84
PORTF | 0xF85
PORTG | 0xF86
LATA | 0xF89
LATB | 0xF8A
LATC | 0xF8B
LATD | 0xF8C
LATE | 0xF8D
LATF | 0xF8E
LATG | 0xF8F
TRISA | 0xF92
TRISB | 0xF93
TRISC | 0xF94
TRISD | 0xF95
TRISE | 0xF96
TRISF | 0xF97
TRISG | 0xF98
OSCTUNE | 0xF9B
PSTR1CON | 0xF9C
PIE1 | 0xF9D
PIR1 | 0xF9E
IPR1 | 0xF9F
PIE2 | 0xFA0
PIR2 | 0xFA1
IPR2 | 0xFA2
PIE3 | 0xFA3
PIR3 | 0xFA4
IPR3 | 0xFA5
PIR6 | 0xFA6
PSPCON | 0xFA7
HLVDCON | 0xFA8
IPR6 | 0xFA9
T1GCON | 0xFAA
RCSTARCSTA1 | 0xFAB
TXSTATXSTA1 | 0xFAC
TXREGTXREG1 | 0xFAD
RCREGRCREG1 | 0xFAE
SPBRGSPBRG1 | 0xFAF
T3GCON | 0xFB0
T3CON | 0xFB1
TMR3TMR3L | 0xFB2
TMR3H | 0xFB3
CMSTATCMSTATUS | 0xFB4
CVRCON | 0xFB5
PIE4 | 0xFB6
PIR4 | 0xFB7
IPR4 | 0xFB8
PIE5 | 0xFB9
PIR5 | 0xFBA
CCP1CONECCP1CON | 0xFBB
CCPR1CCPR1L | 0xFBC
CCPR1H | 0xFBD
ECCP1DELPWM1CON | 0xFBE
ECCP1AS | 0xFBF
ADCON2 | 0xFC0
ADCON1 | 0xFC1
ADCON0 | 0xFC2
ADRESADRESL | 0xFC3
ADRESH | 0xFC4
SSP1CON2SSPCON2 | 0xFC5
SSP1CON1SSPCON1 | 0xFC6
SSP1STATSSPSTAT | 0xFC7
SSP1ADDSSP1MSK SSPADD | 0xFC8
SSP1BUFSSPBUF | 0xFC9
T2CON | 0xFCA
PR2 | 0xFCB
TMR2 | 0xFCC
T1CON | 0xFCD
TMR1TMR1L | 0xFCE
TMR1H | 0xFCF
RCON | 0xFD0
WDTCON | 0xFD1
IPR5 | 0xFD2
OSCCON | 0xFD3
SPBRGH1 | 0xFD4
T0CON | 0xFD5
TMR0TMR0L | 0xFD6
TMR0H | 0xFD7
STATUS | 0xFD8
FSR2L | 0xFD9
FSR2H | 0xFDA
PLUSW2 | 0xFDB
PREINC2 | 0xFDC
POSTDEC2 | 0xFDD
POSTINC2 | 0xFDE
INDF2 | 0xFDF
BSR | 0xFE0
FSR1L | 0xFE1
FSR1H | 0xFE2
PLUSW1 | 0xFE3
PREINC1 | 0xFE4
POSTDEC1 | 0xFE5
POSTINC1 | 0xFE6
INDF1 | 0xFE7
WREG | 0xFE8
FSR0L | 0xFE9
FSR0H | 0xFEA
PLUSW0 | 0xFEB
PREINC0 | 0xFEC
POSTDEC0 | 0xFED
POSTINC0 | 0xFEE
INDF0 | 0xFEF
INTCON3 | 0xFF0
INTCON2 | 0xFF1
INTCON | 0xFF2
PRODPRODL | 0xFF3
PRODH | 0xFF4
TABLAT | 0xFF5
TBLPTRTBLPTRL | 0xFF6
TBLPTRH | 0xFF7
TBLPTRU | 0xFF8
PCPCL | 0xFF9
PCLATH | 0xFFA
PCLATU | 0xFFB
STKPTR | 0xFFC
TOSTOSL | 0xFFD
TOSH | 0xFFE
TOSU | 0xFFF

SFR

SFR with alias name.

SFR on Access Area.

This page generated automatically by the device-help.pl program (2022-01-30 15:56:10 UTC) from the 8bit_device.info file (rev: 1.44) of mpasmx and from the gputils source package (rev: svn Unversioned directory). The mpasmx is included in the MPLAB X.