Features Configuration Bits RAM map SFR map

PIC18F25Q10
Bank 14 | Bank 15
--- | ---

PPSLOCK | 0xE9B
INT0PPS | 0xE9C
INT1PPS | 0xE9D
INT2PPS | 0xE9E
T0CKIPPS | 0xE9F
T1CKIPPS | 0xEA0
T1GPPS | 0xEA1
T3CKIPPS | 0xEA2
T3GPPS | 0xEA3
T5CKIPPS | 0xEA4
T5GPPS | 0xEA5
T2INPPS | 0xEA6
T4INPPS | 0xEA7
T6INPPS | 0xEA8
ADACTPPS | 0xEA9
CCP1PPS | 0xEAA
CCP2PPS | 0xEAB
CWG1INPPSCWG1PPS CWGINPPS CWGPPS | 0xEAC
MDCARLPPS | 0xEAD
MDCARHPPS | 0xEAE
MDSRCPPS | 0xEAF
RX1PPSRXDT1PPS RXPPS | 0xEB0
CK1PPSCKPPS TX1PPS TXCK1PPS TXPPS | 0xEB1
SSP1CLKPPSSSPCLKPPS | 0xEB2
SSP1DATPPSSSPDATPPS | 0xEB3
SSP1SSPPSSSPSSPPS | 0xEB4
IPR0 | 0xEB5
IPR1 | 0xEB6
IPR2 | 0xEB7
IPR3 | 0xEB8
IPR4 | 0xEB9
IPR5 | 0xEBA
IPR6 | 0xEBB
IPR7 | 0xEBC
PIE0 | 0xEBD
PIE1 | 0xEBE
PIE2 | 0xEBF
PIE3 | 0xEC0
PIE4 | 0xEC1
PIE5 | 0xEC2
PIE6 | 0xEC3
PIE7 | 0xEC4
PIR0 | 0xEC5
PIR1 | 0xEC6
PIR2 | 0xEC7
PIR3 | 0xEC8
PIR4 | 0xEC9
PIR5 | 0xECA
PIR6 | 0xECB
PIR7 | 0xECC
WDTCON0 | 0xECD
WDTCON1 | 0xECE
WDTPSL | 0xECF
WDTPSH | 0xED0
WDTTMR | 0xED1
CPUDOZE | 0xED2
OSCCON1 | 0xED3
OSCCON2 | 0xED4
OSCCON3 | 0xED5
OSCSTATOSCSTAT1 | 0xED6
OSCEN | 0xED7
OSCTUNE | 0xED8
OSCFREQOSCFRQ | 0xED9
VREGCON | 0xEDA
BORCON | 0xEDB
PMD0 | 0xEDC
PMD1 | 0xEDD
PMD2 | 0xEDE
PMD3 | 0xEDF
PMD4 | 0xEE0
PMD5 | 0xEE1
RA0PPS | 0xEE2
RA1PPS | 0xEE3
RA2PPS | 0xEE4
RA3PPS | 0xEE5
RA4PPS | 0xEE6
RA5PPS | 0xEE7
RA6PPS | 0xEE8
RA7PPS | 0xEE9
RB0PPS | 0xEEA
RB1PPS | 0xEEB
RB2PPS | 0xEEC
RB3PPS | 0xEED
RB4PPS | 0xEEE
RB5PPS | 0xEEF
RB6PPS | 0xEF0
RB7PPS | 0xEF1
RC0PPS | 0xEF2
RC1PPS | 0xEF3
RC2PPS | 0xEF4
RC3PPS | 0xEF5
RC4PPS | 0xEF6
RC5PPS | 0xEF7
RC6PPS | 0xEF8
RC7PPS | 0xEF9

IOCAF | 0xF05
IOCAN | 0xF06
IOCAP | 0xF07
INLVLA | 0xF08
SLRCONA | 0xF09
ODCONA | 0xF0A
WPUA | 0xF0B
ANSELA | 0xF0C
IOCBF | 0xF0D
IOCBN | 0xF0E
IOCBP | 0xF0F
INLVLB | 0xF10
SLRCONB | 0xF11
ODCONB | 0xF12
WPUB | 0xF13
ANSELB | 0xF14
IOCCF | 0xF15
IOCCN | 0xF16
IOCCP | 0xF17
INLVLC | 0xF18
SLRCONC | 0xF19
ODCONC | 0xF1A
WPUC | 0xF1B
ANSELC | 0xF1C
IOCEF | 0xF22
IOCEN | 0xF23
IOCEP | 0xF24
INLVLE | 0xF25
WPUE | 0xF28
HLVDCON0 | 0xF2A
HLVDCON1 | 0xF2B
FVRCON | 0xF2C
ZCDCON | 0xF2D
DAC1CON0 | 0xF2E
DAC1CON1 | 0xF2F
CM2CON0 | 0xF30
CM2CON1 | 0xF31
CM2NCH | 0xF32
CM2PCH | 0xF33
CM1CON0 | 0xF34
CM1CON1 | 0xF35
CM1NCH | 0xF36
CM1PCH | 0xF37
CMOUT | 0xF38
CLKRCON | 0xF39
CLKRCLK | 0xF3A
CWG1CLKCWG1CLKCON | 0xF3B
CWG1ISM | 0xF3C
CWG1DBR | 0xF3D
CWG1DBF | 0xF3E
CWG1CON0 | 0xF3F
CWG1CON1 | 0xF40
CWG1AS0 | 0xF41
CWG1AS1 | 0xF42
CWG1STR | 0xF43
SCANLADRSCANLADRL | 0xF44
SCANLADRH | 0xF45
SCANLADRU | 0xF46
SCANHADRSCANHADRL | 0xF47
SCANHADRH | 0xF48
SCANHADRU | 0xF49
SCANCON0 | 0xF4A
SCANTRIG | 0xF4B
MDCON0 | 0xF4C
MDCON1 | 0xF4D
MDSRC | 0xF4E
MDCARL | 0xF4F
MDCARH | 0xF50
ADACT | 0xF51
ADCLK | 0xF52
ADREF | 0xF53
ADCON1 | 0xF54
ADCON2 | 0xF55
ADCON3 | 0xF56
ADACQ | 0xF57
ADCAP | 0xF58
ADPRE | 0xF59
ADPCH | 0xF5A
ADCON0 | 0xF5B
ADPREVADPREVL | 0xF5C
ADPREVH | 0xF5D
ADRESADRESL | 0xF5E
ADRESH | 0xF5F
ADSTAT | 0xF60
ADRPT | 0xF61
ADCNT | 0xF62
ADSTPTADSTPTL | 0xF63
ADSTPTH | 0xF64
ADLTHADLTHL | 0xF65
ADLTHH | 0xF66
ADUTHADUTHL | 0xF67
ADUTHH | 0xF68
ADERRADERRL | 0xF69
ADERRH | 0xF6A
ADACCADACCL | 0xF6B
ADACCH | 0xF6C
ADFLTRADFLTRL | 0xF6D
ADFLTRH | 0xF6E
CRCDATACRCDATL | 0xF6F
CRCDATH | 0xF70
CRCACCCRCACCL | 0xF71
CRCACCH | 0xF72
CRCSHFTCRCSHIFTL | 0xF73
CRCSHIFTH | 0xF74
CRCXORCRCXORL | 0xF75
CRCXORH | 0xF76
CRCCON0 | 0xF77
CRCCON1 | 0xF78
NVMADRNVMADRL | 0xF79
NVMADRH | 0xF7A
NVMADRU | 0xF7B
NVMDATNVMDATL | 0xF7C
NVMDATH | 0xF7D
NVMCON0 | 0xF7F
NVMCON1 | 0xF80
NVMCON2 | 0xF81
LATA | 0xF82
LATB | 0xF83
LATC | 0xF84
DDRATRISA | 0xF87
DDRBTRISB | 0xF88
DDRCTRISC | 0xF89
PORTA | 0xF8C
PORTB | 0xF8D
PORTC | 0xF8E
PORTE | 0xF90
SSP1BUF | 0xF91
SSP1ADD | 0xF92
SSP1MSK | 0xF93
SSP1STAT | 0xF94
SSP1CON1 | 0xF95
SSP1CON2 | 0xF96
SSP1CON3 | 0xF97
RC1REGRCREG RCREG1 | 0xF98
TX1REGTXREG TXREG1 | 0xF99
SP1BRGSP1BRGL SPBRG SPBRG1 SPBRGL | 0xF9A
SP1BRGHSPBRGH SPBRGH1 | 0xF9B
RC1STARCSTA RCSTA1 | 0xF9C
TX1STATXSTA TXSTA1 | 0xF9D
BAUD1CONBAUDCON BAUDCON1 BAUDCTL BAUDCTL1 | 0xF9E
PWM4DCPWM4DCL | 0xF9F
PWM4DCH | 0xFA0
PWM4CON | 0xFA1
PWM3DCPWM3DCL | 0xFA2
PWM3DCH | 0xFA3
PWM3CON | 0xFA4
CCPR2CCPR2L | 0xFA5
CCPR2H | 0xFA6
CCP2CON | 0xFA7
CCP2CAP | 0xFA8
CCPR1CCPR1L | 0xFA9
CCPR1H | 0xFAA
CCP1CON | 0xFAB
CCP1CAP | 0xFAC
CCPTMRS | 0xFAD
T6TMRTMR6 | 0xFAE
PR6T6PR | 0xFAF
T6CON | 0xFB0
T6HLT | 0xFB1
T6CLKT6CLKCON | 0xFB2
T6RST | 0xFB3
T4TMRTMR4 | 0xFB4
PR4T4PR | 0xFB5
T4CON | 0xFB6
T4HLT | 0xFB7
T4CLKT4CLKCON | 0xFB8
T4RST | 0xFB9
T2TMRTMR2 | 0xFBA
PR2T2PR | 0xFBB
T2CON | 0xFBC
T2HLT | 0xFBD
T2CLKT2CLKCON | 0xFBE
T2RST | 0xFBF
TMR5TMR5L | 0xFC0
TMR5H | 0xFC1
T5CON | 0xFC2
PR5T5GCON | 0xFC3
T5GATETMR5GATE | 0xFC4
T5CLKTMR5CLK | 0xFC5
TMR3TMR3L | 0xFC6
TMR3H | 0xFC7
T3CON | 0xFC8
PR3T3GCON | 0xFC9
T3GATETMR3GATE | 0xFCA
T3CLKTMR3CLK | 0xFCB
TMR1TMR1L | 0xFCC
TMR1H | 0xFCD
T1CON | 0xFCE
PR1T1GCON | 0xFCF
T1GATETMR1GATE | 0xFD0
T1CLKTMR1CLK | 0xFD1
TMR0TMR0L | 0xFD2
PR0TMR0H | 0xFD3
T0CON0 | 0xFD4
T0CON1 | 0xFD5
PCON1 | 0xFD6
PCON0 | 0xFD7
STATUS | 0xFD8
FSR2L | 0xFD9
FSR2H | 0xFDA
PLUSW2 | 0xFDB
PREINC2 | 0xFDC
POSTDEC2 | 0xFDD
POSTINC2 | 0xFDE
INDF2 | 0xFDF
BSR | 0xFE0
FSR1L | 0xFE1
FSR1H | 0xFE2
PLUSW1 | 0xFE3
PREINC1 | 0xFE4
POSTDEC1 | 0xFE5
POSTINC1 | 0xFE6
INDF1 | 0xFE7
WREG | 0xFE8
FSR0L | 0xFE9
FSR0H | 0xFEA
PLUSW0 | 0xFEB
PREINC0 | 0xFEC
POSTDEC0 | 0xFED
POSTINC0 | 0xFEE
INDF0 | 0xFEF
INTCON | 0xFF2
PRODPRODL | 0xFF3
PRODH | 0xFF4
TABLAT | 0xFF5
TBLPTRTBLPTRL | 0xFF6
TBLPTRH | 0xFF7
TBLPTRU | 0xFF8
PCPCL | 0xFF9
PCLATH | 0xFFA
PCLATU | 0xFFB
STKPTR | 0xFFC
TOSTOSL | 0xFFD
TOSH | 0xFFE
TOSU | 0xFFF

SFR

SFR with alias name.

SFR on Access Area.

This page generated automatically by the device-help.pl program (2022-01-30 15:56:10 UTC) from the 8bit_device.info file (rev: 1.44) of mpasmx and from the gputils source package (rev: svn Unversioned directory). The mpasmx is included in the MPLAB X.