/* Generated automatically by the program `genflags'
   from the machine description file `md'.  */

#ifndef GCC_INSN_FLAGS_H
#define GCC_INSN_FLAGS_H

#define HAVE_addsf3 (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_adddf3 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_addhf3 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_addsi3_extended (TARGET_64BIT)
#define HAVE_subsf3 (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_subdf3 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_subhf3 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_subdi3 (TARGET_64BIT)
#define HAVE_subsi3_extended (TARGET_64BIT)
#define HAVE_negdi2 (TARGET_64BIT)
#define HAVE_negsi2_extended (TARGET_64BIT)
#define HAVE_mulsf3 ((TARGET_HARD_FLOAT  || TARGET_ZFINX) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_muldf3 ((TARGET_HARD_FLOAT  || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_mulhf3 ((TARGET_HARD_FLOAT  || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_muldi3 ((TARGET_ZMMUL || TARGET_MUL) && TARGET_64BIT)
#define HAVE_mulsi3_extended ((TARGET_ZMMUL || TARGET_MUL) && TARGET_64BIT)
#define HAVE_smuldi3_highpart ((TARGET_ZMMUL || TARGET_MUL) && TARGET_64BIT)
#define HAVE_umuldi3_highpart ((TARGET_ZMMUL || TARGET_MUL) && TARGET_64BIT)
#define HAVE_usmuldi3_highpart ((TARGET_ZMMUL || TARGET_MUL) && TARGET_64BIT)
#define HAVE_smulsi3_highpart ((TARGET_ZMMUL || TARGET_MUL) && !TARGET_64BIT)
#define HAVE_umulsi3_highpart ((TARGET_ZMMUL || TARGET_MUL) && !TARGET_64BIT)
#define HAVE_usmulsi3_highpart ((TARGET_ZMMUL || TARGET_MUL) && !TARGET_64BIT)
#define HAVE_divdi3 (TARGET_DIV && TARGET_64BIT)
#define HAVE_udivdi3 (TARGET_DIV && TARGET_64BIT)
#define HAVE_moddi3 (TARGET_DIV && TARGET_64BIT)
#define HAVE_umoddi3 (TARGET_DIV && TARGET_64BIT)
#define HAVE_divsi3_extended (TARGET_DIV && TARGET_64BIT)
#define HAVE_udivsi3_extended (TARGET_DIV && TARGET_64BIT)
#define HAVE_modsi3_extended (TARGET_DIV && TARGET_64BIT)
#define HAVE_umodsi3_extended (TARGET_DIV && TARGET_64BIT)
#define HAVE_divsf3 (((TARGET_HARD_FLOAT || TARGET_ZFINX) && TARGET_FDIV) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_divdf3 (((TARGET_HARD_FLOAT || TARGET_ZFINX) && TARGET_FDIV) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_divhf3 (((TARGET_HARD_FLOAT || TARGET_ZFINX) && TARGET_FDIV) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_sqrtsf2 (((TARGET_HARD_FLOAT || TARGET_ZFINX) && TARGET_FDIV) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_sqrtdf2 (((TARGET_HARD_FLOAT || TARGET_ZFINX) && TARGET_FDIV) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_sqrthf2 (((TARGET_HARD_FLOAT || TARGET_ZFINX) && TARGET_FDIV) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_fmasf4 (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_fmadf4 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_fmahf4 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_fmssf4 ((TARGET_HARD_FLOAT  || TARGET_ZFINX) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_fmsdf4 ((TARGET_HARD_FLOAT  || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_fmshf4 ((TARGET_HARD_FLOAT  || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_fnmssf4 ((TARGET_HARD_FLOAT  || TARGET_ZFINX) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_fnmsdf4 ((TARGET_HARD_FLOAT  || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_fnmshf4 ((TARGET_HARD_FLOAT  || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_fnmasf4 (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_fnmadf4 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_fnmahf4 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_abssf2 (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_absdf2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_abshf2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_copysignsf3 (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_copysigndf3 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_copysignhf3 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_negsf2 (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_negdf2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_neghf2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_fminmsf3 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_fminmdf3 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_fminmhf3 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_fmaxmsf3 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_fmaxmdf3 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_fmaxmhf3 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_fminsf3 (((TARGET_HARD_FLOAT || TARGET_ZFINX) && !HONOR_SNANS (SFmode)) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_fmindf3 (((TARGET_HARD_FLOAT || TARGET_ZFINX) && !HONOR_SNANS (DFmode)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_fminhf3 (((TARGET_HARD_FLOAT || TARGET_ZFINX) && !HONOR_SNANS (HFmode)) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_fmaxsf3 (((TARGET_HARD_FLOAT || TARGET_ZFINX) && !HONOR_SNANS (SFmode)) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_fmaxdf3 (((TARGET_HARD_FLOAT || TARGET_ZFINX) && !HONOR_SNANS (DFmode)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_fmaxhf3 (((TARGET_HARD_FLOAT || TARGET_ZFINX) && !HONOR_SNANS (HFmode)) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_sminsf3 (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_smindf3 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_sminhf3 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_smaxsf3 (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_smaxdf3 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_smaxhf3 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_one_cmplsi2 (!TARGET_64BIT)
#define HAVE_one_cmpldi2 (TARGET_64BIT)
#define HAVE_truncdfsf2 (TARGET_DOUBLE_FLOAT || TARGET_ZDINX)
#define HAVE_truncsfhf2 (TARGET_ZFHMIN || TARGET_ZHINXMIN)
#define HAVE_truncdfhf2 ((TARGET_ZFHMIN && TARGET_DOUBLE_FLOAT) || \
   (TARGET_ZHINXMIN && TARGET_ZDINX))
#define HAVE_truncsfbf2 (TARGET_ZFBFMIN || TARGET_XANDESBFHCVT)
#define HAVE_extendhfsf2 (TARGET_ZFHMIN || TARGET_ZHINXMIN)
#define HAVE_extendbfsf2 (TARGET_ZFBFMIN || TARGET_XANDESBFHCVT)
#define HAVE_extendsfdf2 (TARGET_DOUBLE_FLOAT || TARGET_ZDINX)
#define HAVE_extendhfdf2 ((TARGET_ZFHMIN && TARGET_DOUBLE_FLOAT) || \
   (TARGET_ZHINXMIN && TARGET_ZDINX))
#define HAVE_fix_truncsfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_fixuns_truncsfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_fix_truncdfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_fixuns_truncdfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_fix_trunchfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_fixuns_trunchfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_fix_truncsfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_fixuns_truncsfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_fix_truncdfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_fixuns_truncdfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_fix_trunchfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_fixuns_trunchfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_floatsisf2 (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_floatdisf2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_64BIT)))
#define HAVE_floatsidf2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_floatdidf2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && ((TARGET_DOUBLE_FLOAT || TARGET_ZDINX) && (TARGET_64BIT)))
#define HAVE_floatsihf2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_floatdihf2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && ((TARGET_ZFH || TARGET_ZHINX) && (TARGET_64BIT)))
#define HAVE_floatunssisf2 (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_floatunsdisf2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_64BIT)))
#define HAVE_floatunssidf2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_floatunsdidf2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && ((TARGET_DOUBLE_FLOAT || TARGET_ZDINX) && (TARGET_64BIT)))
#define HAVE_floatunssihf2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_floatunsdihf2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && ((TARGET_ZFH || TARGET_ZHINX) && (TARGET_64BIT)))
#define HAVE_lrintsfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_lrintdfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_lrinthfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_lrintsfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_lrintdfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_lrinthfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_lroundsfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_lfloorsfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_lceilsfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_lbtruncsfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_lroundevensfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_lnearbyintsfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_lrounddfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_lfloordfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_lceildfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_lbtruncdfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_lroundevendfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_lnearbyintdfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_lroundhfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_lfloorhfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_lceilhfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_lbtrunchfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_lroundevenhfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_lnearbyinthfsi2_sext ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_lroundsfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_lfloorsfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_lceilsfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_lbtruncsfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_lroundevensfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_lnearbyintsfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_lrounddfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_lfloordfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_lceildfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_lbtruncdfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_lroundevendfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_lnearbyintdfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_lroundhfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_lfloorhfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_lceilhfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_lbtrunchfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_lroundevenhfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_lnearbyinthfdi2 ((TARGET_64BIT && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_roundsf_zfa2 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_floorsf_zfa2 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_ceilsf_zfa2 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_btruncsf_zfa2 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_roundevensf_zfa2 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_nearbyintsf_zfa2 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_rounddf_zfa2 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_floordf_zfa2 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_ceildf_zfa2 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_btruncdf_zfa2 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_roundevendf_zfa2 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_nearbyintdf_zfa2 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_roundhf_zfa2 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_floorhf_zfa2 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_ceilhf_zfa2 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_btrunchf_zfa2 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_roundevenhf_zfa2 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_nearbyinthf_zfa2 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_rintsf2 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_rintdf2 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_rinthf2 ((TARGET_HARD_FLOAT && TARGET_ZFA) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_got_loadsi (Pmode == SImode)
#define HAVE_got_loaddi (Pmode == DImode)
#define HAVE_tls_add_tp_lesi (Pmode == SImode)
#define HAVE_tls_add_tp_ledi (Pmode == DImode)
#define HAVE_got_load_tls_gdsi (Pmode == SImode)
#define HAVE_got_load_tls_gddi (Pmode == DImode)
#define HAVE_got_load_tls_iesi (Pmode == SImode)
#define HAVE_got_load_tls_iedi (Pmode == DImode)
#define HAVE_tlsdescsi ((TARGET_TLSDESC) && (Pmode == SImode))
#define HAVE_tlsdescdi ((TARGET_TLSDESC) && (Pmode == DImode))
#define HAVE_auipcsi (Pmode == SImode)
#define HAVE_auipcdi (Pmode == DImode)
#define HAVE_movsidf2_low_rv32 (TARGET_HARD_FLOAT && !TARGET_64BIT && TARGET_ZFA)
#define HAVE_movsidf2_high_rv32 (TARGET_HARD_FLOAT && !TARGET_64BIT && TARGET_ZFA)
#define HAVE_movdfsisi3_rv32 (TARGET_HARD_FLOAT && !TARGET_64BIT && TARGET_ZFA)
#define HAVE_fence 1
#define HAVE_fence_i (TARGET_ZIFENCEI)
#define HAVE_riscv_pause 1
#define HAVE_ashldi3 (TARGET_64BIT)
#define HAVE_ashrdi3 (TARGET_64BIT)
#define HAVE_lshrdi3 (TARGET_64BIT)
#define HAVE_ashlsi3_extend (TARGET_64BIT)
#define HAVE_ashrsi3_extend (TARGET_64BIT)
#define HAVE_lshrsi3_extend (TARGET_64BIT)
#define HAVE_and_shift_reversesi (((!SMALL_OPERAND (INTVAL (operands[3])) \
    && SMALL_OPERAND (INTVAL (operands[3]) >> INTVAL (operands[2])) \
    && (!TARGET_ZBS || popcount_hwi (INTVAL (operands[3])) > 1) \
    && (INTVAL (operands[3]) & ((1ULL << INTVAL (operands[2])) - 1)) == 0)) && (!TARGET_64BIT))
#define HAVE_ior_shift_reversesi (((!SMALL_OPERAND (INTVAL (operands[3])) \
    && SMALL_OPERAND (INTVAL (operands[3]) >> INTVAL (operands[2])) \
    && (!TARGET_ZBS || popcount_hwi (INTVAL (operands[3])) > 1) \
    && (INTVAL (operands[3]) & ((1ULL << INTVAL (operands[2])) - 1)) == 0)) && (!TARGET_64BIT))
#define HAVE_xor_shift_reversesi (((!SMALL_OPERAND (INTVAL (operands[3])) \
    && SMALL_OPERAND (INTVAL (operands[3]) >> INTVAL (operands[2])) \
    && (!TARGET_ZBS || popcount_hwi (INTVAL (operands[3])) > 1) \
    && (INTVAL (operands[3]) & ((1ULL << INTVAL (operands[2])) - 1)) == 0)) && (!TARGET_64BIT))
#define HAVE_and_shift_reversedi (((!SMALL_OPERAND (INTVAL (operands[3])) \
    && SMALL_OPERAND (INTVAL (operands[3]) >> INTVAL (operands[2])) \
    && (!TARGET_ZBS || popcount_hwi (INTVAL (operands[3])) > 1) \
    && (INTVAL (operands[3]) & ((1ULL << INTVAL (operands[2])) - 1)) == 0)) && (TARGET_64BIT))
#define HAVE_ior_shift_reversedi (((!SMALL_OPERAND (INTVAL (operands[3])) \
    && SMALL_OPERAND (INTVAL (operands[3]) >> INTVAL (operands[2])) \
    && (!TARGET_ZBS || popcount_hwi (INTVAL (operands[3])) > 1) \
    && (INTVAL (operands[3]) & ((1ULL << INTVAL (operands[2])) - 1)) == 0)) && (TARGET_64BIT))
#define HAVE_xor_shift_reversedi (((!SMALL_OPERAND (INTVAL (operands[3])) \
    && SMALL_OPERAND (INTVAL (operands[3]) >> INTVAL (operands[2])) \
    && (!TARGET_ZBS || popcount_hwi (INTVAL (operands[3])) > 1) \
    && (INTVAL (operands[3]) & ((1ULL << INTVAL (operands[2])) - 1)) == 0)) && (TARGET_64BIT))
#define HAVE_zero_extendsidi2_shifted (TARGET_64BIT && !TARGET_ZBA \
   && ((INTVAL (operands[3]) >> INTVAL (operands[2])) == 0xffffffff))
#define HAVE_flt_quietsfsi4_zfa ((TARGET_HARD_FLOAT && TARGET_ZFA) && (((!TARGET_64BIT) && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX)))
#define HAVE_fle_quietsfsi4_zfa ((TARGET_HARD_FLOAT && TARGET_ZFA) && (((!TARGET_64BIT) && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX)))
#define HAVE_flt_quietsfdi4_zfa ((TARGET_HARD_FLOAT && TARGET_ZFA) && (((TARGET_64BIT) && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX)))
#define HAVE_fle_quietsfdi4_zfa ((TARGET_HARD_FLOAT && TARGET_ZFA) && (((TARGET_64BIT) && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX)))
#define HAVE_flt_quietdfsi4_zfa ((TARGET_HARD_FLOAT && TARGET_ZFA) && (((!TARGET_64BIT) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX)))
#define HAVE_fle_quietdfsi4_zfa ((TARGET_HARD_FLOAT && TARGET_ZFA) && (((!TARGET_64BIT) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX)))
#define HAVE_flt_quietdfdi4_zfa ((TARGET_HARD_FLOAT && TARGET_ZFA) && (((TARGET_64BIT) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX)))
#define HAVE_fle_quietdfdi4_zfa ((TARGET_HARD_FLOAT && TARGET_ZFA) && (((TARGET_64BIT) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX)))
#define HAVE_flt_quiethfsi4_zfa ((TARGET_HARD_FLOAT && TARGET_ZFA) && (((!TARGET_64BIT) && (TARGET_ZFH || TARGET_ZHINX)) && (TARGET_ZFH || TARGET_ZHINX)))
#define HAVE_fle_quiethfsi4_zfa ((TARGET_HARD_FLOAT && TARGET_ZFA) && (((!TARGET_64BIT) && (TARGET_ZFH || TARGET_ZHINX)) && (TARGET_ZFH || TARGET_ZHINX)))
#define HAVE_flt_quiethfdi4_zfa ((TARGET_HARD_FLOAT && TARGET_ZFA) && (((TARGET_64BIT) && (TARGET_ZFH || TARGET_ZHINX)) && (TARGET_ZFH || TARGET_ZHINX)))
#define HAVE_fle_quiethfdi4_zfa ((TARGET_HARD_FLOAT && TARGET_ZFA) && (((TARGET_64BIT) && (TARGET_ZFH || TARGET_ZHINX)) && (TARGET_ZFH || TARGET_ZHINX)))
#define HAVE_fclasssfsi ((TARGET_HARD_FLOAT) && ((!TARGET_64BIT) && (TARGET_HARD_FLOAT || TARGET_ZFINX)))
#define HAVE_fclasssfdi ((TARGET_HARD_FLOAT) && ((TARGET_64BIT) && (TARGET_HARD_FLOAT || TARGET_ZFINX)))
#define HAVE_fclassdfsi ((TARGET_HARD_FLOAT) && ((!TARGET_64BIT) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX)))
#define HAVE_fclassdfdi ((TARGET_HARD_FLOAT) && ((TARGET_64BIT) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX)))
#define HAVE_fclasshfsi ((TARGET_HARD_FLOAT) && ((!TARGET_64BIT) && (TARGET_ZFH || TARGET_ZHINX)))
#define HAVE_fclasshfdi ((TARGET_HARD_FLOAT) && ((TARGET_64BIT) && (TARGET_ZFH || TARGET_ZHINX)))
#define HAVE_slt_sisi3 (!TARGET_64BIT)
#define HAVE_sltu_sisi3 (!TARGET_64BIT)
#define HAVE_slt_disi3 (TARGET_64BIT)
#define HAVE_sltu_disi3 (TARGET_64BIT)
#define HAVE_slt_didi3 (TARGET_64BIT)
#define HAVE_sltu_didi3 (TARGET_64BIT)
#define HAVE_jump 1
#define HAVE_indirect_jumpsi (Pmode == SImode)
#define HAVE_indirect_jumpdi (Pmode == DImode)
#define HAVE_tablejumpsi (!is_zicfilp_p ())
#define HAVE_tablejumpdi ((!is_zicfilp_p ()) && (TARGET_64BIT))
#define HAVE_tablejump_cfisi (is_zicfilp_p ())
#define HAVE_tablejump_cfidi ((is_zicfilp_p ()) && (TARGET_64BIT))
#define HAVE_blockage 1
#define HAVE_simple_return 1
#define HAVE_simple_return_internal 1
#define HAVE_eh_set_lr_si (! TARGET_64BIT)
#define HAVE_eh_set_lr_di (TARGET_64BIT)
#define HAVE_eh_return_internal 1
#define HAVE_sibcall_internal (SIBLING_CALL_P (insn))
#define HAVE_sibcall_value_internal (SIBLING_CALL_P (insn))
#define HAVE_call_internal 1
#define HAVE_call_value_internal 1
#define HAVE_nop 1
#define HAVE_trap 1
#define HAVE_gpr_save 1
#define HAVE_gpr_restore 1
#define HAVE_gpr_restore_return 1
#define HAVE_riscv_frcsr (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_riscv_fscsr (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_riscv_frflags (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_riscv_fsflags (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_riscv_mret 1
#define HAVE_riscv_sret 1
#define HAVE_riscv_mnret (TARGET_SMRNMI)
#define HAVE_stack_tiesi ((!rtx_equal_p (operands[0], operands[1])) && (!TARGET_64BIT))
#define HAVE_stack_tiedi ((!rtx_equal_p (operands[0], operands[1])) && (TARGET_64BIT))
#define HAVE_stack_protect_set_si 1
#define HAVE_stack_protect_set_di (TARGET_64BIT)
#define HAVE_stack_protect_test_si 1
#define HAVE_stack_protect_test_di (TARGET_64BIT)
#define HAVE_riscv_clean_si ((TARGET_ZICBOM) && (!TARGET_64BIT))
#define HAVE_riscv_clean_di ((TARGET_ZICBOM) && (TARGET_64BIT))
#define HAVE_riscv_flush_si ((TARGET_ZICBOM) && (!TARGET_64BIT))
#define HAVE_riscv_flush_di ((TARGET_ZICBOM) && (TARGET_64BIT))
#define HAVE_riscv_inval_si ((TARGET_ZICBOM) && (!TARGET_64BIT))
#define HAVE_riscv_inval_di ((TARGET_ZICBOM) && (TARGET_64BIT))
#define HAVE_riscv_zero_si ((TARGET_ZICBOZ) && (!TARGET_64BIT))
#define HAVE_riscv_zero_di ((TARGET_ZICBOZ) && (TARGET_64BIT))
#define HAVE_prefetch (TARGET_ZICBOP || TARGET_XMIPSCBOP)
#define HAVE_riscv_prefetchi_si ((TARGET_ZICBOP) && (!TARGET_64BIT))
#define HAVE_riscv_prefetchi_di ((TARGET_ZICBOP) && (TARGET_64BIT))
#define HAVE_sspushsi ((TARGET_ZICFISS) && (Pmode == SImode))
#define HAVE_sspushdi ((TARGET_ZICFISS) && (Pmode == DImode))
#define HAVE_sspopchksi ((TARGET_ZICFISS) && (Pmode == SImode))
#define HAVE_sspopchkdi ((TARGET_ZICFISS) && (Pmode == DImode))
#define HAVE_ssrdpsi ((TARGET_ZICFISS) && (Pmode == SImode))
#define HAVE_ssrdpdi ((TARGET_ZICFISS) && (Pmode == DImode))
#define HAVE_write_sspsi ((TARGET_ZICFISS) && (Pmode == SImode))
#define HAVE_write_sspdi ((TARGET_ZICFISS) && (Pmode == DImode))
#define HAVE_lpad (TARGET_ZICFILP)
#define HAVE_set_lplsi (TARGET_ZICFILP)
#define HAVE_set_lpldi ((TARGET_ZICFILP) && (TARGET_64BIT))
#define HAVE_lpad_align (TARGET_ZICFILP)
#define HAVE_set_guardedsi (TARGET_ZICFILP)
#define HAVE_set_guardeddi ((TARGET_ZICFILP) && (TARGET_64BIT))
#define HAVE_and_notsi3 ((TARGET_ZBB || TARGET_ZBKB) && (!TARGET_64BIT))
#define HAVE_ior_notsi3 ((TARGET_ZBB || TARGET_ZBKB) && (!TARGET_64BIT))
#define HAVE_and_notdi3 ((TARGET_ZBB || TARGET_ZBKB) && (TARGET_64BIT))
#define HAVE_ior_notdi3 ((TARGET_ZBB || TARGET_ZBKB) && (TARGET_64BIT))
#define HAVE_rotrsi3_sext (TARGET_64BIT && (TARGET_ZBB || TARGET_ZBKB))
#define HAVE_rotldi3 (TARGET_64BIT && (TARGET_ZBB || TARGET_ZBKB))
#define HAVE_rotlsi3_sext (TARGET_64BIT && (TARGET_ZBB || TARGET_ZBKB))
#define HAVE_orcbsi2 (TARGET_ZBB)
#define HAVE_orcbdi2 ((TARGET_ZBB) && (TARGET_64BIT))
#define HAVE_riscv_clmul_si (TARGET_ZBKC || TARGET_ZBC)
#define HAVE_riscv_clmul_di ((TARGET_ZBKC || TARGET_ZBC) && (TARGET_64BIT))
#define HAVE_riscv_clmulh_si ((TARGET_ZBKC || TARGET_ZBC) && (!TARGET_64BIT))
#define HAVE_riscv_clmulh_di ((TARGET_ZBKC || TARGET_ZBC) && (TARGET_64BIT))
#define HAVE_riscv_clmulr_si ((TARGET_ZBC) && (!TARGET_64BIT))
#define HAVE_riscv_clmulr_di ((TARGET_ZBC) && (TARGET_64BIT))
#define HAVE_riscv_brev8_si (TARGET_ZBKB)
#define HAVE_riscv_brev8_di ((TARGET_ZBKB) && (TARGET_64BIT))
#define HAVE_riscv_zip (TARGET_ZBKB && !TARGET_64BIT)
#define HAVE_riscv_unzip (TARGET_ZBKB && !TARGET_64BIT)
#define HAVE_riscv_pack_sihi ((TARGET_ZBKB) && (!TARGET_64BIT))
#define HAVE_riscv_pack_sisi ((TARGET_ZBKB) && (!TARGET_64BIT))
#define HAVE_riscv_pack_dihi ((TARGET_ZBKB) && (TARGET_64BIT))
#define HAVE_riscv_pack_disi ((TARGET_ZBKB) && (TARGET_64BIT))
#define HAVE_riscv_xpack_si_hi_2 ((TARGET_ZBKB && INTVAL (operands[2]) == BITS_PER_WORD / 2) && (!TARGET_64BIT))
#define HAVE_riscv_xpack_di_si_2 ((TARGET_ZBKB && INTVAL (operands[2]) == BITS_PER_WORD / 2) && (TARGET_64BIT))
#define HAVE_riscv_packh_si ((TARGET_ZBKB) && (!TARGET_64BIT))
#define HAVE_riscv_packh_di ((TARGET_ZBKB) && (TARGET_64BIT))
#define HAVE_riscv_packw (TARGET_ZBKB && TARGET_64BIT)
#define HAVE_riscv_xperm4_si ((TARGET_ZBKX) && (!TARGET_64BIT))
#define HAVE_riscv_xperm4_di ((TARGET_ZBKX) && (TARGET_64BIT))
#define HAVE_riscv_xperm8_si ((TARGET_ZBKX) && (!TARGET_64BIT))
#define HAVE_riscv_xperm8_di ((TARGET_ZBKX) && (TARGET_64BIT))
#define HAVE_riscv_aes32dsi (TARGET_ZKND && !TARGET_64BIT)
#define HAVE_riscv_aes32dsmi (TARGET_ZKND && !TARGET_64BIT)
#define HAVE_riscv_aes64ds (TARGET_ZKND && TARGET_64BIT)
#define HAVE_riscv_aes64dsm (TARGET_ZKND && TARGET_64BIT)
#define HAVE_riscv_aes64im (TARGET_ZKND && TARGET_64BIT)
#define HAVE_riscv_aes64ks1i ((TARGET_ZKND || TARGET_ZKNE) && TARGET_64BIT)
#define HAVE_riscv_aes64ks2 ((TARGET_ZKND || TARGET_ZKNE) && TARGET_64BIT)
#define HAVE_riscv_aes32esi (TARGET_ZKNE && !TARGET_64BIT)
#define HAVE_riscv_aes32esmi (TARGET_ZKNE && !TARGET_64BIT)
#define HAVE_riscv_aes64es (TARGET_ZKNE && TARGET_64BIT)
#define HAVE_riscv_aes64esm (TARGET_ZKNE && TARGET_64BIT)
#define HAVE_riscv_sha256sig0_di_extended (TARGET_ZKNH && TARGET_64BIT)
#define HAVE_riscv_sha256sig1_di_extended (TARGET_ZKNH && TARGET_64BIT)
#define HAVE_riscv_sha256sum0_di_extended (TARGET_ZKNH && TARGET_64BIT)
#define HAVE_riscv_sha256sum1_di_extended (TARGET_ZKNH && TARGET_64BIT)
#define HAVE_riscv_sha512sig0h (TARGET_ZKNH && !TARGET_64BIT)
#define HAVE_riscv_sha512sig0l (TARGET_ZKNH && !TARGET_64BIT)
#define HAVE_riscv_sha512sig1h (TARGET_ZKNH && !TARGET_64BIT)
#define HAVE_riscv_sha512sig1l (TARGET_ZKNH && !TARGET_64BIT)
#define HAVE_riscv_sha512sum0r (TARGET_ZKNH && !TARGET_64BIT)
#define HAVE_riscv_sha512sum1r (TARGET_ZKNH && !TARGET_64BIT)
#define HAVE_riscv_sha512sig0 (TARGET_ZKNH && TARGET_64BIT)
#define HAVE_riscv_sha512sig1 (TARGET_ZKNH && TARGET_64BIT)
#define HAVE_riscv_sha512sum0 (TARGET_ZKNH && TARGET_64BIT)
#define HAVE_riscv_sha512sum1 (TARGET_ZKNH && TARGET_64BIT)
#define HAVE_riscv_sm3p0_di_extended (TARGET_ZKSH && TARGET_64BIT)
#define HAVE_riscv_sm3p1_di_extended (TARGET_ZKSH && TARGET_64BIT)
#define HAVE_riscv_sm4ed_di_extended (TARGET_ZKSED && TARGET_64BIT)
#define HAVE_riscv_sm4ks_di_extended (TARGET_ZKSED && TARGET_64BIT)
#define HAVE_atomic_addqi (TARGET_ZABHA)
#define HAVE_atomic_orqi (TARGET_ZABHA)
#define HAVE_atomic_xorqi (TARGET_ZABHA)
#define HAVE_atomic_andqi (TARGET_ZABHA)
#define HAVE_atomic_addhi (TARGET_ZABHA)
#define HAVE_atomic_orhi (TARGET_ZABHA)
#define HAVE_atomic_xorhi (TARGET_ZABHA)
#define HAVE_atomic_andhi (TARGET_ZABHA)
#define HAVE_amo_atomic_addsi (TARGET_ZAAMO)
#define HAVE_amo_atomic_orsi (TARGET_ZAAMO)
#define HAVE_amo_atomic_xorsi (TARGET_ZAAMO)
#define HAVE_amo_atomic_andsi (TARGET_ZAAMO)
#define HAVE_amo_atomic_adddi ((TARGET_ZAAMO) && (TARGET_64BIT))
#define HAVE_amo_atomic_ordi ((TARGET_ZAAMO) && (TARGET_64BIT))
#define HAVE_amo_atomic_xordi ((TARGET_ZAAMO) && (TARGET_64BIT))
#define HAVE_amo_atomic_anddi ((TARGET_ZAAMO) && (TARGET_64BIT))
#define HAVE_lrsc_atomic_addsi (!TARGET_ZAAMO && TARGET_ZALRSC)
#define HAVE_lrsc_atomic_orsi (!TARGET_ZAAMO && TARGET_ZALRSC)
#define HAVE_lrsc_atomic_xorsi (!TARGET_ZAAMO && TARGET_ZALRSC)
#define HAVE_lrsc_atomic_andsi (!TARGET_ZAAMO && TARGET_ZALRSC)
#define HAVE_lrsc_atomic_adddi ((!TARGET_ZAAMO && TARGET_ZALRSC) && (TARGET_64BIT))
#define HAVE_lrsc_atomic_ordi ((!TARGET_ZAAMO && TARGET_ZALRSC) && (TARGET_64BIT))
#define HAVE_lrsc_atomic_xordi ((!TARGET_ZAAMO && TARGET_ZALRSC) && (TARGET_64BIT))
#define HAVE_lrsc_atomic_anddi ((!TARGET_ZAAMO && TARGET_ZALRSC) && (TARGET_64BIT))
#define HAVE_amo_atomic_fetch_addsi (TARGET_ZAAMO)
#define HAVE_amo_atomic_fetch_orsi (TARGET_ZAAMO)
#define HAVE_amo_atomic_fetch_xorsi (TARGET_ZAAMO)
#define HAVE_amo_atomic_fetch_andsi (TARGET_ZAAMO)
#define HAVE_amo_atomic_fetch_adddi ((TARGET_ZAAMO) && (TARGET_64BIT))
#define HAVE_amo_atomic_fetch_ordi ((TARGET_ZAAMO) && (TARGET_64BIT))
#define HAVE_amo_atomic_fetch_xordi ((TARGET_ZAAMO) && (TARGET_64BIT))
#define HAVE_amo_atomic_fetch_anddi ((TARGET_ZAAMO) && (TARGET_64BIT))
#define HAVE_lrsc_atomic_fetch_addsi (!TARGET_ZAAMO && TARGET_ZALRSC)
#define HAVE_lrsc_atomic_fetch_orsi (!TARGET_ZAAMO && TARGET_ZALRSC)
#define HAVE_lrsc_atomic_fetch_xorsi (!TARGET_ZAAMO && TARGET_ZALRSC)
#define HAVE_lrsc_atomic_fetch_andsi (!TARGET_ZAAMO && TARGET_ZALRSC)
#define HAVE_lrsc_atomic_fetch_adddi ((!TARGET_ZAAMO && TARGET_ZALRSC) && (TARGET_64BIT))
#define HAVE_lrsc_atomic_fetch_ordi ((!TARGET_ZAAMO && TARGET_ZALRSC) && (TARGET_64BIT))
#define HAVE_lrsc_atomic_fetch_xordi ((!TARGET_ZAAMO && TARGET_ZALRSC) && (TARGET_64BIT))
#define HAVE_lrsc_atomic_fetch_anddi ((!TARGET_ZAAMO && TARGET_ZALRSC) && (TARGET_64BIT))
#define HAVE_subword_atomic_fetch_strong_add (TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC)
#define HAVE_subword_atomic_fetch_strong_or (TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC)
#define HAVE_subword_atomic_fetch_strong_xor (TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC)
#define HAVE_subword_atomic_fetch_strong_and (TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC)
#define HAVE_subword_atomic_fetch_strong_nand (TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC)
#define HAVE_zabha_atomic_fetch_addqi (TARGET_ZABHA)
#define HAVE_zabha_atomic_fetch_orqi (TARGET_ZABHA)
#define HAVE_zabha_atomic_fetch_xorqi (TARGET_ZABHA)
#define HAVE_zabha_atomic_fetch_andqi (TARGET_ZABHA)
#define HAVE_zabha_atomic_fetch_addhi (TARGET_ZABHA)
#define HAVE_zabha_atomic_fetch_orhi (TARGET_ZABHA)
#define HAVE_zabha_atomic_fetch_xorhi (TARGET_ZABHA)
#define HAVE_zabha_atomic_fetch_andhi (TARGET_ZABHA)
#define HAVE_amo_atomic_exchangesi (TARGET_ZAAMO)
#define HAVE_amo_atomic_exchangedi ((TARGET_ZAAMO) && (TARGET_64BIT))
#define HAVE_amo_atomic_exchange_extended (TARGET_64BIT && TARGET_ZAAMO)
#define HAVE_lrsc_atomic_exchangesi (!TARGET_ZAAMO && TARGET_ZALRSC)
#define HAVE_lrsc_atomic_exchangedi ((!TARGET_ZAAMO && TARGET_ZALRSC) && (TARGET_64BIT))
#define HAVE_zabha_atomic_exchangeqi (TARGET_ZABHA)
#define HAVE_zabha_atomic_exchangehi (TARGET_ZABHA)
#define HAVE_subword_atomic_exchange_strong (TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC)
#define HAVE_zacas_atomic_cas_value_strongsi (TARGET_ZACAS)
#define HAVE_zacas_atomic_cas_value_strongdi ((TARGET_ZACAS) && (TARGET_64BIT))
#define HAVE_zalrsc_atomic_cas_value_strongsi (TARGET_ZALRSC)
#define HAVE_zalrsc_atomic_cas_value_strongdi ((TARGET_ZALRSC) && (TARGET_64BIT))
#define HAVE_zacas_atomic_cas_value_strongqi (TARGET_ZACAS && TARGET_ZABHA)
#define HAVE_zacas_atomic_cas_value_stronghi (TARGET_ZACAS && TARGET_ZABHA)
#define HAVE_subword_atomic_cas_strong (TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC)
#define HAVE_mem_thread_fence_rvwmo (!TARGET_ZTSO)
#define HAVE_atomic_load_rvwmoqi (!TARGET_ZTSO)
#define HAVE_atomic_load_rvwmohi (!TARGET_ZTSO)
#define HAVE_atomic_load_rvwmosi (!TARGET_ZTSO)
#define HAVE_atomic_load_rvwmodi ((!TARGET_ZTSO) && (TARGET_64BIT))
#define HAVE_atomic_store_rvwmoqi (!TARGET_ZTSO)
#define HAVE_atomic_store_rvwmohi (!TARGET_ZTSO)
#define HAVE_atomic_store_rvwmosi (!TARGET_ZTSO)
#define HAVE_atomic_store_rvwmodi ((!TARGET_ZTSO) && (TARGET_64BIT))
#define HAVE_mem_thread_fence_ztso (TARGET_ZTSO)
#define HAVE_atomic_load_ztsoqi (TARGET_ZTSO)
#define HAVE_atomic_load_ztsohi (TARGET_ZTSO)
#define HAVE_atomic_load_ztsosi (TARGET_ZTSO)
#define HAVE_atomic_load_ztsodi ((TARGET_ZTSO) && (TARGET_64BIT))
#define HAVE_atomic_store_ztsoqi (TARGET_ZTSO)
#define HAVE_atomic_store_ztsohi (TARGET_ZTSO)
#define HAVE_atomic_store_ztsosi (TARGET_ZTSO)
#define HAVE_atomic_store_ztsodi ((TARGET_ZTSO) && (TARGET_64BIT))
#define HAVE_pred_th_whole_movrvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_th_whole_movrvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_th_whole_movrvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_th_whole_movrvvm8hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvm4hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvm2hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvm1hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvmf2hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvmf4hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvm8sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movrvvm4sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movrvvm2sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movrvvm1sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movrvvmf2sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvm8df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_th_whole_movrvvm4df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_th_whole_movrvvm2df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_th_whole_movrvvm1df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_th_whole_movrvvm8bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvm4bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvm2bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvm1bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvmf2bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvmf4bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movv1qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_th_whole_movv2qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_th_whole_movv4qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_th_whole_movv8qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_th_whole_movv16qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_th_whole_movv32qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_th_whole_movv64qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_th_whole_movv128qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_th_whole_movv256qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_th_whole_movv512qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_th_whole_movv1024qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_th_whole_movv2048qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_th_whole_movv4096qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_th_whole_movv1hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_th_whole_movv2hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_th_whole_movv4hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_th_whole_movv8hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_th_whole_movv16hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_th_whole_movv32hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_th_whole_movv64hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_th_whole_movv128hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_th_whole_movv256hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_th_whole_movv512hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_th_whole_movv1024hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_th_whole_movv2048hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_th_whole_movv1si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_th_whole_movv2si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_th_whole_movv4si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_th_whole_movv8si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_th_whole_movv16si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_th_whole_movv32si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_th_whole_movv64si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_th_whole_movv128si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_th_whole_movv256si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_th_whole_movv512si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_th_whole_movv1024si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_th_whole_movv1di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movv2di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movv4di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movv8di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_th_whole_movv16di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_th_whole_movv32di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_th_whole_movv64di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_th_whole_movv128di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_th_whole_movv256di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_th_whole_movv512di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_th_whole_movv1hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movv2hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movv4hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movv8hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movv16hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movv32hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_th_whole_movv64hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_th_whole_movv128hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_th_whole_movv256hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_th_whole_movv512hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_th_whole_movv1024hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_th_whole_movv2048hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_th_whole_movv1sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movv2sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movv4sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movv8sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movv16sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_th_whole_movv32sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_th_whole_movv64sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_th_whole_movv128sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_th_whole_movv256sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_th_whole_movv512sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_th_whole_movv1024sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_th_whole_movv1df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_th_whole_movv2df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_th_whole_movv4df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_th_whole_movv8df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_th_whole_movv16df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_th_whole_movv32df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_th_whole_movv64df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_th_whole_movv128df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_th_whole_movv256df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_th_whole_movv512df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_th_whole_movv1bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movv2bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movv4bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movv8bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movv16bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movv32bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_th_whole_movv64bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_th_whole_movv128bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_th_whole_movv256bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_th_whole_movv512bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_th_whole_movv1024bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_th_whole_movv2048bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_th_whole_movrvvmf8x2qi ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvmf8x3qi ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvmf8x4qi ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvmf8x5qi ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvmf8x6qi ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvmf8x7qi ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvmf8x8qi ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvmf4x2hi ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvmf4x3hi ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvmf4x4hi ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvmf4x5hi ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvmf4x6hi ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvmf4x7hi ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvmf4x8hi ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvmf2x2si ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvmf2x3si ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvmf2x4si ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvmf2x5si ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvmf2x6si ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvmf2x7si ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvmf2x8si ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvm1x2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvm1x3di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvm1x4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvm1x5di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvm1x6di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvm1x7di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvm1x8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvmf4x2bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvmf4x3bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvmf4x4bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvmf4x5bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvmf4x6bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvmf4x7bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvmf4x8bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvmf4x2hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvmf4x3hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvmf4x4hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvmf4x5hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvmf4x6hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvmf4x7hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvmf4x8hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvmf2x2sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movrvvmf2x3sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movrvvmf2x4sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movrvvmf2x5sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movrvvmf2x6sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movrvvmf2x7sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movrvvmf2x8sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movrvvm1x2df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_th_whole_movrvvm1x3df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_th_whole_movrvvm1x4df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_th_whole_movrvvm1x5df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_th_whole_movrvvm1x6df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_th_whole_movrvvm1x7df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_th_whole_movrvvm1x8df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_th_whole_movrvvmf4x2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvmf4x3qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvmf4x4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvmf4x5qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvmf4x6qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvmf4x7qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvmf4x8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvmf2x2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvmf2x3hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvmf2x4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvmf2x5hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvmf2x6hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvmf2x7hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvmf2x8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm1x2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm1x3si (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm1x4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm1x5si (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm1x6si (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm1x7si (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm1x8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm2x2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvm2x3di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvm2x4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvmf2x2bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvmf2x3bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvmf2x4bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvmf2x5bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvmf2x6bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvmf2x7bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvmf2x8bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvmf2x2hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvmf2x3hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvmf2x4hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvmf2x5hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvmf2x6hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvmf2x7hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvmf2x8hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvm1x2sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movrvvm1x3sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movrvvm1x4sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movrvvm1x5sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movrvvm1x6sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movrvvm1x7sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movrvvm1x8sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movrvvm2x2df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_th_whole_movrvvm2x3df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_th_whole_movrvvm2x4df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_th_whole_movrvvmf2x2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvmf2x3qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvmf2x4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvmf2x5qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvmf2x6qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvmf2x7qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvmf2x8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm1x2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm1x3hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm1x4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm1x5hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm1x6hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm1x7hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm1x8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm2x2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm2x3si (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm2x4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm4x2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvm1x2bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvm1x3bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvm1x4bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvm1x5bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvm1x6bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvm1x7bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvm1x8bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvm1x2hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvm1x3hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvm1x4hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvm1x5hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvm1x6hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvm1x7hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvm1x8hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvm2x2sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movrvvm2x3sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movrvvm2x4sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movrvvm4x2df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_th_whole_movrvvm1x2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm1x3qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm1x4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm1x5qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm1x6qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm1x7qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm1x8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm2x2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm2x3hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm2x4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm4x2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm2x2bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvm2x3bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvm2x4bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvm2x2hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvm2x3hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvm2x4hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvm4x2sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_th_whole_movrvvm2x2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm2x3qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm2x4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm4x2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm4x2bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_th_whole_movrvvm4x2hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_th_whole_movrvvm4x2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvmf64bi ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_whole_movrvvmf32bi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvmf16bi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvmf8bi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvmf4bi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvmf2bi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_whole_movrvvm1bi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthbrvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthhrvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthwrvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthbrvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthhrvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthwrvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthbrvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthhrvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthwrvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthbrvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthhrvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthwrvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthbrvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthhrvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthwrvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthbrvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthhrvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthwrvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthbrvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthhrvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthwrvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthbrvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthhrvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthwrvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthbrvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthhrvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthwrvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthbrvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthhrvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthwrvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthbrvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthhrvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthwrvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthbrvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthhrvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthwrvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_store_widthbrvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_store_widthhrvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_store_widthwrvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_store_widthbrvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_store_widthhrvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_store_widthwrvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_store_widthbrvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_store_widthhrvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_store_widthwrvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_store_widthbrvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_store_widthhrvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_store_widthwrvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_store_widthbrvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_store_widthhrvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_store_widthwrvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_store_widthbrvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_store_widthhrvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_store_widthwrvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_store_widthbrvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_store_widthhrvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_store_widthwrvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_load_widthbrvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthburvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthhrvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthhurvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthwrvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthwurvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthbrvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthburvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthhrvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthhurvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthwrvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthwurvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthbrvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthburvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthhrvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthhurvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthwrvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthwurvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthbrvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthburvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthhrvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthhurvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthwrvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthwurvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthbrvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthburvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthhrvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthhurvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthwrvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthwurvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthbrvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthburvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthhrvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthhurvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthwrvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthwurvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthbrvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthburvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthhrvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthhurvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthwrvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthwurvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthbrvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthburvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthhrvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthhurvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthwrvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthwurvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthbrvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthburvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthhrvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthhurvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthwrvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthwurvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthbrvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthburvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthhrvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthhurvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthwrvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthwurvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthbrvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthburvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthhrvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthhurvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthwrvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthwurvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthbrvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthburvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthhrvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthhurvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthwrvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthwurvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_load_widthbrvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_load_widthburvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_load_widthhrvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_load_widthhurvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_load_widthwrvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_load_widthwurvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_load_widthbrvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_load_widthburvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_load_widthhrvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_load_widthhurvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_load_widthwrvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_load_widthwurvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_load_widthbrvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_load_widthburvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_load_widthhrvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_load_widthhurvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_load_widthwrvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_load_widthwurvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_load_widthbrvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_load_widthburvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_load_widthhrvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_load_widthhurvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_load_widthwrvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_load_widthwurvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_load_widthbrvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_load_widthburvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_load_widthhrvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_load_widthhurvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_load_widthwrvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_load_widthwurvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_load_widthbrvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_load_widthburvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_load_widthhrvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_load_widthhurvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_load_widthwrvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_load_widthwurvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_load_widthbrvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_load_widthburvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_load_widthhrvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_load_widthhurvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_load_widthwrvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_load_widthwurvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_store_widthbrvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthhrvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthwrvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthbrvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthhrvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthwrvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthbrvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthhrvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthwrvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthbrvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthhrvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthwrvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthbrvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthhrvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthwrvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthbrvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthhrvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthwrvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthbrvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthhrvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthwrvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthbrvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthhrvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthwrvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthbrvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthhrvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthwrvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthbrvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthhrvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthwrvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthbrvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthhrvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthwrvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthbrvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthhrvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthwrvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_strided_store_widthbrvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_store_widthhrvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_store_widthwrvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_store_widthbrvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_store_widthhrvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_store_widthwrvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_store_widthbrvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_store_widthhrvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_store_widthwrvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_store_widthbrvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_store_widthhrvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_store_widthwrvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_store_widthbrvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_store_widthhrvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_store_widthwrvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_store_widthbrvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_store_widthhrvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_store_widthwrvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_store_widthbrvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_store_widthhrvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_store_widthwrvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_load_widthbrvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthburvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthhrvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthhurvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthwrvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthwurvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthbrvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthburvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthhrvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthhurvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthwrvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthwurvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthbrvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthburvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthhrvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthhurvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthwrvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthwurvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthbrvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthburvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthhrvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthhurvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthwrvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthwurvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthbrvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthburvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthhrvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthhurvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthwrvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthwurvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthbrvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthburvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthhrvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthhurvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthwrvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthwurvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthbrvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthburvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthhrvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthhurvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthwrvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthwurvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthbrvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthburvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthhrvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthhurvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthwrvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthwurvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthbrvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthburvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthhrvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthhurvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthwrvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthwurvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthbrvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthburvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthhrvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthhurvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthwrvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthwurvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthbrvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthburvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthhrvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthhurvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthwrvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthwurvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthbrvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthburvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthhrvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthhurvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthwrvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthwurvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_load_widthbrvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_load_widthburvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_load_widthhrvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_load_widthhurvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_load_widthwrvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_load_widthwurvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_load_widthbrvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_load_widthburvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_load_widthhrvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_load_widthhurvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_load_widthwrvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_load_widthwurvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_load_widthbrvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_load_widthburvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_load_widthhrvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_load_widthhurvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_load_widthwrvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_load_widthwurvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_load_widthbrvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_load_widthburvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_load_widthhrvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_load_widthhurvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_load_widthwrvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_load_widthwurvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_load_widthbrvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_load_widthburvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_load_widthhrvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_load_widthhurvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_load_widthwrvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_load_widthwurvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_load_widthbrvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_load_widthburvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_load_widthhrvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_load_widthhurvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_load_widthwrvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_load_widthwurvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_load_widthbrvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_load_widthburvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_load_widthhrvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_load_widthhurvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_load_widthwrvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_load_widthwurvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_store_widthbrvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthhrvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthwrvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthbrvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthhrvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthwrvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthbrvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthhrvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthwrvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthbrvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthhrvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthwrvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthbrvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthhrvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthwrvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthbrvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthhrvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthwrvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthbrvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthhrvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthwrvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthbrvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthhrvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthwrvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthbrvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthhrvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthwrvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthbrvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthhrvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthwrvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthbrvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthhrvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthwrvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthbrvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthhrvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthwrvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthbrvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthhrvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthwrvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthbrvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthhrvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthwrvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthbrvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthhrvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthwrvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthbrvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthhrvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthwrvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthbrvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthhrvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthwrvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthbrvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthhrvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthwrvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthbrvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthhrvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthwrvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthbrvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthhrvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthwrvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthbrvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthhrvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthwrvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthbrvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthhrvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthwrvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthbrvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthhrvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthwrvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthbrvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthhrvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_ustore_widthwrvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_indexed_store_widthbrvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_store_widthhrvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_store_widthwrvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustore_widthbrvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustore_widthhrvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustore_widthwrvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_store_widthbrvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_store_widthhrvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_store_widthwrvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustore_widthbrvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustore_widthhrvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustore_widthwrvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_store_widthbrvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_store_widthhrvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_store_widthwrvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustore_widthbrvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustore_widthhrvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustore_widthwrvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_store_widthbrvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_store_widthhrvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_store_widthwrvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustore_widthbrvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustore_widthhrvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustore_widthwrvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_store_widthbrvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_store_widthhrvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_store_widthwrvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_ustore_widthbrvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_ustore_widthhrvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_ustore_widthwrvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_store_widthbrvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_store_widthhrvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_store_widthwrvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_ustore_widthbrvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_ustore_widthhrvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_ustore_widthwrvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_store_widthbrvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_store_widthhrvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_store_widthwrvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_ustore_widthbrvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_ustore_widthhrvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_indexed_ustore_widthwrvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vundefinedrvvm8qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm4qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm2qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm1qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm8hi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm4hi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm2hi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm1hi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm8si (TARGET_VECTOR)
#define HAVE_vundefinedrvvm4si (TARGET_VECTOR)
#define HAVE_vundefinedrvvm2si (TARGET_VECTOR)
#define HAVE_vundefinedrvvm1si (TARGET_VECTOR)
#define HAVE_vundefinedrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vundefinedrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vundefinedrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vundefinedrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vundefinedrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vundefinedrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vundefinedrvvm8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvm4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvm2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvm1hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvmf2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvmf4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vundefinedrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vundefinedrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vundefinedrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vundefinedrvvm8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvm4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvm2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvm1bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvmf2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvmf4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_vundefinedv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_vundefinedv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_vundefinedv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_vundefinedv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_vundefinedv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_vundefinedv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vundefinedv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vundefinedv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vundefinedv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vundefinedv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vundefinedv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vundefinedv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vundefinedv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_vundefinedv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_vundefinedv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_vundefinedv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_vundefinedv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_vundefinedv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vundefinedv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vundefinedv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vundefinedv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vundefinedv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vundefinedv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vundefinedv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vundefinedv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_vundefinedv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_vundefinedv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_vundefinedv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_vundefinedv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vundefinedv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vundefinedv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vundefinedv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vundefinedv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vundefinedv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vundefinedv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vundefinedv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vundefinedv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vundefinedv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vundefinedv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vundefinedv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vundefinedv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vundefinedv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vundefinedv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_vundefinedv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_vundefinedv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_vundefinedv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_vundefinedv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vundefinedv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vundefinedv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vundefinedv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_vundefinedv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_vundefinedv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_vundefinedv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_vundefinedv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vundefinedv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vundefinedv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vundefinedv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vundefinedv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vundefinedv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vundefinedv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vundefinedv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vundefinedv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vundefinedv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vundefinedv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vundefinedv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vundefinedv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vundefinedv1bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedv2bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedv4bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedv8bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedv16bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedv32bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_vundefinedv64bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_vundefinedv128bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_vundefinedv256bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_vundefinedv512bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vundefinedv1024bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vundefinedv2048bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vundefinedrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvmf32bi (TARGET_VECTOR)
#define HAVE_vundefinedrvvmf16bi (TARGET_VECTOR)
#define HAVE_vundefinedrvvmf8bi (TARGET_VECTOR)
#define HAVE_vundefinedrvvmf4bi (TARGET_VECTOR)
#define HAVE_vundefinedrvvmf2bi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm1bi (TARGET_VECTOR)
#define HAVE_vundefinedv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_vundefinedv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_vundefinedv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_vundefinedv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_vundefinedv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_vundefinedv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_vundefinedv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vundefinedv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vundefinedv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vundefinedv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vundefinedv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vundefinedv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vundefinedv4096bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vundefinedrvvmf8x2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvmf8x3qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvmf8x4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvmf8x5qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvmf8x6qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvmf8x7qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvmf8x8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvmf4x2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvmf4x3hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvmf4x4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvmf4x5hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvmf4x6hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvmf4x7hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvmf4x8hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvmf2x2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvmf2x3si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvmf2x4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvmf2x5si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvmf2x6si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvmf2x7si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvmf2x8si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvm1x2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvm1x3di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvm1x4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvm1x5di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvm1x6di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvm1x7di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvm1x8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvmf4x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvmf4x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvmf4x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvmf4x5bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvmf4x6bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvmf4x7bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvmf4x8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvmf4x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvmf4x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvmf4x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvmf4x5hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvmf4x6hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvmf4x7hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvmf4x8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvmf2x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedrvvmf2x3sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedrvvmf2x4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedrvvmf2x5sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedrvvmf2x6sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedrvvmf2x7sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedrvvmf2x8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedrvvm1x2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vundefinedrvvm1x3df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vundefinedrvvm1x4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vundefinedrvvm1x5df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vundefinedrvvm1x6df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vundefinedrvvm1x7df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vundefinedrvvm1x8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vundefinedrvvmf4x2qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvmf4x3qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvmf4x4qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvmf4x5qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvmf4x6qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvmf4x7qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvmf4x8qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvmf2x2hi (TARGET_VECTOR)
#define HAVE_vundefinedrvvmf2x3hi (TARGET_VECTOR)
#define HAVE_vundefinedrvvmf2x4hi (TARGET_VECTOR)
#define HAVE_vundefinedrvvmf2x5hi (TARGET_VECTOR)
#define HAVE_vundefinedrvvmf2x6hi (TARGET_VECTOR)
#define HAVE_vundefinedrvvmf2x7hi (TARGET_VECTOR)
#define HAVE_vundefinedrvvmf2x8hi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm1x2si (TARGET_VECTOR)
#define HAVE_vundefinedrvvm1x3si (TARGET_VECTOR)
#define HAVE_vundefinedrvvm1x4si (TARGET_VECTOR)
#define HAVE_vundefinedrvvm1x5si (TARGET_VECTOR)
#define HAVE_vundefinedrvvm1x6si (TARGET_VECTOR)
#define HAVE_vundefinedrvvm1x7si (TARGET_VECTOR)
#define HAVE_vundefinedrvvm1x8si (TARGET_VECTOR)
#define HAVE_vundefinedrvvm2x2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvm2x3di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvm2x4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvmf2x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvmf2x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvmf2x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvmf2x5bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvmf2x6bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvmf2x7bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvmf2x8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvmf2x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvmf2x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvmf2x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvmf2x5hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvmf2x6hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvmf2x7hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvmf2x8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvm1x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedrvvm1x3sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedrvvm1x4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedrvvm1x5sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedrvvm1x6sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedrvvm1x7sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedrvvm1x8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedrvvm2x2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vundefinedrvvm2x3df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vundefinedrvvm2x4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vundefinedrvvmf2x2qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvmf2x3qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvmf2x4qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvmf2x5qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvmf2x6qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvmf2x7qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvmf2x8qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm1x2hi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm1x3hi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm1x4hi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm1x5hi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm1x6hi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm1x7hi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm1x8hi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm2x2si (TARGET_VECTOR)
#define HAVE_vundefinedrvvm2x3si (TARGET_VECTOR)
#define HAVE_vundefinedrvvm2x4si (TARGET_VECTOR)
#define HAVE_vundefinedrvvm4x2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vundefinedrvvm1x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvm1x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvm1x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvm1x5bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvm1x6bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvm1x7bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvm1x8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvm1x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvm1x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvm1x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvm1x5hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvm1x6hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvm1x7hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvm1x8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvm2x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedrvvm2x3sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedrvvm2x4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedrvvm4x2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vundefinedrvvm1x2qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm1x3qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm1x4qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm1x5qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm1x6qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm1x7qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm1x8qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm2x2hi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm2x3hi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm2x4hi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm4x2si (TARGET_VECTOR)
#define HAVE_vundefinedrvvm2x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvm2x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvm2x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvm2x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvm2x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvm2x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvm4x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vundefinedrvvm2x2qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm2x3qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm2x4qi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm4x2hi (TARGET_VECTOR)
#define HAVE_vundefinedrvvm4x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vundefinedrvvm4x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vundefinedrvvm4x2qi (TARGET_VECTOR)
#define HAVE_vlmax_avlsi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_vlmax_avldi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_vxrmsi (TARGET_VECTOR)
#define HAVE_fsrmsi_backup (TARGET_VECTOR)
#define HAVE_fsrmsi_restore (TARGET_VECTOR)
#define HAVE_frrmsi (TARGET_VECTOR)
#define HAVE_vsetvlsi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_vsetvldi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_vsetvl_vtype_change_only (TARGET_VECTOR)
#define HAVE_vsetvl_discard_resultsi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_vsetvl_discard_resultdi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_vsetvlsi_no_side_effects ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_vsetvldi_no_side_effects ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_storervvm8qi (TARGET_VECTOR)
#define HAVE_pred_storervvm4qi (TARGET_VECTOR)
#define HAVE_pred_storervvm2qi (TARGET_VECTOR)
#define HAVE_pred_storervvm1qi (TARGET_VECTOR)
#define HAVE_pred_storervvm8hi (TARGET_VECTOR)
#define HAVE_pred_storervvm4hi (TARGET_VECTOR)
#define HAVE_pred_storervvm2hi (TARGET_VECTOR)
#define HAVE_pred_storervvm1hi (TARGET_VECTOR)
#define HAVE_pred_storervvm8si (TARGET_VECTOR)
#define HAVE_pred_storervvm4si (TARGET_VECTOR)
#define HAVE_pred_storervvm2si (TARGET_VECTOR)
#define HAVE_pred_storervvm1si (TARGET_VECTOR)
#define HAVE_pred_storervvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_storervvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_storervvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_storervvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_storervvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_storervvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_storervvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_storervvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_storervvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_storervvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_storervvm8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_storervvm4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_storervvm2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_storervvm1hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_storervvmf2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_storervvmf4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_storervvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_storervvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_storervvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_storervvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_storervvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_storervvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_storervvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_storervvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_storervvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_storervvm8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_storervvm4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_storervvm2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_storervvm1bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_storervvmf2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_storervvmf4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_storev1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_storev2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_storev4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_storev8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_storev16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_storev32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_storev64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_storev128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_storev256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_storev512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_storev1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_storev2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_storev4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_storev1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_storev2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_storev4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_storev8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_storev16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_storev32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_storev64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_storev128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_storev256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_storev512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_storev1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_storev2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_storev1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_storev2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_storev4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_storev8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_storev16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_storev32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_storev64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_storev128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_storev256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_storev512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_storev1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_storev1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_storev2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_storev4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_storev8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_storev16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_storev32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_storev64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_storev128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_storev256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_storev512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_storev1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_storev2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_storev4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_storev8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_storev16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_storev32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_storev64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_storev128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_storev256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_storev512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_storev1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_storev2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_storev1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_storev2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_storev4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_storev8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_storev16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_storev32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_storev64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_storev128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_storev256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_storev512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_storev1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_storev1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_storev2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_storev4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_storev8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_storev16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_storev32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_storev64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_storev128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_storev256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_storev512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_storev1bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_storev2bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_storev4bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_storev8bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_storev16bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_storev32bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_storev64bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_storev128bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_storev256bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_storev512bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_storev1024bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_storev2048bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_movrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_movrvvmf32bi (TARGET_VECTOR)
#define HAVE_pred_movrvvmf16bi (TARGET_VECTOR)
#define HAVE_pred_movrvvmf8bi (TARGET_VECTOR)
#define HAVE_pred_movrvvmf4bi (TARGET_VECTOR)
#define HAVE_pred_movrvvmf2bi (TARGET_VECTOR)
#define HAVE_pred_movrvvm1bi (TARGET_VECTOR)
#define HAVE_pred_movv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_pred_movv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_pred_movv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_pred_movv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_pred_movv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_pred_movv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_pred_movv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_movv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_movv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_movv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_movv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_movv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_movv4096bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_storervvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_storervvmf32bi (TARGET_VECTOR)
#define HAVE_pred_storervvmf16bi (TARGET_VECTOR)
#define HAVE_pred_storervvmf8bi (TARGET_VECTOR)
#define HAVE_pred_storervvmf4bi (TARGET_VECTOR)
#define HAVE_pred_storervvmf2bi (TARGET_VECTOR)
#define HAVE_pred_storervvm1bi (TARGET_VECTOR)
#define HAVE_pred_mergervvm8qi (TARGET_VECTOR)
#define HAVE_pred_mergervvm4qi (TARGET_VECTOR)
#define HAVE_pred_mergervvm2qi (TARGET_VECTOR)
#define HAVE_pred_mergervvm1qi (TARGET_VECTOR)
#define HAVE_pred_mergervvm8hi (TARGET_VECTOR)
#define HAVE_pred_mergervvm4hi (TARGET_VECTOR)
#define HAVE_pred_mergervvm2hi (TARGET_VECTOR)
#define HAVE_pred_mergervvm1hi (TARGET_VECTOR)
#define HAVE_pred_mergervvm8si (TARGET_VECTOR)
#define HAVE_pred_mergervvm4si (TARGET_VECTOR)
#define HAVE_pred_mergervvm2si (TARGET_VECTOR)
#define HAVE_pred_mergervvm1si (TARGET_VECTOR)
#define HAVE_pred_mergervvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mergervvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mergervvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mergervvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mergervvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_mergervvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_mergervvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mergervvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_mergervvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mergervvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mergervvm8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mergervvm4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mergervvm2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mergervvm1hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mergervvmf2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mergervvmf4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mergervvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mergervvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mergervvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mergervvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mergervvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mergervvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mergervvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mergervvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mergervvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mergervvm8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mergervvm4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mergervvm2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mergervvm1bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mergervvmf2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mergervvmf4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mergev1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_mergev2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_mergev4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_mergev8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_mergev16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_mergev32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_mergev64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mergev128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mergev256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mergev512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mergev1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mergev2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mergev4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mergev1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_mergev2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_mergev4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_mergev8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_mergev16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_mergev32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mergev64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mergev128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mergev256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mergev512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mergev1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mergev2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mergev1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_mergev2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_mergev4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_mergev8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_mergev16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mergev32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mergev64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mergev128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mergev256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mergev512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mergev1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mergev1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mergev2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mergev4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mergev8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mergev16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mergev32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mergev64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mergev128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mergev256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mergev512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mergev1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mergev2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mergev4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mergev8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mergev16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mergev32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mergev64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mergev128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mergev256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mergev512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mergev1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mergev2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mergev1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mergev2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mergev4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mergev8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mergev16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mergev32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mergev64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mergev128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mergev256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mergev512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mergev1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mergev1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mergev2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mergev4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mergev8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mergev16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mergev32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mergev64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mergev128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mergev256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mergev512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mergev1bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mergev2bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mergev4bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mergev8bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mergev16bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mergev32bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mergev64bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mergev128bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mergev256bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mergev512bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mergev1024bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mergev2048bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mergervvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mergervvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mergervvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mergervvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mergervvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mergervvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mergervvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mergervvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mergervvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mergervvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mergervvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mergervvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mergervvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mergervvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_mergervvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_mergervvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_mergervvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_mergervvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mergev1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_mergev2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_mergev4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_mergev8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_mergev16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_mergev32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_mergev64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mergev128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mergev256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mergev512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mergev1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mergev2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mergev4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mergev1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_mergev2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_mergev4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_mergev8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_mergev16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_mergev32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mergev64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mergev128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mergev256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mergev512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mergev1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mergev2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mergev1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_mergev2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_mergev4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_mergev8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_mergev16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mergev32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mergev64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mergev128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mergev256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mergev512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mergev1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_broadcastrvvm8hf_zvfh ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_broadcastrvvm4hf_zvfh ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_broadcastrvvm2hf_zvfh ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_broadcastrvvm1hf_zvfh ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_broadcastrvvmf2hf_zvfh ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_broadcastrvvmf4hf_zvfh ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_broadcastrvvm8sf_zvfh ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_broadcastrvvm4sf_zvfh ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_broadcastrvvm2sf_zvfh ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_broadcastrvvm1sf_zvfh ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_broadcastrvvmf2sf_zvfh ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_broadcastrvvm8df_zvfh ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_broadcastrvvm4df_zvfh ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_broadcastrvvm2df_zvfh ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_broadcastrvvm1df_zvfh ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_broadcastv1hf_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_broadcastv2hf_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_broadcastv4hf_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_broadcastv8hf_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_broadcastv16hf_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_broadcastv32hf_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_broadcastv64hf_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_broadcastv128hf_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_broadcastv256hf_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_broadcastv512hf_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_broadcastv1024hf_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_broadcastv2048hf_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_broadcastv1sf_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_broadcastv2sf_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_broadcastv4sf_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_broadcastv8sf_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_broadcastv16sf_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_broadcastv32sf_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_broadcastv64sf_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_broadcastv128sf_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_broadcastv256sf_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_broadcastv512sf_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_broadcastv1024sf_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_broadcastv1df_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_broadcastv2df_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_broadcastv4df_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_broadcastv8df_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_broadcastv16df_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_broadcastv32df_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_broadcastv64df_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_broadcastv128df_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_broadcastv256df_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_broadcastv512df_zvfh ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_strided_loadrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm8si (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm4si (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm2si (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm1si (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_strided_loadrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_strided_loadrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_loadrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_strided_loadrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_loadrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_loadrvvm8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvm4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvm2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvm1hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvmf2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvmf4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_loadrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_loadrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_loadrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_loadrvvm8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvm4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvm2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvm1bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvmf2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvmf4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_strided_loadv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_strided_loadv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_strided_loadv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_strided_loadv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_strided_loadv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_strided_loadv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_strided_loadv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_strided_loadv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_strided_loadv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_strided_loadv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_strided_loadv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_strided_loadv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_strided_loadv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_strided_loadv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_strided_loadv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_strided_loadv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_strided_loadv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_strided_loadv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_strided_loadv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_strided_loadv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_strided_loadv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_strided_loadv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_strided_loadv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_strided_loadv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_strided_loadv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_strided_loadv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_strided_loadv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_strided_loadv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_strided_loadv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_strided_loadv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_strided_loadv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_strided_loadv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_strided_loadv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_strided_loadv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_strided_loadv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_strided_loadv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_strided_loadv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_strided_loadv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_strided_loadv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_strided_loadv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_strided_loadv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_strided_loadv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_strided_loadv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_strided_loadv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_strided_loadv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_strided_loadv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_strided_loadv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_strided_loadv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_strided_loadv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_strided_loadv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_strided_loadv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_strided_loadv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_strided_loadv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_strided_loadv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_strided_loadv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_strided_loadv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_strided_loadv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_loadv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_loadv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_loadv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_strided_loadv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_strided_loadv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_strided_loadv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_strided_loadv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_strided_loadv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_strided_loadv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_strided_loadv1bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadv2bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadv4bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadv8bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadv16bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadv32bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_strided_loadv64bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_strided_loadv128bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_strided_loadv256bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_strided_loadv512bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_strided_loadv1024bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_strided_loadv2048bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_strided_storervvm8qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm4qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm2qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm1qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm8hi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm4hi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm2hi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm1hi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm8si (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm4si (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm2si (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm1si (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_strided_storervvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_strided_storervvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_storervvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_strided_storervvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_storervvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_storervvm8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvm4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvm2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvm1hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvmf2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvmf4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storervvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storervvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storervvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storervvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_storervvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_storervvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_storervvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_storervvm8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvm4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvm2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvm1bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvmf2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvmf4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storev1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_strided_storev2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_strided_storev4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_strided_storev8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_strided_storev16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_strided_storev32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_strided_storev64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_strided_storev128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_strided_storev256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_strided_storev512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_strided_storev1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_strided_storev2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_strided_storev4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_strided_storev1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_strided_storev2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_strided_storev4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_strided_storev8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_strided_storev16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_strided_storev32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_strided_storev64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_strided_storev128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_strided_storev256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_strided_storev512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_strided_storev1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_strided_storev2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_strided_storev1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_strided_storev2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_strided_storev4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_strided_storev8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_strided_storev16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_strided_storev32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_strided_storev64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_strided_storev128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_strided_storev256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_strided_storev512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_strided_storev1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_strided_storev1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storev2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storev4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storev8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_strided_storev16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_strided_storev32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_strided_storev64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_strided_storev128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_strided_storev256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_strided_storev512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_strided_storev1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storev2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storev4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storev8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storev16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storev32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_strided_storev64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_strided_storev128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_strided_storev256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_strided_storev512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_strided_storev1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_strided_storev2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_strided_storev1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storev2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storev4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storev8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storev16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_strided_storev32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_strided_storev64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_strided_storev128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_strided_storev256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_strided_storev512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_strided_storev1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_strided_storev1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_storev2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_storev4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_storev8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_strided_storev16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_strided_storev32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_strided_storev64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_strided_storev128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_strided_storev256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_strided_storev512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_strided_storev1bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storev2bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storev4bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storev8bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storev16bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storev32bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_strided_storev64bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_strided_storev128bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_strided_storev256bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_strided_storev512bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_strided_storev1024bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_strided_storev2048bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_oloadrvvm8qi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm8qi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm4qi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm4qi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2qi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2qi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1qi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1qi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2qi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2qi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf4qi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf4qi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf8qi_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf8qi_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm8hi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm8hi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm4hi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm4hi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2hi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2hi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1hi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1hi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2hi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2hi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf4hi_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4hi_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm8si_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm8si_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm4si_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm4si_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2si_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2si_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1si_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1si_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2si_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2si_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm8di_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm8di_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm4di_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm4di_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm2di_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm2di_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1di_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1di_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm8bf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm8bf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm4bf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm4bf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm2bf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm2bf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1bf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1bf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2bf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2bf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf4bf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4bf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm8hf_same_eew ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_indexed_uloadrvvm8hf_same_eew ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_indexed_oloadrvvm4hf_same_eew ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_indexed_uloadrvvm4hf_same_eew ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_indexed_oloadrvvm2hf_same_eew ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_indexed_uloadrvvm2hf_same_eew ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_indexed_oloadrvvm1hf_same_eew ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_indexed_uloadrvvm1hf_same_eew ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_indexed_oloadrvvmf2hf_same_eew ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_indexed_uloadrvvmf2hf_same_eew ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_indexed_oloadrvvmf4hf_same_eew ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4hf_same_eew ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm8sf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm8sf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm4sf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm4sf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm2sf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm2sf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm1sf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm1sf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvmf2sf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2sf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm8df_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm8df_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm4df_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm4df_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm2df_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm2df_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1df_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1df_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadv1qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_indexed_uloadv1qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_indexed_oloadv2qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_indexed_uloadv2qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_indexed_oloadv4qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_indexed_uloadv4qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_indexed_oloadv8qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_indexed_uloadv8qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_indexed_oloadv16qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_indexed_uloadv16qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_indexed_oloadv32qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_indexed_uloadv32qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_indexed_oloadv64qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv64qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv128qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv128qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv256qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv256qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv512qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv512qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv1024qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv1024qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv2048qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv2048qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv4096qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_uloadv4096qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_oloadv1hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_indexed_uloadv1hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_indexed_oloadv2hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_indexed_uloadv2hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_indexed_oloadv4hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_indexed_uloadv4hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_indexed_oloadv8hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_indexed_uloadv8hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_indexed_oloadv16hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_indexed_uloadv16hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_indexed_oloadv32hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv32hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv64hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv64hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv128hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv128hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv256hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv256hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv512hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv512hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv1024hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv1024hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv2048hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_uloadv2048hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_oloadv1si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_indexed_uloadv1si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_indexed_oloadv2si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_indexed_uloadv2si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_indexed_oloadv4si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_indexed_uloadv4si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_indexed_oloadv8si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_indexed_uloadv8si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_indexed_oloadv16si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv16si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv32si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv32si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv64si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv64si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv128si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv128si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv256si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv256si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv512si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv512si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv1024si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_uloadv1024si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_oloadv1di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadv1di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadv2di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadv2di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadv4di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadv4di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadv8di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadv8di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadv16di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadv16di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadv32di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadv32di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadv64di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadv64di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadv128di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadv128di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadv256di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadv256di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadv512di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadv512di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadv1hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_indexed_uloadv1hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_indexed_oloadv2hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_indexed_uloadv2hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_indexed_oloadv4hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_indexed_uloadv4hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_indexed_oloadv8hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_indexed_uloadv8hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_indexed_oloadv16hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_indexed_uloadv16hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_indexed_oloadv32hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv32hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv64hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv64hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv128hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv128hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv256hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv256hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv512hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv512hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv1024hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv1024hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv2048hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_uloadv2048hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_oloadv1bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadv1bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadv2bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadv2bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadv4bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadv4bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadv8bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadv8bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadv16bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadv16bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadv32bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv32bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv64bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv64bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv128bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv128bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv256bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv256bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv512bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv512bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv1024bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv1024bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv2048bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_uloadv2048bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_oloadv1sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadv1sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadv2sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadv2sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadv4sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadv4sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadv8sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadv8sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadv16sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv16sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv32sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv32sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv64sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv64sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv128sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv128sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv256sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv256sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv512sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv512sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv1024sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_uloadv1024sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_oloadv1df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadv1df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadv2df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadv2df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadv4df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadv4df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadv8df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadv8df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadv16df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadv16df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadv32df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadv32df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadv64df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadv64df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadv128df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadv128df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadv256df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadv256df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadv512df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadv512df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm8hi_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm8hi_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm4hi_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm4hi_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2hi_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2hi_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1hi_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1hi_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2hi_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2hi_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf4hi_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4hi_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm8bf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm8bf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm4bf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm4bf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm2bf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm2bf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1bf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1bf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2bf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2bf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf4bf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4bf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm8hf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm8hf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm4hf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm4hf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm2hf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm2hf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm1hf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm1hf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvmf2hf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvmf2hf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvmf4hf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4hf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm8si_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm8si_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm4si_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm4si_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2si_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2si_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1si_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1si_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2si_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2si_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm8sf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm8sf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm4sf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm4sf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm2sf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm2sf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm1sf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm1sf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvmf2sf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2sf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm8di_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm8di_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm4di_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm4di_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm2di_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm2di_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1di_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm1di_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm8df_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadrvvm8df_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadrvvm4df_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadrvvm4df_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadrvvm2df_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadrvvm2df_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadrvvm1df_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadrvvm1df_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadv1hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_indexed_uloadv1hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_indexed_oloadv2hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_indexed_uloadv2hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_indexed_oloadv4hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_indexed_uloadv4hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_indexed_oloadv8hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_indexed_uloadv8hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_indexed_oloadv16hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_indexed_uloadv16hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_indexed_oloadv32hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv32hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv64hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv64hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv128hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv128hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv256hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv256hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv512hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv512hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv1024hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv1024hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv1si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_indexed_uloadv1si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_indexed_oloadv2si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_indexed_uloadv2si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_indexed_oloadv4si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_indexed_uloadv4si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_indexed_oloadv8si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_indexed_uloadv8si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_indexed_oloadv16si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv16si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv32si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv32si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv64si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv64si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv128si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv128si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv256si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv256si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv512si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv512si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv1024si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_uloadv1024si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_oloadv1di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadv1di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadv2di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadv2di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadv4di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadv4di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadv8di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv8di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv16di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv16di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv32di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv32di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv64di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv64di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv128di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv128di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv256di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv256di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv512di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_uloadv512di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_oloadv1hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadv1hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadv2hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadv2hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadv4hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadv4hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadv8hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadv8hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadv16hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadv16hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadv32hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv32hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv64hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv64hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv128hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv128hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv256hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv256hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv512hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv512hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv1024hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv1024hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv2048hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_uloadv2048hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_oloadv1bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadv1bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadv2bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadv2bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadv4bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadv4bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadv8bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadv8bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadv16bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadv16bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadv32bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv32bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv64bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv64bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv128bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv128bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv256bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv256bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv512bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv512bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv1024bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv1024bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv2048bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_uloadv2048bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_oloadv1sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadv1sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadv2sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadv2sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadv4sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadv4sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadv8sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadv8sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadv16sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv16sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv32sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv32sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv64sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv64sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv128sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv128sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv256sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv256sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv512sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv512sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv1024sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_uloadv1024sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_oloadv1df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadv1df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadv2df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadv2df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadv4df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadv4df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadv8df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv8df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv16df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv16df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv32df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv32df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv64df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv64df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv128df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv128df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv256df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv256df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv512df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_uloadv512df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_oloadrvvm8si_x4_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm8si_x4_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm4si_x4_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm4si_x4_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2si_x4_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2si_x4_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1si_x4_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1si_x4_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2si_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2si_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm8sf_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm8sf_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm4sf_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm4sf_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm2sf_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm2sf_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm1sf_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm1sf_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvmf2sf_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2sf_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm8di_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm8di_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm4di_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm4di_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm2di_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm2di_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1di_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm1di_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm8df_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadrvvm8df_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadrvvm4df_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadrvvm4df_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadrvvm2df_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadrvvm2df_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadrvvm1df_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadrvvm1df_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadv1si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_indexed_uloadv1si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_indexed_oloadv2si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_indexed_uloadv2si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_indexed_oloadv4si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_indexed_uloadv4si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_indexed_oloadv8si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_indexed_uloadv8si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_indexed_oloadv16si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv16si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv32si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv32si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv64si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv64si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv128si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv128si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv256si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv256si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv512si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv512si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv1024si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_uloadv1024si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_oloadv1di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadv1di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadv2di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadv2di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadv4di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadv4di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadv8di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv8di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv16di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv16di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv32di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv32di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv64di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv64di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv128di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv128di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv256di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv256di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv512di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_uloadv512di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_oloadv1sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadv1sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadv2sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadv2sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadv4sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadv4sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadv8sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadv8sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadv16sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv16sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv32sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv32sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv64sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv64sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv128sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv128sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv256sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv256sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv512sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv512sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv1024sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_uloadv1024sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_oloadv1df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadv1df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadv2df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadv2df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadv4df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadv4df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadv8df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv8df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv16df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv16df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv32df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv32df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv64df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv64df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv128df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv128df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv256df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv256df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv512df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_uloadv512df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_oloadrvvm8di_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm8di_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm4di_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm4di_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm2di_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm2di_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1di_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm1di_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm8df_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadrvvm8df_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadrvvm4df_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadrvvm4df_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadrvvm2df_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadrvvm2df_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadrvvm1df_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadrvvm1df_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadv1di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadv1di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadv2di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadv2di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadv4di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadv4di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadv8di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv8di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv16di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv16di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv32di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv32di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv64di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv64di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv128di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv128di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv256di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv256di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv512di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_uloadv512di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_oloadv1df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadv1df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadv2df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadv2df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadv4df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadv4df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadv8df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv8df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv16df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv16df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv32df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv32df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv64df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv64df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv128df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv128df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv256df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv256df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv512df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_uloadv512df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_oloadrvvm4qi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm4qi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2qi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2qi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1qi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1qi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2qi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2qi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf4qi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf4qi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf8qi_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf8qi_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm4hi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm4hi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2hi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2hi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1hi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1hi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2hi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2hi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf4hi_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4hi_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm4bf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm4bf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm2bf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm2bf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1bf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1bf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2bf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2bf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf4bf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4bf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm4hf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm4hf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm2hf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm2hf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm1hf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm1hf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvmf2hf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvmf2hf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvmf4hf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4hf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm4si_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm4si_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm2si_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm2si_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1si_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1si_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf2si_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf2si_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm4sf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm4sf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm2sf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm2sf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1sf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1sf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf2sf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf2sf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadv1qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_indexed_uloadv1qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_indexed_oloadv2qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_indexed_uloadv2qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_indexed_oloadv4qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_indexed_uloadv4qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_indexed_oloadv8qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_indexed_uloadv8qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_indexed_oloadv16qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_indexed_uloadv16qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_indexed_oloadv32qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv32qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv64qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv64qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv128qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv128qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv256qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv256qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv512qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv512qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv1024qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv1024qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv2048qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv2048qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv1hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_indexed_uloadv1hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_indexed_oloadv2hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_indexed_uloadv2hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_indexed_oloadv4hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_indexed_uloadv4hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_indexed_oloadv8hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_indexed_uloadv8hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_indexed_oloadv16hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_indexed_uloadv16hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_indexed_oloadv32hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv32hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv64hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv64hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv128hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv128hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv256hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv256hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv512hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv512hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv1024hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv1024hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv1si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_indexed_uloadv1si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_indexed_oloadv2si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_indexed_uloadv2si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_indexed_oloadv4si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_indexed_uloadv4si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_indexed_oloadv8si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_indexed_uloadv8si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_indexed_oloadv16si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv16si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv32si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv32si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv64si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv64si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv128si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv128si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv256si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv256si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv512si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv512si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv1hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadv1hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadv2hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadv2hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadv4hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadv4hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadv8hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadv8hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadv16hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadv16hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadv32hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv32hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv64hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv64hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv128hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv128hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv256hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv256hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv512hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv512hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv1024hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv1024hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv1bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadv1bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadv2bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadv2bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadv4bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadv4bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadv8bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadv8bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadv16bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadv16bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadv32bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv32bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv64bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv64bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv128bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv128bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv256bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv256bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv512bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv512bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv1024bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv1024bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv1sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadv1sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadv2sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadv2sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadv4sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadv4sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadv8sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadv8sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadv16sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv16sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv32sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv32sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv64sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv64sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv128sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv128sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv256sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv256sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv512sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv512sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadrvvm2qi_x4_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2qi_x4_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1qi_x4_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1qi_x4_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2qi_x4_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2qi_x4_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf4qi_x4_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf4qi_x4_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf8qi_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf8qi_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm2hi_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm2hi_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1hi_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1hi_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf2hi_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf2hi_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf4hi_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf4hi_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm2bf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm2bf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1bf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1bf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2bf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2bf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf4bf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf4bf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm2hf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm2hf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1hf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1hf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf2hf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf2hf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf4hf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf4hf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadv1qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_indexed_uloadv1qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_indexed_oloadv2qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_indexed_uloadv2qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_indexed_oloadv4qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_indexed_uloadv4qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_indexed_oloadv8qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_indexed_uloadv8qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_indexed_oloadv16qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_indexed_uloadv16qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_indexed_oloadv32qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv32qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv64qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv64qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv128qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv128qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv256qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv256qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv512qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv512qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv1024qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_uloadv1024qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_oloadv1hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_indexed_uloadv1hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_indexed_oloadv2hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_indexed_uloadv2hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_indexed_oloadv4hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_indexed_uloadv4hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_indexed_oloadv8hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_indexed_uloadv8hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_indexed_oloadv16hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_indexed_uloadv16hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_indexed_oloadv32hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv32hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv64hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv64hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv128hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv128hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv256hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv256hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv512hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv512hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv1hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadv1hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadv2hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadv2hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadv4hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadv4hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadv8hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadv8hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadv16hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadv16hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadv32hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv32hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv64hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv64hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv128hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv128hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv256hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv256hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv512hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv512hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadv1bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadv1bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadv2bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadv2bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadv4bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadv4bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadv8bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadv8bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadv16bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadv16bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadv32bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv32bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv64bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv64bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv128bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv128bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv256bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv256bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv512bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv512bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_oloadrvvm1qi_x8_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1qi_x8_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf2qi_x8_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf2qi_x8_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf4qi_x8_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf4qi_x8_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf8qi_x8_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf8qi_x8_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadv1qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_indexed_uloadv1qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_indexed_oloadv2qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_indexed_uloadv2qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_indexed_oloadv4qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_indexed_uloadv4qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_indexed_oloadv8qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_indexed_uloadv8qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_indexed_oloadv16qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_indexed_uloadv16qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_indexed_oloadv32qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_uloadv32qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_oloadv64qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_uloadv64qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_oloadv128qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_uloadv128qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_oloadv256qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_uloadv256qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_oloadv512qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_uloadv512qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorervvm8qi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm8qi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm4qi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm4qi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2qi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2qi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1qi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1qi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2qi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2qi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf4qi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf4qi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf8qi_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf8qi_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm8hi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm8hi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm4hi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm4hi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2hi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2hi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1hi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1hi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2hi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2hi_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf4hi_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4hi_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm8si_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm8si_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm4si_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm4si_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2si_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2si_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1si_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1si_same_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2si_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2si_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm8di_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm8di_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm4di_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm4di_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm2di_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm2di_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1di_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1di_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm8bf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm8bf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm4bf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm4bf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm2bf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm2bf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1bf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1bf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2bf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2bf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf4bf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4bf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm8hf_same_eew ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_indexed_ustorervvm8hf_same_eew ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_indexed_ostorervvm4hf_same_eew ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_indexed_ustorervvm4hf_same_eew ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_indexed_ostorervvm2hf_same_eew ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_indexed_ustorervvm2hf_same_eew ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_indexed_ostorervvm1hf_same_eew ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_indexed_ustorervvm1hf_same_eew ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_indexed_ostorervvmf2hf_same_eew ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_indexed_ustorervvmf2hf_same_eew ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_indexed_ostorervvmf4hf_same_eew ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4hf_same_eew ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm8sf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm8sf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm4sf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm4sf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm2sf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm2sf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm1sf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm1sf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvmf2sf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2sf_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm8df_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm8df_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm4df_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm4df_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm2df_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm2df_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1df_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1df_same_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorev1qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_indexed_ustorev1qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_indexed_ostorev2qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_indexed_ustorev2qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_indexed_ostorev4qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_indexed_ustorev4qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_indexed_ostorev8qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_indexed_ustorev8qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_indexed_ostorev16qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_indexed_ustorev16qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_indexed_ostorev32qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_indexed_ustorev32qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_indexed_ostorev64qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev64qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev128qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev128qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev256qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev256qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev512qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev512qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev1024qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev1024qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev2048qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev2048qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev4096qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ustorev4096qi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ostorev1hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_indexed_ustorev1hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_indexed_ostorev2hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_indexed_ustorev2hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_indexed_ostorev4hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_indexed_ustorev4hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_indexed_ostorev8hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_indexed_ustorev8hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_indexed_ostorev16hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_indexed_ustorev16hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_indexed_ostorev32hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev32hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev64hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev64hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev128hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev128hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev256hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev256hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev512hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev512hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev1024hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev1024hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev2048hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ustorev2048hi_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ostorev1si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_indexed_ustorev1si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_indexed_ostorev2si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_indexed_ustorev2si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_indexed_ostorev4si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_indexed_ustorev4si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_indexed_ostorev8si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_indexed_ustorev8si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_indexed_ostorev16si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev16si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev32si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev32si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev64si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev64si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev128si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev128si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev256si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev256si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev512si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev512si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev1024si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ustorev1024si_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ostorev1di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorev1di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorev2di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorev2di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorev4di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorev4di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorev8di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorev8di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorev16di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorev16di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorev32di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorev32di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorev64di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorev64di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorev128di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorev128di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorev256di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorev256di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorev512di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorev512di_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorev1hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_indexed_ustorev1hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_indexed_ostorev2hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_indexed_ustorev2hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_indexed_ostorev4hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_indexed_ustorev4hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_indexed_ostorev8hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_indexed_ustorev8hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_indexed_ostorev16hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_indexed_ustorev16hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_indexed_ostorev32hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev32hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev64hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev64hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev128hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev128hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev256hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev256hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev512hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev512hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev1024hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev1024hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev2048hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ustorev2048hf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ostorev1bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorev1bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorev2bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorev2bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorev4bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorev4bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorev8bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorev8bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorev16bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorev16bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorev32bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev32bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev64bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev64bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev128bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev128bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev256bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev256bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev512bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev512bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev1024bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev1024bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev2048bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ustorev2048bf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ostorev1sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorev1sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorev2sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorev2sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorev4sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorev4sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorev8sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorev8sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorev16sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev16sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev32sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev32sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev64sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev64sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev128sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev128sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev256sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev256sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev512sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev512sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev1024sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ustorev1024sf_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ostorev1df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorev1df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorev2df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorev2df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorev4df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorev4df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorev8df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorev8df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorev16df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorev16df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorev32df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorev32df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorev64df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorev64df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorev128df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorev128df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorev256df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorev256df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorev512df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorev512df_same_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm8hi_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm8hi_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm4hi_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm4hi_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2hi_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2hi_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1hi_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1hi_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2hi_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2hi_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf4hi_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4hi_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm8bf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm8bf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm4bf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm4bf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm2bf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm2bf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1bf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1bf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2bf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2bf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf4bf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4bf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm8hf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm8hf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm4hf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm4hf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm2hf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm2hf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm1hf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm1hf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvmf2hf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvmf2hf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvmf4hf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4hf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm8si_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm8si_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm4si_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm4si_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2si_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2si_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1si_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1si_x2_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2si_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2si_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm8sf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm8sf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm4sf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm4sf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm2sf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm2sf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm1sf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm1sf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvmf2sf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2sf_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm8di_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm8di_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm4di_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm4di_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm2di_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm2di_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1di_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm1di_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm8df_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorervvm8df_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorervvm4df_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorervvm4df_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorervvm2df_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorervvm2df_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorervvm1df_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorervvm1df_x2_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorev1hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_indexed_ustorev1hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_indexed_ostorev2hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_indexed_ustorev2hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_indexed_ostorev4hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_indexed_ustorev4hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_indexed_ostorev8hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_indexed_ustorev8hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_indexed_ostorev16hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_indexed_ustorev16hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_indexed_ostorev32hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev32hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev64hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev64hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev128hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev128hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev256hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev256hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev512hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev512hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev1024hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev1024hi_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev1si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_indexed_ustorev1si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_indexed_ostorev2si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_indexed_ustorev2si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_indexed_ostorev4si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_indexed_ustorev4si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_indexed_ostorev8si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_indexed_ustorev8si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_indexed_ostorev16si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev16si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev32si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev32si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev64si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev64si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev128si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev128si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev256si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev256si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev512si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev512si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev1024si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ustorev1024si_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ostorev1di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorev1di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorev2di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorev2di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorev4di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorev4di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorev8di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev8di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev16di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev16di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev32di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev32di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev64di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev64di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev128di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev128di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev256di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev256di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev512di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ustorev512di_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ostorev1hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorev1hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorev2hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorev2hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorev4hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorev4hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorev8hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorev8hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorev16hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorev16hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorev32hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev32hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev64hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev64hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev128hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev128hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev256hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev256hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev512hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev512hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev1024hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev1024hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev2048hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ustorev2048hf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ostorev1bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorev1bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorev2bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorev2bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorev4bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorev4bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorev8bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorev8bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorev16bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorev16bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorev32bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev32bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev64bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev64bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev128bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev128bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev256bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev256bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev512bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev512bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev1024bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev1024bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev2048bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ustorev2048bf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ostorev1sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorev1sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorev2sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorev2sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorev4sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorev4sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorev8sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorev8sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorev16sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev16sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev32sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev32sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev64sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev64sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev128sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev128sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev256sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev256sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev512sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev512sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev1024sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ustorev1024sf_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ostorev1df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorev1df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorev2df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorev2df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorev4df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorev4df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorev8df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev8df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev16df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev16df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev32df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev32df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev64df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev64df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev128df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev128df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev256df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev256df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev512df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ustorev512df_x2_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ostorervvm8si_x4_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm8si_x4_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm4si_x4_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm4si_x4_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2si_x4_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2si_x4_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1si_x4_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1si_x4_greater_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2si_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2si_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm8sf_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm8sf_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm4sf_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm4sf_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm2sf_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm2sf_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm1sf_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm1sf_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvmf2sf_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2sf_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm8di_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm8di_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm4di_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm4di_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm2di_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm2di_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1di_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm1di_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm8df_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorervvm8df_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorervvm4df_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorervvm4df_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorervvm2df_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorervvm2df_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorervvm1df_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorervvm1df_x4_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorev1si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_indexed_ustorev1si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_indexed_ostorev2si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_indexed_ustorev2si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_indexed_ostorev4si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_indexed_ustorev4si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_indexed_ostorev8si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_indexed_ustorev8si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_indexed_ostorev16si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev16si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev32si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev32si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev64si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev64si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev128si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev128si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev256si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev256si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev512si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev512si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev1024si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ustorev1024si_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ostorev1di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorev1di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorev2di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorev2di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorev4di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorev4di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorev8di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev8di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev16di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev16di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev32di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev32di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev64di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev64di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev128di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev128di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev256di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev256di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev512di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ustorev512di_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ostorev1sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorev1sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorev2sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorev2sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorev4sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorev4sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorev8sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorev8sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorev16sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev16sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev32sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev32sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev64sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev64sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev128sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev128sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev256sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev256sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev512sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev512sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev1024sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ustorev1024sf_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ostorev1df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorev1df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorev2df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorev2df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorev4df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorev4df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorev8df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev8df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev16df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev16df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev32df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev32df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev64df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev64df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev128df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev128df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev256df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev256df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev512df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ustorev512df_x4_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ostorervvm8di_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm8di_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm4di_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm4di_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm2di_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm2di_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1di_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm1di_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm8df_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorervvm8df_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorervvm4df_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorervvm4df_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorervvm2df_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorervvm2df_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorervvm1df_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorervvm1df_x8_greater_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorev1di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorev1di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorev2di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorev2di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorev4di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorev4di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorev8di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev8di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev16di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev16di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev32di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev32di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev64di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev64di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev128di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev128di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev256di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev256di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev512di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ustorev512di_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ostorev1df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorev1df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorev2df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorev2df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorev4df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorev4df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorev8df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev8df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev16df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev16df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev32df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev32df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev64df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev64df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev128df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev128df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev256df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev256df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev512df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ustorev512df_x8_greater_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_indexed_ostorervvm4qi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm4qi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2qi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2qi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1qi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1qi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2qi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2qi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf4qi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf4qi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf8qi_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf8qi_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm4hi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm4hi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2hi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2hi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1hi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1hi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2hi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2hi_x2_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf4hi_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4hi_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm4bf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm4bf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm2bf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm2bf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1bf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1bf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2bf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2bf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf4bf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4bf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm4hf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm4hf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm2hf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm2hf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm1hf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm1hf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvmf2hf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvmf2hf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvmf4hf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4hf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm4si_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm4si_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm2si_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm2si_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1si_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1si_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf2si_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf2si_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm4sf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm4sf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm2sf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm2sf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1sf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1sf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf2sf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf2sf_x2_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorev1qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_indexed_ustorev1qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_indexed_ostorev2qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_indexed_ustorev2qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_indexed_ostorev4qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_indexed_ustorev4qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_indexed_ostorev8qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_indexed_ustorev8qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_indexed_ostorev16qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_indexed_ustorev16qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_indexed_ostorev32qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev32qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev64qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev64qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev128qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev128qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev256qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev256qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev512qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev512qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev1024qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev1024qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev2048qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev2048qi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev1hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_indexed_ustorev1hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_indexed_ostorev2hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_indexed_ustorev2hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_indexed_ostorev4hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_indexed_ustorev4hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_indexed_ostorev8hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_indexed_ustorev8hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_indexed_ostorev16hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_indexed_ustorev16hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_indexed_ostorev32hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev32hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev64hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev64hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev128hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev128hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev256hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev256hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev512hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev512hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev1024hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev1024hi_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev1si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_indexed_ustorev1si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_indexed_ostorev2si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_indexed_ustorev2si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_indexed_ostorev4si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_indexed_ustorev4si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_indexed_ostorev8si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_indexed_ustorev8si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_indexed_ostorev16si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev16si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev32si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev32si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev64si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev64si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev128si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev128si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev256si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev256si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev512si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev512si_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev1hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorev1hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorev2hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorev2hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorev4hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorev4hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorev8hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorev8hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorev16hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorev16hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorev32hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev32hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev64hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev64hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev128hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev128hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev256hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev256hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev512hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev512hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev1024hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev1024hf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev1bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorev1bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorev2bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorev2bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorev4bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorev4bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorev8bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorev8bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorev16bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorev16bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorev32bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev32bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev64bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev64bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev128bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev128bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev256bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev256bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev512bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev512bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev1024bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev1024bf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev1sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorev1sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorev2sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorev2sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorev4sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorev4sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorev8sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorev8sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorev16sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev16sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev32sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev32sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev64sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev64sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev128sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev128sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev256sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev256sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev512sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev512sf_x2_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorervvm2qi_x4_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2qi_x4_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1qi_x4_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1qi_x4_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2qi_x4_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2qi_x4_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf4qi_x4_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf4qi_x4_smaller_eew (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf8qi_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf8qi_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm2hi_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm2hi_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1hi_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1hi_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf2hi_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf2hi_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf4hi_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf4hi_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm2bf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm2bf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1bf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1bf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2bf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2bf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf4bf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf4bf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm2hf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm2hf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1hf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1hf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf2hf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf2hf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf4hf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf4hf_x4_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorev1qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_indexed_ustorev1qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_indexed_ostorev2qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_indexed_ustorev2qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_indexed_ostorev4qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_indexed_ustorev4qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_indexed_ostorev8qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_indexed_ustorev8qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_indexed_ostorev16qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_indexed_ustorev16qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_indexed_ostorev32qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev32qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev64qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev64qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev128qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev128qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev256qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev256qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev512qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev512qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev1024qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ustorev1024qi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_indexed_ostorev1hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_indexed_ustorev1hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_indexed_ostorev2hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_indexed_ustorev2hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_indexed_ostorev4hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_indexed_ustorev4hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_indexed_ostorev8hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_indexed_ustorev8hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_indexed_ostorev16hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_indexed_ustorev16hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_indexed_ostorev32hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev32hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev64hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev64hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev128hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev128hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev256hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev256hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev512hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev512hi_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev1hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorev1hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorev2hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorev2hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorev4hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorev4hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorev8hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorev8hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorev16hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorev16hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorev32hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev32hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev64hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev64hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev128hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev128hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev256hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev256hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev512hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev512hf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorev1bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorev1bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorev2bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorev2bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorev4bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorev4bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorev8bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorev8bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorev16bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorev16bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorev32bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev32bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev64bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev64bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev128bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev128bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev256bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev256bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev512bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev512bf_x4_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ostorervvm1qi_x8_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1qi_x8_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf2qi_x8_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf2qi_x8_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf4qi_x8_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf4qi_x8_smaller_eew ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf8qi_x8_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf8qi_x8_smaller_eew ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorev1qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_indexed_ustorev1qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_indexed_ostorev2qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_indexed_ustorev2qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_indexed_ostorev4qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_indexed_ustorev4qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_indexed_ostorev8qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_indexed_ustorev8qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_indexed_ostorev16qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_indexed_ustorev16qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_indexed_ostorev32qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ustorev32qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_indexed_ostorev64qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ustorev64qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_indexed_ostorev128qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ustorev128qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_indexed_ostorev256qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ustorev256qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_indexed_ostorev512qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_indexed_ustorev512qi_x8_smaller_eew ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_addrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_subrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_andrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_iorrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_xorrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_ashlrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_ashrrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_lshrrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_smaxrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_umaxrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_sminrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_uminrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_mulrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_divrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_udivrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_modrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_umodrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_addrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_subrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_andrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_iorrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_xorrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_ashlrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_ashrrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_lshrrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_smaxrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_umaxrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_sminrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_uminrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_mulrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_divrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_udivrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_modrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_umodrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_addrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_subrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_andrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_iorrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_xorrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_ashlrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_ashrrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_lshrrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_smaxrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_umaxrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_sminrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_uminrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_mulrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_divrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_udivrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_modrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_umodrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_addrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_subrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_andrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_iorrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_xorrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_ashlrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_ashrrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_lshrrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_smaxrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_umaxrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_sminrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_uminrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_mulrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_divrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_udivrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_modrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_umodrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_addrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_subrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_andrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_iorrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_xorrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_ashlrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_ashrrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_lshrrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_smaxrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_umaxrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_sminrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_uminrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_mulrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_divrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_udivrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_modrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_umodrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_addrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_subrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_andrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_iorrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_xorrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_ashlrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_ashrrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_lshrrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_smaxrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_umaxrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_sminrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_uminrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_mulrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_divrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_udivrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_modrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_umodrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_addrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_subrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_andrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_iorrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_xorrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_ashlrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_ashrrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_lshrrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_smaxrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_umaxrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_sminrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_uminrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_mulrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_divrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_udivrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_modrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_umodrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_addrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_subrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_andrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_iorrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_xorrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_ashlrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_ashrrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_lshrrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_smaxrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_umaxrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_sminrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_uminrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_mulrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_divrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_udivrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_modrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_umodrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_addrvvm8si (TARGET_VECTOR)
#define HAVE_pred_subrvvm8si (TARGET_VECTOR)
#define HAVE_pred_andrvvm8si (TARGET_VECTOR)
#define HAVE_pred_iorrvvm8si (TARGET_VECTOR)
#define HAVE_pred_xorrvvm8si (TARGET_VECTOR)
#define HAVE_pred_ashlrvvm8si (TARGET_VECTOR)
#define HAVE_pred_ashrrvvm8si (TARGET_VECTOR)
#define HAVE_pred_lshrrvvm8si (TARGET_VECTOR)
#define HAVE_pred_smaxrvvm8si (TARGET_VECTOR)
#define HAVE_pred_umaxrvvm8si (TARGET_VECTOR)
#define HAVE_pred_sminrvvm8si (TARGET_VECTOR)
#define HAVE_pred_uminrvvm8si (TARGET_VECTOR)
#define HAVE_pred_mulrvvm8si (TARGET_VECTOR)
#define HAVE_pred_divrvvm8si (TARGET_VECTOR)
#define HAVE_pred_udivrvvm8si (TARGET_VECTOR)
#define HAVE_pred_modrvvm8si (TARGET_VECTOR)
#define HAVE_pred_umodrvvm8si (TARGET_VECTOR)
#define HAVE_pred_addrvvm4si (TARGET_VECTOR)
#define HAVE_pred_subrvvm4si (TARGET_VECTOR)
#define HAVE_pred_andrvvm4si (TARGET_VECTOR)
#define HAVE_pred_iorrvvm4si (TARGET_VECTOR)
#define HAVE_pred_xorrvvm4si (TARGET_VECTOR)
#define HAVE_pred_ashlrvvm4si (TARGET_VECTOR)
#define HAVE_pred_ashrrvvm4si (TARGET_VECTOR)
#define HAVE_pred_lshrrvvm4si (TARGET_VECTOR)
#define HAVE_pred_smaxrvvm4si (TARGET_VECTOR)
#define HAVE_pred_umaxrvvm4si (TARGET_VECTOR)
#define HAVE_pred_sminrvvm4si (TARGET_VECTOR)
#define HAVE_pred_uminrvvm4si (TARGET_VECTOR)
#define HAVE_pred_mulrvvm4si (TARGET_VECTOR)
#define HAVE_pred_divrvvm4si (TARGET_VECTOR)
#define HAVE_pred_udivrvvm4si (TARGET_VECTOR)
#define HAVE_pred_modrvvm4si (TARGET_VECTOR)
#define HAVE_pred_umodrvvm4si (TARGET_VECTOR)
#define HAVE_pred_addrvvm2si (TARGET_VECTOR)
#define HAVE_pred_subrvvm2si (TARGET_VECTOR)
#define HAVE_pred_andrvvm2si (TARGET_VECTOR)
#define HAVE_pred_iorrvvm2si (TARGET_VECTOR)
#define HAVE_pred_xorrvvm2si (TARGET_VECTOR)
#define HAVE_pred_ashlrvvm2si (TARGET_VECTOR)
#define HAVE_pred_ashrrvvm2si (TARGET_VECTOR)
#define HAVE_pred_lshrrvvm2si (TARGET_VECTOR)
#define HAVE_pred_smaxrvvm2si (TARGET_VECTOR)
#define HAVE_pred_umaxrvvm2si (TARGET_VECTOR)
#define HAVE_pred_sminrvvm2si (TARGET_VECTOR)
#define HAVE_pred_uminrvvm2si (TARGET_VECTOR)
#define HAVE_pred_mulrvvm2si (TARGET_VECTOR)
#define HAVE_pred_divrvvm2si (TARGET_VECTOR)
#define HAVE_pred_udivrvvm2si (TARGET_VECTOR)
#define HAVE_pred_modrvvm2si (TARGET_VECTOR)
#define HAVE_pred_umodrvvm2si (TARGET_VECTOR)
#define HAVE_pred_addrvvm1si (TARGET_VECTOR)
#define HAVE_pred_subrvvm1si (TARGET_VECTOR)
#define HAVE_pred_andrvvm1si (TARGET_VECTOR)
#define HAVE_pred_iorrvvm1si (TARGET_VECTOR)
#define HAVE_pred_xorrvvm1si (TARGET_VECTOR)
#define HAVE_pred_ashlrvvm1si (TARGET_VECTOR)
#define HAVE_pred_ashrrvvm1si (TARGET_VECTOR)
#define HAVE_pred_lshrrvvm1si (TARGET_VECTOR)
#define HAVE_pred_smaxrvvm1si (TARGET_VECTOR)
#define HAVE_pred_umaxrvvm1si (TARGET_VECTOR)
#define HAVE_pred_sminrvvm1si (TARGET_VECTOR)
#define HAVE_pred_uminrvvm1si (TARGET_VECTOR)
#define HAVE_pred_mulrvvm1si (TARGET_VECTOR)
#define HAVE_pred_divrvvm1si (TARGET_VECTOR)
#define HAVE_pred_udivrvvm1si (TARGET_VECTOR)
#define HAVE_pred_modrvvm1si (TARGET_VECTOR)
#define HAVE_pred_umodrvvm1si (TARGET_VECTOR)
#define HAVE_pred_addrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_andrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iorrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_xorrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashlrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashrrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_lshrrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smaxrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umaxrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sminrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_uminrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_divrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_udivrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_modrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umodrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_addrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_andrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iorrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_xorrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashlrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashrrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_lshrrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smaxrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umaxrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sminrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_uminrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_divrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_udivrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_modrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umodrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_addrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_andrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iorrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_xorrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashlrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashrrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_lshrrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smaxrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umaxrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sminrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_uminrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_divrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_udivrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_modrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umodrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_addrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_andrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iorrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_xorrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashlrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashrrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_lshrrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smaxrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umaxrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sminrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_uminrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_divrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_udivrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_modrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umodrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_addrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_subrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_andrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_iorrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_xorrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ashlrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ashrrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_lshrrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_smaxrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_umaxrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_sminrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_uminrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_mulrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_divrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_udivrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_modrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_umodrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_addrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_subrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_andrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_iorrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_xorrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ashlrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ashrrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_lshrrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_smaxrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_umaxrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_sminrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_uminrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_mulrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_divrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_udivrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_modrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_umodrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_addrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_subrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_andrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_iorrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_xorrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ashlrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ashrrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_lshrrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_smaxrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_umaxrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_sminrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_uminrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mulrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_divrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_udivrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_modrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_umodrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_addrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_subrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_andrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_iorrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_xorrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ashlrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ashrrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_lshrrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_smaxrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_umaxrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_sminrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_uminrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_mulrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_divrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_udivrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_modrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_umodrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_addrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_subrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_andrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_iorrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_xorrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ashlrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ashrrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_lshrrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_smaxrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_umaxrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_sminrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_uminrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mulrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_divrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_udivrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_modrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_umodrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_addrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_subrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_andrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_iorrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_xorrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ashlrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ashrrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_lshrrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_smaxrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_umaxrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_sminrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_uminrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mulrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_divrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_udivrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_modrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_umodrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_addv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_subv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_andv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_iorv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_xorv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_ashlv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_ashrv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_lshrv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_smaxv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_umaxv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_sminv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_uminv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_mulv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_divv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_udivv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_modv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_umodv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_addv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_subv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_andv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_iorv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_xorv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_ashlv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_ashrv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_lshrv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_smaxv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_umaxv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_sminv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_uminv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_mulv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_divv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_udivv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_modv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_umodv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_addv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_subv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_andv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_iorv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_xorv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_ashlv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_ashrv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_lshrv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_smaxv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_umaxv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_sminv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_uminv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_mulv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_divv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_udivv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_modv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_umodv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_addv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_subv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_andv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_iorv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_xorv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_ashlv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_ashrv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_lshrv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_smaxv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_umaxv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_sminv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_uminv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_mulv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_divv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_udivv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_modv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_umodv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_addv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_subv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_andv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_iorv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_xorv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_ashlv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_ashrv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_lshrv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_smaxv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_umaxv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_sminv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_uminv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_mulv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_divv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_udivv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_modv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_umodv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_addv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_subv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_andv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_iorv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_xorv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_ashlv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_ashrv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_lshrv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_smaxv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_umaxv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_sminv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_uminv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_mulv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_divv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_udivv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_modv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_umodv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_addv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_subv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_andv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_iorv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_xorv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ashlv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ashrv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_lshrv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_smaxv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_umaxv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sminv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_uminv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_divv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_udivv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_modv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_umodv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_addv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_subv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_andv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_iorv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_xorv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ashlv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ashrv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_lshrv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_smaxv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_umaxv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sminv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_uminv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_divv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_udivv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_modv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_umodv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_addv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_subv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_andv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_iorv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_xorv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ashlv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ashrv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_lshrv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_smaxv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_umaxv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sminv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_uminv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_divv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_udivv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_modv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_umodv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_addv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_subv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_andv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_iorv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_xorv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ashlv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ashrv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_lshrv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_smaxv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_umaxv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sminv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_uminv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_divv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_udivv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_modv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_umodv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_addv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_subv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_andv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_iorv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_xorv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ashlv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ashrv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_lshrv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_smaxv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_umaxv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sminv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_uminv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_divv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_udivv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_modv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_umodv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_addv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_subv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_andv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_iorv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_xorv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ashlv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ashrv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_lshrv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_smaxv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_umaxv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sminv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_uminv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_divv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_udivv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_modv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_umodv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_addv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_subv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_andv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_iorv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_xorv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ashlv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ashrv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_lshrv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_smaxv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_umaxv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sminv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_uminv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_divv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_udivv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_modv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_umodv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_addv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_subv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_andv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_iorv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_xorv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_ashlv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_ashrv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_lshrv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_smaxv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_umaxv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_sminv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_uminv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_mulv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_divv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_udivv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_modv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_umodv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_addv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_subv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_andv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_iorv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_xorv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_ashlv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_ashrv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_lshrv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_smaxv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_umaxv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_sminv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_uminv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_mulv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_divv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_udivv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_modv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_umodv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_addv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_subv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_andv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_iorv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_xorv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_ashlv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_ashrv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_lshrv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_smaxv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_umaxv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_sminv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_uminv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_mulv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_divv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_udivv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_modv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_umodv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_addv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_subv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_andv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_iorv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_xorv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_ashlv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_ashrv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_lshrv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_smaxv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_umaxv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_sminv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_uminv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_mulv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_divv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_udivv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_modv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_umodv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_addv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_subv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_andv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_iorv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_xorv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_ashlv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_ashrv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_lshrv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_smaxv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_umaxv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_sminv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_uminv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_mulv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_divv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_udivv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_modv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_umodv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_addv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_subv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_andv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_iorv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_xorv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ashlv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ashrv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_lshrv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_smaxv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_umaxv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sminv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_uminv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_divv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_udivv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_modv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_umodv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_addv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_subv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_andv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_iorv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_xorv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ashlv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ashrv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_lshrv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_smaxv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_umaxv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sminv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_uminv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_divv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_udivv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_modv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_umodv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_addv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_subv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_andv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_iorv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_xorv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ashlv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ashrv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_lshrv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_smaxv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_umaxv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sminv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_uminv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_divv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_udivv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_modv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_umodv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_addv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_subv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_andv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_iorv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_xorv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ashlv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ashrv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_lshrv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_smaxv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_umaxv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sminv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_uminv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_divv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_udivv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_modv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_umodv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_addv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_subv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_andv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_iorv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_xorv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ashlv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ashrv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_lshrv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_smaxv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_umaxv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sminv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_uminv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_divv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_udivv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_modv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_umodv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_addv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_subv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_andv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_iorv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_xorv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ashlv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ashrv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_lshrv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_smaxv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_umaxv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sminv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_uminv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_divv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_udivv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_modv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_umodv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_addv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_subv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_andv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_iorv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_xorv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ashlv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ashrv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_lshrv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_smaxv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_umaxv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sminv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_uminv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_divv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_udivv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_modv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_umodv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_addv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_subv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_andv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_iorv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_xorv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_ashlv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_ashrv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_lshrv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_smaxv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_umaxv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_sminv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_uminv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_mulv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_divv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_udivv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_modv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_umodv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_addv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_subv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_andv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_iorv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_xorv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_ashlv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_ashrv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_lshrv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_smaxv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_umaxv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_sminv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_uminv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_mulv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_divv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_udivv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_modv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_umodv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_addv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_subv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_andv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_iorv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_xorv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_ashlv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_ashrv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_lshrv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_smaxv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_umaxv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_sminv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_uminv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_mulv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_divv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_udivv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_modv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_umodv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_addv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_subv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_andv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_iorv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_xorv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_ashlv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_ashrv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_lshrv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_smaxv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_umaxv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_sminv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_uminv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_mulv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_divv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_udivv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_modv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_umodv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_addv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_subv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_andv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_iorv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_xorv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ashlv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ashrv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_lshrv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_smaxv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_umaxv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sminv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_uminv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_divv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_udivv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_modv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_umodv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_addv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_subv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_andv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_iorv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_xorv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ashlv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ashrv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_lshrv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_smaxv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_umaxv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sminv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_uminv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_divv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_udivv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_modv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_umodv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_addv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_subv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_andv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_iorv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_xorv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ashlv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ashrv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_lshrv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_smaxv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_umaxv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sminv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_uminv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_divv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_udivv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_modv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_umodv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_addv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_subv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_andv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_iorv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_xorv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ashlv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ashrv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_lshrv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_smaxv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_umaxv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sminv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_uminv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_divv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_udivv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_modv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_umodv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_addv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_subv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_andv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_iorv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_xorv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ashlv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ashrv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_lshrv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_smaxv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_umaxv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sminv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_uminv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_divv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_udivv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_modv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_umodv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_addv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_subv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_andv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_iorv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_xorv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ashlv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ashrv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_lshrv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_smaxv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_umaxv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sminv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_uminv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_divv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_udivv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_modv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_umodv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_addv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_subv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_andv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_iorv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_xorv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ashlv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ashrv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_lshrv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_smaxv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_umaxv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sminv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_uminv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_divv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_udivv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_modv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_umodv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_addv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_andv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iorv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_xorv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashlv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashrv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_lshrv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smaxv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umaxv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sminv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_uminv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_divv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_udivv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_modv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umodv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_addv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_andv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iorv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_xorv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashlv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashrv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_lshrv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smaxv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umaxv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sminv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_uminv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_divv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_udivv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_modv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umodv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_addv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_andv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iorv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_xorv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashlv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashrv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_lshrv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smaxv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umaxv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sminv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_uminv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_divv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_udivv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_modv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umodv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_addv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_subv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_andv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_iorv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_xorv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ashlv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ashrv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_lshrv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_smaxv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_umaxv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sminv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_uminv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_divv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_udivv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_modv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_umodv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_addv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_subv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_andv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_iorv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_xorv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ashlv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ashrv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_lshrv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_smaxv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_umaxv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sminv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_uminv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_divv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_udivv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_modv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_umodv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_addv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_subv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_andv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_iorv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_xorv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ashlv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ashrv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_lshrv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_smaxv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_umaxv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sminv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_uminv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_divv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_udivv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_modv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_umodv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_addv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_subv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_andv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_iorv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_xorv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ashlv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ashrv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_lshrv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_smaxv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_umaxv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sminv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_uminv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_divv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_udivv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_modv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_umodv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_addv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_subv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_andv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_iorv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_xorv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ashlv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ashrv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_lshrv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_smaxv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_umaxv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sminv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_uminv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_divv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_udivv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_modv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_umodv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_addv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_subv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_andv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_iorv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_xorv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ashlv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ashrv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_lshrv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_smaxv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_umaxv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sminv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_uminv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_divv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_udivv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_modv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_umodv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_addv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_subv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_andv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_iorv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_xorv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ashlv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ashrv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_lshrv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_smaxv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_umaxv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sminv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_uminv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_divv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_udivv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_modv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_umodv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ashlrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ashrrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_lshrrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ashlrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ashrrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_lshrrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ashlrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ashrrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_lshrrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ashlrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ashrrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_lshrrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ashlrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ashrrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_lshrrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ashlrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ashrrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_lshrrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ashlrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ashrrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_lshrrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ashlrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ashrrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_lshrrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ashlrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_ashrrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_lshrrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_ashlrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_ashrrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_lshrrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_ashlrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_ashrrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_lshrrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_ashlrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_ashrrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_lshrrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_ashlrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashrrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_lshrrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashlrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashrrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_lshrrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashlrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashrrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_lshrrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashlrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashrrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_lshrrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashlrvvmf2qi_scalar ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ashrrvvmf2qi_scalar ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_lshrrvvmf2qi_scalar ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ashlrvvmf4qi_scalar ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ashrrvvmf4qi_scalar ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_lshrrvvmf4qi_scalar ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ashlrvvmf8qi_scalar ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ashrrvvmf8qi_scalar ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_lshrrvvmf8qi_scalar ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ashlrvvmf2hi_scalar ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ashrrvvmf2hi_scalar ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_lshrrvvmf2hi_scalar ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ashlrvvmf4hi_scalar ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ashrrvvmf4hi_scalar ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_lshrrvvmf4hi_scalar ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ashlrvvmf2si_scalar ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ashrrvvmf2si_scalar ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_lshrrvvmf2si_scalar ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ashlv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_ashrv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_lshrv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_ashlv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_ashrv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_lshrv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_ashlv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_ashrv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_lshrv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_ashlv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_ashrv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_lshrv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_ashlv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_ashrv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_lshrv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_ashlv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_ashrv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_lshrv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_ashlv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ashrv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_lshrv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ashlv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ashrv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_lshrv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ashlv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ashrv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_lshrv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ashlv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ashrv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_lshrv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ashlv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ashrv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_lshrv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ashlv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ashrv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_lshrv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ashlv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ashrv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_lshrv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ashlv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_ashrv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_lshrv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_ashlv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_ashrv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_lshrv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_ashlv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_ashrv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_lshrv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_ashlv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_ashrv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_lshrv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_ashlv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_ashrv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_lshrv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_ashlv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ashrv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_lshrv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ashlv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ashrv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_lshrv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ashlv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ashrv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_lshrv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ashlv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ashrv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_lshrv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ashlv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ashrv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_lshrv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ashlv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ashrv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_lshrv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ashlv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ashrv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_lshrv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ashlv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_ashrv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_lshrv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_ashlv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_ashrv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_lshrv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_ashlv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_ashrv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_lshrv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_ashlv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_ashrv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_lshrv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_ashlv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ashrv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_lshrv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ashlv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ashrv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_lshrv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ashlv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ashrv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_lshrv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ashlv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ashrv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_lshrv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ashlv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ashrv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_lshrv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ashlv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ashrv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_lshrv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ashlv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ashrv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_lshrv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ashlv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashrv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_lshrv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashlv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashrv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_lshrv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashlv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashrv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_lshrv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ashlv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ashrv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_lshrv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ashlv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ashrv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_lshrv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ashlv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ashrv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_lshrv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ashlv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ashrv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_lshrv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ashlv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ashrv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_lshrv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ashlv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ashrv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_lshrv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ashlv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ashrv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_lshrv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_addrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_andrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_iorrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_xorrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_smaxrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_umaxrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_sminrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_uminrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_addrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_andrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_iorrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_xorrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_smaxrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_umaxrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_sminrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_uminrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_addrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_andrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_iorrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_xorrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_smaxrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_umaxrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_sminrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_uminrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_addrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_andrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_iorrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_xorrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_smaxrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_umaxrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_sminrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_uminrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_addrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_andrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_iorrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_xorrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_smaxrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_umaxrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_sminrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_uminrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_addrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_andrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_iorrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_xorrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_smaxrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_umaxrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_sminrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_uminrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_addrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_andrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iorrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_xorrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smaxrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umaxrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sminrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_uminrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_addrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_andrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_iorrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_xorrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_smaxrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_umaxrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_sminrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_uminrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_addrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_andrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_iorrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_xorrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_smaxrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_umaxrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_sminrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_uminrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_addrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_andrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_iorrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_xorrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_smaxrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_umaxrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_sminrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_uminrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_addrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_andrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_iorrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_xorrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_smaxrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_umaxrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_sminrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_uminrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_addrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_andrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_iorrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_xorrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_smaxrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_umaxrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_sminrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_uminrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_addrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_andrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iorrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_xorrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smaxrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umaxrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sminrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_uminrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_addrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_andrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_iorrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_xorrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_smaxrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_umaxrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_sminrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_uminrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_mulrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_addrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_andrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_iorrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_xorrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_smaxrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_umaxrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_sminrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_uminrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_mulrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_addrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_andrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_iorrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_xorrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_smaxrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_umaxrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_sminrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_uminrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_mulrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_addrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_andrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_iorrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_xorrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_smaxrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_umaxrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_sminrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_uminrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_mulrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_addrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_andrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iorrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_xorrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smaxrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umaxrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sminrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_uminrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_addv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_andv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_iorv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_xorv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_smaxv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_umaxv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_sminv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_uminv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_mulv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_addv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_andv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_iorv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_xorv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_smaxv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_umaxv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_sminv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_uminv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_mulv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_addv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_andv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_iorv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_xorv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_smaxv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_umaxv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_sminv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_uminv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_mulv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_addv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_andv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_iorv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_xorv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_smaxv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_umaxv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_sminv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_uminv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_mulv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_addv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_andv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_iorv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_xorv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_smaxv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_umaxv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_sminv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_uminv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_mulv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_addv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_andv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_iorv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_xorv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_smaxv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_umaxv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_sminv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_uminv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_mulv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_addv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_andv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_iorv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_xorv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_smaxv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_umaxv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sminv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_uminv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_addv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_andv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_iorv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_xorv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_smaxv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_umaxv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sminv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_uminv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_addv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_andv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_iorv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_xorv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_smaxv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_umaxv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sminv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_uminv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_addv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_andv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_iorv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_xorv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_smaxv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_umaxv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sminv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_uminv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_addv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_andv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_iorv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_xorv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_smaxv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_umaxv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sminv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_uminv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_addv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_andv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_iorv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_xorv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_smaxv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_umaxv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sminv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_uminv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_addv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_andv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_iorv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_xorv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_smaxv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_umaxv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sminv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_uminv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_addv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_andv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_iorv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_xorv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_smaxv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_umaxv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_sminv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_uminv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_mulv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_addv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_andv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_iorv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_xorv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_smaxv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_umaxv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_sminv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_uminv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_mulv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_addv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_andv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_iorv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_xorv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_smaxv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_umaxv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_sminv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_uminv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_mulv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_addv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_andv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_iorv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_xorv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_smaxv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_umaxv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_sminv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_uminv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_mulv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_addv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_andv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_iorv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_xorv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_smaxv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_umaxv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_sminv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_uminv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_mulv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_addv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_andv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_iorv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_xorv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_smaxv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_umaxv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sminv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_uminv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_addv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_andv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_iorv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_xorv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_smaxv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_umaxv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sminv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_uminv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_addv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_andv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_iorv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_xorv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_smaxv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_umaxv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sminv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_uminv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_addv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_andv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_iorv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_xorv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_smaxv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_umaxv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sminv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_uminv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_addv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_andv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_iorv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_xorv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_smaxv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_umaxv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sminv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_uminv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_addv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_andv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_iorv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_xorv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_smaxv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_umaxv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sminv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_uminv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_addv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_andv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_iorv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_xorv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_smaxv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_umaxv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sminv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_uminv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_addv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_andv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_iorv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_xorv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_smaxv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_umaxv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_sminv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_uminv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_mulv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_addv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_andv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_iorv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_xorv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_smaxv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_umaxv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_sminv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_uminv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_mulv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_addv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_andv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_iorv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_xorv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_smaxv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_umaxv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_sminv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_uminv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_mulv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_addv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_andv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_iorv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_xorv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_smaxv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_umaxv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_sminv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_uminv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_mulv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_addv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_andv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_iorv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_xorv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_smaxv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_umaxv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sminv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_uminv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_addv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_andv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_iorv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_xorv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_smaxv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_umaxv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sminv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_uminv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_addv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_andv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_iorv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_xorv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_smaxv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_umaxv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sminv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_uminv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_addv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_andv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_iorv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_xorv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_smaxv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_umaxv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sminv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_uminv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_addv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_andv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_iorv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_xorv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_smaxv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_umaxv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sminv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_uminv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_addv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_andv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_iorv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_xorv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_smaxv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_umaxv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sminv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_uminv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_addv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_andv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_iorv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_xorv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_smaxv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_umaxv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sminv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_uminv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_subrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_divrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_udivrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_modrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_umodrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_divrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_udivrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_modrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_umodrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_divrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_udivrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_modrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_umodrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_divrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_udivrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_modrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_umodrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_divrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_udivrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_modrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_umodrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_divrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_udivrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_modrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_umodrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_divrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_udivrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_modrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umodrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_divrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_udivrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_modrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_umodrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_divrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_udivrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_modrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_umodrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_divrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_udivrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_modrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_umodrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_divrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_udivrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_modrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_umodrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_divrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_udivrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_modrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_umodrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_divrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_udivrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_modrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umodrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_divrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_udivrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_modrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_umodrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_divrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_udivrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_modrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_umodrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_divrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_udivrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_modrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_umodrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_divrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_udivrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_modrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_umodrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_divrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_udivrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_modrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umodrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_divv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_udivv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_modv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_umodv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_subv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_divv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_udivv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_modv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_umodv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_subv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_divv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_udivv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_modv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_umodv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_subv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_divv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_udivv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_modv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_umodv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_subv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_divv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_udivv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_modv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_umodv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_subv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_divv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_udivv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_modv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_umodv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_subv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_divv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_udivv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_modv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_umodv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_subv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_divv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_udivv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_modv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_umodv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_subv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_divv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_udivv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_modv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_umodv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_subv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_divv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_udivv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_modv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_umodv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_subv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_divv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_udivv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_modv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_umodv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_subv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_divv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_udivv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_modv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_umodv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_subv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_divv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_udivv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_modv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_umodv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_subv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_divv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_udivv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_modv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_umodv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_subv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_divv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_udivv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_modv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_umodv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_subv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_divv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_udivv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_modv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_umodv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_subv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_divv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_udivv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_modv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_umodv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_subv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_divv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_udivv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_modv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_umodv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_subv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_divv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_udivv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_modv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_umodv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_subv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_divv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_udivv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_modv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_umodv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_subv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_divv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_udivv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_modv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_umodv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_subv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_divv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_udivv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_modv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_umodv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_subv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_divv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_udivv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_modv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_umodv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_subv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_divv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_udivv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_modv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_umodv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_subv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_divv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_udivv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_modv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_umodv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_subv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_divv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_udivv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_modv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_umodv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_subv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_divv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_udivv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_modv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_umodv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_subv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_divv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_udivv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_modv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_umodv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_subv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_divv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_udivv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_modv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_umodv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_subv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_divv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_udivv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_modv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_umodv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_subv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_divv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_udivv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_modv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_umodv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_subv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_divv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_udivv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_modv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_umodv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_subv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_divv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_udivv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_modv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_umodv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_subv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_divv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_udivv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_modv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_umodv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_subv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_divv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_udivv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_modv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_umodv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_subv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_divv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_udivv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_modv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_umodv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_subrvvm8qi_reverse_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvm4qi_reverse_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvm2qi_reverse_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvm1qi_reverse_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvmf2qi_reverse_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvmf4qi_reverse_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvmf8qi_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subrvvm8hi_reverse_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvm4hi_reverse_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvm2hi_reverse_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvm1hi_reverse_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvmf2hi_reverse_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvmf4hi_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subrvvm8si_reverse_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvm4si_reverse_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvm2si_reverse_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvm1si_reverse_scalar (TARGET_VECTOR)
#define HAVE_pred_subrvvmf2si_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subv1qi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_subv2qi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_subv4qi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_subv8qi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_subv16qi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_subv32qi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_subv64qi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_subv128qi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_subv256qi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_subv512qi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_subv1024qi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_subv2048qi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_subv4096qi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_subv1hi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_subv2hi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_subv4hi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_subv8hi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_subv16hi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_subv32hi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_subv64hi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_subv128hi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_subv256hi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_subv512hi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_subv1024hi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_subv2048hi_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_subv1si_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_subv2si_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_subv4si_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_subv8si_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_subv16si_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_subv32si_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_subv64si_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_subv128si_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_subv256si_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_subv512si_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_subv1024si_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulhrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_mulhurvvm8qi (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvm8qi (TARGET_VECTOR)
#define HAVE_pred_mulhrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_mulhurvvm4qi (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvm4qi (TARGET_VECTOR)
#define HAVE_pred_mulhrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_mulhurvvm2qi (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvm2qi (TARGET_VECTOR)
#define HAVE_pred_mulhrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_mulhurvvm1qi (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvm1qi (TARGET_VECTOR)
#define HAVE_pred_mulhrvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_mulhurvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_mulhrvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_mulhurvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_mulhrvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulhurvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulhsurvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulhrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_mulhurvvm8hi (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvm8hi (TARGET_VECTOR)
#define HAVE_pred_mulhrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_mulhurvvm4hi (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvm4hi (TARGET_VECTOR)
#define HAVE_pred_mulhrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_mulhurvvm2hi (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvm2hi (TARGET_VECTOR)
#define HAVE_pred_mulhrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_mulhurvvm1hi (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvm1hi (TARGET_VECTOR)
#define HAVE_pred_mulhrvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_mulhurvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_mulhrvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulhurvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulhsurvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulhrvvm8si (TARGET_VECTOR)
#define HAVE_pred_mulhurvvm8si (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvm8si (TARGET_VECTOR)
#define HAVE_pred_mulhrvvm4si (TARGET_VECTOR)
#define HAVE_pred_mulhurvvm4si (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvm4si (TARGET_VECTOR)
#define HAVE_pred_mulhrvvm2si (TARGET_VECTOR)
#define HAVE_pred_mulhurvvm2si (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvm2si (TARGET_VECTOR)
#define HAVE_pred_mulhrvvm1si (TARGET_VECTOR)
#define HAVE_pred_mulhurvvm1si (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvm1si (TARGET_VECTOR)
#define HAVE_pred_mulhrvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulhurvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulhsurvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulhrvvm8di ((TARGET_VECTOR) && (TARGET_FULL_V))
#define HAVE_pred_mulhurvvm8di ((TARGET_VECTOR) && (TARGET_FULL_V))
#define HAVE_pred_mulhsurvvm8di ((TARGET_VECTOR) && (TARGET_FULL_V))
#define HAVE_pred_mulhrvvm4di ((TARGET_VECTOR) && (TARGET_FULL_V))
#define HAVE_pred_mulhurvvm4di ((TARGET_VECTOR) && (TARGET_FULL_V))
#define HAVE_pred_mulhsurvvm4di ((TARGET_VECTOR) && (TARGET_FULL_V))
#define HAVE_pred_mulhrvvm2di ((TARGET_VECTOR) && (TARGET_FULL_V))
#define HAVE_pred_mulhurvvm2di ((TARGET_VECTOR) && (TARGET_FULL_V))
#define HAVE_pred_mulhsurvvm2di ((TARGET_VECTOR) && (TARGET_FULL_V))
#define HAVE_pred_mulhrvvm1di ((TARGET_VECTOR) && (TARGET_FULL_V))
#define HAVE_pred_mulhurvvm1di ((TARGET_VECTOR) && (TARGET_FULL_V))
#define HAVE_pred_mulhsurvvm1di ((TARGET_VECTOR) && (TARGET_FULL_V))
#define HAVE_pred_mulhv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_mulhuv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_mulhsuv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_mulhv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_mulhuv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_mulhsuv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_mulhv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_mulhuv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_mulhsuv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_mulhv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_mulhuv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_mulhsuv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_mulhv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_mulhuv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_mulhsuv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_mulhv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_mulhuv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_mulhsuv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_mulhv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulhuv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulhsuv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulhv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulhuv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulhsuv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulhv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulhuv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulhsuv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulhv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulhuv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulhsuv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulhv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulhuv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulhsuv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulhv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulhuv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulhsuv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulhv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulhuv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulhsuv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulhv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_mulhuv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_mulhsuv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_mulhv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_mulhuv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_mulhsuv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_mulhv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_mulhuv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_mulhsuv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_mulhv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_mulhuv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_mulhsuv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_mulhv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_mulhuv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_mulhsuv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_mulhv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulhuv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulhsuv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulhv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulhuv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulhsuv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulhv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulhuv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulhsuv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulhv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulhuv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulhsuv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulhv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulhuv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulhsuv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulhv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulhuv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulhsuv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulhv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulhuv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulhsuv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulhv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_mulhuv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_mulhsuv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_mulhv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_mulhuv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_mulhsuv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_mulhv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_mulhuv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_mulhsuv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_mulhv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_mulhuv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_mulhsuv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_mulhv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulhuv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulhsuv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulhv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulhuv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulhsuv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulhv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulhuv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulhsuv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulhv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulhuv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulhsuv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulhv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulhuv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulhsuv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulhv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulhuv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulhsuv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulhv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulhuv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulhsuv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulhv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_pred_mulhuv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_pred_mulhsuv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_pred_mulhv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_pred_mulhuv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_pred_mulhsuv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_pred_mulhv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_pred_mulhuv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_pred_mulhsuv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_pred_mulhv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulhuv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulhsuv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulhv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulhuv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulhsuv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulhv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulhuv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulhsuv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulhv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulhuv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulhsuv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulhv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulhuv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulhsuv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulhv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulhuv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulhsuv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulhv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulhuv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulhsuv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulhrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhurvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhurvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhurvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhurvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhurvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhurvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulhurvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulhsurvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulhrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhurvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhurvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhurvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhurvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhurvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulhurvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulhsurvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulhrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhurvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhurvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhurvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhurvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhsurvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_mulhrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulhurvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulhsurvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulhv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_mulhuv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_mulhsuv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_mulhv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_mulhuv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_mulhsuv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_mulhv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_mulhuv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_mulhsuv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_mulhv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_mulhuv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_mulhsuv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_mulhv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_mulhuv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_mulhsuv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_mulhv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_mulhuv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_mulhsuv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_mulhv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulhuv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulhsuv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulhv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulhuv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulhsuv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulhv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulhuv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulhsuv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulhv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulhuv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulhsuv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulhv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulhuv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulhsuv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulhv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulhuv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulhsuv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulhv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulhuv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulhsuv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulhv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_mulhuv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_mulhsuv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_mulhv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_mulhuv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_mulhsuv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_mulhv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_mulhuv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_mulhsuv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_mulhv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_mulhuv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_mulhsuv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_mulhv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_mulhuv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_mulhsuv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_mulhv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulhuv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulhsuv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulhv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulhuv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulhsuv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulhv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulhuv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulhsuv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulhv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulhuv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulhsuv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulhv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulhuv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulhsuv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulhv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulhuv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulhsuv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulhv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulhuv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulhsuv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulhv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_mulhuv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_mulhsuv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_mulhv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_mulhuv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_mulhsuv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_mulhv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_mulhuv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_mulhsuv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_mulhv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_mulhuv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_mulhsuv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_mulhv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulhuv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulhsuv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulhv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulhuv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulhsuv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulhv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulhuv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulhsuv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulhv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulhuv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulhsuv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulhv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulhuv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulhsuv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulhv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulhuv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulhsuv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulhv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulhuv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulhsuv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_adcrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_adcrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_adcrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_adcrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_adcrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_adcrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_adcrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_adcrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_adcrvvm8si (TARGET_VECTOR)
#define HAVE_pred_adcrvvm4si (TARGET_VECTOR)
#define HAVE_pred_adcrvvm2si (TARGET_VECTOR)
#define HAVE_pred_adcrvvm1si (TARGET_VECTOR)
#define HAVE_pred_adcrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_adcrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_adcrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_adcrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_adcrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_adcrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_adcrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_adcrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_adcrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_adcrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_sbcrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_sbcrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_sbcrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_sbcrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_sbcrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_sbcrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_sbcrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_sbcrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_sbcrvvm8si (TARGET_VECTOR)
#define HAVE_pred_sbcrvvm4si (TARGET_VECTOR)
#define HAVE_pred_sbcrvvm2si (TARGET_VECTOR)
#define HAVE_pred_sbcrvvm1si (TARGET_VECTOR)
#define HAVE_pred_sbcrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sbcrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sbcrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sbcrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sbcrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_sbcrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_sbcrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_sbcrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_sbcrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_sbcrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_adcrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_adcrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_adcrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_adcrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_adcrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_adcrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_adcrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_adcrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_adcrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_adcrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_adcrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_adcrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_adcrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_adcrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_adcrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_adcrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_adcrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_adcrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_adcv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_adcv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_adcv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_adcv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_adcv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_adcv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_adcv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_adcv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_adcv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_adcv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_adcv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_adcv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_adcv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_adcv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_adcv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_adcv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_adcv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_adcv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_adcv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_adcv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_adcv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_adcv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_adcv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_adcv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_adcv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_adcv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_adcv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_adcv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_adcv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_adcv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_adcv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_adcv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_adcv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_adcv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_adcv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_adcv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sbcrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_sbcrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_sbcrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_sbcrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_sbcrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_sbcrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_sbcrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sbcrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_sbcrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_sbcrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_sbcrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_sbcrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_sbcrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sbcrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_sbcrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_sbcrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_sbcrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_sbcrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sbcv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_sbcv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_sbcv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_sbcv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_sbcv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_sbcv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_sbcv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sbcv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sbcv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sbcv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sbcv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sbcv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sbcv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sbcv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_sbcv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_sbcv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_sbcv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_sbcv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_sbcv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sbcv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sbcv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sbcv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sbcv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sbcv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sbcv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sbcv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_sbcv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_sbcv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_sbcv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_sbcv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sbcv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sbcv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sbcv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sbcv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sbcv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sbcv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_madcrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_madcrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_madcrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_madcrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_madcrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_madcrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_madcrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_madcrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_madcrvvm8si (TARGET_VECTOR)
#define HAVE_pred_madcrvvm4si (TARGET_VECTOR)
#define HAVE_pred_madcrvvm2si (TARGET_VECTOR)
#define HAVE_pred_madcrvvm1si (TARGET_VECTOR)
#define HAVE_pred_madcrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_madcrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_madcrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_madcrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_madcrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_madcrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_madcrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_madcrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_madcrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_madcrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_msbcrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm8si (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm4si (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm2si (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm1si (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_msbcrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_msbcrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_msbcrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_msbcrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_msbcrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_msbcrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_msbcrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_msbcrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_msbcrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_madcrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_madcrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_madcrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_madcv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_madcv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_madcv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_madcv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_madcv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_madcv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_madcv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_madcv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_madcv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_madcv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_madcv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_madcv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_madcv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_madcv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_madcv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_madcv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_madcv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_madcv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_madcv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_madcv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_madcv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_madcv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_madcv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_madcv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_madcv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_madcv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_madcv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_madcv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_madcv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_madcv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_madcv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_madcv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_madcv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_madcv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_madcv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_madcv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_msbcrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_msbcrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_msbcrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_msbcv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_msbcv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_msbcv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_msbcv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_msbcv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_msbcv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_msbcv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_msbcv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_msbcv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_msbcv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_msbcv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_msbcv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_msbcv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_msbcv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_msbcv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_msbcv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_msbcv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_msbcv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_msbcv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_msbcv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_msbcv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_msbcv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_msbcv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_msbcv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_msbcv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_msbcv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_msbcv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_msbcv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_msbcv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_msbcv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_msbcv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_msbcv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_msbcv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_msbcv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_msbcv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_msbcv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_madcrvvm8qi_overflow (TARGET_VECTOR)
#define HAVE_pred_madcrvvm4qi_overflow (TARGET_VECTOR)
#define HAVE_pred_madcrvvm2qi_overflow (TARGET_VECTOR)
#define HAVE_pred_madcrvvm1qi_overflow (TARGET_VECTOR)
#define HAVE_pred_madcrvvm8hi_overflow (TARGET_VECTOR)
#define HAVE_pred_madcrvvm4hi_overflow (TARGET_VECTOR)
#define HAVE_pred_madcrvvm2hi_overflow (TARGET_VECTOR)
#define HAVE_pred_madcrvvm1hi_overflow (TARGET_VECTOR)
#define HAVE_pred_madcrvvm8si_overflow (TARGET_VECTOR)
#define HAVE_pred_madcrvvm4si_overflow (TARGET_VECTOR)
#define HAVE_pred_madcrvvm2si_overflow (TARGET_VECTOR)
#define HAVE_pred_madcrvvm1si_overflow (TARGET_VECTOR)
#define HAVE_pred_madcrvvm8di_overflow ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_madcrvvm4di_overflow ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_madcrvvm2di_overflow ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_madcrvvm1di_overflow ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_madcrvvmf2qi_overflow ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_madcrvvmf4qi_overflow ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_madcrvvmf8qi_overflow ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_madcrvvmf2hi_overflow ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_madcrvvmf4hi_overflow ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_madcrvvmf2si_overflow ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_msbcrvvm8qi_overflow (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm4qi_overflow (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm2qi_overflow (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm1qi_overflow (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm8hi_overflow (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm4hi_overflow (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm2hi_overflow (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm1hi_overflow (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm8si_overflow (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm4si_overflow (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm2si_overflow (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm1si_overflow (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm8di_overflow ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_msbcrvvm4di_overflow ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_msbcrvvm2di_overflow ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_msbcrvvm1di_overflow ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_msbcrvvmf2qi_overflow ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_msbcrvvmf4qi_overflow ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_msbcrvvmf8qi_overflow ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_msbcrvvmf2hi_overflow ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_msbcrvvmf4hi_overflow ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_msbcrvvmf2si_overflow ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_madcrvvm8qi_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvm4qi_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvm2qi_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvm1qi_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvmf2qi_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvmf4qi_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvmf8qi_overflow_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_madcrvvm8hi_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvm4hi_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvm2hi_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvm1hi_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvmf2hi_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvmf4hi_overflow_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_madcrvvm8si_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvm4si_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvm2si_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvm1si_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_madcrvvmf2si_overflow_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_madcv1qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_madcv2qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_madcv4qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_madcv8qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_madcv16qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_madcv32qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_madcv64qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_madcv128qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_madcv256qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_madcv512qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_madcv1024qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_madcv2048qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_madcv4096qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_madcv1hi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_madcv2hi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_madcv4hi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_madcv8hi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_madcv16hi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_madcv32hi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_madcv64hi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_madcv128hi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_madcv256hi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_madcv512hi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_madcv1024hi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_madcv2048hi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_madcv1si_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_madcv2si_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_madcv4si_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_madcv8si_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_madcv16si_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_madcv32si_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_madcv64si_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_madcv128si_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_madcv256si_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_madcv512si_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_madcv1024si_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_msbcrvvm8qi_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm4qi_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm2qi_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm1qi_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvmf2qi_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvmf4qi_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvmf8qi_overflow_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_msbcrvvm8hi_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm4hi_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm2hi_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm1hi_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvmf2hi_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvmf4hi_overflow_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_msbcrvvm8si_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm4si_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm2si_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvm1si_overflow_scalar (TARGET_VECTOR)
#define HAVE_pred_msbcrvvmf2si_overflow_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_msbcv1qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_msbcv2qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_msbcv4qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_msbcv8qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_msbcv16qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_msbcv32qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_msbcv64qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_msbcv128qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_msbcv256qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_msbcv512qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_msbcv1024qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_msbcv2048qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_msbcv4096qi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_msbcv1hi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_msbcv2hi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_msbcv4hi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_msbcv8hi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_msbcv16hi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_msbcv32hi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_msbcv64hi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_msbcv128hi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_msbcv256hi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_msbcv512hi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_msbcv1024hi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_msbcv2048hi_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_msbcv1si_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_msbcv2si_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_msbcv4si_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_msbcv8si_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_msbcv16si_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_msbcv32si_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_msbcv64si_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_msbcv128si_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_msbcv256si_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_msbcv512si_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_msbcv1024si_overflow_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_negrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_one_cmplrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_negrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_one_cmplrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_negrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_one_cmplrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_negrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_one_cmplrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_negrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_one_cmplrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_negrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_one_cmplrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_negrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_one_cmplrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_negrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_one_cmplrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_negrvvm8si (TARGET_VECTOR)
#define HAVE_pred_one_cmplrvvm8si (TARGET_VECTOR)
#define HAVE_pred_negrvvm4si (TARGET_VECTOR)
#define HAVE_pred_one_cmplrvvm4si (TARGET_VECTOR)
#define HAVE_pred_negrvvm2si (TARGET_VECTOR)
#define HAVE_pred_one_cmplrvvm2si (TARGET_VECTOR)
#define HAVE_pred_negrvvm1si (TARGET_VECTOR)
#define HAVE_pred_one_cmplrvvm1si (TARGET_VECTOR)
#define HAVE_pred_negrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_one_cmplrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_negrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_one_cmplrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_negrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_one_cmplrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_negrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_one_cmplrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_negrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_one_cmplrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_negrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_one_cmplrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_negrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_one_cmplrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_negrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_one_cmplrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_negrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_one_cmplrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_negrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_one_cmplrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_negv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_one_cmplv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_negv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_one_cmplv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_negv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_one_cmplv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_negv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_one_cmplv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_negv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_one_cmplv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_negv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_one_cmplv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_negv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_one_cmplv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_negv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_one_cmplv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_negv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_one_cmplv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_negv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_one_cmplv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_negv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_one_cmplv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_negv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_one_cmplv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_negv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_one_cmplv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_negv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_one_cmplv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_negv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_one_cmplv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_negv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_one_cmplv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_negv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_one_cmplv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_negv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_one_cmplv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_negv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_one_cmplv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_negv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_one_cmplv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_negv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_one_cmplv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_negv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_one_cmplv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_negv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_one_cmplv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_negv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_one_cmplv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_negv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_one_cmplv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_negv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_one_cmplv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_negv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_one_cmplv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_negv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_one_cmplv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_negv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_one_cmplv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_negv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_one_cmplv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_negv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_one_cmplv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_negv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_one_cmplv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_negv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_one_cmplv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_negv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_one_cmplv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_negv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_one_cmplv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_negv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_one_cmplv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_negv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_one_cmplv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_negv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_one_cmplv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_negv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_one_cmplv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_negv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_one_cmplv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_negv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_one_cmplv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_negv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_one_cmplv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_negv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_one_cmplv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_negv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_one_cmplv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_negv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_one_cmplv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_negv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_one_cmplv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_extendrvvm8hi_vf2 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_zero_extendrvvm8hi_vf2 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_extendrvvm4hi_vf2 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_zero_extendrvvm4hi_vf2 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_extendrvvm2hi_vf2 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_zero_extendrvvm2hi_vf2 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_extendrvvm1hi_vf2 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_zero_extendrvvm1hi_vf2 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_extendrvvmf2hi_vf2 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_zero_extendrvvmf2hi_vf2 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_extendrvvmf4hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendrvvmf4hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendrvvm8si_vf2 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_zero_extendrvvm8si_vf2 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_extendrvvm4si_vf2 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_zero_extendrvvm4si_vf2 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_extendrvvm2si_vf2 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_zero_extendrvvm2si_vf2 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_extendrvvm1si_vf2 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_zero_extendrvvm1si_vf2 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_extendrvvmf2si_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendrvvmf2si_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendrvvm8di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendrvvm8di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendrvvm4di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendrvvm4di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendrvvm2di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendrvvm2di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendrvvm1di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendrvvm1di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendv1hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_zero_extendv1hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_extendv2hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_zero_extendv2hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_extendv4hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_zero_extendv4hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_extendv8hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_zero_extendv8hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_extendv16hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_zero_extendv16hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_extendv32hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_zero_extendv32hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_extendv64hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_zero_extendv64hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_extendv128hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_zero_extendv128hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_extendv256hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_zero_extendv256hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_extendv512hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_zero_extendv512hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_extendv1024hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_zero_extendv1024hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_extendv2048hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_zero_extendv2048hi_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_extendv1si_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_zero_extendv1si_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_extendv2si_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_zero_extendv2si_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_extendv4si_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_zero_extendv4si_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_extendv8si_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_zero_extendv8si_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_extendv16si_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_zero_extendv16si_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_extendv32si_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_zero_extendv32si_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_extendv64si_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_zero_extendv64si_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_extendv128si_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_zero_extendv128si_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_extendv256si_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_zero_extendv256si_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_extendv512si_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_zero_extendv512si_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_extendv1024si_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_zero_extendv1024si_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_extendv1di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendv1di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendv2di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendv2di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendv4di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendv4di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendv8di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_zero_extendv8di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_extendv16di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_zero_extendv16di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_extendv32di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_zero_extendv32di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_extendv64di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_zero_extendv64di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_extendv128di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_zero_extendv128di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_extendv256di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_zero_extendv256di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_extendv512di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_zero_extendv512di_vf2 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_extendrvvm8si_vf4 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_zero_extendrvvm8si_vf4 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_extendrvvm4si_vf4 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_zero_extendrvvm4si_vf4 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_extendrvvm2si_vf4 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_zero_extendrvvm2si_vf4 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_extendrvvm1si_vf4 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_zero_extendrvvm1si_vf4 (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_pred_extendrvvmf2si_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendrvvmf2si_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendrvvm8di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendrvvm8di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendrvvm4di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendrvvm4di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendrvvm2di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendrvvm2di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendrvvm1di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendrvvm1di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendv1si_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_zero_extendv1si_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_extendv2si_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_zero_extendv2si_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_extendv4si_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_zero_extendv4si_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_extendv8si_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_zero_extendv8si_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_extendv16si_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_zero_extendv16si_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_extendv32si_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_zero_extendv32si_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_extendv64si_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_zero_extendv64si_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_extendv128si_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_zero_extendv128si_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_extendv256si_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_zero_extendv256si_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_extendv512si_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_zero_extendv512si_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_extendv1024si_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_zero_extendv1024si_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_extendv1di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendv1di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendv2di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendv2di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendv4di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendv4di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendv8di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_zero_extendv8di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_extendv16di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_zero_extendv16di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_extendv32di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_zero_extendv32di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_extendv64di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_zero_extendv64di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_extendv128di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_zero_extendv128di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_extendv256di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_zero_extendv256di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_extendv512di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_zero_extendv512di_vf4 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_extendrvvm8di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendrvvm8di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendrvvm4di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendrvvm4di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendrvvm2di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendrvvm2di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendrvvm1di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendrvvm1di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendv1di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendv1di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendv2di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendv2di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendv4di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendv4di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendv8di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_zero_extendv8di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_extendv16di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_zero_extendv16di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_extendv32di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_zero_extendv32di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_extendv64di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_zero_extendv64di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_extendv128di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_zero_extendv128di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_extendv256di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_zero_extendv256di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_extendv512di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_zero_extendv512di_vf8 ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_addsrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addurvvm8hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_subsrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_suburvvm8hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulsrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulurvvm8hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addsrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addurvvm4hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_subsrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_suburvvm4hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulsrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulurvvm4hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addsrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addurvvm2hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_subsrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_suburvvm2hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulsrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulurvvm2hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addsrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addurvvm1hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_subsrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_suburvvm1hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulsrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulurvvm1hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addsrvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addurvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_subsrvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_suburvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulsrvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulurvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addsrvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addurvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subsrvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_suburvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulsrvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulurvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addsrvvm8si (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addurvvm8si (TARGET_VECTOR)
#define HAVE_pred_dual_widen_subsrvvm8si (TARGET_VECTOR)
#define HAVE_pred_dual_widen_suburvvm8si (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulsrvvm8si (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulurvvm8si (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addsrvvm4si (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addurvvm4si (TARGET_VECTOR)
#define HAVE_pred_dual_widen_subsrvvm4si (TARGET_VECTOR)
#define HAVE_pred_dual_widen_suburvvm4si (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulsrvvm4si (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulurvvm4si (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addsrvvm2si (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addurvvm2si (TARGET_VECTOR)
#define HAVE_pred_dual_widen_subsrvvm2si (TARGET_VECTOR)
#define HAVE_pred_dual_widen_suburvvm2si (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulsrvvm2si (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulurvvm2si (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addsrvvm1si (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addurvvm1si (TARGET_VECTOR)
#define HAVE_pred_dual_widen_subsrvvm1si (TARGET_VECTOR)
#define HAVE_pred_dual_widen_suburvvm1si (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulsrvvm1si (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulurvvm1si (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addsrvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addurvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subsrvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_suburvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulsrvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulurvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addsrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addurvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subsrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_suburvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulsrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulurvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addsrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addurvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subsrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_suburvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulsrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulurvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addsrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addurvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subsrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_suburvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulsrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulurvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addsrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addurvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subsrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_suburvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulsrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulurvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addsv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_dual_widen_adduv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_dual_widen_subsv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_dual_widen_subuv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_dual_widen_mulsv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_dual_widen_muluv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_dual_widen_addsv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_dual_widen_adduv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_dual_widen_subsv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_dual_widen_subuv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_dual_widen_mulsv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_dual_widen_muluv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_dual_widen_addsv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_dual_widen_adduv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_dual_widen_subsv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_dual_widen_subuv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_dual_widen_mulsv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_dual_widen_muluv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_dual_widen_addsv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_dual_widen_adduv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_dual_widen_subsv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_dual_widen_subuv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_dual_widen_mulsv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_dual_widen_muluv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_dual_widen_addsv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_dual_widen_adduv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_dual_widen_subsv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_dual_widen_subuv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_dual_widen_mulsv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_dual_widen_muluv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_dual_widen_addsv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_adduv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_subsv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_subuv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_mulsv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_muluv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_addsv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_adduv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_subsv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_subuv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_mulsv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_muluv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_addsv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_adduv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_subsv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_subuv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_mulsv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_muluv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_addsv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_adduv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_subsv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_subuv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_mulsv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_muluv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_addsv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_adduv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_subsv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_subuv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_mulsv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_muluv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_addsv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_adduv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_subsv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_subuv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_mulsv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_muluv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_addsv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_adduv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_subsv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_subuv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_mulsv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_muluv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_addsv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_dual_widen_adduv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_dual_widen_subsv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_dual_widen_subuv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_dual_widen_mulsv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_dual_widen_muluv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_dual_widen_addsv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_dual_widen_adduv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_dual_widen_subsv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_dual_widen_subuv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_dual_widen_mulsv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_dual_widen_muluv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_dual_widen_addsv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_dual_widen_adduv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_dual_widen_subsv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_dual_widen_subuv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_dual_widen_mulsv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_dual_widen_muluv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_dual_widen_addsv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_dual_widen_adduv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_dual_widen_subsv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_dual_widen_subuv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_dual_widen_mulsv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_dual_widen_muluv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_dual_widen_addsv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_adduv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_subsv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_subuv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_mulsv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_muluv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_addsv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_adduv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_subsv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_subuv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_mulsv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_muluv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_addsv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_adduv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_subsv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_subuv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_mulsv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_muluv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_addsv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_adduv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_subsv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_subuv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_mulsv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_muluv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_addsv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_adduv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_subsv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_subuv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_mulsv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_muluv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_addsv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_adduv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_subsv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_subuv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_mulsv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_muluv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_addsv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_adduv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_subsv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_subuv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_mulsv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_muluv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_addsv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_adduv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subsv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subuv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulsv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_muluv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addsv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_adduv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subsv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subuv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulsv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_muluv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addsv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_adduv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subsv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subuv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulsv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_muluv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addsv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_adduv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_subsv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_subuv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_mulsv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_muluv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_addsv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_adduv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_subsv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_subuv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_mulsv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_muluv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_addsv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_adduv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_subsv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_subuv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_mulsv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_muluv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_addsv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_adduv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_subsv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_subuv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_mulsv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_muluv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_addsv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_adduv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_subsv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_subuv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_mulsv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_muluv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_addsv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_adduv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_subsv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_subuv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_mulsv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_muluv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_addsv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_adduv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_subsv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_subuv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_mulsv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_muluv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_addsrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addurvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_subsrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_suburvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulsrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulurvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addsrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addurvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_subsrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_suburvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulsrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulurvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addsrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addurvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_subsrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_suburvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulsrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulurvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addsrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addurvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_subsrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_suburvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulsrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulurvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addsrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addurvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_subsrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_suburvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulsrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulurvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addsrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addurvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subsrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_suburvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulsrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulurvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addsrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addurvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_subsrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_suburvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulsrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulurvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addsrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addurvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_subsrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_suburvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulsrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulurvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addsrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addurvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_subsrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_suburvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulsrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulurvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addsrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addurvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_subsrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_suburvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulsrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_mulurvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_dual_widen_addsrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addurvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subsrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_suburvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulsrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulurvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addsrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addurvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subsrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_suburvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulsrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulurvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addsrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addurvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subsrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_suburvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulsrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulurvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addsrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addurvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subsrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_suburvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulsrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulurvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addsrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addurvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subsrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_suburvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulsrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulurvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addsv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_dual_widen_adduv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_dual_widen_subsv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_dual_widen_subuv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_dual_widen_mulsv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_dual_widen_muluv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_dual_widen_addsv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_dual_widen_adduv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_dual_widen_subsv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_dual_widen_subuv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_dual_widen_mulsv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_dual_widen_muluv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_dual_widen_addsv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_dual_widen_adduv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_dual_widen_subsv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_dual_widen_subuv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_dual_widen_mulsv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_dual_widen_muluv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_dual_widen_addsv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_dual_widen_adduv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_dual_widen_subsv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_dual_widen_subuv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_dual_widen_mulsv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_dual_widen_muluv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_dual_widen_addsv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_dual_widen_adduv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_dual_widen_subsv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_dual_widen_subuv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_dual_widen_mulsv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_dual_widen_muluv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_dual_widen_addsv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_adduv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_subsv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_subuv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_mulsv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_muluv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_addsv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_adduv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_subsv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_subuv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_mulsv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_muluv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_addsv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_adduv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_subsv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_subuv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_mulsv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_muluv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_addsv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_adduv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_subsv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_subuv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_mulsv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_muluv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_addsv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_adduv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_subsv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_subuv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_mulsv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_muluv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_addsv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_adduv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_subsv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_subuv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_mulsv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_muluv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_addsv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_adduv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_subsv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_subuv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_mulsv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_muluv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_addsv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_dual_widen_adduv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_dual_widen_subsv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_dual_widen_subuv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_dual_widen_mulsv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_dual_widen_muluv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_dual_widen_addsv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_dual_widen_adduv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_dual_widen_subsv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_dual_widen_subuv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_dual_widen_mulsv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_dual_widen_muluv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_dual_widen_addsv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_dual_widen_adduv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_dual_widen_subsv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_dual_widen_subuv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_dual_widen_mulsv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_dual_widen_muluv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_dual_widen_addsv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_dual_widen_adduv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_dual_widen_subsv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_dual_widen_subuv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_dual_widen_mulsv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_dual_widen_muluv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_dual_widen_addsv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_adduv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_subsv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_subuv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_mulsv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_muluv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_addsv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_adduv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_subsv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_subuv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_mulsv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_muluv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_addsv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_adduv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_subsv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_subuv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_mulsv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_muluv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_addsv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_adduv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_subsv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_subuv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_mulsv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_muluv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_addsv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_adduv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_subsv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_subuv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_mulsv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_muluv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_addsv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_adduv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_subsv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_subuv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_mulsv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_muluv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_addsv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_adduv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_subsv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_subuv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_mulsv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_muluv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_addsv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_adduv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subsv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subuv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulsv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_muluv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addsv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_adduv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subsv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subuv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulsv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_muluv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addsv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_adduv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subsv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subuv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulsv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_muluv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addsv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_adduv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_subsv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_subuv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_mulsv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_muluv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_addsv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_adduv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_subsv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_subuv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_mulsv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_muluv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_addsv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_adduv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_subsv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_subuv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_mulsv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_muluv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_addsv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_adduv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_subsv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_subuv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_mulsv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_muluv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_addsv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_adduv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_subsv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_subuv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_mulsv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_muluv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_addsv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_adduv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_subsv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_subuv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_mulsv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_muluv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_addsv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_adduv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_subsv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_subuv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_mulsv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_muluv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_subsrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvm8hi (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvm4hi (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvm2hi (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvm1hi (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_suburvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsrvvm8si (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvm8si (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvm4si (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvm4si (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvm2si (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvm2si (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvm1si (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvm1si (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_suburvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_suburvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_suburvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_suburvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_suburvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_single_widen_subuv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_single_widen_subsv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_single_widen_subuv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_single_widen_subsv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_single_widen_subuv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_single_widen_subsv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_single_widen_subuv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_single_widen_subsv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_single_widen_subuv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_single_widen_subsv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_subuv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_subsv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_subuv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_subsv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_subuv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_subsv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_subuv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_subsv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_subuv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_subsv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_subuv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_subsv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_subuv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_subsv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_single_widen_subuv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_single_widen_subsv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_single_widen_subuv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_single_widen_subsv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_single_widen_subuv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_single_widen_subsv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_single_widen_subuv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_single_widen_subsv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_subuv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_subsv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_subuv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_subsv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_subuv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_subsv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_subuv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_subsv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_subuv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_subsv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_subuv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_subsv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_subuv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_subsv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subuv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subuv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subuv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_subuv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_subsv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_subuv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_subsv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_subuv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_subsv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_subuv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_subsv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_subuv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_subsv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_subuv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_subsv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_subuv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_addsrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvm8hi (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvm4hi (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvm2hi (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvm1hi (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addurvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsrvvm8si (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvm8si (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvm4si (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvm4si (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvm2si (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvm2si (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvm1si (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvm1si (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addurvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addurvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addurvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addurvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addurvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_single_widen_adduv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_single_widen_addsv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_single_widen_adduv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_single_widen_addsv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_single_widen_adduv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_single_widen_addsv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_single_widen_adduv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_single_widen_addsv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_single_widen_adduv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_single_widen_addsv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_adduv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_addsv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_adduv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_addsv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_adduv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_addsv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_adduv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_addsv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_adduv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_addsv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_adduv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_addsv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_adduv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_addsv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_single_widen_adduv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_single_widen_addsv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_single_widen_adduv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_single_widen_addsv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_single_widen_adduv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_single_widen_addsv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_single_widen_adduv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_single_widen_addsv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_adduv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_addsv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_adduv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_addsv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_adduv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_addsv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_adduv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_addsv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_adduv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_addsv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_adduv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_addsv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_adduv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_addsv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_adduv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_adduv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_adduv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_adduv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_addsv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_adduv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_addsv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_adduv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_addsv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_adduv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_addsv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_adduv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_addsv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_adduv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_addsv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_adduv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_addsrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addurvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_suburvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addurvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_suburvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addurvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_suburvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addurvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_suburvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addurvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_suburvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addurvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_suburvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_single_widen_adduv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_single_widen_subsv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_single_widen_subuv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_single_widen_addsv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_single_widen_adduv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_single_widen_subsv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_single_widen_subuv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_single_widen_addsv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_single_widen_adduv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_single_widen_subsv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_single_widen_subuv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_single_widen_addsv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_single_widen_adduv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_single_widen_subsv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_single_widen_subuv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_single_widen_addsv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_single_widen_adduv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_single_widen_subsv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_single_widen_subuv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_single_widen_addsv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_adduv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_subsv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_subuv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_addsv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_adduv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_subsv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_subuv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_addsv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_adduv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_subsv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_subuv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_addsv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_adduv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_subsv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_subuv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_addsv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_adduv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_subsv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_subuv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_addsv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_adduv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_subsv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_subuv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_addsv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_adduv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_subsv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_subuv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_addsv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_single_widen_adduv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_single_widen_subsv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_single_widen_subuv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_single_widen_addsv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_single_widen_adduv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_single_widen_subsv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_single_widen_subuv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_single_widen_addsv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_single_widen_adduv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_single_widen_subsv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_single_widen_subuv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_single_widen_addsv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_single_widen_adduv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_single_widen_subsv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_single_widen_subuv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_single_widen_addsv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_adduv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_subsv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_subuv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_addsv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_adduv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_subsv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_subuv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_addsv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_adduv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_subsv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_subuv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_addsv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_adduv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_subsv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_subuv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_addsv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_adduv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_subsv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_subuv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_addsv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_adduv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_subsv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_subuv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_addsv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_adduv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_subsv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_subuv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_addsv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_adduv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subuv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_adduv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subuv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_adduv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subuv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_adduv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_subsv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_subuv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_addsv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_adduv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_subsv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_subuv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_addsv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_adduv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_subsv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_subuv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_addsv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_adduv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_subsv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_subuv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_addsv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_adduv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_subsv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_subuv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_addsv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_adduv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_subsv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_subuv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_addsv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_adduv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_subsv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_subuv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_addsrvvm8hi_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvm8hi_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvm4hi_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvm4hi_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvm2hi_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvm2hi_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvm1hi_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvm1hi_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvmf2hi_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvmf2hi_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvmf4hi_extended_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addurvvmf4hi_extended_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsrvvm8si_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvm8si_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvm4si_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvm4si_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvm2si_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvm2si_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvm1si_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addurvvm1si_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_addsrvvmf2si_extended_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addurvvmf2si_extended_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsrvvm8di_extended_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addurvvm8di_extended_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsrvvm4di_extended_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addurvvm4di_extended_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsrvvm2di_extended_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addurvvm2di_extended_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsrvvm1di_extended_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addurvvm1di_extended_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsv1hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_single_widen_adduv1hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_single_widen_addsv2hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_single_widen_adduv2hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_single_widen_addsv4hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_single_widen_adduv4hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_single_widen_addsv8hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_single_widen_adduv8hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_single_widen_addsv16hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_single_widen_adduv16hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_single_widen_addsv32hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_adduv32hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_addsv64hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_adduv64hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_addsv128hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_adduv128hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_addsv256hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_adduv256hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_addsv512hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_adduv512hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_addsv1024hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_adduv1024hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_addsv2048hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_adduv2048hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_addsv1si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_single_widen_adduv1si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_single_widen_addsv2si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_single_widen_adduv2si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_single_widen_addsv4si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_single_widen_adduv4si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_single_widen_addsv8si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_single_widen_adduv8si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_single_widen_addsv16si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_adduv16si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_addsv32si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_adduv32si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_addsv64si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_adduv64si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_addsv128si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_adduv128si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_addsv256si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_adduv256si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_addsv512si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_adduv512si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_addsv1024si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_adduv1024si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_addsv1di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_adduv1di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsv2di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_adduv2di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsv4di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_adduv4di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addsv8di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_adduv8di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_addsv16di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_adduv16di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_addsv32di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_adduv32di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_addsv64di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_adduv64di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_addsv128di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_adduv128di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_addsv256di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_adduv256di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_addsv512di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_adduv512di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_subsrvvm8hi_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvm8hi_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvm4hi_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvm4hi_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvm2hi_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvm2hi_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvm1hi_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvm1hi_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvmf2hi_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvmf2hi_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvmf4hi_extended_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_suburvvmf4hi_extended_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsrvvm8si_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvm8si_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvm4si_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvm4si_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvm2si_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvm2si_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvm1si_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_suburvvm1si_extended_scalar (TARGET_VECTOR)
#define HAVE_pred_single_widen_subsrvvmf2si_extended_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_suburvvmf2si_extended_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsrvvm8di_extended_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_suburvvm8di_extended_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsrvvm4di_extended_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_suburvvm4di_extended_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsrvvm2di_extended_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_suburvvm2di_extended_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsrvvm1di_extended_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_suburvvm1di_extended_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsv1hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_single_widen_subuv1hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_single_widen_subsv2hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_single_widen_subuv2hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_single_widen_subsv4hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_single_widen_subuv4hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_single_widen_subsv8hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_single_widen_subuv8hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_single_widen_subsv16hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_single_widen_subuv16hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_single_widen_subsv32hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_subuv32hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_subsv64hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_subuv64hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_subsv128hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_subuv128hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_subsv256hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_subuv256hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_subsv512hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_subuv512hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_subsv1024hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_subuv1024hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_subsv2048hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_subuv2048hi_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_subsv1si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_single_widen_subuv1si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_single_widen_subsv2si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_single_widen_subuv2si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_single_widen_subsv4si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_single_widen_subuv4si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_single_widen_subsv8si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_single_widen_subuv8si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_single_widen_subsv16si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_subuv16si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_subsv32si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_subuv32si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_subsv64si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_subuv64si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_subsv128si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_subuv128si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_subsv256si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_subuv256si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_subsv512si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_subuv512si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_subsv1024si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_subuv1024si_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_subsv1di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subuv1di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsv2di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subuv2di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsv4di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subuv4di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subsv8di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_subuv8di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_subsv16di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_subuv16di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_subsv32di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_subuv32di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_subsv64di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_subuv64di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_subsv128di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_subuv128di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_subsv256di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_subuv256di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_subsv512di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_subuv512di_extended_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mulsurvvm8hi (TARGET_VECTOR)
#define HAVE_pred_widen_mulsurvvm4hi (TARGET_VECTOR)
#define HAVE_pred_widen_mulsurvvm2hi (TARGET_VECTOR)
#define HAVE_pred_widen_mulsurvvm1hi (TARGET_VECTOR)
#define HAVE_pred_widen_mulsurvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_widen_mulsurvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mulsurvvm8si (TARGET_VECTOR)
#define HAVE_pred_widen_mulsurvvm4si (TARGET_VECTOR)
#define HAVE_pred_widen_mulsurvvm2si (TARGET_VECTOR)
#define HAVE_pred_widen_mulsurvvm1si (TARGET_VECTOR)
#define HAVE_pred_widen_mulsurvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mulsurvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mulsurvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mulsurvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mulsurvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mulsuv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_widen_mulsuv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_widen_mulsuv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_widen_mulsuv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_widen_mulsuv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_widen_mulsuv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mulsuv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mulsuv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mulsuv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mulsuv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mulsuv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mulsuv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mulsuv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_widen_mulsuv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_widen_mulsuv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_widen_mulsuv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_widen_mulsuv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mulsuv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mulsuv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mulsuv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mulsuv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mulsuv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mulsuv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mulsuv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mulsuv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mulsuv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mulsuv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mulsuv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mulsuv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mulsuv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mulsuv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mulsuv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mulsuv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mulsurvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mulsurvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mulsurvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mulsurvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mulsurvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mulsurvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mulsurvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mulsurvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mulsurvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mulsurvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mulsurvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mulsurvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mulsurvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mulsurvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mulsurvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mulsuv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_widen_mulsuv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_widen_mulsuv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_widen_mulsuv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_widen_mulsuv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_widen_mulsuv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mulsuv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mulsuv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mulsuv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mulsuv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mulsuv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mulsuv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mulsuv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_widen_mulsuv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_widen_mulsuv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_widen_mulsuv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_widen_mulsuv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mulsuv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mulsuv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mulsuv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mulsuv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mulsuv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mulsuv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mulsuv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mulsuv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mulsuv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mulsuv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mulsuv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mulsuv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mulsuv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mulsuv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mulsuv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mulsuv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_extendrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_zero_extendrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_extendrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_zero_extendrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_extendrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_zero_extendrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_extendrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_zero_extendrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_extendrvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_zero_extendrvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_extendrvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendrvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendrvvm8si (TARGET_VECTOR)
#define HAVE_pred_zero_extendrvvm8si (TARGET_VECTOR)
#define HAVE_pred_extendrvvm4si (TARGET_VECTOR)
#define HAVE_pred_zero_extendrvvm4si (TARGET_VECTOR)
#define HAVE_pred_extendrvvm2si (TARGET_VECTOR)
#define HAVE_pred_zero_extendrvvm2si (TARGET_VECTOR)
#define HAVE_pred_extendrvvm1si (TARGET_VECTOR)
#define HAVE_pred_zero_extendrvvm1si (TARGET_VECTOR)
#define HAVE_pred_extendrvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendrvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_zero_extendv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_extendv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_zero_extendv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_extendv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_zero_extendv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_extendv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_zero_extendv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_extendv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_zero_extendv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_extendv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_zero_extendv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_extendv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_zero_extendv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_extendv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_zero_extendv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_extendv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_zero_extendv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_extendv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_zero_extendv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_extendv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_zero_extendv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_extendv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_zero_extendv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_extendv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_zero_extendv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_extendv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_zero_extendv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_extendv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_zero_extendv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_extendv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_zero_extendv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_extendv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_zero_extendv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_extendv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_zero_extendv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_extendv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_zero_extendv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_extendv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_zero_extendv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_extendv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_zero_extendv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_extendv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_zero_extendv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_extendv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_zero_extendv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_extendv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_zero_extendv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_zero_extendv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_extendv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_zero_extendv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_extendv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_zero_extendv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_extendv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_zero_extendv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_extendv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_zero_extendv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_extendv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_zero_extendv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_extendv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_zero_extendv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_ashrrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_narrow_lshrrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_narrow_ashrrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_narrow_lshrrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_narrow_ashrrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_narrow_lshrrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_narrow_ashrrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_narrow_lshrrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_narrow_ashrrvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_narrow_lshrrvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_narrow_ashrrvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_lshrrvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_ashrrvvm8si (TARGET_VECTOR)
#define HAVE_pred_narrow_lshrrvvm8si (TARGET_VECTOR)
#define HAVE_pred_narrow_ashrrvvm4si (TARGET_VECTOR)
#define HAVE_pred_narrow_lshrrvvm4si (TARGET_VECTOR)
#define HAVE_pred_narrow_ashrrvvm2si (TARGET_VECTOR)
#define HAVE_pred_narrow_lshrrvvm2si (TARGET_VECTOR)
#define HAVE_pred_narrow_ashrrvvm1si (TARGET_VECTOR)
#define HAVE_pred_narrow_lshrrvvm1si (TARGET_VECTOR)
#define HAVE_pred_narrow_ashrrvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_lshrrvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_ashrrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_lshrrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_ashrrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_lshrrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_ashrrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_lshrrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_ashrrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_lshrrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_ashrv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_narrow_lshrv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_narrow_ashrv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_narrow_lshrv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_narrow_ashrv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_narrow_lshrv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_narrow_ashrv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_narrow_lshrv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_narrow_ashrv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_narrow_lshrv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_narrow_ashrv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_lshrv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_ashrv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_lshrv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_ashrv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_lshrv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_ashrv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_lshrv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_ashrv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_lshrv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_ashrv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_lshrv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_ashrv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_lshrv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_ashrv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_narrow_lshrv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_narrow_ashrv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_narrow_lshrv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_narrow_ashrv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_narrow_lshrv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_narrow_ashrv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_narrow_lshrv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_narrow_ashrv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_lshrv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_ashrv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_lshrv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_ashrv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_lshrv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_ashrv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_lshrv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_ashrv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_lshrv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_ashrv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_lshrv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_ashrv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_lshrv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_ashrv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_lshrv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_ashrv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_lshrv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_ashrv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_lshrv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_ashrv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_lshrv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_ashrv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_lshrv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_ashrv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_lshrv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_ashrv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_lshrv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_ashrv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_lshrv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_ashrv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_lshrv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_ashrv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_lshrv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_ashrrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_lshrrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_ashrrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_lshrrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_ashrrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_lshrrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_ashrrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_lshrrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_ashrrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_lshrrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_ashrrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_lshrrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_ashrrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_lshrrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_ashrrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_lshrrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_ashrrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_lshrrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_ashrrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_lshrrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_ashrrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_lshrrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_ashrrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_lshrrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_ashrrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_lshrrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_ashrrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_lshrrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_ashrrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_lshrrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_ashrv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_narrow_lshrv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_narrow_ashrv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_narrow_lshrv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_narrow_ashrv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_narrow_lshrv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_narrow_ashrv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_narrow_lshrv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_narrow_ashrv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_narrow_lshrv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_narrow_ashrv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_lshrv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_ashrv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_lshrv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_ashrv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_lshrv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_ashrv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_lshrv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_ashrv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_lshrv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_ashrv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_lshrv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_ashrv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_lshrv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_ashrv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_narrow_lshrv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_narrow_ashrv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_narrow_lshrv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_narrow_ashrv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_narrow_lshrv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_narrow_ashrv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_narrow_lshrv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_narrow_ashrv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_lshrv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_ashrv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_lshrv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_ashrv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_lshrv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_ashrv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_lshrv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_ashrv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_lshrv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_ashrv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_lshrv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_ashrv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_lshrv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_ashrv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_lshrv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_ashrv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_lshrv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_ashrv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_lshrv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_ashrv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_lshrv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_ashrv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_lshrv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_ashrv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_lshrv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_ashrv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_lshrv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_ashrv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_lshrv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_ashrv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_lshrv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_ashrv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_lshrv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_truncrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_truncrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_truncrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_truncrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_truncrvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_truncrvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_truncrvvm8si (TARGET_VECTOR)
#define HAVE_pred_truncrvvm4si (TARGET_VECTOR)
#define HAVE_pred_truncrvvm2si (TARGET_VECTOR)
#define HAVE_pred_truncrvvm1si (TARGET_VECTOR)
#define HAVE_pred_truncrvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_truncrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_truncrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_truncrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_truncrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_truncv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_truncv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_truncv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_truncv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_truncv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_truncv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_truncv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_truncv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_truncv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_truncv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_truncv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_truncv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_truncv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_truncv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_truncv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_truncv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_truncv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_truncv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_truncv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_truncv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_truncv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_truncv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_truncv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_truncv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_truncv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_truncv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_truncv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_truncv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_truncv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_truncv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_truncv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_truncv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_truncv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ssaddrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_sssubrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_usaddrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_ussubrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_sssubrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_usaddrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_ussubrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_sssubrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_usaddrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_ussubrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_sssubrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_usaddrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_ussubrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_sssubrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_usaddrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_ussubrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_sssubrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_usaddrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_ussubrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_sssubrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_usaddrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_ussubrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_sssubrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_usaddrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_ussubrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvm8si (TARGET_VECTOR)
#define HAVE_pred_sssubrvvm8si (TARGET_VECTOR)
#define HAVE_pred_usaddrvvm8si (TARGET_VECTOR)
#define HAVE_pred_ussubrvvm8si (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvm4si (TARGET_VECTOR)
#define HAVE_pred_sssubrvvm4si (TARGET_VECTOR)
#define HAVE_pred_usaddrvvm4si (TARGET_VECTOR)
#define HAVE_pred_ussubrvvm4si (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvm2si (TARGET_VECTOR)
#define HAVE_pred_sssubrvvm2si (TARGET_VECTOR)
#define HAVE_pred_usaddrvvm2si (TARGET_VECTOR)
#define HAVE_pred_ussubrvvm2si (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvm1si (TARGET_VECTOR)
#define HAVE_pred_sssubrvvm1si (TARGET_VECTOR)
#define HAVE_pred_usaddrvvm1si (TARGET_VECTOR)
#define HAVE_pred_ussubrvvm1si (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sssubrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_usaddrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ussubrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssaddrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sssubrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_usaddrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ussubrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssaddrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sssubrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_usaddrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ussubrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssaddrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sssubrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_usaddrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ussubrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssaddrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_sssubrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_usaddrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ussubrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ssaddrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_sssubrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_usaddrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ussubrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ssaddrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_sssubrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_usaddrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ussubrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ssaddrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_sssubrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_usaddrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ussubrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ssaddrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_sssubrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_usaddrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ussubrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ssaddrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_sssubrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_usaddrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ussubrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ssaddv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_sssubv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_usaddv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_ussubv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_ssaddv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_sssubv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_usaddv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_ussubv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_ssaddv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_sssubv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_usaddv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_ussubv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_ssaddv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_sssubv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_usaddv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_ussubv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_ssaddv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_sssubv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_usaddv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_ussubv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_ssaddv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_sssubv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_usaddv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_ussubv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_ssaddv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sssubv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_usaddv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ussubv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ssaddv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sssubv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_usaddv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ussubv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ssaddv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sssubv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_usaddv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ussubv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ssaddv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sssubv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_usaddv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ussubv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ssaddv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sssubv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_usaddv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ussubv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ssaddv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sssubv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_usaddv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ussubv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ssaddv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sssubv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_usaddv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ussubv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ssaddv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_sssubv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_usaddv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_ussubv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_ssaddv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_sssubv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_usaddv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_ussubv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_ssaddv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_sssubv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_usaddv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_ussubv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_ssaddv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_sssubv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_usaddv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_ussubv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_ssaddv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_sssubv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_usaddv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_ussubv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_ssaddv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sssubv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_usaddv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ussubv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ssaddv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sssubv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_usaddv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ussubv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ssaddv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sssubv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_usaddv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ussubv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ssaddv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sssubv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_usaddv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ussubv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ssaddv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sssubv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_usaddv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ussubv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ssaddv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sssubv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_usaddv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ussubv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ssaddv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sssubv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_usaddv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ussubv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ssaddv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_sssubv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_usaddv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_ussubv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_ssaddv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_sssubv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_usaddv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_ussubv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_ssaddv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_sssubv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_usaddv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_ussubv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_ssaddv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_sssubv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_usaddv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_ussubv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_ssaddv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sssubv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_usaddv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ussubv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ssaddv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sssubv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_usaddv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ussubv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ssaddv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sssubv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_usaddv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ussubv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ssaddv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sssubv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_usaddv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ussubv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ssaddv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sssubv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_usaddv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ussubv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ssaddv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sssubv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_usaddv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ussubv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ssaddv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sssubv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_usaddv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ussubv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ssaddv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sssubv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_usaddv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ussubv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssaddv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sssubv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_usaddv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ussubv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssaddv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sssubv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_usaddv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ussubv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssaddv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sssubv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_usaddv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ussubv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ssaddv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sssubv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_usaddv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ussubv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ssaddv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sssubv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_usaddv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ussubv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ssaddv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sssubv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_usaddv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ussubv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ssaddv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sssubv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_usaddv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ussubv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ssaddv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sssubv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_usaddv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ussubv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ssaddv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sssubv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_usaddv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ussubv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ssaddrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_usaddrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_usaddrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_usaddrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_usaddrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_usaddrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_usaddrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_usaddrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssaddrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_usaddrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_usaddrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_usaddrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_usaddrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_usaddrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_usaddrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssaddrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_usaddrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_usaddrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_usaddrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_usaddrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_ssaddrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_usaddrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssaddv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_usaddv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_ssaddv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_usaddv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_ssaddv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_usaddv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_ssaddv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_usaddv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_ssaddv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_usaddv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_ssaddv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_usaddv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_ssaddv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_usaddv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ssaddv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_usaddv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ssaddv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_usaddv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ssaddv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_usaddv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ssaddv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_usaddv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ssaddv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_usaddv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ssaddv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_usaddv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ssaddv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_usaddv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_ssaddv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_usaddv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_ssaddv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_usaddv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_ssaddv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_usaddv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_ssaddv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_usaddv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_ssaddv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_usaddv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ssaddv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_usaddv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ssaddv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_usaddv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ssaddv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_usaddv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ssaddv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_usaddv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ssaddv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_usaddv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ssaddv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_usaddv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ssaddv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_usaddv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_ssaddv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_usaddv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_ssaddv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_usaddv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_ssaddv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_usaddv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_ssaddv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_usaddv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ssaddv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_usaddv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ssaddv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_usaddv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ssaddv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_usaddv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ssaddv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_usaddv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ssaddv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_usaddv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ssaddv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_usaddv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sssubrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ussubrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_sssubrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ussubrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_sssubrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ussubrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_sssubrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ussubrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_sssubrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ussubrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_sssubrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ussubrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_sssubrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ussubrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sssubrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ussubrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_sssubrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ussubrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_sssubrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ussubrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_sssubrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ussubrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_sssubrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ussubrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_sssubrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ussubrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sssubrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_ussubrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_sssubrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_ussubrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_sssubrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_ussubrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_sssubrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_ussubrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_sssubrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ussubrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sssubv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_ussubv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_sssubv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_ussubv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_sssubv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_ussubv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_sssubv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_ussubv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_sssubv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_ussubv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_sssubv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_ussubv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_sssubv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ussubv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sssubv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ussubv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sssubv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ussubv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sssubv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ussubv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sssubv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ussubv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sssubv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ussubv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sssubv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ussubv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sssubv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_ussubv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_sssubv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_ussubv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_sssubv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_ussubv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_sssubv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_ussubv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_sssubv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_ussubv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_sssubv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ussubv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sssubv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ussubv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sssubv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ussubv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sssubv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ussubv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sssubv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ussubv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sssubv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ussubv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sssubv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ussubv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sssubv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_ussubv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_sssubv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_ussubv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_sssubv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_ussubv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_sssubv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_ussubv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_sssubv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ussubv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sssubv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ussubv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sssubv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ussubv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sssubv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ussubv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sssubv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ussubv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sssubv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ussubv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sssubv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ussubv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_aaddurvvm8qi (TARGET_VECTOR)
#define HAVE_pred_aaddrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_asuburvvm8qi (TARGET_VECTOR)
#define HAVE_pred_asubrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_smulrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_ssrlrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_ssrarvvm8qi (TARGET_VECTOR)
#define HAVE_pred_aaddurvvm4qi (TARGET_VECTOR)
#define HAVE_pred_aaddrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_asuburvvm4qi (TARGET_VECTOR)
#define HAVE_pred_asubrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_smulrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_ssrlrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_ssrarvvm4qi (TARGET_VECTOR)
#define HAVE_pred_aaddurvvm2qi (TARGET_VECTOR)
#define HAVE_pred_aaddrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_asuburvvm2qi (TARGET_VECTOR)
#define HAVE_pred_asubrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_smulrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_ssrlrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_ssrarvvm2qi (TARGET_VECTOR)
#define HAVE_pred_aaddurvvm1qi (TARGET_VECTOR)
#define HAVE_pred_aaddrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_asuburvvm1qi (TARGET_VECTOR)
#define HAVE_pred_asubrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_smulrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_ssrlrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_ssrarvvm1qi (TARGET_VECTOR)
#define HAVE_pred_aaddurvvm8hi (TARGET_VECTOR)
#define HAVE_pred_aaddrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_asuburvvm8hi (TARGET_VECTOR)
#define HAVE_pred_asubrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_smulrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_ssrlrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_ssrarvvm8hi (TARGET_VECTOR)
#define HAVE_pred_aaddurvvm4hi (TARGET_VECTOR)
#define HAVE_pred_aaddrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_asuburvvm4hi (TARGET_VECTOR)
#define HAVE_pred_asubrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_smulrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_ssrlrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_ssrarvvm4hi (TARGET_VECTOR)
#define HAVE_pred_aaddurvvm2hi (TARGET_VECTOR)
#define HAVE_pred_aaddrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_asuburvvm2hi (TARGET_VECTOR)
#define HAVE_pred_asubrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_smulrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_ssrlrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_ssrarvvm2hi (TARGET_VECTOR)
#define HAVE_pred_aaddurvvm1hi (TARGET_VECTOR)
#define HAVE_pred_aaddrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_asuburvvm1hi (TARGET_VECTOR)
#define HAVE_pred_asubrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_smulrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_ssrlrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_ssrarvvm1hi (TARGET_VECTOR)
#define HAVE_pred_aaddurvvm8si (TARGET_VECTOR)
#define HAVE_pred_aaddrvvm8si (TARGET_VECTOR)
#define HAVE_pred_asuburvvm8si (TARGET_VECTOR)
#define HAVE_pred_asubrvvm8si (TARGET_VECTOR)
#define HAVE_pred_smulrvvm8si (TARGET_VECTOR)
#define HAVE_pred_ssrlrvvm8si (TARGET_VECTOR)
#define HAVE_pred_ssrarvvm8si (TARGET_VECTOR)
#define HAVE_pred_aaddurvvm4si (TARGET_VECTOR)
#define HAVE_pred_aaddrvvm4si (TARGET_VECTOR)
#define HAVE_pred_asuburvvm4si (TARGET_VECTOR)
#define HAVE_pred_asubrvvm4si (TARGET_VECTOR)
#define HAVE_pred_smulrvvm4si (TARGET_VECTOR)
#define HAVE_pred_ssrlrvvm4si (TARGET_VECTOR)
#define HAVE_pred_ssrarvvm4si (TARGET_VECTOR)
#define HAVE_pred_aaddurvvm2si (TARGET_VECTOR)
#define HAVE_pred_aaddrvvm2si (TARGET_VECTOR)
#define HAVE_pred_asuburvvm2si (TARGET_VECTOR)
#define HAVE_pred_asubrvvm2si (TARGET_VECTOR)
#define HAVE_pred_smulrvvm2si (TARGET_VECTOR)
#define HAVE_pred_ssrlrvvm2si (TARGET_VECTOR)
#define HAVE_pred_ssrarvvm2si (TARGET_VECTOR)
#define HAVE_pred_aaddurvvm1si (TARGET_VECTOR)
#define HAVE_pred_aaddrvvm1si (TARGET_VECTOR)
#define HAVE_pred_asuburvvm1si (TARGET_VECTOR)
#define HAVE_pred_asubrvvm1si (TARGET_VECTOR)
#define HAVE_pred_smulrvvm1si (TARGET_VECTOR)
#define HAVE_pred_ssrlrvvm1si (TARGET_VECTOR)
#define HAVE_pred_ssrarvvm1si (TARGET_VECTOR)
#define HAVE_pred_aaddurvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asuburvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asubrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smulrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssrlrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssrarvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddurvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asuburvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asubrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smulrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssrlrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssrarvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddurvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asuburvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asubrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smulrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssrlrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssrarvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddurvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asuburvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asubrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smulrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssrlrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssrarvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddurvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_aaddrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_asuburvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_asubrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_smulrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ssrlrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ssrarvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_aaddurvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_aaddrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_asuburvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_asubrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_smulrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ssrlrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ssrarvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_aaddurvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_aaddrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_asuburvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_asubrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_smulrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ssrlrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ssrarvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_aaddurvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_aaddrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_asuburvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_asubrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_smulrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ssrlrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ssrarvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_aaddurvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_aaddrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_asuburvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_asubrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_smulrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ssrlrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ssrarvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_aaddurvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_aaddrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_asuburvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_asubrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_smulrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ssrlrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ssrarvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_aadduv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_aaddv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_asubuv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_asubv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_smulv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_ssrlv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_ssrav1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_aadduv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_aaddv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_asubuv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_asubv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_smulv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_ssrlv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_ssrav2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_aadduv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_aaddv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_asubuv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_asubv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_smulv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_ssrlv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_ssrav4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_aadduv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_aaddv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_asubuv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_asubv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_smulv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_ssrlv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_ssrav8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_aadduv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_aaddv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_asubuv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_asubv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_smulv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_ssrlv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_ssrav16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_aadduv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_aaddv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_asubuv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_asubv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_smulv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_ssrlv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_ssrav32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_aadduv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_aaddv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_asubuv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_asubv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_smulv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ssrlv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ssrav64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_aadduv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_aaddv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_asubuv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_asubv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_smulv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ssrlv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ssrav128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_aadduv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_aaddv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_asubuv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_asubv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_smulv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ssrlv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ssrav256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_aadduv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_aaddv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_asubuv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_asubv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_smulv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ssrlv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ssrav512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_aadduv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_aaddv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_asubuv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_asubv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_smulv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ssrlv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ssrav1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_aadduv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_aaddv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_asubuv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_asubv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_smulv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ssrlv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ssrav2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_aadduv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_aaddv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_asubuv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_asubv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_smulv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ssrlv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ssrav4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_aadduv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_aaddv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_asubuv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_asubv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_smulv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_ssrlv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_ssrav1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_aadduv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_aaddv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_asubuv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_asubv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_smulv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_ssrlv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_ssrav2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_aadduv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_aaddv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_asubuv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_asubv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_smulv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_ssrlv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_ssrav4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_aadduv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_aaddv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_asubuv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_asubv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_smulv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_ssrlv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_ssrav8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_aadduv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_aaddv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_asubuv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_asubv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_smulv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_ssrlv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_ssrav16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_aadduv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_aaddv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_asubuv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_asubv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_smulv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ssrlv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ssrav32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_aadduv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_aaddv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_asubuv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_asubv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_smulv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ssrlv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ssrav64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_aadduv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_aaddv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_asubuv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_asubv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_smulv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ssrlv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ssrav128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_aadduv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_aaddv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_asubuv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_asubv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_smulv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ssrlv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ssrav256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_aadduv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_aaddv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_asubuv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_asubv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_smulv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ssrlv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ssrav512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_aadduv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_aaddv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_asubuv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_asubv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_smulv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ssrlv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ssrav1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_aadduv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_aaddv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_asubuv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_asubv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_smulv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ssrlv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ssrav2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_aadduv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_aaddv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_asubuv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_asubv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_smulv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_ssrlv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_ssrav1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_aadduv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_aaddv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_asubuv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_asubv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_smulv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_ssrlv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_ssrav2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_aadduv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_aaddv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_asubuv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_asubv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_smulv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_ssrlv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_ssrav4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_aadduv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_aaddv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_asubuv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_asubv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_smulv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_ssrlv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_ssrav8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_aadduv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_aaddv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_asubuv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_asubv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_smulv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ssrlv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ssrav16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_aadduv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_aaddv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_asubuv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_asubv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_smulv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ssrlv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ssrav32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_aadduv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_aaddv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_asubuv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_asubv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_smulv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ssrlv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ssrav64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_aadduv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_aaddv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_asubuv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_asubv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_smulv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ssrlv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ssrav128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_aadduv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_aaddv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_asubuv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_asubv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_smulv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ssrlv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ssrav256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_aadduv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_aaddv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_asubuv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_asubv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_smulv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ssrlv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ssrav512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_aadduv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_aaddv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_asubuv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_asubv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_smulv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ssrlv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ssrav1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_aadduv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asubuv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asubv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smulv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssrlv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssrav1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aadduv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asubuv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asubv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smulv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssrlv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssrav2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aadduv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asubuv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asubv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smulv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssrlv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssrav4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aadduv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_aaddv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_asubuv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_asubv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_smulv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ssrlv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ssrav8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_aadduv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_aaddv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_asubuv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_asubv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_smulv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ssrlv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ssrav16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_aadduv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_aaddv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_asubuv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_asubv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_smulv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ssrlv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ssrav32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_aadduv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_aaddv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_asubuv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_asubv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_smulv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ssrlv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ssrav64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_aadduv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_aaddv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_asubuv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_asubv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_smulv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ssrlv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ssrav128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_aadduv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_aaddv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_asubuv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_asubv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_smulv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ssrlv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ssrav256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_aadduv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_aaddv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_asubuv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_asubv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_smulv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ssrlv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ssrav512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_aaddurvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_asuburvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_asubrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_smulrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddurvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_asuburvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_asubrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_smulrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddurvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_asuburvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_asubrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_smulrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddurvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_asuburvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_asubrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_smulrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddurvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_asuburvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_asubrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_smulrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddurvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_asuburvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_asubrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_smulrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddurvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asuburvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asubrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smulrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddurvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_asuburvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_asubrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_smulrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddurvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_asuburvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_asubrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_smulrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddurvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_asuburvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_asubrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_smulrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddurvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_asuburvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_asubrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_smulrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddurvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_asuburvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_asubrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_smulrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddurvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asuburvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asubrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smulrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddurvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_asuburvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_asubrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_smulrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddurvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_asuburvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_asubrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_smulrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddurvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_asuburvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_asubrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_smulrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddurvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_asuburvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_asubrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_smulrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_aaddurvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asuburvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asubrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smulrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aadduv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_aaddv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_asubuv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_asubv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_smulv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_aadduv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_aaddv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_asubuv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_asubv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_smulv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_aadduv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_aaddv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_asubuv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_asubv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_smulv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_aadduv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_aaddv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_asubuv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_asubv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_smulv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_aadduv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_aaddv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_asubuv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_asubv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_smulv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_aadduv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_aaddv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_asubuv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_asubv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_smulv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_aadduv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_aaddv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_asubuv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_asubv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_smulv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_aadduv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_aaddv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_asubuv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_asubv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_smulv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_aadduv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_aaddv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_asubuv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_asubv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_smulv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_aadduv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_aaddv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_asubuv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_asubv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_smulv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_aadduv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_aaddv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_asubuv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_asubv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_smulv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_aadduv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_aaddv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_asubuv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_asubv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_smulv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_aadduv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_aaddv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_asubuv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_asubv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_smulv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_aadduv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_aaddv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_asubuv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_asubv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_smulv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_aadduv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_aaddv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_asubuv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_asubv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_smulv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_aadduv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_aaddv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_asubuv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_asubv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_smulv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_aadduv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_aaddv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_asubuv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_asubv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_smulv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_aadduv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_aaddv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_asubuv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_asubv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_smulv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_aadduv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_aaddv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_asubuv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_asubv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_smulv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_aadduv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_aaddv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_asubuv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_asubv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_smulv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_aadduv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_aaddv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_asubuv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_asubv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_smulv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_aadduv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_aaddv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_asubuv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_asubv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_smulv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_aadduv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_aaddv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_asubuv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_asubv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_smulv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_aadduv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_aaddv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_asubuv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_asubv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_smulv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_aadduv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_aaddv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_asubuv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_asubv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_smulv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_aadduv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_aaddv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_asubuv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_asubv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_smulv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_aadduv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_aaddv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_asubuv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_asubv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_smulv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_aadduv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_aaddv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_asubuv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_asubv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_smulv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_aadduv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_aaddv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_asubuv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_asubv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_smulv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_aadduv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_aaddv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_asubuv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_asubv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_smulv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_aadduv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_aaddv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_asubuv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_asubv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_smulv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_aadduv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_aaddv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_asubuv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_asubv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_smulv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_aadduv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_aaddv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_asubuv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_asubv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_smulv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_aadduv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_aaddv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_asubuv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_asubv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_smulv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_aadduv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_aaddv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_asubuv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_asubv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_smulv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_aadduv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_aaddv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_asubuv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_asubv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_smulv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ssrlrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssrarvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssrlrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssrarvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssrlrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssrarvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssrlrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssrarvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssrlrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssrarvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssrlrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssrarvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssrlrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssrarvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssrlrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssrarvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_ssrlrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_ssrarvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_ssrlrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_ssrarvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_ssrlrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_ssrarvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_ssrlrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_ssrarvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_ssrlrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssrarvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssrlrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssrarvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssrlrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssrarvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssrlrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssrarvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssrlrvvmf2qi_scalar ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ssrarvvmf2qi_scalar ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ssrlrvvmf4qi_scalar ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ssrarvvmf4qi_scalar ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ssrlrvvmf8qi_scalar ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ssrarvvmf8qi_scalar ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ssrlrvvmf2hi_scalar ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ssrarvvmf2hi_scalar ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ssrlrvvmf4hi_scalar ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ssrarvvmf4hi_scalar ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ssrlrvvmf2si_scalar ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ssrarvvmf2si_scalar ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_narrow_cliprvvm8hi (TARGET_VECTOR)
#define HAVE_pred_narrow_clipurvvm8hi (TARGET_VECTOR)
#define HAVE_pred_narrow_cliprvvm4hi (TARGET_VECTOR)
#define HAVE_pred_narrow_clipurvvm4hi (TARGET_VECTOR)
#define HAVE_pred_narrow_cliprvvm2hi (TARGET_VECTOR)
#define HAVE_pred_narrow_clipurvvm2hi (TARGET_VECTOR)
#define HAVE_pred_narrow_cliprvvm1hi (TARGET_VECTOR)
#define HAVE_pred_narrow_clipurvvm1hi (TARGET_VECTOR)
#define HAVE_pred_narrow_cliprvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_narrow_clipurvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_narrow_cliprvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipurvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_cliprvvm8si (TARGET_VECTOR)
#define HAVE_pred_narrow_clipurvvm8si (TARGET_VECTOR)
#define HAVE_pred_narrow_cliprvvm4si (TARGET_VECTOR)
#define HAVE_pred_narrow_clipurvvm4si (TARGET_VECTOR)
#define HAVE_pred_narrow_cliprvvm2si (TARGET_VECTOR)
#define HAVE_pred_narrow_clipurvvm2si (TARGET_VECTOR)
#define HAVE_pred_narrow_cliprvvm1si (TARGET_VECTOR)
#define HAVE_pred_narrow_clipurvvm1si (TARGET_VECTOR)
#define HAVE_pred_narrow_cliprvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipurvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_cliprvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipurvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_cliprvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipurvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_cliprvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipurvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_cliprvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipurvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_narrow_clipuv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_narrow_clipv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_narrow_clipuv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_narrow_clipv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_narrow_clipuv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_narrow_clipv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_narrow_clipuv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_narrow_clipv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_narrow_clipuv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_narrow_clipv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_clipuv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_clipv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_clipuv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_clipv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_clipuv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_clipv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_clipuv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_clipv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_clipuv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_clipv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_clipuv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_clipv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_clipuv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_clipv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_narrow_clipuv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_narrow_clipv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_narrow_clipuv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_narrow_clipv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_narrow_clipuv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_narrow_clipv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_narrow_clipuv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_narrow_clipv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_clipuv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_clipv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_clipuv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_clipv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_clipuv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_clipv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_clipuv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_clipv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_clipuv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_clipv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_clipuv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_clipv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_clipuv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_clipv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipuv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipuv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipuv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_clipuv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_clipv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_clipuv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_clipv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_clipuv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_clipv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_clipuv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_clipv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_clipuv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_clipv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_clipuv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_clipv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_clipuv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_cliprvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_clipurvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_cliprvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_clipurvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_cliprvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_clipurvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_cliprvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_clipurvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_cliprvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_clipurvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_cliprvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipurvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_cliprvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_clipurvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_cliprvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_clipurvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_cliprvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_clipurvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_cliprvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_clipurvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_narrow_cliprvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipurvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_cliprvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipurvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_cliprvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipurvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_cliprvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipurvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_cliprvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipurvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_narrow_clipuv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_narrow_clipv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_narrow_clipuv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_narrow_clipv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_narrow_clipuv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_narrow_clipv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_narrow_clipuv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_narrow_clipv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_narrow_clipuv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_narrow_clipv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_clipuv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_clipv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_clipuv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_clipv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_clipuv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_clipv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_clipuv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_clipv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_clipuv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_clipv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_clipuv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_clipv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_clipuv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_clipv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_narrow_clipuv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_narrow_clipv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_narrow_clipuv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_narrow_clipv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_narrow_clipuv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_narrow_clipv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_narrow_clipuv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_narrow_clipv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_clipuv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_clipv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_clipuv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_clipv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_clipuv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_clipv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_clipuv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_clipv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_clipuv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_clipv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_clipuv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_clipv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_clipuv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_clipv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipuv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipuv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipuv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_clipv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_clipuv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_clipv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_clipuv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_clipv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_clipuv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_clipv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_clipuv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_clipv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_clipuv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_clipv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_clipuv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_clipv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_clipuv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_plussrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plusurvvm8hi (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plusurvvm4hi (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plusurvvm2hi (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plusurvvm1hi (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussrvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plusurvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussrvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plusurvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussrvvm8si (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plusurvvm8si (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussrvvm4si (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plusurvvm4si (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussrvvm2si (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plusurvvm2si (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussrvvm1si (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plusurvvm1si (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussrvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plusurvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plusurvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plusurvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plusurvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plusurvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_widen_mul_plusuv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_widen_mul_plussv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_widen_mul_plusuv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_widen_mul_plussv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_widen_mul_plusuv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_widen_mul_plussv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_widen_mul_plusuv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_widen_mul_plussv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_widen_mul_plusuv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_widen_mul_plussv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_plusuv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_plussv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_plusuv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_plussv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_plusuv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_plussv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_plusuv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_plussv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_plusuv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_plussv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_plusuv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_plussv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_plusuv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_plussv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_widen_mul_plusuv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_widen_mul_plussv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_widen_mul_plusuv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_widen_mul_plussv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_widen_mul_plusuv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_widen_mul_plussv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_widen_mul_plusuv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_widen_mul_plussv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_plusuv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_plussv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_plusuv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_plussv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_plusuv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_plussv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_plusuv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_plussv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_plusuv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_plussv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_plusuv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_plussv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_plusuv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_plussv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plusuv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plusuv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plusuv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_plusuv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_plussv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_plusuv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_plussv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_plusuv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_plussv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_plusuv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_plussv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_plusuv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_plussv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_plusuv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_plussv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_plusuv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_plussrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plusurvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plusurvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plusurvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plusurvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plusurvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plusurvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plusurvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plusurvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plusurvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plusurvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plusurvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plusurvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plusurvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plusurvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plusurvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_widen_mul_plusuv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_widen_mul_plussv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_widen_mul_plusuv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_widen_mul_plussv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_widen_mul_plusuv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_widen_mul_plussv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_widen_mul_plusuv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_widen_mul_plussv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_widen_mul_plusuv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_widen_mul_plussv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_plusuv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_plussv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_plusuv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_plussv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_plusuv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_plussv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_plusuv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_plussv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_plusuv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_plussv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_plusuv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_plussv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_plusuv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_plussv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_widen_mul_plusuv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_widen_mul_plussv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_widen_mul_plusuv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_widen_mul_plussv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_widen_mul_plusuv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_widen_mul_plussv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_widen_mul_plusuv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_widen_mul_plussv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_plusuv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_plussv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_plusuv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_plussv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_plusuv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_plussv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_plusuv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_plussv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_plusuv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_plussv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_plusuv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_plussv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_plusuv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_plussv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plusuv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plusuv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plusuv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_plusuv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_plussv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_plusuv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_plussv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_plusuv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_plussv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_plusuv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_plussv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_plusuv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_plussv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_plusuv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_plussv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_plusuv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_plussurvvm8hi (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussurvvm4hi (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussurvvm2hi (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussurvvm1hi (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussurvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussurvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussurvvm8si (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussurvvm4si (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussurvvm2si (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussurvvm1si (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussurvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussurvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussurvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussurvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussurvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussuv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_widen_mul_plussuv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_widen_mul_plussuv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_widen_mul_plussuv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_widen_mul_plussuv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_widen_mul_plussuv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_plussuv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_plussuv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_plussuv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_plussuv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_plussuv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_plussuv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_plussuv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_widen_mul_plussuv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_widen_mul_plussuv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_widen_mul_plussuv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_widen_mul_plussuv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_plussuv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_plussuv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_plussuv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_plussuv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_plussuv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_plussuv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_plussuv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussuv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussuv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussuv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_plussuv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_plussuv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_plussuv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_plussuv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_plussuv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_plussuv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_plussurvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussurvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussurvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussurvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussurvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussurvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussurvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussurvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussurvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussurvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plussurvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussurvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussurvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussurvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussurvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussuv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_widen_mul_plussuv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_widen_mul_plussuv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_widen_mul_plussuv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_widen_mul_plussuv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_widen_mul_plussuv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_plussuv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_plussuv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_plussuv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_plussuv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_plussuv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_plussuv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_plussuv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_widen_mul_plussuv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_widen_mul_plussuv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_widen_mul_plussuv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_widen_mul_plussuv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_plussuv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_plussuv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_plussuv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_plussuv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_plussuv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_plussuv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_plussuv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussuv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussuv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plussuv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_plussuv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_plussuv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_plussuv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_plussuv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_plussuv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_plussuv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_plususrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plususrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plususrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plususrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plususrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plususrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plususrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plususrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plususrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plususrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plususrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plususrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plususrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plususrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plususrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plususv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_widen_mul_plususv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_widen_mul_plususv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_widen_mul_plususv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_widen_mul_plususv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_widen_mul_plususv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_plususv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_plususv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_plususv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_plususv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_plususv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_plususv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_plususv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_widen_mul_plususv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_widen_mul_plususv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_widen_mul_plususv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_widen_mul_plususv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_plususv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_plususv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_plususv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_plususv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_plususv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_plususv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_plususv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plususv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plususv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plususv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_plususv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_plususv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_plususv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_plususv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_plususv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_plususv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_andrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iorrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_xorrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_andrvvmf32bi (TARGET_VECTOR)
#define HAVE_pred_iorrvvmf32bi (TARGET_VECTOR)
#define HAVE_pred_xorrvvmf32bi (TARGET_VECTOR)
#define HAVE_pred_andrvvmf16bi (TARGET_VECTOR)
#define HAVE_pred_iorrvvmf16bi (TARGET_VECTOR)
#define HAVE_pred_xorrvvmf16bi (TARGET_VECTOR)
#define HAVE_pred_andrvvmf8bi (TARGET_VECTOR)
#define HAVE_pred_iorrvvmf8bi (TARGET_VECTOR)
#define HAVE_pred_xorrvvmf8bi (TARGET_VECTOR)
#define HAVE_pred_andrvvmf4bi (TARGET_VECTOR)
#define HAVE_pred_iorrvvmf4bi (TARGET_VECTOR)
#define HAVE_pred_xorrvvmf4bi (TARGET_VECTOR)
#define HAVE_pred_andrvvmf2bi (TARGET_VECTOR)
#define HAVE_pred_iorrvvmf2bi (TARGET_VECTOR)
#define HAVE_pred_xorrvvmf2bi (TARGET_VECTOR)
#define HAVE_pred_andrvvm1bi (TARGET_VECTOR)
#define HAVE_pred_iorrvvm1bi (TARGET_VECTOR)
#define HAVE_pred_xorrvvm1bi (TARGET_VECTOR)
#define HAVE_pred_andv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_pred_iorv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_pred_xorv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_pred_andv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_pred_iorv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_pred_xorv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_pred_andv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_pred_iorv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_pred_xorv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_pred_andv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_pred_iorv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_pred_xorv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_pred_andv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_pred_iorv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_pred_xorv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_pred_andv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_pred_iorv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_pred_xorv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_pred_andv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_iorv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_xorv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_andv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_iorv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_xorv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_andv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_iorv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_xorv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_andv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_iorv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_xorv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_andv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_iorv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_xorv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_andv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_iorv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_xorv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_andv4096bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_iorv4096bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_xorv4096bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_nandrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_niorrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nxorrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nandrvvmf32bi (TARGET_VECTOR)
#define HAVE_pred_niorrvvmf32bi (TARGET_VECTOR)
#define HAVE_pred_nxorrvvmf32bi (TARGET_VECTOR)
#define HAVE_pred_nandrvvmf16bi (TARGET_VECTOR)
#define HAVE_pred_niorrvvmf16bi (TARGET_VECTOR)
#define HAVE_pred_nxorrvvmf16bi (TARGET_VECTOR)
#define HAVE_pred_nandrvvmf8bi (TARGET_VECTOR)
#define HAVE_pred_niorrvvmf8bi (TARGET_VECTOR)
#define HAVE_pred_nxorrvvmf8bi (TARGET_VECTOR)
#define HAVE_pred_nandrvvmf4bi (TARGET_VECTOR)
#define HAVE_pred_niorrvvmf4bi (TARGET_VECTOR)
#define HAVE_pred_nxorrvvmf4bi (TARGET_VECTOR)
#define HAVE_pred_nandrvvmf2bi (TARGET_VECTOR)
#define HAVE_pred_niorrvvmf2bi (TARGET_VECTOR)
#define HAVE_pred_nxorrvvmf2bi (TARGET_VECTOR)
#define HAVE_pred_nandrvvm1bi (TARGET_VECTOR)
#define HAVE_pred_niorrvvm1bi (TARGET_VECTOR)
#define HAVE_pred_nxorrvvm1bi (TARGET_VECTOR)
#define HAVE_pred_nandv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_pred_niorv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_pred_nxorv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_pred_nandv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_pred_niorv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_pred_nxorv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_pred_nandv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_pred_niorv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_pred_nxorv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_pred_nandv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_pred_niorv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_pred_nxorv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_pred_nandv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_pred_niorv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_pred_nxorv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_pred_nandv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_pred_niorv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_pred_nxorv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_pred_nandv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_niorv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_nxorv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_nandv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_niorv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_nxorv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_nandv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_niorv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_nxorv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_nandv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_niorv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_nxorv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_nandv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_niorv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_nxorv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_nandv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_niorv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_nxorv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_nandv4096bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_niorv4096bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_nxorv4096bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_andnotrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iornotrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_andnotrvvmf32bi (TARGET_VECTOR)
#define HAVE_pred_iornotrvvmf32bi (TARGET_VECTOR)
#define HAVE_pred_andnotrvvmf16bi (TARGET_VECTOR)
#define HAVE_pred_iornotrvvmf16bi (TARGET_VECTOR)
#define HAVE_pred_andnotrvvmf8bi (TARGET_VECTOR)
#define HAVE_pred_iornotrvvmf8bi (TARGET_VECTOR)
#define HAVE_pred_andnotrvvmf4bi (TARGET_VECTOR)
#define HAVE_pred_iornotrvvmf4bi (TARGET_VECTOR)
#define HAVE_pred_andnotrvvmf2bi (TARGET_VECTOR)
#define HAVE_pred_iornotrvvmf2bi (TARGET_VECTOR)
#define HAVE_pred_andnotrvvm1bi (TARGET_VECTOR)
#define HAVE_pred_iornotrvvm1bi (TARGET_VECTOR)
#define HAVE_pred_andnotv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_pred_iornotv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_pred_andnotv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_pred_iornotv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_pred_andnotv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_pred_iornotv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_pred_andnotv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_pred_iornotv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_pred_andnotv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_pred_iornotv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_pred_andnotv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_pred_iornotv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_pred_andnotv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_iornotv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_andnotv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_iornotv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_andnotv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_iornotv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_andnotv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_iornotv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_andnotv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_iornotv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_andnotv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_iornotv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_andnotv4096bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_iornotv4096bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_notrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_notrvvmf32bi (TARGET_VECTOR)
#define HAVE_pred_notrvvmf16bi (TARGET_VECTOR)
#define HAVE_pred_notrvvmf8bi (TARGET_VECTOR)
#define HAVE_pred_notrvvmf4bi (TARGET_VECTOR)
#define HAVE_pred_notrvvmf2bi (TARGET_VECTOR)
#define HAVE_pred_notrvvm1bi (TARGET_VECTOR)
#define HAVE_pred_notv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_pred_notv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_pred_notv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_pred_notv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_pred_notv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_pred_notv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_pred_notv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_notv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_notv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_notv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_notv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_notv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_notv4096bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_popcountrvvmf64bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_popcountrvvmf64bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_popcountrvvmf32bisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_popcountrvvmf32bidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_popcountrvvmf16bisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_popcountrvvmf16bidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_popcountrvvmf8bisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_popcountrvvmf8bidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_popcountrvvmf4bisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_popcountrvvmf4bidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_popcountrvvmf2bisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_popcountrvvmf2bidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_popcountrvvm1bisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_popcountrvvm1bidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_popcountv1bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V1BImode))) && (riscv_vector::vls_mode_valid_p (V1BImode))) && (riscv_vector::vls_mode_valid_p (V1BImode))) && (riscv_vector::vls_mode_valid_p (V1BImode))))
#define HAVE_pred_popcountv1bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V1BImode))) && (riscv_vector::vls_mode_valid_p (V1BImode))) && (riscv_vector::vls_mode_valid_p (V1BImode))) && (riscv_vector::vls_mode_valid_p (V1BImode))))
#define HAVE_pred_popcountv2bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V2BImode))) && (riscv_vector::vls_mode_valid_p (V2BImode))) && (riscv_vector::vls_mode_valid_p (V2BImode))) && (riscv_vector::vls_mode_valid_p (V2BImode))))
#define HAVE_pred_popcountv2bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V2BImode))) && (riscv_vector::vls_mode_valid_p (V2BImode))) && (riscv_vector::vls_mode_valid_p (V2BImode))) && (riscv_vector::vls_mode_valid_p (V2BImode))))
#define HAVE_pred_popcountv4bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V4BImode))) && (riscv_vector::vls_mode_valid_p (V4BImode))) && (riscv_vector::vls_mode_valid_p (V4BImode))) && (riscv_vector::vls_mode_valid_p (V4BImode))))
#define HAVE_pred_popcountv4bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V4BImode))) && (riscv_vector::vls_mode_valid_p (V4BImode))) && (riscv_vector::vls_mode_valid_p (V4BImode))) && (riscv_vector::vls_mode_valid_p (V4BImode))))
#define HAVE_pred_popcountv8bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V8BImode))) && (riscv_vector::vls_mode_valid_p (V8BImode))) && (riscv_vector::vls_mode_valid_p (V8BImode))) && (riscv_vector::vls_mode_valid_p (V8BImode))))
#define HAVE_pred_popcountv8bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V8BImode))) && (riscv_vector::vls_mode_valid_p (V8BImode))) && (riscv_vector::vls_mode_valid_p (V8BImode))) && (riscv_vector::vls_mode_valid_p (V8BImode))))
#define HAVE_pred_popcountv16bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V16BImode))) && (riscv_vector::vls_mode_valid_p (V16BImode))) && (riscv_vector::vls_mode_valid_p (V16BImode))) && (riscv_vector::vls_mode_valid_p (V16BImode))))
#define HAVE_pred_popcountv16bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V16BImode))) && (riscv_vector::vls_mode_valid_p (V16BImode))) && (riscv_vector::vls_mode_valid_p (V16BImode))) && (riscv_vector::vls_mode_valid_p (V16BImode))))
#define HAVE_pred_popcountv32bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V32BImode))) && (riscv_vector::vls_mode_valid_p (V32BImode))) && (riscv_vector::vls_mode_valid_p (V32BImode))) && (riscv_vector::vls_mode_valid_p (V32BImode))))
#define HAVE_pred_popcountv32bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V32BImode))) && (riscv_vector::vls_mode_valid_p (V32BImode))) && (riscv_vector::vls_mode_valid_p (V32BImode))) && (riscv_vector::vls_mode_valid_p (V32BImode))))
#define HAVE_pred_popcountv64bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64)) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64)) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64)) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64)))
#define HAVE_pred_popcountv64bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64)) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64)) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64)) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64)))
#define HAVE_pred_popcountv128bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128)) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128)) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128)) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128)))
#define HAVE_pred_popcountv128bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128)) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128)) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128)) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128)))
#define HAVE_pred_popcountv256bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256)) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256)) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256)) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256)))
#define HAVE_pred_popcountv256bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256)) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256)) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256)) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256)))
#define HAVE_pred_popcountv512bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512)) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512)) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512)) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512)))
#define HAVE_pred_popcountv512bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512)) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512)) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512)) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512)))
#define HAVE_pred_popcountv1024bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024)) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024)) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024)) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024)))
#define HAVE_pred_popcountv1024bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024)) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024)) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024)) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024)))
#define HAVE_pred_popcountv2048bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048)) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048)) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048)) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048)))
#define HAVE_pred_popcountv2048bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048)) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048)) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048)) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048)))
#define HAVE_pred_popcountv4096bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096)) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096)) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096)) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096)))
#define HAVE_pred_popcountv4096bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096)) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096)) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096)) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096)))
#define HAVE_pred_ffsrvvmf64bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_ffsrvvmf64bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_ffsrvvmf32bisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_ffsrvvmf32bidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_ffsrvvmf16bisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_ffsrvvmf16bidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_ffsrvvmf8bisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_ffsrvvmf8bidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_ffsrvvmf4bisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_ffsrvvmf4bidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_ffsrvvmf2bisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_ffsrvvmf2bidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_ffsrvvm1bisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_ffsrvvm1bidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_ffsv1bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V1BImode))) && (riscv_vector::vls_mode_valid_p (V1BImode))) && (riscv_vector::vls_mode_valid_p (V1BImode))) && (riscv_vector::vls_mode_valid_p (V1BImode))))
#define HAVE_pred_ffsv1bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V1BImode))) && (riscv_vector::vls_mode_valid_p (V1BImode))) && (riscv_vector::vls_mode_valid_p (V1BImode))) && (riscv_vector::vls_mode_valid_p (V1BImode))))
#define HAVE_pred_ffsv2bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V2BImode))) && (riscv_vector::vls_mode_valid_p (V2BImode))) && (riscv_vector::vls_mode_valid_p (V2BImode))) && (riscv_vector::vls_mode_valid_p (V2BImode))))
#define HAVE_pred_ffsv2bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V2BImode))) && (riscv_vector::vls_mode_valid_p (V2BImode))) && (riscv_vector::vls_mode_valid_p (V2BImode))) && (riscv_vector::vls_mode_valid_p (V2BImode))))
#define HAVE_pred_ffsv4bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V4BImode))) && (riscv_vector::vls_mode_valid_p (V4BImode))) && (riscv_vector::vls_mode_valid_p (V4BImode))) && (riscv_vector::vls_mode_valid_p (V4BImode))))
#define HAVE_pred_ffsv4bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V4BImode))) && (riscv_vector::vls_mode_valid_p (V4BImode))) && (riscv_vector::vls_mode_valid_p (V4BImode))) && (riscv_vector::vls_mode_valid_p (V4BImode))))
#define HAVE_pred_ffsv8bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V8BImode))) && (riscv_vector::vls_mode_valid_p (V8BImode))) && (riscv_vector::vls_mode_valid_p (V8BImode))) && (riscv_vector::vls_mode_valid_p (V8BImode))))
#define HAVE_pred_ffsv8bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V8BImode))) && (riscv_vector::vls_mode_valid_p (V8BImode))) && (riscv_vector::vls_mode_valid_p (V8BImode))) && (riscv_vector::vls_mode_valid_p (V8BImode))))
#define HAVE_pred_ffsv16bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V16BImode))) && (riscv_vector::vls_mode_valid_p (V16BImode))) && (riscv_vector::vls_mode_valid_p (V16BImode))) && (riscv_vector::vls_mode_valid_p (V16BImode))))
#define HAVE_pred_ffsv16bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V16BImode))) && (riscv_vector::vls_mode_valid_p (V16BImode))) && (riscv_vector::vls_mode_valid_p (V16BImode))) && (riscv_vector::vls_mode_valid_p (V16BImode))))
#define HAVE_pred_ffsv32bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V32BImode))) && (riscv_vector::vls_mode_valid_p (V32BImode))) && (riscv_vector::vls_mode_valid_p (V32BImode))) && (riscv_vector::vls_mode_valid_p (V32BImode))))
#define HAVE_pred_ffsv32bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V32BImode))) && (riscv_vector::vls_mode_valid_p (V32BImode))) && (riscv_vector::vls_mode_valid_p (V32BImode))) && (riscv_vector::vls_mode_valid_p (V32BImode))))
#define HAVE_pred_ffsv64bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64)) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64)) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64)) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64)))
#define HAVE_pred_ffsv64bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64)) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64)) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64)) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64)))
#define HAVE_pred_ffsv128bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128)) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128)) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128)) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128)))
#define HAVE_pred_ffsv128bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128)) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128)) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128)) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128)))
#define HAVE_pred_ffsv256bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256)) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256)) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256)) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256)))
#define HAVE_pred_ffsv256bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256)) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256)) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256)) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256)))
#define HAVE_pred_ffsv512bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512)) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512)) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512)) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512)))
#define HAVE_pred_ffsv512bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512)) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512)) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512)) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512)))
#define HAVE_pred_ffsv1024bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024)) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024)) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024)) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024)))
#define HAVE_pred_ffsv1024bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024)) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024)) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024)) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024)))
#define HAVE_pred_ffsv2048bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048)) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048)) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048)) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048)))
#define HAVE_pred_ffsv2048bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048)) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048)) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048)) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048)))
#define HAVE_pred_ffsv4096bisi ((TARGET_VECTOR) && (((((Pmode == SImode) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096)) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096)) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096)) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096)))
#define HAVE_pred_ffsv4096bidi ((TARGET_VECTOR) && (((((Pmode == DImode) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096)) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096)) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096)) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096)))
#define HAVE_pred_sbfrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sifrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sofrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sbfrvvmf32bi (TARGET_VECTOR)
#define HAVE_pred_sifrvvmf32bi (TARGET_VECTOR)
#define HAVE_pred_sofrvvmf32bi (TARGET_VECTOR)
#define HAVE_pred_sbfrvvmf16bi (TARGET_VECTOR)
#define HAVE_pred_sifrvvmf16bi (TARGET_VECTOR)
#define HAVE_pred_sofrvvmf16bi (TARGET_VECTOR)
#define HAVE_pred_sbfrvvmf8bi (TARGET_VECTOR)
#define HAVE_pred_sifrvvmf8bi (TARGET_VECTOR)
#define HAVE_pred_sofrvvmf8bi (TARGET_VECTOR)
#define HAVE_pred_sbfrvvmf4bi (TARGET_VECTOR)
#define HAVE_pred_sifrvvmf4bi (TARGET_VECTOR)
#define HAVE_pred_sofrvvmf4bi (TARGET_VECTOR)
#define HAVE_pred_sbfrvvmf2bi (TARGET_VECTOR)
#define HAVE_pred_sifrvvmf2bi (TARGET_VECTOR)
#define HAVE_pred_sofrvvmf2bi (TARGET_VECTOR)
#define HAVE_pred_sbfrvvm1bi (TARGET_VECTOR)
#define HAVE_pred_sifrvvm1bi (TARGET_VECTOR)
#define HAVE_pred_sofrvvm1bi (TARGET_VECTOR)
#define HAVE_pred_sbfv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_pred_sifv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_pred_sofv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_pred_sbfv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_pred_sifv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_pred_sofv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_pred_sbfv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_pred_sifv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_pred_sofv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_pred_sbfv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_pred_sifv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_pred_sofv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_pred_sbfv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_pred_sifv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_pred_sofv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_pred_sbfv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_pred_sifv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_pred_sofv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_pred_sbfv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sifv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sofv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sbfv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sifv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sofv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sbfv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sifv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sofv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sbfv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sifv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sofv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sbfv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sifv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sofv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sbfv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sifv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sofv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sbfv4096bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sifv4096bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sofv4096bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_iotarvvm8qi (TARGET_VECTOR)
#define HAVE_pred_iotarvvm4qi (TARGET_VECTOR)
#define HAVE_pred_iotarvvm2qi (TARGET_VECTOR)
#define HAVE_pred_iotarvvm1qi (TARGET_VECTOR)
#define HAVE_pred_iotarvvm8hi (TARGET_VECTOR)
#define HAVE_pred_iotarvvm4hi (TARGET_VECTOR)
#define HAVE_pred_iotarvvm2hi (TARGET_VECTOR)
#define HAVE_pred_iotarvvm1hi (TARGET_VECTOR)
#define HAVE_pred_iotarvvm8si (TARGET_VECTOR)
#define HAVE_pred_iotarvvm4si (TARGET_VECTOR)
#define HAVE_pred_iotarvvm2si (TARGET_VECTOR)
#define HAVE_pred_iotarvvm1si (TARGET_VECTOR)
#define HAVE_pred_iotarvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iotarvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iotarvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iotarvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iotarvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_iotarvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_iotarvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_iotarvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_iotarvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_iotarvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_iotav1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_iotav2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_iotav4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_iotav8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_iotav16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_iotav32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_iotav64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_iotav128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_iotav256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_iotav512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_iotav1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_iotav2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_iotav4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_iotav1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_iotav2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_iotav4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_iotav8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_iotav16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_iotav32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_iotav64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_iotav128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_iotav256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_iotav512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_iotav1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_iotav2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_iotav1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_iotav2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_iotav4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_iotav8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_iotav16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_iotav32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_iotav64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_iotav128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_iotav256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_iotav512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_iotav1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_iotav1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iotav2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iotav4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iotav8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_iotav16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_iotav32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_iotav64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_iotav128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_iotav256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_iotav512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_seriesrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_seriesrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_seriesrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_seriesrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_seriesrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_seriesrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_seriesrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_seriesrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_seriesrvvm8si (TARGET_VECTOR)
#define HAVE_pred_seriesrvvm4si (TARGET_VECTOR)
#define HAVE_pred_seriesrvvm2si (TARGET_VECTOR)
#define HAVE_pred_seriesrvvm1si (TARGET_VECTOR)
#define HAVE_pred_seriesrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_seriesrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_seriesrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_seriesrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_seriesrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_seriesrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_seriesrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_seriesrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_seriesrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_seriesrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_seriesv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_seriesv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_seriesv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_seriesv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_seriesv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_seriesv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_seriesv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_seriesv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_seriesv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_seriesv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_seriesv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_seriesv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_seriesv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_seriesv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_seriesv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_seriesv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_seriesv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_seriesv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_seriesv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_seriesv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_seriesv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_seriesv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_seriesv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_seriesv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_seriesv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_seriesv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_seriesv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_seriesv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_seriesv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_seriesv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_seriesv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_seriesv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_seriesv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_seriesv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_seriesv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_seriesv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_seriesv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_seriesv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_seriesv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_seriesv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_seriesv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_seriesv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_seriesv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_seriesv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_seriesv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_seriesv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_addrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mulrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_subrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_divrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_addrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mulrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_subrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_divrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_addrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mulrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_subrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_divrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_addrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mulrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_subrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_divrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_addrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mulrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_subrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_divrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_addrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_divrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_addrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mulrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_subrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_divrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_addrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mulrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_subrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_divrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_addrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mulrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_subrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_divrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_addrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mulrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_subrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_divrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_addrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_divrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_addrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mulrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_subrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_divrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_addrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mulrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_subrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_divrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_addrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mulrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_subrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_divrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_addrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mulrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_subrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_divrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_addv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_mulv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_subv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_divv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_addv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_mulv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_subv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_divv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_addv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_mulv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_subv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_divv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_addv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_mulv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_subv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_divv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_addv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_mulv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_subv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_divv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_addv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_subv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_divv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_addv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_subv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_divv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_addv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_subv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_divv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_addv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_subv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_divv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_addv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_subv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_divv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_addv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_subv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_divv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_addv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_subv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_divv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_addv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mulv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_subv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_divv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_addv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mulv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_subv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_divv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_addv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mulv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_subv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_divv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_addv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mulv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_subv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_divv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_addv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_subv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_divv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_addv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_subv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_divv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_addv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_subv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_divv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_addv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_subv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_divv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_addv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_subv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_divv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_addv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_subv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_divv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_addv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_subv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_divv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_addv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mulv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_subv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_divv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_addv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mulv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_subv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_divv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_addv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mulv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_subv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_divv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_addv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_subv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_divv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_addv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_subv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_divv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_addv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_subv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_divv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_addv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_subv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_divv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_addv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_subv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_divv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_addv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_subv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_divv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_addv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_subv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_divv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_smaxrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_sminrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_smaxrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_sminrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_smaxrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_sminrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_smaxrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_sminrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_smaxrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_sminrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_smaxrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sminrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smaxrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_sminrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_smaxrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_sminrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_smaxrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_sminrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_smaxrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_sminrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_smaxrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sminrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smaxrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_sminrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_smaxrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_sminrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_smaxrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_sminrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_smaxrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_sminrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_smaxv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_sminv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_smaxv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_sminv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_smaxv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_sminv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_smaxv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_sminv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_smaxv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_sminv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_smaxv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sminv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_smaxv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sminv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_smaxv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sminv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_smaxv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sminv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_smaxv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sminv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_smaxv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sminv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_smaxv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sminv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_smaxv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_sminv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_smaxv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_sminv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_smaxv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_sminv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_smaxv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_sminv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_smaxv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sminv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_smaxv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sminv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_smaxv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sminv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_smaxv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sminv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_smaxv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sminv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_smaxv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sminv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_smaxv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sminv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_smaxv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_sminv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_smaxv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_sminv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_smaxv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_sminv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_smaxv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sminv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_smaxv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sminv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_smaxv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sminv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_smaxv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sminv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_smaxv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sminv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_smaxv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sminv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_smaxv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sminv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fmaxrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fminrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fmaxrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fminrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fmaxrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fminrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fmaxrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fminrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fmaxrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fminrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fmaxrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fminrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fmaxrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fminrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fmaxrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fminrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fmaxrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fminrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fmaxrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fminrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fmaxrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fminrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fmaxrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fminrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fmaxrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fminrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fmaxrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fminrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fmaxrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fminrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fmaxv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_fminv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_fmaxv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_fminv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_fmaxv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_fminv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_fmaxv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_fminv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_fmaxv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_fminv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_fmaxv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fminv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fmaxv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fminv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fmaxv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fminv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fmaxv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fminv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fmaxv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fminv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fmaxv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fminv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fmaxv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fminv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fmaxv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fminv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fmaxv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fminv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fmaxv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fminv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fmaxv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fminv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fmaxv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fminv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fmaxv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fminv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fmaxv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fminv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fmaxv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fminv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fmaxv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fminv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fmaxv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fminv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fmaxv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fminv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fmaxv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fminv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fmaxv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fminv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fmaxv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fminv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fmaxv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fminv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fmaxv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fminv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fmaxv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fminv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fmaxv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fminv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fmaxv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fminv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fmaxv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fminv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fmaxv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fminv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_addrvvm8hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mulrvvm8hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_addrvvm4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mulrvvm4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_addrvvm2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mulrvvm2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_addrvvm1hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mulrvvm1hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_addrvvmf2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mulrvvmf2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_addrvvmf4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulrvvmf4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_addrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mulrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_addrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mulrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_addrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mulrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_addrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mulrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_addrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_addrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mulrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_addrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mulrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_addrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mulrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_addrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mulrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_addv1hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_mulv1hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_addv2hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_mulv2hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_addv4hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_mulv4hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_addv8hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_mulv8hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_addv16hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_mulv16hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_addv32hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulv32hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_addv64hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulv64hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_addv128hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulv128hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_addv256hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulv256hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_addv512hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulv512hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_addv1024hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulv1024hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_addv2048hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulv2048hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_addv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mulv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_addv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mulv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_addv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mulv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_addv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mulv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_addv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_addv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_addv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_addv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_addv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_addv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_addv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_addv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mulv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_addv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mulv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_addv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mulv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_addv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_addv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_addv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_addv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_addv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_addv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_addv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_smaxrvvm8hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_sminrvvm8hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_smaxrvvm4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_sminrvvm4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_smaxrvvm2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_sminrvvm2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_smaxrvvm1hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_sminrvvm1hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_smaxrvvmf2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_sminrvvmf2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_smaxrvvmf4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sminrvvmf4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smaxrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_sminrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_smaxrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_sminrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_smaxrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_sminrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_smaxrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_sminrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_smaxrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sminrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smaxrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_sminrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_smaxrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_sminrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_smaxrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_sminrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_smaxrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_sminrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_smaxv1hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_sminv1hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_smaxv2hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_sminv2hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_smaxv4hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_sminv4hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_smaxv8hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_sminv8hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_smaxv16hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_sminv16hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_smaxv32hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sminv32hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_smaxv64hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sminv64hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_smaxv128hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sminv128hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_smaxv256hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sminv256hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_smaxv512hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sminv512hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_smaxv1024hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sminv1024hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_smaxv2048hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sminv2048hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_smaxv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_sminv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_smaxv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_sminv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_smaxv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_sminv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_smaxv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_sminv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_smaxv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sminv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_smaxv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sminv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_smaxv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sminv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_smaxv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sminv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_smaxv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sminv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_smaxv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sminv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_smaxv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sminv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_smaxv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_sminv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_smaxv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_sminv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_smaxv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_sminv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_smaxv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sminv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_smaxv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sminv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_smaxv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sminv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_smaxv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sminv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_smaxv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sminv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_smaxv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sminv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_smaxv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sminv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fmaxrvvm8hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fminrvvm8hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fmaxrvvm4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fminrvvm4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fmaxrvvm2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fminrvvm2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fmaxrvvm1hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fminrvvm1hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fmaxrvvmf2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fminrvvmf2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fmaxrvvmf4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fminrvvmf4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fmaxrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fminrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fmaxrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fminrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fmaxrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fminrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fmaxrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fminrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fmaxrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fminrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fmaxrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fminrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fmaxrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fminrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fmaxrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fminrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fmaxrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fminrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fmaxv1hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_fminv1hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_fmaxv2hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_fminv2hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_fmaxv4hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_fminv4hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_fmaxv8hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_fminv8hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_fmaxv16hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_fminv16hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_fmaxv32hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fminv32hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fmaxv64hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fminv64hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fmaxv128hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fminv128hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fmaxv256hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fminv256hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fmaxv512hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fminv512hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fmaxv1024hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fminv1024hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fmaxv2048hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fminv2048hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fmaxv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fminv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fmaxv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fminv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fmaxv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fminv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fmaxv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fminv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fmaxv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fminv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fmaxv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fminv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fmaxv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fminv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fmaxv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fminv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fmaxv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fminv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fmaxv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fminv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fmaxv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fminv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fmaxv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fminv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fmaxv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fminv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fmaxv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fminv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fmaxv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fminv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fmaxv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fminv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fmaxv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fminv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fmaxv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fminv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fmaxv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fminv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fmaxv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fminv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fmaxv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fminv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_subrvvm8hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_divrvvm8hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_subrvvm4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_divrvvm4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_subrvvm2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_divrvvm2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_subrvvm1hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_divrvvm1hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_subrvvmf2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_divrvvmf2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_subrvvmf4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_divrvvmf4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_divrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_subrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_divrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_subrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_divrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_subrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_divrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_subrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_divrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_divrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_subrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_divrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_subrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_divrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_subrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_divrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_subv1hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_divv1hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_subv2hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_divv2hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_subv4hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_divv4hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_subv8hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_divv8hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_subv16hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_divv16hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_subv32hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_divv32hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_subv64hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_divv64hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_subv128hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_divv128hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_subv256hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_divv256hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_subv512hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_divv512hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_subv1024hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_divv1024hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_subv2048hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_divv2048hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_subv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_divv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_subv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_divv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_subv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_divv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_subv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_divv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_subv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_divv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_subv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_divv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_subv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_divv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_subv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_divv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_subv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_divv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_subv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_divv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_subv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_divv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_subv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_divv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_subv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_divv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_subv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_divv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_subv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_divv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_subv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_divv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_subv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_divv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_subv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_divv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_subv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_divv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_subv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_divv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_subv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_divv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_subrvvm8hf_reverse_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_divrvvm8hf_reverse_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_subrvvm4hf_reverse_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_divrvvm4hf_reverse_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_subrvvm2hf_reverse_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_divrvvm2hf_reverse_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_subrvvm1hf_reverse_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_divrvvm1hf_reverse_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_subrvvmf2hf_reverse_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_divrvvmf2hf_reverse_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_subrvvmf4hf_reverse_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_divrvvmf4hf_reverse_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subrvvm8sf_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_divrvvm8sf_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_subrvvm4sf_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_divrvvm4sf_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_subrvvm2sf_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_divrvvm2sf_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_subrvvm1sf_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_divrvvm1sf_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_subrvvmf2sf_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_divrvvmf2sf_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subrvvm8df_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_divrvvm8df_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_subrvvm4df_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_divrvvm4df_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_subrvvm2df_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_divrvvm2df_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_subrvvm1df_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_divrvvm1df_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_subv1hf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_divv1hf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_subv2hf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_divv2hf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_subv4hf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_divv4hf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_subv8hf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_divv8hf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_subv16hf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_divv16hf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_subv32hf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_divv32hf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_subv64hf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_divv64hf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_subv128hf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_divv128hf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_subv256hf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_divv256hf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_subv512hf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_divv512hf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_subv1024hf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_divv1024hf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_subv2048hf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_divv2048hf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_subv1sf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_divv1sf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_subv2sf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_divv2sf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_subv4sf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_divv4sf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_subv8sf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_divv8sf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_subv16sf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_divv16sf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_subv32sf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_divv32sf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_subv64sf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_divv64sf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_subv128sf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_divv128sf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_subv256sf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_divv256sf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_subv512sf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_divv512sf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_subv1024sf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_divv1024sf_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_subv1df_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_divv1df_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_subv2df_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_divv2df_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_subv4df_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_divv4df_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_subv8df_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_divv8df_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_subv16df_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_divv16df_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_subv32df_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_divv32df_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_subv64df_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_divv64df_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_subv128df_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_divv128df_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_subv256df_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_divv256df_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_subv512df_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_divv512df_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_copysignrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_xorsignrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_copysignrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_xorsignrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_copysignrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_xorsignrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_copysignrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_xorsignrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_copysignrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_xorsignrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_copysignrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_xorsignrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_copysignrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_xorsignrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_copysignrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_xorsignrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_copysignrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_xorsignrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_copysignrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_xorsignrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_copysignrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_xorsignrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_copysignrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_xorsignrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_copysignrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_xorsignrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_copysignrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_xorsignrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_copysignrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_xorsignrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_copysignv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_xorsignv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_copysignv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_xorsignv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_copysignv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_xorsignv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_copysignv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_xorsignv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_copysignv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_xorsignv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_copysignv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_xorsignv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_copysignv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_xorsignv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_copysignv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_xorsignv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_copysignv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_xorsignv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_copysignv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_xorsignv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_copysignv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_xorsignv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_copysignv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_xorsignv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_copysignv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_xorsignv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_copysignv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_xorsignv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_copysignv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_xorsignv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_copysignv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_xorsignv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_copysignv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_xorsignv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_copysignv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_xorsignv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_copysignv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_xorsignv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_copysignv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_xorsignv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_copysignv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_xorsignv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_copysignv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_xorsignv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_copysignv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_xorsignv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_copysignv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_xorsignv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_copysignv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_xorsignv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_copysignv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_xorsignv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_copysignv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_xorsignv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_copysignv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_xorsignv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_copysignv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_xorsignv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_copysignv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_xorsignv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_copysignv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_xorsignv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_copysignv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_xorsignv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_copysignv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_xorsignv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ncopysignrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_ncopysignrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_ncopysignrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_ncopysignrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_ncopysignrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_ncopysignrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ncopysignrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_ncopysignrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_ncopysignrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_ncopysignrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_ncopysignrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ncopysignrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_ncopysignrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_ncopysignrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_ncopysignrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_ncopysignv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_ncopysignv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_ncopysignv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_ncopysignv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_ncopysignv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_ncopysignv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ncopysignv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ncopysignv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ncopysignv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ncopysignv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ncopysignv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ncopysignv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ncopysignv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_ncopysignv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_ncopysignv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_ncopysignv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_ncopysignv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ncopysignv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ncopysignv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ncopysignv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ncopysignv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ncopysignv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ncopysignv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ncopysignv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_ncopysignv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_ncopysignv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_ncopysignv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ncopysignv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ncopysignv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ncopysignv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ncopysignv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ncopysignv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ncopysignv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_copysignrvvm8hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_xorsignrvvm8hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_copysignrvvm4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_xorsignrvvm4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_copysignrvvm2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_xorsignrvvm2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_copysignrvvm1hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_xorsignrvvm1hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_copysignrvvmf2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_xorsignrvvmf2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_copysignrvvmf4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_xorsignrvvmf4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_copysignrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_xorsignrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_copysignrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_xorsignrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_copysignrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_xorsignrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_copysignrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_xorsignrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_copysignrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_xorsignrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_copysignrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_xorsignrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_copysignrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_xorsignrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_copysignrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_xorsignrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_copysignrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_xorsignrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_copysignv1hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_xorsignv1hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_copysignv2hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_xorsignv2hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_copysignv4hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_xorsignv4hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_copysignv8hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_xorsignv8hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_copysignv16hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_xorsignv16hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_copysignv32hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_xorsignv32hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_copysignv64hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_xorsignv64hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_copysignv128hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_xorsignv128hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_copysignv256hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_xorsignv256hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_copysignv512hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_xorsignv512hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_copysignv1024hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_xorsignv1024hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_copysignv2048hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_xorsignv2048hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_copysignv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_xorsignv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_copysignv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_xorsignv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_copysignv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_xorsignv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_copysignv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_xorsignv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_copysignv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_xorsignv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_copysignv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_xorsignv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_copysignv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_xorsignv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_copysignv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_xorsignv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_copysignv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_xorsignv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_copysignv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_xorsignv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_copysignv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_xorsignv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_copysignv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_xorsignv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_copysignv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_xorsignv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_copysignv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_xorsignv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_copysignv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_xorsignv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_copysignv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_xorsignv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_copysignv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_xorsignv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_copysignv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_xorsignv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_copysignv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_xorsignv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_copysignv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_xorsignv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_copysignv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_xorsignv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ncopysignrvvm8hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_ncopysignrvvm4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_ncopysignrvvm2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_ncopysignrvvm1hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_ncopysignrvvmf2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_ncopysignrvvmf4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ncopysignrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_ncopysignrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_ncopysignrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_ncopysignrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_ncopysignrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ncopysignrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_ncopysignrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_ncopysignrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_ncopysignrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_ncopysignv1hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_ncopysignv2hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_ncopysignv4hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_ncopysignv8hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_ncopysignv16hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_ncopysignv32hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ncopysignv64hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ncopysignv128hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ncopysignv256hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ncopysignv512hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ncopysignv1024hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ncopysignv2048hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ncopysignv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_ncopysignv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_ncopysignv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_ncopysignv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_ncopysignv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ncopysignv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ncopysignv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ncopysignv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ncopysignv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ncopysignv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ncopysignv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ncopysignv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_ncopysignv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_ncopysignv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_ncopysignv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ncopysignv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ncopysignv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ncopysignv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ncopysignv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ncopysignv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ncopysignv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sqrtrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_sqrtrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_sqrtrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_sqrtrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_sqrtrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_sqrtrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sqrtrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_sqrtrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_sqrtrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_sqrtrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_sqrtrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sqrtrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_sqrtrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_sqrtrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_sqrtrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_sqrtv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_sqrtv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_sqrtv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_sqrtv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_sqrtv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_sqrtv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sqrtv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sqrtv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sqrtv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sqrtv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sqrtv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sqrtv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sqrtv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_sqrtv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_sqrtv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_sqrtv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_sqrtv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sqrtv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sqrtv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sqrtv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sqrtv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sqrtv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sqrtv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sqrtv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_sqrtv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_sqrtv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_sqrtv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sqrtv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sqrtv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sqrtv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sqrtv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sqrtv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sqrtv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_negrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_absrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_negrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_absrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_negrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_absrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_negrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_absrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_negrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_absrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_negrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_absrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_negrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_absrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_negrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_absrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_negrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_absrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_negrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_absrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_negrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_absrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_negrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_absrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_negrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_absrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_negrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_absrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_negrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_absrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_negv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_absv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_negv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_absv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_negv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_absv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_negv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_absv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_negv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_absv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_negv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_absv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_negv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_absv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_negv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_absv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_negv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_absv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_negv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_absv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_negv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_absv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_negv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_absv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_negv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_absv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_negv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_absv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_negv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_absv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_negv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_absv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_negv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_absv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_negv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_absv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_negv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_absv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_negv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_absv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_negv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_absv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_negv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_absv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_negv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_absv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_negv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_absv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_negv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_absv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_negv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_absv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_negv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_absv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_negv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_absv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_negv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_absv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_negv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_absv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_negv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_absv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_negv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_absv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_negv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_absv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_rsqrt7rvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_rsqrt7rvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_rsqrt7rvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_rsqrt7rvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_rsqrt7rvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_rsqrt7rvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_rsqrt7rvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_rsqrt7rvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_rsqrt7rvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_rsqrt7rvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_rsqrt7rvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_rsqrt7rvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_rsqrt7rvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_rsqrt7rvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_rsqrt7rvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_rsqrt7v1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_rsqrt7v2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_rsqrt7v4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_rsqrt7v8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_rsqrt7v16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_rsqrt7v32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_rsqrt7v64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_rsqrt7v128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_rsqrt7v256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_rsqrt7v512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_rsqrt7v1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_rsqrt7v2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_rsqrt7v1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_rsqrt7v2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_rsqrt7v4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_rsqrt7v8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_rsqrt7v16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_rsqrt7v32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_rsqrt7v64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_rsqrt7v128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_rsqrt7v256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_rsqrt7v512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_rsqrt7v1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_rsqrt7v1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_rsqrt7v2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_rsqrt7v4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_rsqrt7v8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_rsqrt7v16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_rsqrt7v32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_rsqrt7v64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_rsqrt7v128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_rsqrt7v256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_rsqrt7v512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_rec7rvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_rec7rvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_rec7rvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_rec7rvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_rec7rvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_rec7rvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_rec7rvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_rec7rvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_rec7rvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_rec7rvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_rec7rvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_rec7rvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_rec7rvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_rec7rvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_rec7rvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_rec7v1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_rec7v2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_rec7v4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_rec7v8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_rec7v16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_rec7v32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_rec7v64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_rec7v128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_rec7v256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_rec7v512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_rec7v1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_rec7v2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_rec7v1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_rec7v2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_rec7v4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_rec7v8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_rec7v16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_rec7v32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_rec7v64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_rec7v128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_rec7v256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_rec7v512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_rec7v1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_rec7v1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_rec7v2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_rec7v4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_rec7v8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_rec7v16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_rec7v32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_rec7v64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_rec7v128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_rec7v256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_rec7v512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_classrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_classrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_classrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_classrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_classrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_classrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_classrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_classrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_classrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_classrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_classrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_classrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_classrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_classrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_classrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_classv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_classv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_classv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_classv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_classv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_classv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_classv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_classv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_classv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_classv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_classv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_classv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_classv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_classv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_classv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_classv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_classv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_classv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_classv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_classv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_classv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_classv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_classv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_classv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_classv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_classv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_classv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_classv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_classv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_classv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_classv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_classv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_classv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_addrvvm8sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_subrvvm8sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_mulrvvm8sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_addrvvm4sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_subrvvm4sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_mulrvvm4sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_addrvvm2sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_subrvvm2sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_mulrvvm2sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_addrvvm1sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_subrvvm1sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_mulrvvm1sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_addrvvmf2sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subrvvmf2sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulrvvmf2sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_subrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_mulrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_addrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_subrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_mulrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_addrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_subrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_mulrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_addrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_subrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_mulrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_addv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_subv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_mulv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_addv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_subv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_mulv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_addv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_subv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_mulv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_addv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_subv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_mulv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_addv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_subv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_mulv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_addv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_subv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_mulv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_addv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_subv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_mulv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_addv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_subv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_mulv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_addv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_subv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_mulv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_addv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_subv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_mulv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_addv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_subv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_mulv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_addv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_subv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_mulv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_addv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_subv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_mulv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_addv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_subv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_mulv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_addv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_subv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_mulv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_addv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_subv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_mulv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_addv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_subv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_mulv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_addv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_subv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_mulv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_addv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_subv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_mulv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_addv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_subv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_mulv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_addv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_subv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_mulv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_addrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_subrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_mulrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_addrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_subrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_mulrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_addrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_subrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_mulrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_addrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_subrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_mulrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_addrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_subrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_mulrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_dual_widen_addrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_subrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_mulrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_addrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_subrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_mulrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_addrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_subrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_mulrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_addrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_subrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_mulrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_addv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_subv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_mulv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_addv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_subv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_mulv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_addv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_subv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_mulv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_addv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_subv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_mulv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_dual_widen_addv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_subv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_mulv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_addv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_subv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_mulv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_addv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_subv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_mulv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_addv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_subv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_mulv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_addv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_subv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_mulv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_addv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_subv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_mulv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_addv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_subv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_mulv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_addv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_subv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_mulv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_addv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_subv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_mulv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_addv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_subv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_mulv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_dual_widen_addv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_subv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_mulv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_dual_widen_addv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_subv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_mulv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_dual_widen_addv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_subv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_mulv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_dual_widen_addv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_subv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_mulv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_dual_widen_addv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_subv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_mulv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_dual_widen_addv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_subv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_mulv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_dual_widen_addv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_subv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_dual_widen_mulv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_addrvvm8sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_addrvvm4sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_addrvvm2sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_addrvvm1sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_addrvvmf2sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_addrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_addrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_addrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_addv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_addv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_addv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_addv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_addv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_addv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_addv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_addv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_addv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_addv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_addv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_addv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_addv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_addv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_addv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_addv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_addv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_addv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_addv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_addv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_addv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_subrvvm8sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_subrvvm4sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_subrvvm2sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_subrvvm1sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_subrvvmf2sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_subrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_subrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_subrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_subv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_subv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_subv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_subv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_subv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_subv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_subv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_subv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_subv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_subv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_subv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_subv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_subv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_subv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_subv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_subv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_subv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_subv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_subv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_subv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_subv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_addrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_subrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_addrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_subrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_addrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_subrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_addrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_subrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_addrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_subrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_single_widen_addrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_subrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_addrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_subrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_addrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_subrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_addrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_subrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_addv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_subv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_addv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_subv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_addv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_subv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_addv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_subv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_single_widen_addv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_subv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_addv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_subv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_addv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_subv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_addv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_subv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_addv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_subv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_addv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_subv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_addv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_subv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_addv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_subv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_addv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_subv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_addv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_subv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_single_widen_addv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_subv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_single_widen_addv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_subv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_single_widen_addv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_subv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_single_widen_addv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_subv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_single_widen_addv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_subv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_single_widen_addv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_subv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_single_widen_addv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_single_widen_subv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_addrvvm8sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_subrvvm8sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_addrvvm4sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_subrvvm4sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_addrvvm2sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_subrvvm2sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_addrvvm1sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_subrvvm1sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_addrvvmf2sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_subrvvmf2sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_addrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_subrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_addrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_subrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_addrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_subrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_addrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_subrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_addv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_subv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_addv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_subv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_addv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_subv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_addv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_subv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_addv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_subv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_addv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_subv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_addv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_subv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_addv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_subv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_addv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_subv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_addv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_subv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_addv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_subv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_addv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_subv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_addv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_subv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_addv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_subv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_addv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_subv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_addv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_subv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_addv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_subv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_addv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_subv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_addv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_subv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_addv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_subv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_addv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_subv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_addrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_subrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_addrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_subrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_addrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_subrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_addrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_subrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_addrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_subrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_addrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_subrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_addrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_subrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_addrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_subrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_addrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_subrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_addv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_subv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_addv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_subv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_addv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_subv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_addv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_subv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_addv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_subv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_addv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_subv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_addv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_subv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_addv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_subv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_addv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_subv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_addv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_subv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_addv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_subv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_addv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_subv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_addv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_subv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_addv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_subv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_addv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_subv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_addv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_subv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_addv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_subv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_addv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_subv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_addv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_subv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_addv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_subv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_addv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_subv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_neg_addrvvm8sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_subrvvm8sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_addrvvm4sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_subrvvm4sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_addrvvm2sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_subrvvm2sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_addrvvm1sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_subrvvm1sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_addrvvmf2sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_neg_subrvvmf2sf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_neg_addrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_subrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_addrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_subrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_addrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_subrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_addrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_subrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_addv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_subv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_addv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_subv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_addv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_subv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_addv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_subv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_addv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_neg_subv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_neg_addv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_neg_subv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_neg_addv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_neg_subv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_neg_addv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_neg_subv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_neg_addv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_neg_subv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_neg_addv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_neg_subv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_neg_addv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_neg_subv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_neg_addv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_subv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_addv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_subv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_addv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_subv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_addv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_neg_subv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_neg_addv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_neg_subv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_neg_addv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_neg_subv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_neg_addv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_neg_subv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_neg_addv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_neg_subv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_neg_addv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_neg_subv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_neg_addv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_neg_subv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_neg_addrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_subrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_addrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_subrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_addrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_subrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_addrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_subrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_addrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_neg_subrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_neg_addrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_subrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_addrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_subrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_addrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_subrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_addrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_subrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_addv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_subv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_addv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_subv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_addv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_subv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_addv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_subv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_mul_neg_addv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_neg_subv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_neg_addv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_neg_subv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_neg_addv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_neg_subv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_neg_addv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_neg_subv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_neg_addv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_neg_subv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_neg_addv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_neg_subv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_neg_addv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_neg_subv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_neg_addv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_subv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_addv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_subv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_addv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_subv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_mul_neg_addv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_neg_subv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_neg_addv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_neg_subv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_neg_addv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_neg_subv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_neg_addv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_neg_subv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_neg_addv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_neg_subv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_neg_addv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_neg_subv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_neg_addv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_neg_subv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mergervvm8hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mergervvm4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mergervvm2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mergervvm1hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mergervvmf2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mergervvmf4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mergervvm8sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mergervvm4sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mergervvm2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mergervvm1sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mergervvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mergervvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mergervvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mergervvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mergervvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mergev1hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_mergev2hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_mergev4hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_mergev8hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_mergev16hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_mergev32hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mergev64hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mergev128hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mergev256hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mergev512hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mergev1024hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mergev2048hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mergev1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mergev2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mergev4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mergev8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mergev16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mergev32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mergev64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mergev128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mergev256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mergev512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mergev1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mergev1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mergev2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mergev4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mergev8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mergev16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mergev32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mergev64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mergev128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mergev256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mergev512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fcvt_x_frvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fcvt_xu_frvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fcvt_x_frvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fcvt_xu_frvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fcvt_x_frvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fcvt_xu_frvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fcvt_x_frvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fcvt_xu_frvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fcvt_x_frvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fcvt_xu_frvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fcvt_x_frvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fcvt_xu_frvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fcvt_x_frvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fcvt_xu_frvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fcvt_x_frvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fcvt_xu_frvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fcvt_x_frvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fcvt_xu_frvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fcvt_x_frvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fcvt_xu_frvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fcvt_x_frvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fcvt_xu_frvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fcvt_x_frvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fcvt_xu_frvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fcvt_x_frvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fcvt_xu_frvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fcvt_x_frvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fcvt_xu_frvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fcvt_x_frvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fcvt_xu_frvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fcvt_x_fv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_fcvt_xu_fv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_fcvt_x_fv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_fcvt_xu_fv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_fcvt_x_fv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_fcvt_xu_fv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_fcvt_x_fv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_fcvt_xu_fv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_fcvt_x_fv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_fcvt_xu_fv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_fcvt_x_fv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fcvt_xu_fv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fcvt_x_fv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fcvt_xu_fv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fcvt_x_fv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fcvt_xu_fv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fcvt_x_fv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fcvt_xu_fv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fcvt_x_fv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fcvt_xu_fv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fcvt_x_fv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fcvt_xu_fv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fcvt_x_fv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fcvt_xu_fv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fcvt_x_fv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fcvt_xu_fv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fcvt_x_fv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fcvt_xu_fv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fcvt_x_fv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fcvt_xu_fv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fcvt_x_fv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fcvt_xu_fv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fcvt_x_fv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fcvt_xu_fv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fcvt_x_fv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fcvt_xu_fv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fcvt_x_fv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fcvt_xu_fv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fcvt_x_fv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fcvt_xu_fv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fcvt_x_fv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fcvt_xu_fv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fcvt_x_fv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fcvt_xu_fv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fcvt_x_fv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fcvt_xu_fv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fcvt_x_fv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fcvt_xu_fv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fcvt_x_fv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fcvt_xu_fv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fcvt_x_fv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fcvt_xu_fv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fcvt_x_fv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fcvt_xu_fv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fcvt_x_fv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fcvt_xu_fv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fcvt_x_fv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fcvt_xu_fv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fcvt_x_fv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fcvt_xu_fv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fcvt_x_fv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fcvt_xu_fv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fcvt_x_fv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fcvt_xu_fv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fcvt_x_fv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fcvt_xu_fv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fix_truncrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fixuns_truncrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fix_truncrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fixuns_truncrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fix_truncrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fixuns_truncrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fix_truncrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fixuns_truncrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fix_truncrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fixuns_truncrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_fix_truncrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fixuns_truncrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fix_truncrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fixuns_truncrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fix_truncrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fixuns_truncrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fix_truncrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fixuns_truncrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fix_truncrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fixuns_truncrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fix_truncrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fixuns_truncrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fix_truncrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fixuns_truncrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fix_truncrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fixuns_truncrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fix_truncrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fixuns_truncrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fix_truncrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fixuns_truncrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fix_truncv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_fixuns_truncv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_fix_truncv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_fixuns_truncv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_fix_truncv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_fixuns_truncv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_fix_truncv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_fixuns_truncv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_fix_truncv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_fixuns_truncv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_fix_truncv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fixuns_truncv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fix_truncv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fixuns_truncv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fix_truncv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fixuns_truncv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fix_truncv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fixuns_truncv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fix_truncv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fixuns_truncv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fix_truncv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fixuns_truncv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fix_truncv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fixuns_truncv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fix_truncv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fixuns_truncv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fix_truncv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fixuns_truncv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fix_truncv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fixuns_truncv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fix_truncv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fixuns_truncv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fix_truncv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fixuns_truncv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fix_truncv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fixuns_truncv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fix_truncv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fixuns_truncv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fix_truncv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fixuns_truncv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fix_truncv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fixuns_truncv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fix_truncv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fixuns_truncv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fix_truncv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fixuns_truncv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fix_truncv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fixuns_truncv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fix_truncv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fixuns_truncv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fix_truncv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fixuns_truncv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fix_truncv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fixuns_truncv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fix_truncv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fixuns_truncv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fix_truncv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fixuns_truncv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fix_truncv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fixuns_truncv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fix_truncv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fixuns_truncv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fix_truncv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fixuns_truncv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fix_truncv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fixuns_truncv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_floatrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_floatunsrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_floatrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_floatunsrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_floatrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_floatunsrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_floatrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_floatunsrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_floatrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_floatunsrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_floatrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_floatunsrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_floatrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_floatunsrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_floatrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_floatunsrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_floatrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_floatunsrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_floatrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_floatunsrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_floatrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_floatunsrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_floatrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_floatunsrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_floatrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_floatunsrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_floatrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_floatunsrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_floatrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_floatunsrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_floatv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_floatunsv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_floatv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_floatunsv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_floatv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_floatunsv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_floatv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_floatunsv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_floatv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_floatunsv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_floatv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_floatunsv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_floatv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_floatunsv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_floatv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_floatunsv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_floatv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_floatunsv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_floatv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_floatunsv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_floatv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_floatunsv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_floatv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_floatunsv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_floatv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_floatunsv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_floatv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_floatunsv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_floatv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_floatunsv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_floatv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_floatunsv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_floatv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_floatunsv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_floatv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_floatunsv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_floatv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_floatunsv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_floatv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_floatunsv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_floatv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_floatunsv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_floatv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_floatunsv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_floatv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_floatunsv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_floatv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_floatunsv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_floatv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_floatunsv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_floatv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_floatunsv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_floatv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_floatunsv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_floatv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_floatunsv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_floatv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_floatunsv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_floatv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_floatunsv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_floatv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_floatunsv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_floatv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_floatunsv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_floatv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_floatunsv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_fcvt_x_frvvm8si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_fcvt_xu_frvvm8si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_fcvt_x_frvvm4si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_fcvt_xu_frvvm4si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_fcvt_x_frvvm2si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_fcvt_xu_frvvm2si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_fcvt_x_frvvm1si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_fcvt_xu_frvvm1si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_fcvt_x_frvvmf2si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_fcvt_xu_frvvmf2si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_fcvt_x_frvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fcvt_xu_frvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fcvt_x_frvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fcvt_xu_frvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fcvt_x_frvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fcvt_xu_frvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fcvt_x_frvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fcvt_xu_frvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fcvt_x_fv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode) && TARGET_ZVFH))
#define HAVE_pred_widen_fcvt_xu_fv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode) && TARGET_ZVFH))
#define HAVE_pred_widen_fcvt_x_fv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode) && TARGET_ZVFH))
#define HAVE_pred_widen_fcvt_xu_fv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode) && TARGET_ZVFH))
#define HAVE_pred_widen_fcvt_x_fv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode) && TARGET_ZVFH))
#define HAVE_pred_widen_fcvt_xu_fv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode) && TARGET_ZVFH))
#define HAVE_pred_widen_fcvt_x_fv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode) && TARGET_ZVFH))
#define HAVE_pred_widen_fcvt_xu_fv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode) && TARGET_ZVFH))
#define HAVE_pred_widen_fcvt_x_fv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_fcvt_xu_fv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_fcvt_x_fv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_fcvt_xu_fv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_fcvt_x_fv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_fcvt_xu_fv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_fcvt_x_fv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_fcvt_xu_fv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_fcvt_x_fv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_fcvt_xu_fv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_fcvt_x_fv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_fcvt_xu_fv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_fcvt_x_fv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_fcvt_xu_fv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_fcvt_x_fv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fcvt_xu_fv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fcvt_x_fv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fcvt_xu_fv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fcvt_x_fv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fcvt_xu_fv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fcvt_x_fv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_fcvt_xu_fv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_fcvt_x_fv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_fcvt_xu_fv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_fcvt_x_fv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_fcvt_xu_fv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_fcvt_x_fv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_fcvt_xu_fv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_fcvt_x_fv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_fcvt_xu_fv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_fcvt_x_fv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_fcvt_xu_fv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_fcvt_x_fv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_fcvt_xu_fv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_fix_truncrvvm8si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_fixuns_truncrvvm8si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_fix_truncrvvm4si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_fixuns_truncrvvm4si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_fix_truncrvvm2si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_fixuns_truncrvvm2si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_fix_truncrvvm1si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_fixuns_truncrvvm1si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_fix_truncrvvmf2si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_fixuns_truncrvvmf2si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_fix_truncrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fixuns_truncrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fix_truncrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fixuns_truncrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fix_truncrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fixuns_truncrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fix_truncrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fixuns_truncrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fix_truncv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode) && TARGET_ZVFH))
#define HAVE_pred_widen_fixuns_truncv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode) && TARGET_ZVFH))
#define HAVE_pred_widen_fix_truncv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode) && TARGET_ZVFH))
#define HAVE_pred_widen_fixuns_truncv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode) && TARGET_ZVFH))
#define HAVE_pred_widen_fix_truncv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode) && TARGET_ZVFH))
#define HAVE_pred_widen_fixuns_truncv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode) && TARGET_ZVFH))
#define HAVE_pred_widen_fix_truncv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode) && TARGET_ZVFH))
#define HAVE_pred_widen_fixuns_truncv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode) && TARGET_ZVFH))
#define HAVE_pred_widen_fix_truncv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_fixuns_truncv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_fix_truncv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_fixuns_truncv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_fix_truncv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_fixuns_truncv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_fix_truncv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_fixuns_truncv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_fix_truncv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_fixuns_truncv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_fix_truncv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_fixuns_truncv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_fix_truncv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_fixuns_truncv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_fix_truncv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fixuns_truncv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fix_truncv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fixuns_truncv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fix_truncv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fixuns_truncv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_fix_truncv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_fixuns_truncv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_fix_truncv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_fixuns_truncv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_fix_truncv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_fixuns_truncv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_fix_truncv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_fixuns_truncv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_fix_truncv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_fixuns_truncv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_fix_truncv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_fixuns_truncv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_fix_truncv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_fixuns_truncv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_floatrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_floatunsrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_floatrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_floatunsrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_floatrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_floatunsrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_floatrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_floatunsrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_floatrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_floatunsrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_widen_floatrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_floatunsrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_floatrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_floatunsrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_floatrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_floatunsrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_floatrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_floatunsrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_floatrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_floatunsrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_floatrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_floatunsrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_floatrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_floatunsrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_floatrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_floatunsrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_floatrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_floatunsrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_floatrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_floatunsrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_floatv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_widen_floatunsv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_widen_floatv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_widen_floatunsv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_widen_floatv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_widen_floatunsv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_widen_floatv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_widen_floatunsv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_widen_floatv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_widen_floatunsv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_widen_floatv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_floatunsv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_floatv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_floatunsv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_floatv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_floatunsv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_floatv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_floatunsv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_floatv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_floatunsv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_floatv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_floatunsv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_floatv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_floatunsv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_floatv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_floatunsv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_floatv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_floatunsv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_floatv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_floatunsv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_floatv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_floatunsv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_floatv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_floatunsv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_floatv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_floatunsv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_floatv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_floatunsv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_floatv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_floatunsv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_floatv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_floatunsv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_floatv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_floatunsv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_floatv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_floatunsv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_floatv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_floatunsv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_floatv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_floatunsv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_floatv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_floatunsv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_widen_floatv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_floatunsv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_floatv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_floatunsv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_floatv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_floatunsv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_floatv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_floatunsv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_floatv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_floatunsv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_floatv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_floatunsv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_floatv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_floatunsv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_extendrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_extendrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_extendrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_extendrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_extendrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extendrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_extendrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_extendrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_extendrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_extendv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_extendv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_extendv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_extendv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_extendv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_extendv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_extendv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_extendv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_extendv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_extendv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_extendv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_extendv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_extendv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_extendv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_extendv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_extendv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_extendv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_extendv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_extendv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_extendv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_extendv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_fcvt_x_frvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_fcvt_xu_frvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_fcvt_x_frvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_fcvt_xu_frvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_fcvt_x_frvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_fcvt_xu_frvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_fcvt_x_frvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_fcvt_xu_frvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_fcvt_x_frvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_fcvt_xu_frvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_fcvt_x_frvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_fcvt_xu_frvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_fcvt_x_frvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fcvt_xu_frvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fcvt_x_frvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fcvt_xu_frvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fcvt_x_frvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fcvt_xu_frvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fcvt_x_frvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fcvt_xu_frvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fcvt_x_frvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_fcvt_xu_frvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_fcvt_x_frvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fcvt_xu_frvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fcvt_x_frvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fcvt_xu_frvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fcvt_x_frvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fcvt_xu_frvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fcvt_x_frvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fcvt_xu_frvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fcvt_x_fv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_narrow_fcvt_xu_fv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_narrow_fcvt_x_fv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_narrow_fcvt_xu_fv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_narrow_fcvt_x_fv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_narrow_fcvt_xu_fv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_narrow_fcvt_x_fv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_narrow_fcvt_xu_fv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_narrow_fcvt_x_fv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_narrow_fcvt_xu_fv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_narrow_fcvt_x_fv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_fcvt_xu_fv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_fcvt_x_fv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_fcvt_xu_fv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_fcvt_x_fv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_fcvt_xu_fv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_fcvt_x_fv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_fcvt_xu_fv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_fcvt_x_fv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_fcvt_xu_fv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_fcvt_x_fv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_fcvt_xu_fv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_fcvt_x_fv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_fcvt_xu_fv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_fcvt_x_fv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fcvt_xu_fv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fcvt_x_fv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fcvt_xu_fv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fcvt_x_fv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fcvt_xu_fv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fcvt_x_fv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fcvt_xu_fv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fcvt_x_fv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_fcvt_xu_fv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_fcvt_x_fv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_fcvt_xu_fv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_fcvt_x_fv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_fcvt_xu_fv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_fcvt_x_fv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_fcvt_xu_fv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_fcvt_x_fv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_fcvt_xu_fv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_fcvt_x_fv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_fcvt_xu_fv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_fcvt_x_fv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_fcvt_xu_fv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_fcvt_x_fv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fcvt_xu_fv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fcvt_x_fv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fcvt_xu_fv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fcvt_x_fv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fcvt_xu_fv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fcvt_x_fv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_fcvt_xu_fv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_fcvt_x_fv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_fcvt_xu_fv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_fcvt_x_fv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_fcvt_xu_fv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_fcvt_x_fv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_fcvt_xu_fv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_fcvt_x_fv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_fcvt_xu_fv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_fcvt_x_fv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_fcvt_xu_fv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_fcvt_x_fv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_fcvt_xu_fv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_fix_truncrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_fixuns_truncrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_fix_truncrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_fixuns_truncrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_fix_truncrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_fixuns_truncrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_fix_truncrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_fixuns_truncrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_fix_truncrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_fixuns_truncrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_fix_truncrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_fixuns_truncrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_fix_truncrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fixuns_truncrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fix_truncrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fixuns_truncrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fix_truncrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fixuns_truncrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fix_truncrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fixuns_truncrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fix_truncrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_fixuns_truncrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_narrow_fix_truncrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fixuns_truncrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fix_truncrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fixuns_truncrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fix_truncrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fixuns_truncrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fix_truncrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fixuns_truncrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fix_truncv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_narrow_fixuns_truncv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_narrow_fix_truncv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_narrow_fixuns_truncv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_narrow_fix_truncv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_narrow_fixuns_truncv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_narrow_fix_truncv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_narrow_fixuns_truncv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_narrow_fix_truncv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_narrow_fixuns_truncv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_narrow_fix_truncv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_fixuns_truncv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_fix_truncv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_fixuns_truncv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_fix_truncv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_fixuns_truncv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_fix_truncv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_fixuns_truncv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_fix_truncv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_fixuns_truncv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_fix_truncv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_fixuns_truncv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_fix_truncv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_fixuns_truncv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_fix_truncv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fixuns_truncv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fix_truncv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fixuns_truncv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fix_truncv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fixuns_truncv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fix_truncv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fixuns_truncv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_fix_truncv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_fixuns_truncv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_fix_truncv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_fixuns_truncv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_fix_truncv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_fixuns_truncv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_fix_truncv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_fixuns_truncv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_fix_truncv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_fixuns_truncv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_fix_truncv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_fixuns_truncv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_fix_truncv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_fixuns_truncv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_fix_truncv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fixuns_truncv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fix_truncv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fixuns_truncv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fix_truncv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fixuns_truncv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_narrow_fix_truncv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_fixuns_truncv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_fix_truncv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_fixuns_truncv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_fix_truncv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_fixuns_truncv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_fix_truncv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_fixuns_truncv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_fix_truncv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_fixuns_truncv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_fix_truncv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_fixuns_truncv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_fix_truncv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_fixuns_truncv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_floatrvvm8si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_floatunsrvvm8si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_floatrvvm4si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_floatunsrvvm4si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_floatrvvm2si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_floatunsrvvm2si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_floatrvvm1si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_floatunsrvvm1si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_floatrvvmf2si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_floatunsrvvmf2si ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_narrow_floatrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_floatunsrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_floatrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_floatunsrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_floatrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_floatunsrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_floatrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_floatunsrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_floatv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode) && TARGET_ZVFH))
#define HAVE_pred_narrow_floatunsv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode) && TARGET_ZVFH))
#define HAVE_pred_narrow_floatv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode) && TARGET_ZVFH))
#define HAVE_pred_narrow_floatunsv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode) && TARGET_ZVFH))
#define HAVE_pred_narrow_floatv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode) && TARGET_ZVFH))
#define HAVE_pred_narrow_floatunsv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode) && TARGET_ZVFH))
#define HAVE_pred_narrow_floatv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode) && TARGET_ZVFH))
#define HAVE_pred_narrow_floatunsv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode) && TARGET_ZVFH))
#define HAVE_pred_narrow_floatv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_floatunsv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_floatv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_floatunsv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_floatv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_floatunsv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_floatv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_floatunsv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_floatv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_floatunsv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_floatv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_floatunsv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_floatv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_floatunsv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_floatv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_floatunsv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_floatv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_floatunsv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_floatv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_floatunsv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_narrow_floatv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_floatunsv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_narrow_floatv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_floatunsv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_narrow_floatv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_floatunsv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_narrow_floatv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_floatunsv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_narrow_floatv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_floatunsv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_narrow_floatv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_floatunsv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_narrow_floatv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_narrow_floatunsv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_truncrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_truncrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_truncrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_truncrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_truncrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_truncrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_truncrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_truncrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_truncrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_truncv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_truncv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_truncv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_truncv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_truncv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_truncv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_truncv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_truncv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_truncv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_truncv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_truncv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_truncv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_truncv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_truncv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_truncv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_truncv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_truncv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_truncv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_truncv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_truncv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_truncv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_rod_truncrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_rod_truncrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_rod_truncrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_rod_truncrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_rod_truncrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_rod_truncrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_rod_truncrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_rod_truncrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_rod_truncrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_rod_truncv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_rod_truncv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_rod_truncv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_rod_truncv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_rod_truncv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_rod_truncv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_rod_truncv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_rod_truncv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_rod_truncv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_rod_truncv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_rod_truncv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_rod_truncv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_rod_truncv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_rod_truncv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_rod_truncv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_rod_truncv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_rod_truncv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_rod_truncv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_rod_truncv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_rod_truncv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_rod_truncv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redsumrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_redmaxurvvm8qi (TARGET_VECTOR)
#define HAVE_pred_redmaxrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_redminurvvm8qi (TARGET_VECTOR)
#define HAVE_pred_redminrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_redandrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_redorrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_redxorrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_redsumrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_redmaxurvvm4qi (TARGET_VECTOR)
#define HAVE_pred_redmaxrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_redminurvvm4qi (TARGET_VECTOR)
#define HAVE_pred_redminrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_redandrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_redorrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_redxorrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_redsumrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_redmaxurvvm2qi (TARGET_VECTOR)
#define HAVE_pred_redmaxrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_redminurvvm2qi (TARGET_VECTOR)
#define HAVE_pred_redminrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_redandrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_redorrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_redxorrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_redsumrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_redmaxurvvm1qi (TARGET_VECTOR)
#define HAVE_pred_redmaxrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_redminurvvm1qi (TARGET_VECTOR)
#define HAVE_pred_redminrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_redandrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_redorrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_redxorrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_redsumrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_redmaxurvvm8hi (TARGET_VECTOR)
#define HAVE_pred_redmaxrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_redminurvvm8hi (TARGET_VECTOR)
#define HAVE_pred_redminrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_redandrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_redorrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_redxorrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_redsumrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_redmaxurvvm4hi (TARGET_VECTOR)
#define HAVE_pred_redmaxrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_redminurvvm4hi (TARGET_VECTOR)
#define HAVE_pred_redminrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_redandrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_redorrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_redxorrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_redsumrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_redmaxurvvm2hi (TARGET_VECTOR)
#define HAVE_pred_redmaxrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_redminurvvm2hi (TARGET_VECTOR)
#define HAVE_pred_redminrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_redandrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_redorrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_redxorrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_redsumrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_redmaxurvvm1hi (TARGET_VECTOR)
#define HAVE_pred_redmaxrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_redminurvvm1hi (TARGET_VECTOR)
#define HAVE_pred_redminrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_redandrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_redorrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_redxorrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_redsumrvvm8si (TARGET_VECTOR)
#define HAVE_pred_redmaxurvvm8si (TARGET_VECTOR)
#define HAVE_pred_redmaxrvvm8si (TARGET_VECTOR)
#define HAVE_pred_redminurvvm8si (TARGET_VECTOR)
#define HAVE_pred_redminrvvm8si (TARGET_VECTOR)
#define HAVE_pred_redandrvvm8si (TARGET_VECTOR)
#define HAVE_pred_redorrvvm8si (TARGET_VECTOR)
#define HAVE_pred_redxorrvvm8si (TARGET_VECTOR)
#define HAVE_pred_redsumrvvm4si (TARGET_VECTOR)
#define HAVE_pred_redmaxurvvm4si (TARGET_VECTOR)
#define HAVE_pred_redmaxrvvm4si (TARGET_VECTOR)
#define HAVE_pred_redminurvvm4si (TARGET_VECTOR)
#define HAVE_pred_redminrvvm4si (TARGET_VECTOR)
#define HAVE_pred_redandrvvm4si (TARGET_VECTOR)
#define HAVE_pred_redorrvvm4si (TARGET_VECTOR)
#define HAVE_pred_redxorrvvm4si (TARGET_VECTOR)
#define HAVE_pred_redsumrvvm2si (TARGET_VECTOR)
#define HAVE_pred_redmaxurvvm2si (TARGET_VECTOR)
#define HAVE_pred_redmaxrvvm2si (TARGET_VECTOR)
#define HAVE_pred_redminurvvm2si (TARGET_VECTOR)
#define HAVE_pred_redminrvvm2si (TARGET_VECTOR)
#define HAVE_pred_redandrvvm2si (TARGET_VECTOR)
#define HAVE_pred_redorrvvm2si (TARGET_VECTOR)
#define HAVE_pred_redxorrvvm2si (TARGET_VECTOR)
#define HAVE_pred_redsumrvvm1si (TARGET_VECTOR)
#define HAVE_pred_redmaxurvvm1si (TARGET_VECTOR)
#define HAVE_pred_redmaxrvvm1si (TARGET_VECTOR)
#define HAVE_pred_redminurvvm1si (TARGET_VECTOR)
#define HAVE_pred_redminrvvm1si (TARGET_VECTOR)
#define HAVE_pred_redandrvvm1si (TARGET_VECTOR)
#define HAVE_pred_redorrvvm1si (TARGET_VECTOR)
#define HAVE_pred_redxorrvvm1si (TARGET_VECTOR)
#define HAVE_pred_redsumrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmaxurvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmaxrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redminurvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redminrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redandrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redorrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redxorrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redsumrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmaxurvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmaxrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redminurvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redminrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redandrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redorrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redxorrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redsumrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmaxurvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmaxrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redminurvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redminrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redandrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redorrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redxorrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redsumrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmaxurvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmaxrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redminurvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redminrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redandrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redorrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redxorrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redsumrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redmaxurvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redmaxrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redminurvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redminrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redandrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redorrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redxorrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redsumrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redmaxurvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redmaxrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redminurvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redminrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redandrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redorrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redxorrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redsumrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redmaxurvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redmaxrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redminurvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redminrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redandrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redorrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redxorrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redsumrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redmaxurvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redmaxrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redminurvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redminrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redandrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redorrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redxorrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redsumrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redmaxurvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redmaxrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redminurvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redminrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redandrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redorrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redxorrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redsumrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redmaxurvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redmaxrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redminurvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redminrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redandrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redorrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redxorrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redsumv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_redmaxuv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_redmaxv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_redminuv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_redminv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_redandv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_redorv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_redxorv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_redsumv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_redmaxuv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_redmaxv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_redminuv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_redminv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_redandv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_redorv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_redxorv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_redsumv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_redmaxuv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_redmaxv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_redminuv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_redminv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_redandv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_redorv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_redxorv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_redsumv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_redmaxuv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_redmaxv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_redminuv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_redminv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_redandv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_redorv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_redxorv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_redsumv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_redmaxuv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_redmaxv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_redminuv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_redminv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_redandv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_redorv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_redxorv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_redsumv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_redmaxuv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_redmaxv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_redminuv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_redminv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_redandv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_redorv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_redxorv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_redsumv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmaxuv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmaxv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redminuv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redminv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redandv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redorv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redxorv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redsumv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmaxuv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmaxv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redminuv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redminv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redandv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redorv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redxorv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redsumv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmaxuv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmaxv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redminuv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redminv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redandv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redorv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redxorv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redsumv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmaxuv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmaxv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redminuv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redminv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redandv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redorv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redxorv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redsumv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmaxuv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmaxv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redminuv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redminv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redandv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redorv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redxorv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redsumv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmaxuv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmaxv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redminuv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redminv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redandv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redorv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redxorv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redsumv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmaxuv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmaxv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redminuv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redminv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redandv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redorv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redxorv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redsumv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_redmaxuv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_redmaxv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_redminuv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_redminv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_redandv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_redorv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_redxorv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_redsumv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_redmaxuv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_redmaxv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_redminuv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_redminv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_redandv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_redorv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_redxorv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_redsumv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_redmaxuv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_redmaxv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_redminuv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_redminv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_redandv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_redorv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_redxorv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_redsumv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_redmaxuv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_redmaxv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_redminuv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_redminv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_redandv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_redorv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_redxorv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_redsumv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_redmaxuv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_redmaxv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_redminuv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_redminv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_redandv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_redorv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_redxorv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_redsumv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmaxuv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmaxv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redminuv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redminv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redandv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redorv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redxorv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redsumv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmaxuv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmaxv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redminuv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redminv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redandv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redorv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redxorv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redsumv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmaxuv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmaxv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redminuv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redminv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redandv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redorv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redxorv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redsumv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmaxuv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmaxv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redminuv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redminv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redandv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redorv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redxorv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redsumv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmaxuv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmaxv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redminuv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redminv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redandv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redorv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redxorv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redsumv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmaxuv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmaxv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redminuv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redminv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redandv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redorv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redxorv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redsumv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmaxuv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmaxv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redminuv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redminv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redandv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redorv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redxorv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redsumv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_redmaxuv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_redmaxv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_redminuv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_redminv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_redandv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_redorv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_redxorv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_redsumv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_redmaxuv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_redmaxv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_redminuv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_redminv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_redandv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_redorv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_redxorv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_redsumv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_redmaxuv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_redmaxv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_redminuv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_redminv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_redandv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_redorv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_redxorv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_redsumv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_redmaxuv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_redmaxv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_redminuv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_redminv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_redandv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_redorv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_redxorv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_redsumv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmaxuv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmaxv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redminuv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redminv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redandv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redorv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redxorv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redsumv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmaxuv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmaxv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redminuv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redminv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redandv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redorv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redxorv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redsumv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmaxuv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmaxv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redminuv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redminv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redandv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redorv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redxorv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redsumv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmaxuv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmaxv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redminuv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redminv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redandv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redorv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redxorv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redsumv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmaxuv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmaxv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redminuv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redminv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redandv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redorv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redxorv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redsumv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmaxuv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmaxv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redminuv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redminv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redandv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redorv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redxorv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redsumv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmaxuv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmaxv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redminuv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redminv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redandv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redorv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redxorv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redsumv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmaxuv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmaxv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redminuv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redminv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redandv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redorv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redxorv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redsumv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmaxuv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmaxv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redminuv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redminv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redandv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redorv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redxorv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redsumv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmaxuv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmaxv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redminuv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redminv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redandv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redorv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redxorv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redsumv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmaxuv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmaxv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redminuv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redminv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redandv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redorv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redxorv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redsumv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmaxuv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmaxv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redminuv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redminv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redandv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redorv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redxorv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redsumv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmaxuv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmaxv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redminuv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redminv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redandv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redorv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redxorv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redsumv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmaxuv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmaxv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redminuv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redminv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redandv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redorv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redxorv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redsumv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmaxuv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmaxv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redminuv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redminv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redandv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redorv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redxorv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redsumv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmaxuv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmaxv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redminuv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redminv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redandv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redorv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redxorv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redsumv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmaxuv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmaxv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redminuv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redminv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redandv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redorv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redxorv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redsum_vl0srvvm8qi (TARGET_VECTOR)
#define HAVE_pred_redmaxu_vl0srvvm8qi (TARGET_VECTOR)
#define HAVE_pred_redmax_vl0srvvm8qi (TARGET_VECTOR)
#define HAVE_pred_redminu_vl0srvvm8qi (TARGET_VECTOR)
#define HAVE_pred_redmin_vl0srvvm8qi (TARGET_VECTOR)
#define HAVE_pred_redand_vl0srvvm8qi (TARGET_VECTOR)
#define HAVE_pred_redor_vl0srvvm8qi (TARGET_VECTOR)
#define HAVE_pred_redxor_vl0srvvm8qi (TARGET_VECTOR)
#define HAVE_pred_redsum_vl0srvvm4qi (TARGET_VECTOR)
#define HAVE_pred_redmaxu_vl0srvvm4qi (TARGET_VECTOR)
#define HAVE_pred_redmax_vl0srvvm4qi (TARGET_VECTOR)
#define HAVE_pred_redminu_vl0srvvm4qi (TARGET_VECTOR)
#define HAVE_pred_redmin_vl0srvvm4qi (TARGET_VECTOR)
#define HAVE_pred_redand_vl0srvvm4qi (TARGET_VECTOR)
#define HAVE_pred_redor_vl0srvvm4qi (TARGET_VECTOR)
#define HAVE_pred_redxor_vl0srvvm4qi (TARGET_VECTOR)
#define HAVE_pred_redsum_vl0srvvm2qi (TARGET_VECTOR)
#define HAVE_pred_redmaxu_vl0srvvm2qi (TARGET_VECTOR)
#define HAVE_pred_redmax_vl0srvvm2qi (TARGET_VECTOR)
#define HAVE_pred_redminu_vl0srvvm2qi (TARGET_VECTOR)
#define HAVE_pred_redmin_vl0srvvm2qi (TARGET_VECTOR)
#define HAVE_pred_redand_vl0srvvm2qi (TARGET_VECTOR)
#define HAVE_pred_redor_vl0srvvm2qi (TARGET_VECTOR)
#define HAVE_pred_redxor_vl0srvvm2qi (TARGET_VECTOR)
#define HAVE_pred_redsum_vl0srvvm1qi (TARGET_VECTOR)
#define HAVE_pred_redmaxu_vl0srvvm1qi (TARGET_VECTOR)
#define HAVE_pred_redmax_vl0srvvm1qi (TARGET_VECTOR)
#define HAVE_pred_redminu_vl0srvvm1qi (TARGET_VECTOR)
#define HAVE_pred_redmin_vl0srvvm1qi (TARGET_VECTOR)
#define HAVE_pred_redand_vl0srvvm1qi (TARGET_VECTOR)
#define HAVE_pred_redor_vl0srvvm1qi (TARGET_VECTOR)
#define HAVE_pred_redxor_vl0srvvm1qi (TARGET_VECTOR)
#define HAVE_pred_redsum_vl0srvvm8hi (TARGET_VECTOR)
#define HAVE_pred_redmaxu_vl0srvvm8hi (TARGET_VECTOR)
#define HAVE_pred_redmax_vl0srvvm8hi (TARGET_VECTOR)
#define HAVE_pred_redminu_vl0srvvm8hi (TARGET_VECTOR)
#define HAVE_pred_redmin_vl0srvvm8hi (TARGET_VECTOR)
#define HAVE_pred_redand_vl0srvvm8hi (TARGET_VECTOR)
#define HAVE_pred_redor_vl0srvvm8hi (TARGET_VECTOR)
#define HAVE_pred_redxor_vl0srvvm8hi (TARGET_VECTOR)
#define HAVE_pred_redsum_vl0srvvm4hi (TARGET_VECTOR)
#define HAVE_pred_redmaxu_vl0srvvm4hi (TARGET_VECTOR)
#define HAVE_pred_redmax_vl0srvvm4hi (TARGET_VECTOR)
#define HAVE_pred_redminu_vl0srvvm4hi (TARGET_VECTOR)
#define HAVE_pred_redmin_vl0srvvm4hi (TARGET_VECTOR)
#define HAVE_pred_redand_vl0srvvm4hi (TARGET_VECTOR)
#define HAVE_pred_redor_vl0srvvm4hi (TARGET_VECTOR)
#define HAVE_pred_redxor_vl0srvvm4hi (TARGET_VECTOR)
#define HAVE_pred_redsum_vl0srvvm2hi (TARGET_VECTOR)
#define HAVE_pred_redmaxu_vl0srvvm2hi (TARGET_VECTOR)
#define HAVE_pred_redmax_vl0srvvm2hi (TARGET_VECTOR)
#define HAVE_pred_redminu_vl0srvvm2hi (TARGET_VECTOR)
#define HAVE_pred_redmin_vl0srvvm2hi (TARGET_VECTOR)
#define HAVE_pred_redand_vl0srvvm2hi (TARGET_VECTOR)
#define HAVE_pred_redor_vl0srvvm2hi (TARGET_VECTOR)
#define HAVE_pred_redxor_vl0srvvm2hi (TARGET_VECTOR)
#define HAVE_pred_redsum_vl0srvvm1hi (TARGET_VECTOR)
#define HAVE_pred_redmaxu_vl0srvvm1hi (TARGET_VECTOR)
#define HAVE_pred_redmax_vl0srvvm1hi (TARGET_VECTOR)
#define HAVE_pred_redminu_vl0srvvm1hi (TARGET_VECTOR)
#define HAVE_pred_redmin_vl0srvvm1hi (TARGET_VECTOR)
#define HAVE_pred_redand_vl0srvvm1hi (TARGET_VECTOR)
#define HAVE_pred_redor_vl0srvvm1hi (TARGET_VECTOR)
#define HAVE_pred_redxor_vl0srvvm1hi (TARGET_VECTOR)
#define HAVE_pred_redsum_vl0srvvm8si (TARGET_VECTOR)
#define HAVE_pred_redmaxu_vl0srvvm8si (TARGET_VECTOR)
#define HAVE_pred_redmax_vl0srvvm8si (TARGET_VECTOR)
#define HAVE_pred_redminu_vl0srvvm8si (TARGET_VECTOR)
#define HAVE_pred_redmin_vl0srvvm8si (TARGET_VECTOR)
#define HAVE_pred_redand_vl0srvvm8si (TARGET_VECTOR)
#define HAVE_pred_redor_vl0srvvm8si (TARGET_VECTOR)
#define HAVE_pred_redxor_vl0srvvm8si (TARGET_VECTOR)
#define HAVE_pred_redsum_vl0srvvm4si (TARGET_VECTOR)
#define HAVE_pred_redmaxu_vl0srvvm4si (TARGET_VECTOR)
#define HAVE_pred_redmax_vl0srvvm4si (TARGET_VECTOR)
#define HAVE_pred_redminu_vl0srvvm4si (TARGET_VECTOR)
#define HAVE_pred_redmin_vl0srvvm4si (TARGET_VECTOR)
#define HAVE_pred_redand_vl0srvvm4si (TARGET_VECTOR)
#define HAVE_pred_redor_vl0srvvm4si (TARGET_VECTOR)
#define HAVE_pred_redxor_vl0srvvm4si (TARGET_VECTOR)
#define HAVE_pred_redsum_vl0srvvm2si (TARGET_VECTOR)
#define HAVE_pred_redmaxu_vl0srvvm2si (TARGET_VECTOR)
#define HAVE_pred_redmax_vl0srvvm2si (TARGET_VECTOR)
#define HAVE_pred_redminu_vl0srvvm2si (TARGET_VECTOR)
#define HAVE_pred_redmin_vl0srvvm2si (TARGET_VECTOR)
#define HAVE_pred_redand_vl0srvvm2si (TARGET_VECTOR)
#define HAVE_pred_redor_vl0srvvm2si (TARGET_VECTOR)
#define HAVE_pred_redxor_vl0srvvm2si (TARGET_VECTOR)
#define HAVE_pred_redsum_vl0srvvm1si (TARGET_VECTOR)
#define HAVE_pred_redmaxu_vl0srvvm1si (TARGET_VECTOR)
#define HAVE_pred_redmax_vl0srvvm1si (TARGET_VECTOR)
#define HAVE_pred_redminu_vl0srvvm1si (TARGET_VECTOR)
#define HAVE_pred_redmin_vl0srvvm1si (TARGET_VECTOR)
#define HAVE_pred_redand_vl0srvvm1si (TARGET_VECTOR)
#define HAVE_pred_redor_vl0srvvm1si (TARGET_VECTOR)
#define HAVE_pred_redxor_vl0srvvm1si (TARGET_VECTOR)
#define HAVE_pred_redsum_vl0srvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmaxu_vl0srvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmax_vl0srvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redminu_vl0srvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmin_vl0srvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redand_vl0srvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redor_vl0srvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redxor_vl0srvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redsum_vl0srvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmaxu_vl0srvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmax_vl0srvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redminu_vl0srvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmin_vl0srvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redand_vl0srvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redor_vl0srvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redxor_vl0srvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redsum_vl0srvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmaxu_vl0srvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmax_vl0srvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redminu_vl0srvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmin_vl0srvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redand_vl0srvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redor_vl0srvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redxor_vl0srvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redsum_vl0srvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmaxu_vl0srvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmax_vl0srvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redminu_vl0srvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmin_vl0srvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redand_vl0srvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redor_vl0srvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redxor_vl0srvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redsum_vl0srvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redmaxu_vl0srvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redmax_vl0srvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redminu_vl0srvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redmin_vl0srvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redand_vl0srvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redor_vl0srvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redxor_vl0srvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redsum_vl0srvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redmaxu_vl0srvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redmax_vl0srvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redminu_vl0srvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redmin_vl0srvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redand_vl0srvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redor_vl0srvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redxor_vl0srvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redsum_vl0srvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redmaxu_vl0srvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redmax_vl0srvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redminu_vl0srvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redmin_vl0srvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redand_vl0srvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redor_vl0srvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redxor_vl0srvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redsum_vl0srvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redmaxu_vl0srvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redmax_vl0srvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redminu_vl0srvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redmin_vl0srvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redand_vl0srvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redor_vl0srvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redxor_vl0srvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_redsum_vl0srvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redmaxu_vl0srvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redmax_vl0srvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redminu_vl0srvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redmin_vl0srvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redand_vl0srvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redor_vl0srvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redxor_vl0srvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redsum_vl0srvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redmaxu_vl0srvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redmax_vl0srvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redminu_vl0srvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redmin_vl0srvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redand_vl0srvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redor_vl0srvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redxor_vl0srvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_redsum_vl0sv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_redmaxu_vl0sv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_redmax_vl0sv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_redminu_vl0sv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_redmin_vl0sv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_redand_vl0sv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_redor_vl0sv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_redxor_vl0sv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_redsum_vl0sv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_redmaxu_vl0sv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_redmax_vl0sv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_redminu_vl0sv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_redmin_vl0sv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_redand_vl0sv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_redor_vl0sv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_redxor_vl0sv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_redsum_vl0sv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_redmaxu_vl0sv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_redmax_vl0sv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_redminu_vl0sv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_redmin_vl0sv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_redand_vl0sv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_redor_vl0sv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_redxor_vl0sv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_redsum_vl0sv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_redmaxu_vl0sv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_redmax_vl0sv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_redminu_vl0sv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_redmin_vl0sv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_redand_vl0sv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_redor_vl0sv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_redxor_vl0sv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_redsum_vl0sv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_redmaxu_vl0sv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_redmax_vl0sv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_redminu_vl0sv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_redmin_vl0sv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_redand_vl0sv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_redor_vl0sv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_redxor_vl0sv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_redsum_vl0sv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_redmaxu_vl0sv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_redmax_vl0sv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_redminu_vl0sv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_redmin_vl0sv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_redand_vl0sv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_redor_vl0sv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_redxor_vl0sv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_redsum_vl0sv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmaxu_vl0sv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmax_vl0sv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redminu_vl0sv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmin_vl0sv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redand_vl0sv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redor_vl0sv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redxor_vl0sv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redsum_vl0sv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmaxu_vl0sv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmax_vl0sv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redminu_vl0sv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmin_vl0sv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redand_vl0sv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redor_vl0sv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redxor_vl0sv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redsum_vl0sv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmaxu_vl0sv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmax_vl0sv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redminu_vl0sv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmin_vl0sv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redand_vl0sv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redor_vl0sv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redxor_vl0sv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redsum_vl0sv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmaxu_vl0sv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmax_vl0sv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redminu_vl0sv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmin_vl0sv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redand_vl0sv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redor_vl0sv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redxor_vl0sv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redsum_vl0sv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmaxu_vl0sv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmax_vl0sv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redminu_vl0sv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmin_vl0sv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redand_vl0sv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redor_vl0sv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redxor_vl0sv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redsum_vl0sv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmaxu_vl0sv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmax_vl0sv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redminu_vl0sv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmin_vl0sv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redand_vl0sv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redor_vl0sv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redxor_vl0sv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redsum_vl0sv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmaxu_vl0sv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmax_vl0sv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redminu_vl0sv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmin_vl0sv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redand_vl0sv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redor_vl0sv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redxor_vl0sv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redsum_vl0sv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_redmaxu_vl0sv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_redmax_vl0sv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_redminu_vl0sv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_redmin_vl0sv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_redand_vl0sv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_redor_vl0sv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_redxor_vl0sv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_redsum_vl0sv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_redmaxu_vl0sv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_redmax_vl0sv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_redminu_vl0sv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_redmin_vl0sv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_redand_vl0sv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_redor_vl0sv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_redxor_vl0sv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_redsum_vl0sv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_redmaxu_vl0sv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_redmax_vl0sv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_redminu_vl0sv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_redmin_vl0sv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_redand_vl0sv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_redor_vl0sv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_redxor_vl0sv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_redsum_vl0sv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_redmaxu_vl0sv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_redmax_vl0sv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_redminu_vl0sv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_redmin_vl0sv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_redand_vl0sv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_redor_vl0sv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_redxor_vl0sv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_redsum_vl0sv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_redmaxu_vl0sv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_redmax_vl0sv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_redminu_vl0sv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_redmin_vl0sv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_redand_vl0sv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_redor_vl0sv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_redxor_vl0sv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_redsum_vl0sv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmaxu_vl0sv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmax_vl0sv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redminu_vl0sv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmin_vl0sv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redand_vl0sv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redor_vl0sv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redxor_vl0sv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redsum_vl0sv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmaxu_vl0sv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmax_vl0sv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redminu_vl0sv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmin_vl0sv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redand_vl0sv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redor_vl0sv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redxor_vl0sv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redsum_vl0sv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmaxu_vl0sv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmax_vl0sv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redminu_vl0sv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmin_vl0sv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redand_vl0sv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redor_vl0sv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redxor_vl0sv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redsum_vl0sv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmaxu_vl0sv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmax_vl0sv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redminu_vl0sv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmin_vl0sv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redand_vl0sv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redor_vl0sv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redxor_vl0sv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redsum_vl0sv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmaxu_vl0sv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmax_vl0sv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redminu_vl0sv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmin_vl0sv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redand_vl0sv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redor_vl0sv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redxor_vl0sv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redsum_vl0sv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmaxu_vl0sv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmax_vl0sv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redminu_vl0sv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmin_vl0sv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redand_vl0sv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redor_vl0sv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redxor_vl0sv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redsum_vl0sv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmaxu_vl0sv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmax_vl0sv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redminu_vl0sv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmin_vl0sv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redand_vl0sv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redor_vl0sv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redxor_vl0sv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redsum_vl0sv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_redmaxu_vl0sv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_redmax_vl0sv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_redminu_vl0sv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_redmin_vl0sv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_redand_vl0sv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_redor_vl0sv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_redxor_vl0sv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_redsum_vl0sv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_redmaxu_vl0sv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_redmax_vl0sv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_redminu_vl0sv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_redmin_vl0sv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_redand_vl0sv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_redor_vl0sv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_redxor_vl0sv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_redsum_vl0sv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_redmaxu_vl0sv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_redmax_vl0sv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_redminu_vl0sv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_redmin_vl0sv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_redand_vl0sv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_redor_vl0sv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_redxor_vl0sv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_redsum_vl0sv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_redmaxu_vl0sv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_redmax_vl0sv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_redminu_vl0sv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_redmin_vl0sv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_redand_vl0sv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_redor_vl0sv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_redxor_vl0sv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_redsum_vl0sv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmaxu_vl0sv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmax_vl0sv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redminu_vl0sv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmin_vl0sv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redand_vl0sv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redor_vl0sv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redxor_vl0sv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redsum_vl0sv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmaxu_vl0sv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmax_vl0sv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redminu_vl0sv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmin_vl0sv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redand_vl0sv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redor_vl0sv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redxor_vl0sv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redsum_vl0sv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmaxu_vl0sv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmax_vl0sv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redminu_vl0sv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmin_vl0sv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redand_vl0sv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redor_vl0sv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redxor_vl0sv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redsum_vl0sv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmaxu_vl0sv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmax_vl0sv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redminu_vl0sv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmin_vl0sv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redand_vl0sv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redor_vl0sv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redxor_vl0sv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redsum_vl0sv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmaxu_vl0sv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmax_vl0sv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redminu_vl0sv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmin_vl0sv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redand_vl0sv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redor_vl0sv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redxor_vl0sv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redsum_vl0sv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmaxu_vl0sv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmax_vl0sv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redminu_vl0sv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmin_vl0sv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redand_vl0sv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redor_vl0sv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redxor_vl0sv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redsum_vl0sv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmaxu_vl0sv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmax_vl0sv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redminu_vl0sv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmin_vl0sv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redand_vl0sv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redor_vl0sv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redxor_vl0sv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redsum_vl0sv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmaxu_vl0sv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmax_vl0sv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redminu_vl0sv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmin_vl0sv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redand_vl0sv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redor_vl0sv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redxor_vl0sv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redsum_vl0sv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmaxu_vl0sv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmax_vl0sv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redminu_vl0sv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmin_vl0sv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redand_vl0sv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redor_vl0sv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redxor_vl0sv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redsum_vl0sv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmaxu_vl0sv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmax_vl0sv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redminu_vl0sv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmin_vl0sv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redand_vl0sv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redor_vl0sv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redxor_vl0sv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redsum_vl0sv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmaxu_vl0sv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmax_vl0sv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redminu_vl0sv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmin_vl0sv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redand_vl0sv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redor_vl0sv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redxor_vl0sv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redsum_vl0sv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmaxu_vl0sv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmax_vl0sv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redminu_vl0sv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmin_vl0sv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redand_vl0sv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redor_vl0sv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redxor_vl0sv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redsum_vl0sv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmaxu_vl0sv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmax_vl0sv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redminu_vl0sv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmin_vl0sv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redand_vl0sv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redor_vl0sv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redxor_vl0sv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redsum_vl0sv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmaxu_vl0sv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmax_vl0sv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redminu_vl0sv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmin_vl0sv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redand_vl0sv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redor_vl0sv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redxor_vl0sv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redsum_vl0sv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmaxu_vl0sv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmax_vl0sv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redminu_vl0sv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmin_vl0sv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redand_vl0sv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redor_vl0sv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redxor_vl0sv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redsum_vl0sv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmaxu_vl0sv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmax_vl0sv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redminu_vl0sv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmin_vl0sv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redand_vl0sv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redor_vl0sv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redxor_vl0sv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redsum_vl0sv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmaxu_vl0sv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmax_vl0sv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redminu_vl0sv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmin_vl0sv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redand_vl0sv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redor_vl0sv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redxor_vl0sv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_wredsumrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_wredsumurvvm8qi (TARGET_VECTOR)
#define HAVE_pred_wredsumrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_wredsumurvvm4qi (TARGET_VECTOR)
#define HAVE_pred_wredsumrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_wredsumurvvm2qi (TARGET_VECTOR)
#define HAVE_pred_wredsumrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_wredsumurvvm1qi (TARGET_VECTOR)
#define HAVE_pred_wredsumrvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_wredsumurvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_wredsumrvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_wredsumurvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_wredsumrvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_wredsumurvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_wredsumrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_wredsumurvvm8hi (TARGET_VECTOR)
#define HAVE_pred_wredsumrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_wredsumurvvm4hi (TARGET_VECTOR)
#define HAVE_pred_wredsumrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_wredsumurvvm2hi (TARGET_VECTOR)
#define HAVE_pred_wredsumrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_wredsumurvvm1hi (TARGET_VECTOR)
#define HAVE_pred_wredsumrvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_wredsumurvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_wredsumrvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_wredsumurvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_wredsumrvvm8si (TARGET_VECTOR)
#define HAVE_pred_wredsumurvvm8si (TARGET_VECTOR)
#define HAVE_pred_wredsumrvvm4si (TARGET_VECTOR)
#define HAVE_pred_wredsumurvvm4si (TARGET_VECTOR)
#define HAVE_pred_wredsumrvvm2si (TARGET_VECTOR)
#define HAVE_pred_wredsumurvvm2si (TARGET_VECTOR)
#define HAVE_pred_wredsumrvvm1si (TARGET_VECTOR)
#define HAVE_pred_wredsumurvvm1si (TARGET_VECTOR)
#define HAVE_pred_wredsumrvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_wredsumurvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_wredsumv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_wredsumuv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_wredsumv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_wredsumuv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_wredsumv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_wredsumuv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_wredsumv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_wredsumuv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_wredsumv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_wredsumuv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_wredsumv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_wredsumuv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_wredsumv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_wredsumuv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_wredsumv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_wredsumuv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_wredsumv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_wredsumuv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_wredsumv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_wredsumuv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_wredsumv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_wredsumuv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_wredsumv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_wredsumuv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_wredsumv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_wredsumuv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_wredsumv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_wredsumuv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_wredsumv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_wredsumuv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_wredsumv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_wredsumuv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_wredsumv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_wredsumuv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_wredsumv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_wredsumuv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_wredsumv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_wredsumuv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_wredsumv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_wredsumuv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_wredsumv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_wredsumuv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_wredsumv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_wredsumuv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_wredsumv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_wredsumuv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_wredsumv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_wredsumuv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_wredsumv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_wredsumuv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_wredsumv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_wredsumuv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_wredsumv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_wredsumuv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_wredsumv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_wredsumuv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_wredsumv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_wredsumuv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_wredsumv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_wredsumuv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_wredsumv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_wredsumuv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_wredsumv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_wredsumuv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_wredsumv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_wredsumuv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_wredsumv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_wredsumuv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_wredsumv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_wredsumuv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_wredsumv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_wredsumuv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_wredsum_vl0srvvm8qi (TARGET_VECTOR)
#define HAVE_pred_wredsumu_vl0srvvm8qi (TARGET_VECTOR)
#define HAVE_pred_wredsum_vl0srvvm4qi (TARGET_VECTOR)
#define HAVE_pred_wredsumu_vl0srvvm4qi (TARGET_VECTOR)
#define HAVE_pred_wredsum_vl0srvvm2qi (TARGET_VECTOR)
#define HAVE_pred_wredsumu_vl0srvvm2qi (TARGET_VECTOR)
#define HAVE_pred_wredsum_vl0srvvm1qi (TARGET_VECTOR)
#define HAVE_pred_wredsumu_vl0srvvm1qi (TARGET_VECTOR)
#define HAVE_pred_wredsum_vl0srvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_wredsumu_vl0srvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_wredsum_vl0srvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_wredsumu_vl0srvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_wredsum_vl0srvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_wredsumu_vl0srvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_wredsum_vl0srvvm8hi (TARGET_VECTOR)
#define HAVE_pred_wredsumu_vl0srvvm8hi (TARGET_VECTOR)
#define HAVE_pred_wredsum_vl0srvvm4hi (TARGET_VECTOR)
#define HAVE_pred_wredsumu_vl0srvvm4hi (TARGET_VECTOR)
#define HAVE_pred_wredsum_vl0srvvm2hi (TARGET_VECTOR)
#define HAVE_pred_wredsumu_vl0srvvm2hi (TARGET_VECTOR)
#define HAVE_pred_wredsum_vl0srvvm1hi (TARGET_VECTOR)
#define HAVE_pred_wredsumu_vl0srvvm1hi (TARGET_VECTOR)
#define HAVE_pred_wredsum_vl0srvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_wredsumu_vl0srvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_wredsum_vl0srvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_wredsumu_vl0srvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_wredsum_vl0srvvm8si (TARGET_VECTOR)
#define HAVE_pred_wredsumu_vl0srvvm8si (TARGET_VECTOR)
#define HAVE_pred_wredsum_vl0srvvm4si (TARGET_VECTOR)
#define HAVE_pred_wredsumu_vl0srvvm4si (TARGET_VECTOR)
#define HAVE_pred_wredsum_vl0srvvm2si (TARGET_VECTOR)
#define HAVE_pred_wredsumu_vl0srvvm2si (TARGET_VECTOR)
#define HAVE_pred_wredsum_vl0srvvm1si (TARGET_VECTOR)
#define HAVE_pred_wredsumu_vl0srvvm1si (TARGET_VECTOR)
#define HAVE_pred_wredsum_vl0srvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_wredsumu_vl0srvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_wredsum_vl0sv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_wredsumu_vl0sv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_wredsum_vl0sv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_wredsumu_vl0sv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_wredsum_vl0sv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_wredsumu_vl0sv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_wredsum_vl0sv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_wredsumu_vl0sv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_wredsum_vl0sv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_wredsumu_vl0sv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_wredsum_vl0sv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_wredsumu_vl0sv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_wredsum_vl0sv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_wredsumu_vl0sv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_wredsum_vl0sv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_wredsumu_vl0sv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_wredsum_vl0sv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_wredsumu_vl0sv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_wredsum_vl0sv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_wredsumu_vl0sv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_wredsum_vl0sv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_wredsumu_vl0sv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_wredsum_vl0sv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_wredsumu_vl0sv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_wredsum_vl0sv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_wredsumu_vl0sv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_wredsum_vl0sv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_wredsumu_vl0sv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_wredsum_vl0sv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_wredsumu_vl0sv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_wredsum_vl0sv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_wredsumu_vl0sv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_wredsum_vl0sv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_wredsumu_vl0sv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_wredsum_vl0sv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_wredsumu_vl0sv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_wredsum_vl0sv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_wredsumu_vl0sv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_wredsum_vl0sv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_wredsumu_vl0sv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_wredsum_vl0sv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_wredsumu_vl0sv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_wredsum_vl0sv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_wredsumu_vl0sv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_wredsum_vl0sv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_wredsumu_vl0sv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_wredsum_vl0sv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_wredsumu_vl0sv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_wredsum_vl0sv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_wredsumu_vl0sv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_wredsum_vl0sv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_wredsumu_vl0sv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_wredsum_vl0sv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_wredsumu_vl0sv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_wredsum_vl0sv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_wredsumu_vl0sv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_wredsum_vl0sv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_wredsumu_vl0sv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_wredsum_vl0sv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_wredsumu_vl0sv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_wredsum_vl0sv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_wredsumu_vl0sv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_wredsum_vl0sv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_wredsumu_vl0sv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_wredsum_vl0sv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_wredsumu_vl0sv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_wredsum_vl0sv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_wredsumu_vl0sv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_wredsum_vl0sv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_wredsumu_vl0sv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_wredsum_vl0sv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_wredsumu_vl0sv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmaxrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redminrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redmaxrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redminrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redmaxrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redminrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redmaxrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redminrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redmaxrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redminrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redmaxrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redminrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmaxrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redminrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redmaxrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redminrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redmaxrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redminrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redmaxrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redminrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redmaxrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redminrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmaxrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redminrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redmaxrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redminrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redmaxrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redminrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redmaxrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redminrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redmaxv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_redminv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_redmaxv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_redminv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_redmaxv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_redminv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_redmaxv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_redminv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_redmaxv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_redminv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_redmaxv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redminv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmaxv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redminv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmaxv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redminv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmaxv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redminv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmaxv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redminv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmaxv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redminv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmaxv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redminv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmaxv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redminv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redmaxv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redminv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redmaxv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redminv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redmaxv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redminv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redmaxv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redminv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmaxv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redminv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmaxv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redminv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmaxv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redminv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmaxv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redminv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmaxv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redminv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmaxv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redminv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmaxv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redminv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redmaxv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redminv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redmaxv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redminv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redmaxv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redminv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmaxv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redminv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmaxv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redminv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmaxv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redminv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmaxv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redminv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmaxv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redminv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmaxv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redminv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmax_vl0srvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redmin_vl0srvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redmax_vl0srvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redmin_vl0srvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redmax_vl0srvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redmin_vl0srvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redmax_vl0srvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redmin_vl0srvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redmax_vl0srvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redmin_vl0srvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redmax_vl0srvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmin_vl0srvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmax_vl0srvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redmin_vl0srvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redmax_vl0srvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redmin_vl0srvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redmax_vl0srvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redmin_vl0srvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redmax_vl0srvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redmin_vl0srvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redmax_vl0srvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmin_vl0srvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redmax_vl0srvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redmin_vl0srvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redmax_vl0srvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redmin_vl0srvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redmax_vl0srvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redmin_vl0srvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redmax_vl0srvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redmin_vl0srvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redmax_vl0sv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_redmin_vl0sv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_redmax_vl0sv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_redmin_vl0sv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_redmax_vl0sv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_redmin_vl0sv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_redmax_vl0sv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_redmin_vl0sv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_redmax_vl0sv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_redmin_vl0sv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_redmax_vl0sv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmin_vl0sv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmax_vl0sv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmin_vl0sv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmax_vl0sv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmin_vl0sv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmax_vl0sv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmin_vl0sv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmax_vl0sv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmin_vl0sv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmax_vl0sv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmin_vl0sv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmax_vl0sv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmin_vl0sv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmax_vl0sv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redmin_vl0sv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redmax_vl0sv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redmin_vl0sv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redmax_vl0sv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redmin_vl0sv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redmax_vl0sv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redmin_vl0sv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redmax_vl0sv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmin_vl0sv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmax_vl0sv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmin_vl0sv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmax_vl0sv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmin_vl0sv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmax_vl0sv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmin_vl0sv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmax_vl0sv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmin_vl0sv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmax_vl0sv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmin_vl0sv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmax_vl0sv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmin_vl0sv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmax_vl0sv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redmin_vl0sv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redmax_vl0sv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redmin_vl0sv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redmax_vl0sv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redmin_vl0sv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redmax_vl0sv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmin_vl0sv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redmax_vl0sv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmin_vl0sv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redmax_vl0sv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmin_vl0sv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redmax_vl0sv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmin_vl0sv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redmax_vl0sv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmin_vl0sv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redmax_vl0sv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmin_vl0sv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redmax_vl0sv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redmin_vl0sv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redosumrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redusumrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redosumrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redusumrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redosumrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redusumrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redosumrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redusumrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redosumrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redusumrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redosumrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redusumrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redosumrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redusumrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redosumrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redusumrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redosumrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redusumrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redosumrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redusumrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redosumrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redusumrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redosumrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redusumrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redosumrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redusumrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redosumrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redusumrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redosumrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redusumrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redosumv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_redusumv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_redosumv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_redusumv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_redosumv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_redusumv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_redosumv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_redusumv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_redosumv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_redusumv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_redosumv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redusumv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redosumv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redusumv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redosumv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redusumv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redosumv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redusumv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redosumv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redusumv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redosumv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redusumv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redosumv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redusumv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redosumv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redusumv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redosumv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redusumv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redosumv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redusumv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redosumv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redusumv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redosumv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redusumv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redosumv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redusumv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redosumv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redusumv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redosumv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redusumv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redosumv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redusumv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redosumv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redusumv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redosumv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redusumv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redosumv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redusumv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redosumv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redusumv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redosumv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redusumv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redosumv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redusumv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redosumv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redusumv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redosumv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redusumv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redosumv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redusumv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redosumv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redusumv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redosumv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redusumv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redosumv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redusumv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redosum_vl0srvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redusum_vl0srvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redosum_vl0srvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redusum_vl0srvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redosum_vl0srvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redusum_vl0srvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redosum_vl0srvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redusum_vl0srvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redosum_vl0srvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redusum_vl0srvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_redosum_vl0srvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redusum_vl0srvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redosum_vl0srvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redusum_vl0srvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redosum_vl0srvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redusum_vl0srvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redosum_vl0srvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redusum_vl0srvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redosum_vl0srvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redusum_vl0srvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redosum_vl0srvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redusum_vl0srvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_redosum_vl0srvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redusum_vl0srvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redosum_vl0srvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redusum_vl0srvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redosum_vl0srvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redusum_vl0srvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redosum_vl0srvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redusum_vl0srvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redosum_vl0sv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_redusum_vl0sv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_redosum_vl0sv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_redusum_vl0sv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_redosum_vl0sv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_redusum_vl0sv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_redosum_vl0sv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_redusum_vl0sv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_redosum_vl0sv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_redusum_vl0sv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_redosum_vl0sv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redusum_vl0sv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redosum_vl0sv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redusum_vl0sv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redosum_vl0sv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redusum_vl0sv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redosum_vl0sv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redusum_vl0sv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redosum_vl0sv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redusum_vl0sv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redosum_vl0sv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redusum_vl0sv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redosum_vl0sv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redusum_vl0sv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redosum_vl0sv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redusum_vl0sv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redosum_vl0sv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redusum_vl0sv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redosum_vl0sv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redusum_vl0sv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redosum_vl0sv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redusum_vl0sv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_redosum_vl0sv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redusum_vl0sv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redosum_vl0sv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redusum_vl0sv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redosum_vl0sv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redusum_vl0sv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redosum_vl0sv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redusum_vl0sv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redosum_vl0sv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redusum_vl0sv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redosum_vl0sv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redusum_vl0sv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redosum_vl0sv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redusum_vl0sv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redosum_vl0sv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redusum_vl0sv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redosum_vl0sv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redusum_vl0sv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redosum_vl0sv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redusum_vl0sv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_redosum_vl0sv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redusum_vl0sv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_redosum_vl0sv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redusum_vl0sv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_redosum_vl0sv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redusum_vl0sv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_redosum_vl0sv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redusum_vl0sv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_redosum_vl0sv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redusum_vl0sv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_redosum_vl0sv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redusum_vl0sv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_redosum_vl0sv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_redusum_vl0sv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_wredosumrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_wredusumrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_wredosumrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_wredusumrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_wredosumrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_wredusumrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_wredosumrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_wredusumrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_wredosumrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_wredusumrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_wredosumrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_wredusumrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_wredosumrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredusumrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredosumrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredusumrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredosumrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredusumrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredosumrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredusumrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredosumrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_wredusumrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_wredosumv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_wredusumv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_wredosumv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_wredusumv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_wredosumv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_wredusumv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_wredosumv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_wredusumv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_wredosumv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_wredusumv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_wredosumv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_wredusumv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_wredosumv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_wredusumv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_wredosumv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_wredusumv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_wredosumv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_wredusumv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_wredosumv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_wredusumv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_wredosumv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_wredusumv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_wredosumv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_wredusumv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_wredosumv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredusumv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredosumv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredusumv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredosumv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredusumv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredosumv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredusumv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredosumv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_wredusumv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_wredosumv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_wredusumv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_wredosumv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_wredusumv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_wredosumv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_wredusumv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_wredosumv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_wredusumv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_wredosumv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_wredusumv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_wredosumv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_wredusumv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_wredosum_vl0srvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_wredusum_vl0srvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_wredosum_vl0srvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_wredusum_vl0srvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_wredosum_vl0srvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_wredusum_vl0srvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_wredosum_vl0srvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_wredusum_vl0srvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_wredosum_vl0srvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_wredusum_vl0srvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_wredosum_vl0srvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_wredusum_vl0srvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_wredosum_vl0srvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredusum_vl0srvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredosum_vl0srvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredusum_vl0srvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredosum_vl0srvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredusum_vl0srvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredosum_vl0srvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredusum_vl0srvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredosum_vl0srvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_wredusum_vl0srvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_wredosum_vl0sv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_wredusum_vl0sv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_wredosum_vl0sv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_wredusum_vl0sv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_wredosum_vl0sv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_wredusum_vl0sv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_wredosum_vl0sv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_wredusum_vl0sv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_wredosum_vl0sv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_wredusum_vl0sv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_wredosum_vl0sv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_wredusum_vl0sv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_wredosum_vl0sv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_wredusum_vl0sv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_wredosum_vl0sv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_wredusum_vl0sv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_wredosum_vl0sv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_wredusum_vl0sv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_wredosum_vl0sv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_wredusum_vl0sv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_wredosum_vl0sv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_wredusum_vl0sv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_wredosum_vl0sv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_wredusum_vl0sv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_wredosum_vl0sv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredusum_vl0sv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredosum_vl0sv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredusum_vl0sv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredosum_vl0sv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredusum_vl0sv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredosum_vl0sv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredusum_vl0sv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_wredosum_vl0sv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_wredusum_vl0sv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_wredosum_vl0sv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_wredusum_vl0sv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_wredosum_vl0sv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_wredusum_vl0sv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_wredosum_vl0sv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_wredusum_vl0sv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_wredosum_vl0sv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_wredusum_vl0sv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_wredosum_vl0sv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_wredusum_vl0sv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_wredosum_vl0sv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_wredusum_vl0sv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_extract_first_truncrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extract_first_truncrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extract_first_truncrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extract_first_truncrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extract_first_truncv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extract_first_truncv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extract_first_truncv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extract_first_truncv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_extract_first_truncv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_extract_first_truncv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_extract_first_truncv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_extract_first_truncv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_extract_first_truncv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_extract_first_truncv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slideuprvvm8qi (TARGET_VECTOR)
#define HAVE_pred_slidedownrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_slideuprvvm4qi (TARGET_VECTOR)
#define HAVE_pred_slidedownrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_slideuprvvm2qi (TARGET_VECTOR)
#define HAVE_pred_slidedownrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_slideuprvvm1qi (TARGET_VECTOR)
#define HAVE_pred_slidedownrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_slideuprvvm8hi (TARGET_VECTOR)
#define HAVE_pred_slidedownrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_slideuprvvm4hi (TARGET_VECTOR)
#define HAVE_pred_slidedownrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_slideuprvvm2hi (TARGET_VECTOR)
#define HAVE_pred_slidedownrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_slideuprvvm1hi (TARGET_VECTOR)
#define HAVE_pred_slidedownrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_slideuprvvm8si (TARGET_VECTOR)
#define HAVE_pred_slidedownrvvm8si (TARGET_VECTOR)
#define HAVE_pred_slideuprvvm4si (TARGET_VECTOR)
#define HAVE_pred_slidedownrvvm4si (TARGET_VECTOR)
#define HAVE_pred_slideuprvvm2si (TARGET_VECTOR)
#define HAVE_pred_slidedownrvvm2si (TARGET_VECTOR)
#define HAVE_pred_slideuprvvm1si (TARGET_VECTOR)
#define HAVE_pred_slidedownrvvm1si (TARGET_VECTOR)
#define HAVE_pred_slideuprvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slidedownrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slideuprvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slidedownrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slideuprvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slidedownrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slideuprvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slidedownrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slideuprvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_slidedownrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_slideuprvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_slidedownrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_slideuprvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_slidedownrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_slideuprvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_slidedownrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_slideuprvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_slidedownrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_slideuprvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_slidedownrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_slideuprvvm8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_slidedownrvvm8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_slideuprvvm4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_slidedownrvvm4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_slideuprvvm2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_slidedownrvvm2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_slideuprvvm1hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_slidedownrvvm1hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_slideuprvvmf2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_slidedownrvvmf2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_slideuprvvmf4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slidedownrvvmf4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slideuprvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slidedownrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slideuprvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slidedownrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slideuprvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slidedownrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slideuprvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slidedownrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slideuprvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slidedownrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slideuprvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slidedownrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slideuprvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slidedownrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slideuprvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slidedownrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slideuprvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slidedownrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slideuprvvm8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_slidedownrvvm8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_slideuprvvm4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_slidedownrvvm4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_slideuprvvm2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_slidedownrvvm2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_slideuprvvm1bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_slidedownrvvm1bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_slideuprvvmf2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_slidedownrvvmf2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_slideuprvvmf4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slidedownrvvmf4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slideupv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_slidedownv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_slideupv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_slidedownv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_slideupv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_slidedownv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_slideupv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_slidedownv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_slideupv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_slidedownv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_slideupv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_slidedownv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_slideupv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slidedownv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slideupv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slidedownv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slideupv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slidedownv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slideupv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slidedownv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slideupv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slidedownv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slideupv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slidedownv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slideupv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slidedownv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slideupv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_slidedownv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_slideupv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_slidedownv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_slideupv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_slidedownv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_slideupv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_slidedownv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_slideupv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_slidedownv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_slideupv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slidedownv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slideupv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slidedownv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slideupv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slidedownv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slideupv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slidedownv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slideupv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slidedownv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slideupv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slidedownv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slideupv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slidedownv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slideupv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_slidedownv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_slideupv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_slidedownv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_slideupv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_slidedownv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_slideupv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_slidedownv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_slideupv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slidedownv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slideupv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slidedownv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slideupv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slidedownv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slideupv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slidedownv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slideupv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slidedownv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slideupv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slidedownv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slideupv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slidedownv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slideupv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slidedownv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slideupv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slidedownv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slideupv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slidedownv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slideupv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slidedownv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slideupv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slidedownv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slideupv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slidedownv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slideupv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slidedownv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slideupv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slidedownv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slideupv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slidedownv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slideupv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slidedownv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slideupv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_slidedownv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_slideupv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_slidedownv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_slideupv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_slidedownv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_slideupv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_slidedownv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_slideupv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_slidedownv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_slideupv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slidedownv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slideupv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slidedownv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slideupv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slidedownv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slideupv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slidedownv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slideupv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slidedownv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slideupv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slidedownv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slideupv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slidedownv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slideupv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slidedownv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slideupv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slidedownv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slideupv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slidedownv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slideupv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slidedownv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slideupv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slidedownv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slideupv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slidedownv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slideupv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slidedownv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slideupv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slidedownv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slideupv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slidedownv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slideupv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slidedownv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slideupv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slidedownv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slideupv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slidedownv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slideupv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slidedownv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slideupv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slidedownv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slideupv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slidedownv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slideupv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slidedownv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slideupv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slidedownv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slideupv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slidedownv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slideupv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slidedownv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slideupv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slidedownv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slideupv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slidedownv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slideupv1bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_slidedownv1bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_slideupv2bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_slidedownv2bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_slideupv4bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_slidedownv4bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_slideupv8bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_slidedownv8bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_slideupv16bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_slidedownv16bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_slideupv32bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slidedownv32bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slideupv64bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slidedownv64bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slideupv128bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slidedownv128bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slideupv256bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slidedownv256bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slideupv512bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slidedownv512bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slideupv1024bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slidedownv1024bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slideupv2048bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slidedownv2048bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slide1uprvvm8qi (TARGET_VECTOR)
#define HAVE_pred_slide1downrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_slide1uprvvm4qi (TARGET_VECTOR)
#define HAVE_pred_slide1downrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_slide1uprvvm2qi (TARGET_VECTOR)
#define HAVE_pred_slide1downrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_slide1uprvvm1qi (TARGET_VECTOR)
#define HAVE_pred_slide1downrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_slide1uprvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_slide1downrvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_slide1uprvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_slide1downrvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_slide1uprvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slide1downrvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slide1uprvvm8hi (TARGET_VECTOR)
#define HAVE_pred_slide1downrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_slide1uprvvm4hi (TARGET_VECTOR)
#define HAVE_pred_slide1downrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_slide1uprvvm2hi (TARGET_VECTOR)
#define HAVE_pred_slide1downrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_slide1uprvvm1hi (TARGET_VECTOR)
#define HAVE_pred_slide1downrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_slide1uprvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_slide1downrvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_slide1uprvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slide1downrvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slide1uprvvm8si (TARGET_VECTOR)
#define HAVE_pred_slide1downrvvm8si (TARGET_VECTOR)
#define HAVE_pred_slide1uprvvm4si (TARGET_VECTOR)
#define HAVE_pred_slide1downrvvm4si (TARGET_VECTOR)
#define HAVE_pred_slide1uprvvm2si (TARGET_VECTOR)
#define HAVE_pred_slide1downrvvm2si (TARGET_VECTOR)
#define HAVE_pred_slide1uprvvm1si (TARGET_VECTOR)
#define HAVE_pred_slide1downrvvm1si (TARGET_VECTOR)
#define HAVE_pred_slide1uprvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slide1downrvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slide1upv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_slide1downv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_slide1upv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_slide1downv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_slide1upv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_slide1downv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_slide1upv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_slide1downv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_slide1upv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_slide1downv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_slide1upv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_slide1downv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_slide1upv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slide1downv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slide1upv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slide1downv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slide1upv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slide1downv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slide1upv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slide1downv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slide1upv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slide1downv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slide1upv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slide1downv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slide1upv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slide1downv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slide1upv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_slide1downv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_slide1upv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_slide1downv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_slide1upv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_slide1downv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_slide1upv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_slide1downv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_slide1upv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_slide1downv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_slide1upv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slide1downv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slide1upv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slide1downv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slide1upv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slide1downv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slide1upv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slide1downv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slide1upv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slide1downv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slide1upv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slide1downv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slide1upv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slide1downv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slide1upv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_slide1downv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_slide1upv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_slide1downv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_slide1upv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_slide1downv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_slide1upv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_slide1downv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_slide1upv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slide1downv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slide1upv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slide1downv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slide1upv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slide1downv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slide1upv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slide1downv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slide1upv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slide1downv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slide1upv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slide1downv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slide1upv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slide1downv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slide1uprvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_slide1downrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_slide1uprvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_slide1downrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_slide1uprvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_slide1downrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_slide1uprvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_slide1downrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_slide1uprvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_slide1downrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_slide1uprvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slide1downrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slide1uprvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slide1downrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slide1uprvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slide1downrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slide1uprvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slide1downrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slide1uprvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slide1downrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slide1uprvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slide1downrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slide1uprvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slide1downrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slide1uprvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slide1downrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slide1uprvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slide1downrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slide1uprvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slide1downrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slide1upv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_slide1downv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_slide1upv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_slide1downv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_slide1upv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_slide1downv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_slide1upv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_slide1downv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_slide1upv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_slide1downv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_slide1upv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slide1downv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slide1upv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slide1downv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slide1upv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slide1downv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slide1upv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slide1downv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slide1upv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slide1downv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slide1upv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slide1downv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slide1upv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slide1downv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slide1upv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slide1downv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slide1upv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slide1downv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slide1upv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slide1downv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slide1upv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slide1downv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_slide1upv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slide1downv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slide1upv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slide1downv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slide1upv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slide1downv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slide1upv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slide1downv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slide1upv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slide1downv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slide1upv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slide1downv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slide1upv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slide1downv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slide1upv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slide1downv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slide1upv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slide1downv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slide1upv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slide1downv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_slide1upv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slide1downv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slide1upv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slide1downv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slide1upv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slide1downv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slide1upv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slide1downv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slide1upv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slide1downv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slide1upv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slide1downv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slide1upv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slide1downv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gatherrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_gatherrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_gatherrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_gatherrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_gatherrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_gatherrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_gatherrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_gatherrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_gatherrvvm8si (TARGET_VECTOR)
#define HAVE_pred_gatherrvvm4si (TARGET_VECTOR)
#define HAVE_pred_gatherrvvm2si (TARGET_VECTOR)
#define HAVE_pred_gatherrvvm1si (TARGET_VECTOR)
#define HAVE_pred_gatherrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_gatherrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_gatherrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_gatherrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_gatherrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_gatherrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_gatherrvvm8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherrvvm4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherrvvm2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherrvvm1hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherrvvmf2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherrvvmf4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_gatherrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_gatherrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_gatherrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_gatherrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_gatherrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_gatherrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_gatherrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_gatherrvvm8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_gatherrvvm4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_gatherrvvm2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_gatherrvvm1bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_gatherrvvmf2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_gatherrvvmf4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_gatherv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_gatherv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_gatherv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_gatherv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_gatherv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_gatherv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gatherv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gatherv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gatherv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gatherv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gatherv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gatherv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gatherv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_gatherv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_gatherv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_gatherv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_gatherv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_gatherv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gatherv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gatherv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gatherv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gatherv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gatherv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gatherv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gatherv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_gatherv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_gatherv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_gatherv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_gatherv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gatherv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gatherv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gatherv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gatherv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gatherv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gatherv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gatherv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gatherv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gatherv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gatherv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gatherv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gatherv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gatherv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gatherv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gatherv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gatherv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gatherv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gatherv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gatherv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gatherv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gatherv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_gatherv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_gatherv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_gatherv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_gatherv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gatherv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gatherv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gatherv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gatherv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gatherv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gatherv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gatherv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_gatherv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_gatherv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_gatherv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gatherv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gatherv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gatherv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gatherv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gatherv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gatherv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gatherv1bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_gatherv2bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_gatherv4bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_gatherv8bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_gatherv16bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_gatherv32bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gatherv64bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gatherv128bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gatherv256bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gatherv512bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gatherv1024bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gatherv2048bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gatherrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_gatherrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_gatherrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_gatherrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_gatherrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_gatherrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_gatherrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_gatherrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_gatherrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_gatherrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_gatherrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_gatherrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_gatherrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherrvvmf2qi_scalar ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_gatherrvvmf4qi_scalar ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_gatherrvvmf8qi_scalar ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_gatherrvvmf2hi_scalar ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_gatherrvvmf4hi_scalar ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_gatherrvvmf2si_scalar ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_gatherrvvm8hf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherrvvm4hf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherrvvm2hf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherrvvm1hf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherrvvmf2hf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherrvvmf4hf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_gatherrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_gatherrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_gatherrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_gatherrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_gatherrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_gatherrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_gatherrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_gatherrvvm8bf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_gatherrvvm4bf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_gatherrvvm2bf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_gatherrvvm1bf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_gatherrvvmf2bf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_gatherrvvmf4bf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_gatherv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_gatherv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_gatherv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_gatherv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_gatherv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_gatherv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gatherv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gatherv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gatherv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gatherv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gatherv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gatherv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gatherv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_gatherv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_gatherv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_gatherv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_gatherv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_gatherv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gatherv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gatherv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gatherv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gatherv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gatherv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gatherv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gatherv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_gatherv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_gatherv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_gatherv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_gatherv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gatherv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gatherv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gatherv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gatherv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gatherv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gatherv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gatherv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gatherv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gatherv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gatherv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gatherv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gatherv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gatherv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gatherv1hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherv2hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherv4hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherv8hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherv16hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherv32hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gatherv64hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gatherv128hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gatherv256hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gatherv512hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gatherv1024hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gatherv2048hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gatherv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_gatherv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_gatherv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_gatherv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_gatherv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gatherv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gatherv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gatherv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gatherv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gatherv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gatherv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gatherv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_gatherv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_gatherv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_gatherv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gatherv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gatherv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gatherv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gatherv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gatherv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gatherv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gatherv1bf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_gatherv2bf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_gatherv4bf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_gatherv8bf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_gatherv16bf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_gatherv32bf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gatherv64bf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gatherv128bf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gatherv256bf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gatherv512bf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gatherv1024bf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gatherv2048bf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gatherei16rvvm4qi (TARGET_VECTOR)
#define HAVE_pred_gatherei16rvvm2qi (TARGET_VECTOR)
#define HAVE_pred_gatherei16rvvm1qi (TARGET_VECTOR)
#define HAVE_pred_gatherei16rvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_gatherei16rvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_gatherei16rvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherei16rvvm8hi (TARGET_VECTOR)
#define HAVE_pred_gatherei16rvvm4hi (TARGET_VECTOR)
#define HAVE_pred_gatherei16rvvm2hi (TARGET_VECTOR)
#define HAVE_pred_gatherei16rvvm1hi (TARGET_VECTOR)
#define HAVE_pred_gatherei16rvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_gatherei16rvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherei16rvvm8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherei16rvvm4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherei16rvvm2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherei16rvvm1hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherei16rvvmf2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherei16rvvmf4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherei16rvvm8si (TARGET_VECTOR)
#define HAVE_pred_gatherei16rvvm4si (TARGET_VECTOR)
#define HAVE_pred_gatherei16rvvm2si (TARGET_VECTOR)
#define HAVE_pred_gatherei16rvvm1si (TARGET_VECTOR)
#define HAVE_pred_gatherei16rvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherei16rvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_gatherei16rvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_gatherei16rvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_gatherei16rvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_gatherei16rvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherei16rvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherei16rvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherei16rvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherei16rvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherei16rvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_gatherei16rvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_gatherei16rvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_gatherei16rvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_gatherei16v1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_gatherei16v2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_gatherei16v4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_gatherei16v8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_gatherei16v16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_gatherei16v32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gatherei16v64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gatherei16v128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gatherei16v256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gatherei16v512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gatherei16v1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gatherei16v2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gatherei16v1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_gatherei16v2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_gatherei16v4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_gatherei16v8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_gatherei16v16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_gatherei16v32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gatherei16v64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gatherei16v128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gatherei16v256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gatherei16v512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gatherei16v1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gatherei16v2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gatherei16v1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_gatherei16v2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_gatherei16v4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_gatherei16v8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_gatherei16v16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gatherei16v32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gatherei16v64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gatherei16v128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gatherei16v256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gatherei16v512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gatherei16v1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gatherei16v1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherei16v2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherei16v4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gatherei16v8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gatherei16v16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gatherei16v32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gatherei16v64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gatherei16v128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gatherei16v256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gatherei16v512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gatherei16v1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherei16v2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherei16v4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherei16v8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherei16v16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_gatherei16v32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gatherei16v64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gatherei16v128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gatherei16v256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gatherei16v512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gatherei16v1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gatherei16v2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gatherei16v1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_gatherei16v2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_gatherei16v4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_gatherei16v8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_gatherei16v16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gatherei16v32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gatherei16v64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gatherei16v128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gatherei16v256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gatherei16v512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gatherei16v1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gatherei16v1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_gatherei16v2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_gatherei16v4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_gatherei16v8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gatherei16v16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gatherei16v32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gatherei16v64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gatherei16v128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gatherei16v256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gatherei16v512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_compressrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_compressrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_compressrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_compressrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_compressrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_compressrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_compressrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_compressrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_compressrvvm8si (TARGET_VECTOR)
#define HAVE_pred_compressrvvm4si (TARGET_VECTOR)
#define HAVE_pred_compressrvvm2si (TARGET_VECTOR)
#define HAVE_pred_compressrvvm1si (TARGET_VECTOR)
#define HAVE_pred_compressrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_compressrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_compressrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_compressrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_compressrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_compressrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_compressrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_compressrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_compressrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_compressrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_compressrvvm8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_compressrvvm4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_compressrvvm2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_compressrvvm1hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_compressrvvmf2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_compressrvvmf4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_compressrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_compressrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_compressrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_compressrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_compressrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_compressrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_compressrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_compressrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_compressrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_compressrvvm8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_compressrvvm4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_compressrvvm2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_compressrvvm1bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_compressrvvmf2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_compressrvvmf4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_compressv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_compressv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_compressv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_compressv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_compressv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_compressv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_compressv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_compressv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_compressv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_compressv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_compressv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_compressv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_compressv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_compressv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_compressv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_compressv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_compressv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_compressv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_compressv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_compressv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_compressv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_compressv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_compressv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_compressv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_compressv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_compressv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_compressv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_compressv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_compressv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_compressv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_compressv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_compressv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_compressv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_compressv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_compressv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_compressv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_compressv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_compressv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_compressv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_compressv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_compressv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_compressv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_compressv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_compressv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_compressv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_compressv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_compressv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_compressv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_compressv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_compressv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_compressv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_compressv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_compressv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_compressv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_compressv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_compressv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_compressv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_compressv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_compressv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_compressv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_compressv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_compressv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_compressv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_compressv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_compressv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_compressv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_compressv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_compressv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_compressv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_compressv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_compressv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_compressv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_compressv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_compressv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_compressv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_compressv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_compressv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_compressv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_compressv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_compressv1bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_compressv2bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_compressv4bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_compressv8bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_compressv16bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_compressv32bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_compressv64bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_compressv128bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_compressv256bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_compressv512bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_compressv1024bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_compressv2048bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_read_vlsi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_read_vldi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_loadrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm8si (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm4si (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm2si (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm1si (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_fault_loadrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_fault_loadrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_fault_loadrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_fault_loadrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_fault_loadrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_fault_loadrvvm8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvm4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvm2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvm1hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvmf2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvmf4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fault_loadrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fault_loadrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fault_loadrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fault_loadrvvm8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvm4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvm2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvm1bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvmf2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvmf4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_fault_loadv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_fault_loadv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_fault_loadv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_fault_loadv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_fault_loadv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_fault_loadv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fault_loadv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fault_loadv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fault_loadv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fault_loadv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fault_loadv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fault_loadv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fault_loadv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_fault_loadv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_fault_loadv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_fault_loadv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_fault_loadv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_fault_loadv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fault_loadv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fault_loadv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fault_loadv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fault_loadv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fault_loadv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fault_loadv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fault_loadv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_fault_loadv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_fault_loadv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_fault_loadv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_fault_loadv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fault_loadv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fault_loadv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fault_loadv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fault_loadv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fault_loadv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fault_loadv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fault_loadv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fault_loadv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fault_loadv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fault_loadv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fault_loadv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fault_loadv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fault_loadv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fault_loadv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fault_loadv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fault_loadv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fault_loadv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fault_loadv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fault_loadv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fault_loadv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fault_loadv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fault_loadv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fault_loadv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fault_loadv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fault_loadv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fault_loadv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fault_loadv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fault_loadv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fault_loadv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fault_loadv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fault_loadv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fault_loadv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fault_loadv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fault_loadv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fault_loadv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fault_loadv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fault_loadv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fault_loadv1bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadv2bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadv4bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadv8bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadv16bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadv32bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_fault_loadv64bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_fault_loadv128bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_fault_loadv256bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_fault_loadv512bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_fault_loadv1024bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_fault_loadv2048bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_fault_load_set_vlrvvm8qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm8qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm4qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm4qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm2qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm2qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm1qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm1qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm8hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm8hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm4hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm4hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm2hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm2hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm1hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm1hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm8sisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm8sidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm4sisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm4sidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm2sisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm2sidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm1sisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm1sidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm8disi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm8didi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm4disi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm4didi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm2disi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm2didi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1disi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1didi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2qisi ((TARGET_VECTOR) && (((!TARGET_XTHEADVECTOR) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2qidi ((TARGET_VECTOR) && (((!TARGET_XTHEADVECTOR) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4qisi ((TARGET_VECTOR) && (((!TARGET_XTHEADVECTOR) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4qidi ((TARGET_VECTOR) && (((!TARGET_XTHEADVECTOR) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf8qisi ((TARGET_VECTOR) && ((((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf8qidi ((TARGET_VECTOR) && ((((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2hisi ((TARGET_VECTOR) && (((!TARGET_XTHEADVECTOR) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2hidi ((TARGET_VECTOR) && (((!TARGET_XTHEADVECTOR) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4hisi ((TARGET_VECTOR) && ((((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4hidi ((TARGET_VECTOR) && ((((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2sisi ((TARGET_VECTOR) && ((((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2sidi ((TARGET_VECTOR) && ((((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm8hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm8hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm4hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm4hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm2hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm2hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm8sfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm8sfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm4sfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm4sfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm2sfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm2sfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1sfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1sfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2sfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2sfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm8dfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm8dfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm4dfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm4dfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm2dfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm2dfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1dfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1dfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm8bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm8bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm4bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm4bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm2bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm2bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv1qisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1QImode)) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv1qidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1QImode)) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv2qisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V2QImode)) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv2qidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V2QImode)) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv4qisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V4QImode)) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv4qidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V4QImode)) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv8qisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V8QImode)) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv8qidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V8QImode)) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv16qisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V16QImode)) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv16qidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V16QImode)) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv32qisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V32QImode)) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv32qidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V32QImode)) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv64qisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv64qidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv128qisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv128qidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv256qisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv256qidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv512qisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv512qidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv1024qisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv1024qidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv2048qisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv2048qidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv4096qisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv4096qidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv1hisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1HImode)) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv1hidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1HImode)) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv2hisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V2HImode)) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv2hidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V2HImode)) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv4hisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V4HImode)) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv4hidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V4HImode)) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv8hisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V8HImode)) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv8hidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V8HImode)) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv16hisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V16HImode)) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv16hidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V16HImode)) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv32hisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv32hidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv64hisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv64hidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv128hisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv128hidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv256hisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv256hidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv512hisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv512hidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv1024hisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv1024hidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv2048hisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv2048hidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv1sisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1SImode)) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv1sidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1SImode)) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv2sisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V2SImode)) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv2sidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V2SImode)) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv4sisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V4SImode)) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv4sidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V4SImode)) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv8sisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V8SImode)) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv8sidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V8SImode)) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv16sisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv16sidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv32sisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv32sidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv64sisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv64sidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv128sisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv128sidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv256sisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv256sidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv512sisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv512sidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv1024sisi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv1024sidi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv1disi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv1didi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv2disi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv2didi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv4disi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv4didi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv8disi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv8didi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv16disi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv16didi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv32disi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv32didi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv64disi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv64didi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv128disi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv128didi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv256disi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv256didi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv512disi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv512didi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv1hfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv1hfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv2hfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv2hfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv4hfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv4hfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv8hfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv8hfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv16hfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv16hfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv32hfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv32hfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv64hfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv64hfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv128hfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv128hfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv256hfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv256hfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv512hfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv512hfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv1024hfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv1024hfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv2048hfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv2048hfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv1sfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv1sfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv2sfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv2sfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv4sfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv4sfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv8sfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv8sfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv16sfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv16sfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv32sfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv32sfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv64sfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv64sfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv128sfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv128sfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv256sfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv256sfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv512sfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv512sfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv1024sfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv1024sfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv1dfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv1dfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv2dfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv2dfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv4dfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv4dfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv8dfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv8dfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv16dfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv16dfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv32dfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv32dfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv64dfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv64dfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv128dfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv128dfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv256dfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv256dfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv512dfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv512dfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv1bfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv1bfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv2bfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv2bfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv4bfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv4bfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv8bfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv8bfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv16bfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv16bfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv32bfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv32bfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv64bfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv64bfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv128bfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv128bfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv256bfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv256bfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv512bfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv512bfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv1024bfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv1024bfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlv2048bfsi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlv2048bfdi ((TARGET_VECTOR) && (((riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_unit_strided_loadrvvmf8x2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvmf8x3qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvmf8x4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvmf8x5qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvmf8x6qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvmf8x7qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvmf8x8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvmf4x2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvmf4x3hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvmf4x4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvmf4x5hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvmf4x6hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvmf4x7hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvmf4x8hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvmf2x2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvmf2x3si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvmf2x4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvmf2x5si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvmf2x6si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvmf2x7si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvmf2x8si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvm1x2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvm1x3di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvm1x4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvm1x5di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvm1x6di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvm1x7di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvm1x8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvmf4x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvmf4x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvmf4x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvmf4x5bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvmf4x6bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvmf4x7bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvmf4x8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvmf4x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvmf4x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvmf4x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvmf4x5hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvmf4x6hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvmf4x7hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvmf4x8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvmf2x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_loadrvvmf2x3sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_loadrvvmf2x4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_loadrvvmf2x5sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_loadrvvmf2x6sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_loadrvvmf2x7sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_loadrvvmf2x8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_loadrvvm1x2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_unit_strided_loadrvvm1x3df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_unit_strided_loadrvvm1x4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_unit_strided_loadrvvm1x5df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_unit_strided_loadrvvm1x6df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_unit_strided_loadrvvm1x7df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_unit_strided_loadrvvm1x8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_unit_strided_loadrvvmf4x2qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvmf4x3qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvmf4x4qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvmf4x5qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvmf4x6qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvmf4x7qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvmf4x8qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvmf2x2hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvmf2x3hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvmf2x4hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvmf2x5hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvmf2x6hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvmf2x7hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvmf2x8hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm1x2si (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm1x3si (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm1x4si (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm1x5si (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm1x6si (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm1x7si (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm1x8si (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm2x2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvm2x3di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvm2x4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvmf2x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvmf2x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvmf2x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvmf2x5bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvmf2x6bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvmf2x7bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvmf2x8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvmf2x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvmf2x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvmf2x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvmf2x5hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvmf2x6hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvmf2x7hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvmf2x8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvm1x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_loadrvvm1x3sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_loadrvvm1x4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_loadrvvm1x5sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_loadrvvm1x6sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_loadrvvm1x7sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_loadrvvm1x8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_loadrvvm2x2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_unit_strided_loadrvvm2x3df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_unit_strided_loadrvvm2x4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_unit_strided_loadrvvmf2x2qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvmf2x3qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvmf2x4qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvmf2x5qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvmf2x6qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvmf2x7qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvmf2x8qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm1x2hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm1x3hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm1x4hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm1x5hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm1x6hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm1x7hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm1x8hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm2x2si (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm2x3si (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm2x4si (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm4x2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_loadrvvm1x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvm1x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvm1x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvm1x5bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvm1x6bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvm1x7bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvm1x8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvm1x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvm1x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvm1x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvm1x5hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvm1x6hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvm1x7hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvm1x8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvm2x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_loadrvvm2x3sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_loadrvvm2x4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_loadrvvm4x2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_unit_strided_loadrvvm1x2qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm1x3qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm1x4qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm1x5qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm1x6qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm1x7qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm1x8qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm2x2hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm2x3hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm2x4hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm4x2si (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm2x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvm2x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvm2x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvm2x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvm2x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvm2x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvm4x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_loadrvvm2x2qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm2x3qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm2x4qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm4x2hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_loadrvvm4x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_loadrvvm4x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_loadrvvm4x2qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvmf8x2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvmf8x3qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvmf8x4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvmf8x5qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvmf8x6qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvmf8x7qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvmf8x8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvmf4x2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvmf4x3hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvmf4x4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvmf4x5hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvmf4x6hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvmf4x7hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvmf4x8hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvmf2x2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvmf2x3si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvmf2x4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvmf2x5si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvmf2x6si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvmf2x7si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvmf2x8si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvm1x2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvm1x3di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvm1x4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvm1x5di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvm1x6di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvm1x7di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvm1x8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvmf4x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvmf4x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvmf4x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvmf4x5bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvmf4x6bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvmf4x7bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvmf4x8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvmf4x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvmf4x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvmf4x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvmf4x5hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvmf4x6hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvmf4x7hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvmf4x8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvmf2x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_storervvmf2x3sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_storervvmf2x4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_storervvmf2x5sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_storervvmf2x6sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_storervvmf2x7sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_storervvmf2x8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_storervvm1x2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_unit_strided_storervvm1x3df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_unit_strided_storervvm1x4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_unit_strided_storervvm1x5df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_unit_strided_storervvm1x6df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_unit_strided_storervvm1x7df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_unit_strided_storervvm1x8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_unit_strided_storervvmf4x2qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvmf4x3qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvmf4x4qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvmf4x5qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvmf4x6qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvmf4x7qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvmf4x8qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvmf2x2hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvmf2x3hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvmf2x4hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvmf2x5hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvmf2x6hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvmf2x7hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvmf2x8hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm1x2si (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm1x3si (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm1x4si (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm1x5si (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm1x6si (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm1x7si (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm1x8si (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm2x2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvm2x3di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvm2x4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvmf2x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvmf2x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvmf2x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvmf2x5bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvmf2x6bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvmf2x7bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvmf2x8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvmf2x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvmf2x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvmf2x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvmf2x5hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvmf2x6hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvmf2x7hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvmf2x8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvm1x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_storervvm1x3sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_storervvm1x4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_storervvm1x5sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_storervvm1x6sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_storervvm1x7sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_storervvm1x8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_storervvm2x2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_unit_strided_storervvm2x3df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_unit_strided_storervvm2x4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_unit_strided_storervvmf2x2qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvmf2x3qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvmf2x4qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvmf2x5qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvmf2x6qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvmf2x7qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvmf2x8qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm1x2hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm1x3hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm1x4hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm1x5hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm1x6hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm1x7hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm1x8hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm2x2si (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm2x3si (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm2x4si (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm4x2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_unit_strided_storervvm1x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvm1x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvm1x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvm1x5bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvm1x6bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvm1x7bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvm1x8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvm1x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvm1x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvm1x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvm1x5hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvm1x6hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvm1x7hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvm1x8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvm2x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_storervvm2x3sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_storervvm2x4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_storervvm4x2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_unit_strided_storervvm1x2qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm1x3qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm1x4qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm1x5qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm1x6qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm1x7qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm1x8qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm2x2hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm2x3hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm2x4hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm4x2si (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm2x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvm2x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvm2x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvm2x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvm2x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvm2x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvm4x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_unit_strided_storervvm2x2qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm2x3qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm2x4qi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm4x2hi (TARGET_VECTOR)
#define HAVE_pred_unit_strided_storervvm4x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_unit_strided_storervvm4x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_unit_strided_storervvm4x2qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvmf8x2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvmf8x3qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvmf8x4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvmf8x5qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvmf8x6qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvmf8x7qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvmf8x8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvmf4x2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvmf4x3hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvmf4x4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvmf4x5hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvmf4x6hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvmf4x7hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvmf4x8hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvmf2x2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvmf2x3si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvmf2x4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvmf2x5si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvmf2x6si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvmf2x7si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvmf2x8si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvm1x2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvm1x3di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvm1x4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvm1x5di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvm1x6di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvm1x7di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvm1x8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvmf4x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvmf4x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvmf4x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvmf4x5bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvmf4x6bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvmf4x7bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvmf4x8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvmf4x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvmf4x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvmf4x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvmf4x5hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvmf4x6hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvmf4x7hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvmf4x8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvmf2x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadrvvmf2x3sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadrvvmf2x4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadrvvmf2x5sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadrvvmf2x6sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadrvvmf2x7sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadrvvmf2x8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadrvvm1x2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_loadrvvm1x3df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_loadrvvm1x4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_loadrvvm1x5df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_loadrvvm1x6df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_loadrvvm1x7df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_loadrvvm1x8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_loadrvvmf4x2qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvmf4x3qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvmf4x4qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvmf4x5qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvmf4x6qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvmf4x7qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvmf4x8qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvmf2x2hi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvmf2x3hi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvmf2x4hi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvmf2x5hi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvmf2x6hi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvmf2x7hi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvmf2x8hi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm1x2si (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm1x3si (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm1x4si (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm1x5si (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm1x6si (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm1x7si (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm1x8si (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm2x2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvm2x3di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvm2x4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvmf2x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvmf2x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvmf2x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvmf2x5bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvmf2x6bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvmf2x7bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvmf2x8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvmf2x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvmf2x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvmf2x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvmf2x5hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvmf2x6hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvmf2x7hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvmf2x8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvm1x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadrvvm1x3sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadrvvm1x4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadrvvm1x5sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadrvvm1x6sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadrvvm1x7sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadrvvm1x8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadrvvm2x2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_loadrvvm2x3df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_loadrvvm2x4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_loadrvvmf2x2qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvmf2x3qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvmf2x4qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvmf2x5qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvmf2x6qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvmf2x7qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvmf2x8qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm1x2hi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm1x3hi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm1x4hi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm1x5hi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm1x6hi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm1x7hi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm1x8hi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm2x2si (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm2x3si (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm2x4si (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm4x2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_loadrvvm1x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvm1x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvm1x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvm1x5bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvm1x6bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvm1x7bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvm1x8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvm1x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvm1x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvm1x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvm1x5hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvm1x6hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvm1x7hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvm1x8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvm2x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadrvvm2x3sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadrvvm2x4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadrvvm4x2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_loadrvvm1x2qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm1x3qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm1x4qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm1x5qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm1x6qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm1x7qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm1x8qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm2x2hi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm2x3hi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm2x4hi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm4x2si (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm2x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvm2x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvm2x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvm2x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvm2x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvm2x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvm4x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_loadrvvm2x2qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm2x3qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm2x4qi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm4x2hi (TARGET_VECTOR)
#define HAVE_pred_strided_loadrvvm4x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_loadrvvm4x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_loadrvvm4x2qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvmf8x2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvmf8x3qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvmf8x4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvmf8x5qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvmf8x6qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvmf8x7qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvmf8x8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvmf4x2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvmf4x3hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvmf4x4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvmf4x5hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvmf4x6hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvmf4x7hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvmf4x8hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvmf2x2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvmf2x3si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvmf2x4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvmf2x5si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvmf2x6si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvmf2x7si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvmf2x8si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvm1x2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvm1x3di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvm1x4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvm1x5di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvm1x6di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvm1x7di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvm1x8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvmf4x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvmf4x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvmf4x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvmf4x5bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvmf4x6bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvmf4x7bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvmf4x8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvmf4x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvmf4x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvmf4x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvmf4x5hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvmf4x6hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvmf4x7hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvmf4x8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvmf2x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storervvmf2x3sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storervvmf2x4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storervvmf2x5sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storervvmf2x6sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storervvmf2x7sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storervvmf2x8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storervvm1x2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_storervvm1x3df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_storervvm1x4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_storervvm1x5df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_storervvm1x6df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_storervvm1x7df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_storervvm1x8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_storervvmf4x2qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvmf4x3qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvmf4x4qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvmf4x5qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvmf4x6qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvmf4x7qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvmf4x8qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvmf2x2hi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvmf2x3hi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvmf2x4hi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvmf2x5hi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvmf2x6hi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvmf2x7hi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvmf2x8hi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm1x2si (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm1x3si (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm1x4si (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm1x5si (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm1x6si (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm1x7si (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm1x8si (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm2x2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvm2x3di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvm2x4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvmf2x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvmf2x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvmf2x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvmf2x5bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvmf2x6bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvmf2x7bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvmf2x8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvmf2x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvmf2x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvmf2x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvmf2x5hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvmf2x6hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvmf2x7hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvmf2x8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvm1x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storervvm1x3sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storervvm1x4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storervvm1x5sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storervvm1x6sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storervvm1x7sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storervvm1x8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storervvm2x2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_storervvm2x3df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_storervvm2x4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_storervvmf2x2qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvmf2x3qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvmf2x4qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvmf2x5qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvmf2x6qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvmf2x7qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvmf2x8qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm1x2hi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm1x3hi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm1x4hi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm1x5hi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm1x6hi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm1x7hi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm1x8hi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm2x2si (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm2x3si (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm2x4si (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm4x2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_storervvm1x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvm1x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvm1x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvm1x5bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvm1x6bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvm1x7bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvm1x8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvm1x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvm1x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvm1x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvm1x5hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvm1x6hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvm1x7hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvm1x8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvm2x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storervvm2x3sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storervvm2x4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storervvm4x2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_storervvm1x2qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm1x3qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm1x4qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm1x5qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm1x6qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm1x7qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm1x8qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm2x2hi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm2x3hi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm2x4hi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm4x2si (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm2x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvm2x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvm2x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvm2x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvm2x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvm2x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvm4x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_storervvm2x2qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm2x3qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm2x4qi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm4x2hi (TARGET_VECTOR)
#define HAVE_pred_strided_storervvm4x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_storervvm4x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_storervvm4x2qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvmf8x2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvmf8x3qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvmf8x4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvmf8x5qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvmf8x6qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvmf8x7qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvmf8x8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvmf4x2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvmf4x3hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvmf4x4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvmf4x5hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvmf4x6hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvmf4x7hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvmf4x8hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvmf2x2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvmf2x3si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvmf2x4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvmf2x5si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvmf2x6si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvmf2x7si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvmf2x8si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvm1x2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvm1x3di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvm1x4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvm1x5di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvm1x6di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvm1x7di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvm1x8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvmf4x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvmf4x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvmf4x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvmf4x5bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvmf4x6bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvmf4x7bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvmf4x8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvmf4x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvmf4x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvmf4x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvmf4x5hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvmf4x6hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvmf4x7hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvmf4x8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvmf2x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadrvvmf2x3sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadrvvmf2x4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadrvvmf2x5sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadrvvmf2x6sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadrvvmf2x7sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadrvvmf2x8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadrvvm1x2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fault_loadrvvm1x3df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fault_loadrvvm1x4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fault_loadrvvm1x5df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fault_loadrvvm1x6df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fault_loadrvvm1x7df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fault_loadrvvm1x8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fault_loadrvvmf4x2qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvmf4x3qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvmf4x4qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvmf4x5qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvmf4x6qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvmf4x7qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvmf4x8qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvmf2x2hi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvmf2x3hi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvmf2x4hi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvmf2x5hi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvmf2x6hi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvmf2x7hi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvmf2x8hi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm1x2si (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm1x3si (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm1x4si (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm1x5si (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm1x6si (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm1x7si (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm1x8si (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm2x2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvm2x3di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvm2x4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvmf2x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvmf2x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvmf2x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvmf2x5bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvmf2x6bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvmf2x7bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvmf2x8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvmf2x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvmf2x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvmf2x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvmf2x5hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvmf2x6hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvmf2x7hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvmf2x8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvm1x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadrvvm1x3sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadrvvm1x4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadrvvm1x5sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadrvvm1x6sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadrvvm1x7sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadrvvm1x8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadrvvm2x2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fault_loadrvvm2x3df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fault_loadrvvm2x4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fault_loadrvvmf2x2qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvmf2x3qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvmf2x4qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvmf2x5qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvmf2x6qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvmf2x7qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvmf2x8qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm1x2hi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm1x3hi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm1x4hi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm1x5hi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm1x6hi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm1x7hi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm1x8hi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm2x2si (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm2x3si (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm2x4si (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm4x2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_fault_loadrvvm1x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvm1x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvm1x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvm1x5bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvm1x6bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvm1x7bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvm1x8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvm1x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvm1x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvm1x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvm1x5hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvm1x6hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvm1x7hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvm1x8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvm2x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadrvvm2x3sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadrvvm2x4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadrvvm4x2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_fault_loadrvvm1x2qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm1x3qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm1x4qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm1x5qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm1x6qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm1x7qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm1x8qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm2x2hi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm2x3hi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm2x4hi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm4x2si (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm2x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvm2x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvm2x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvm2x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvm2x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvm2x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvm4x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_fault_loadrvvm2x2qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm2x3qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm2x4qi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm4x2hi (TARGET_VECTOR)
#define HAVE_pred_fault_loadrvvm4x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_fault_loadrvvm4x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_fault_loadrvvm4x2qi (TARGET_VECTOR)
#define HAVE_pred_fault_load_set_vlrvvmf8x2qisi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf8x2qidi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf8x3qisi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf8x3qidi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf8x4qisi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf8x4qidi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf8x5qisi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf8x5qidi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf8x6qisi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf8x6qidi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf8x7qisi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf8x7qidi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf8x8qisi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf8x8qidi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x2hisi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x2hidi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x3hisi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x3hidi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x4hisi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x4hidi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x5hisi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x5hidi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x6hisi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x6hidi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x7hisi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x7hidi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x8hisi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x8hidi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x2sisi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x2sidi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x3sisi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x3sidi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x4sisi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x4sidi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x5sisi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x5sidi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x6sisi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x6sidi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x7sisi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x7sidi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x8sisi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x8sidi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x2disi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x2didi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x3disi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x3didi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x4disi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x4didi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x5disi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x5didi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x6disi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x6didi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x7disi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x7didi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x8disi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x8didi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x2bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x2bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x3bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x3bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x4bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x4bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x5bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x5bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x6bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x6bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x7bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x7bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x8bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x8bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x2hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x2hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x3hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x3hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x4hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x4hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x5hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x5hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x6hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x6hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x7hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x7hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x8hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x8hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x2sfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x2sfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x3sfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x3sfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x4sfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x4sfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x5sfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x5sfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x6sfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x6sfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x7sfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x7sfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x8sfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x8sfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x2dfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x2dfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x3dfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x3dfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x4dfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x4dfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x5dfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x5dfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x6dfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x6dfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x7dfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x7dfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x8dfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x8dfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf4x2qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvmf4x2qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvmf4x3qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvmf4x3qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvmf4x4qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvmf4x4qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvmf4x5qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvmf4x5qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvmf4x6qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvmf4x6qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvmf4x7qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvmf4x7qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvmf4x8qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvmf4x8qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x2hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x2hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x3hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x3hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x4hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x4hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x5hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x5hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x6hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x6hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x7hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x7hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x8hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x8hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm1x2sisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm1x2sidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm1x3sisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm1x3sidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm1x4sisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm1x4sidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm1x5sisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm1x5sidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm1x6sisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm1x6sidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm1x7sisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm1x7sidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm1x8sisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm1x8sidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm2x2disi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x2didi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x3disi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x3didi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x4disi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x4didi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x2bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x2bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x3bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x3bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x4bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x4bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x5bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x5bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x6bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x6bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x7bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x7bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x8bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x8bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x2hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x2hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x3hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x3hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x4hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x4hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x5hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x5hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x6hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x6hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x7hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x7hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x8hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x8hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x2sfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x2sfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x3sfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x3sfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x4sfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x4sfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x5sfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x5sfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x6sfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x6sfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x7sfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x7sfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x8sfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x8sfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x2dfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x2dfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x3dfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x3dfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x4dfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x4dfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvmf2x2qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x2qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x3qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x3qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x4qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x4qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x5qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x5qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x6qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x6qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x7qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x7qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x8qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvmf2x8qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm1x2hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm1x2hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm1x3hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm1x3hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm1x4hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm1x4hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm1x5hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm1x5hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm1x6hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm1x6hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm1x7hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm1x7hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm1x8hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm1x8hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm2x2sisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm2x2sidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm2x3sisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm2x3sidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm2x4sisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm2x4sidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm4x2disi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm4x2didi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x2bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x2bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x3bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x3bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x4bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x4bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x5bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x5bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x6bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x6bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x7bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x7bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x8bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x8bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x2hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x2hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x3hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x3hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x4hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x4hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x5hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x5hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x6hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x6hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x7hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x7hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x8hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x8hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x2sfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x2sfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x3sfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x3sfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x4sfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x4sfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm4x2dfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm4x2dfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm1x2qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm1x2qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm1x3qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm1x3qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm1x4qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm1x4qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm1x5qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm1x5qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm1x6qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm1x6qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm1x7qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm1x7qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm1x8qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm1x8qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm2x2hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm2x2hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm2x3hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm2x3hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm2x4hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm2x4hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm4x2sisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm4x2sidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm2x2bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x2bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x3bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x3bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x4bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x4bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x2hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x2hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x3hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x3hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x4hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x4hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm4x2sfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm4x2sfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm2x2qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm2x2qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm2x3qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm2x3qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm2x4qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm2x4qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm4x2hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm4x2hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_fault_load_set_vlrvvm4x2bfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm4x2bfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm4x2hfsi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)) && (Pmode == SImode)))
#define HAVE_pred_fault_load_set_vlrvvm4x2hfdi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)) && (Pmode == DImode)))
#define HAVE_pred_fault_load_set_vlrvvm4x2qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_pred_fault_load_set_vlrvvm4x2qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_pred_indexed_oloadrvvmf8x2qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf8x2qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf8x2qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf8x2qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf8x2qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf8x2qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf8x2qirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvmf8x2qirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvmf8x3qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf8x3qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf8x3qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf8x3qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf8x3qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf8x3qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf8x3qirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvmf8x3qirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvmf8x4qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf8x4qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf8x4qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf8x4qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf8x4qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf8x4qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf8x4qirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvmf8x4qirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvmf8x5qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf8x5qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf8x5qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf8x5qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf8x5qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf8x5qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf8x5qirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvmf8x5qirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvmf8x6qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf8x6qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf8x6qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf8x6qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf8x6qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf8x6qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf8x6qirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvmf8x6qirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvmf8x7qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf8x7qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf8x7qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf8x7qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf8x7qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf8x7qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf8x7qirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvmf8x7qirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvmf8x8qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf8x8qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf8x8qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf8x8qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf8x8qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf8x8qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf8x8qirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvmf8x8qirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvmf4x2hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4x2hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf4x2hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4x2hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf4x2hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4x2hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf4x2hirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvmf4x2hirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvmf4x3hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4x3hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf4x3hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4x3hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf4x3hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4x3hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf4x3hirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvmf4x3hirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvmf4x4hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4x4hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf4x4hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4x4hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf4x4hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4x4hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf4x4hirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvmf4x4hirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvmf4x5hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4x5hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf4x5hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4x5hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf4x5hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4x5hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf4x5hirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvmf4x5hirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvmf4x6hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4x6hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf4x6hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4x6hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf4x6hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4x6hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf4x6hirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvmf4x6hirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvmf4x7hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4x7hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf4x7hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4x7hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf4x7hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4x7hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf4x7hirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvmf4x7hirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvmf4x8hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4x8hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf4x8hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4x8hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf4x8hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf4x8hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf4x8hirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvmf4x8hirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvmf2x2sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2x2sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf2x2sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2x2sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf2x2sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2x2sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf2x2sirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvmf2x2sirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvmf2x3sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2x3sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf2x3sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2x3sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf2x3sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2x3sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf2x3sirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvmf2x3sirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvmf2x4sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2x4sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf2x4sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2x4sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf2x4sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2x4sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf2x4sirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvmf2x4sirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvmf2x5sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2x5sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf2x5sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2x5sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf2x5sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2x5sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf2x5sirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvmf2x5sirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvmf2x6sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2x6sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf2x6sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2x6sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf2x6sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2x6sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf2x6sirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvmf2x6sirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvmf2x7sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2x7sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf2x7sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2x7sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf2x7sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2x7sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf2x7sirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvmf2x7sirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvmf2x8sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2x8sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf2x8sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2x8sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf2x8sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvmf2x8sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf2x8sirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvmf2x8sirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvm1x2dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm1x2dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1x2dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm1x2dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1x2dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm1x2dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1x2dirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvm1x2dirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvm1x3dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm1x3dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1x3dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm1x3dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1x3dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm1x3dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1x3dirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvm1x3dirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvm1x4dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm1x4dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1x4dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm1x4dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1x4dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm1x4dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1x4dirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvm1x4dirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvm1x5dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm1x5dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1x5dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm1x5dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1x5dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm1x5dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1x5dirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvm1x5dirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvm1x6dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm1x6dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1x6dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm1x6dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1x6dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm1x6dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1x6dirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvm1x6dirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvm1x7dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm1x7dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1x7dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm1x7dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1x7dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm1x7dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1x7dirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvm1x7dirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvm1x8dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm1x8dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1x8dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm1x8dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1x8dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm1x8dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1x8dirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvm1x8dirvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvmf4x2bfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x2bfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x2bfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x2bfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x2bfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x2bfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x2bfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x2bfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x3bfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x3bfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x3bfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x3bfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x3bfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x3bfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x3bfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x3bfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x4bfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x4bfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x4bfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x4bfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x4bfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x4bfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x4bfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x4bfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x5bfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x5bfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x5bfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x5bfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x5bfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x5bfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x5bfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x5bfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x6bfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x6bfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x6bfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x6bfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x6bfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x6bfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x6bfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x6bfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x7bfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x7bfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x7bfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x7bfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x7bfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x7bfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x7bfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x7bfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x8bfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x8bfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x8bfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x8bfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x8bfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x8bfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x8bfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf4x8bfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf4x2hfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x2hfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x2hfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x2hfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x2hfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x2hfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x2hfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x2hfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x3hfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x3hfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x3hfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x3hfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x3hfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x3hfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x3hfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x3hfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x4hfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x4hfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x4hfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x4hfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x4hfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x4hfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x4hfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x4hfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x5hfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x5hfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x5hfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x5hfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x5hfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x5hfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x5hfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x5hfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x6hfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x6hfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x6hfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x6hfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x6hfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x6hfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x6hfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x6hfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x7hfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x7hfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x7hfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x7hfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x7hfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x7hfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x7hfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x7hfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x8hfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x8hfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x8hfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x8hfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x8hfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x8hfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf4x8hfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf4x8hfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf2x2sfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x2sfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x2sfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x2sfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x2sfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x2sfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x2sfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x2sfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x3sfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x3sfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x3sfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x3sfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x3sfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x3sfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x3sfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x3sfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x4sfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x4sfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x4sfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x4sfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x4sfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x4sfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x4sfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x4sfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x5sfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x5sfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x5sfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x5sfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x5sfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x5sfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x5sfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x5sfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x6sfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x6sfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x6sfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x6sfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x6sfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x6sfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x6sfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x6sfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x7sfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x7sfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x7sfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x7sfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x7sfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x7sfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x7sfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x7sfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x8sfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x8sfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x8sfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x8sfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x8sfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x8sfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvmf2x8sfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvmf2x8sfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvm1x2dfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x2dfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x2dfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x2dfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x2dfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x2dfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x2dfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x2dfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x3dfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x3dfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x3dfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x3dfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x3dfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x3dfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x3dfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x3dfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x4dfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x4dfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x4dfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x4dfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x4dfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x4dfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x4dfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x4dfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x5dfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x5dfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x5dfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x5dfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x5dfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x5dfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x5dfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x5dfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x6dfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x6dfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x6dfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x6dfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x6dfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x6dfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x6dfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x6dfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x7dfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x7dfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x7dfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x7dfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x7dfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x7dfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x7dfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x7dfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x8dfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x8dfrvvmf8qi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x8dfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x8dfrvvmf4hi ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x8dfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x8dfrvvmf2si ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x8dfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm1x8dfrvvm1di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvmf4x2qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf4x2qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf4x3qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf4x3qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf4x4qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf4x4qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf4x5qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf4x5qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf4x6qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf4x6qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf4x7qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf4x7qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf4x8qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf4x8qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x2hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x2hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x3hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x3hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x4hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x4hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x5hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x5hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x6hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x6hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x7hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x7hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x8hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x8hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x2sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x2sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x3sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x3sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x4sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x4sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x5sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x5sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x6sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x6sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x7sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x7sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x8sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x8sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x2dirvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm2x2dirvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm2x3dirvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm2x3dirvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm2x4dirvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm2x4dirvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf2x2bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2x2bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2x3bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2x3bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2x4bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2x4bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2x5bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2x5bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2x6bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2x6bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2x7bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2x7bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2x8bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2x8bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2x2hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvmf2x2hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvmf2x3hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvmf2x3hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvmf2x4hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvmf2x4hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvmf2x5hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvmf2x5hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvmf2x6hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvmf2x6hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvmf2x7hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvmf2x7hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvmf2x8hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvmf2x8hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm1x2sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm1x2sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm1x3sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm1x3sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm1x4sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm1x4sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm1x5sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm1x5sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm1x6sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm1x6sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm1x7sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm1x7sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm1x8sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm1x8sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm2x2dfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadrvvm2x2dfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadrvvm2x3dfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadrvvm2x3dfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadrvvm2x4dfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadrvvm2x4dfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadrvvmf4x2qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf4x2qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf4x3qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf4x3qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf4x4qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf4x4qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf4x5qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf4x5qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf4x6qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf4x6qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf4x7qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf4x7qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf4x8qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf4x8qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x2hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x2hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x3hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x3hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x4hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x4hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x5hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x5hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x6hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x6hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x7hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x7hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x8hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x8hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x2sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x2sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x3sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x3sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x4sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x4sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x5sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x5sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x6sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x6sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x7sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x7sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x8sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x8sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x2dirvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm2x2dirvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm2x3dirvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm2x3dirvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm2x4dirvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm2x4dirvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf2x2bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2x2bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2x3bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2x3bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2x4bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2x4bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2x5bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2x5bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2x6bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2x6bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2x7bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2x7bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2x8bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2x8bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2x2hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvmf2x2hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvmf2x3hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvmf2x3hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvmf2x4hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvmf2x4hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvmf2x5hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvmf2x5hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvmf2x6hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvmf2x6hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvmf2x7hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvmf2x7hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvmf2x8hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvmf2x8hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm1x2sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm1x2sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm1x3sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm1x3sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm1x4sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm1x4sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm1x5sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm1x5sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm1x6sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm1x6sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm1x7sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm1x7sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm1x8sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm1x8sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm2x2dfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadrvvm2x2dfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadrvvm2x3dfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadrvvm2x3dfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadrvvm2x4dfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadrvvm2x4dfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadrvvmf4x2qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf4x2qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf4x3qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf4x3qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf4x4qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf4x4qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf4x5qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf4x5qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf4x6qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf4x6qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf4x7qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf4x7qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf4x8qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf4x8qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x2hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x2hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x3hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x3hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x4hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x4hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x5hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x5hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x6hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x6hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x7hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x7hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x8hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x8hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x2sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x2sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x3sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x3sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x4sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x4sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x5sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x5sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x6sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x6sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x7sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x7sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x8sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x8sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x2dirvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm2x2dirvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm2x3dirvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm2x3dirvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm2x4dirvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm2x4dirvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvmf2x2bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2x2bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2x3bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2x3bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2x4bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2x4bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2x5bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2x5bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2x6bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2x6bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2x7bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2x7bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2x8bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvmf2x8bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvmf2x2hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvmf2x2hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvmf2x3hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvmf2x3hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvmf2x4hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvmf2x4hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvmf2x5hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvmf2x5hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvmf2x6hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvmf2x6hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvmf2x7hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvmf2x7hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvmf2x8hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvmf2x8hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm1x2sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm1x2sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm1x3sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm1x3sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm1x4sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm1x4sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm1x5sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm1x5sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm1x6sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm1x6sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm1x7sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm1x7sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm1x8sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm1x8sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm2x2dfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadrvvm2x2dfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadrvvm2x3dfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadrvvm2x3dfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadrvvm2x4dfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadrvvm2x4dfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadrvvmf4x2qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf4x2qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf4x3qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf4x3qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf4x4qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf4x4qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf4x5qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf4x5qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf4x6qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf4x6qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf4x7qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf4x7qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf4x8qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf4x8qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf2x2hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf2x2hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf2x3hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf2x3hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf2x4hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf2x4hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf2x5hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf2x5hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf2x6hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf2x6hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf2x7hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf2x7hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf2x8hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf2x8hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1x2sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1x2sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1x3sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1x3sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1x4sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1x4sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1x5sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1x5sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1x6sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1x6sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1x7sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1x7sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1x8sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1x8sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm2x2dirvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvm2x2dirvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvm2x3dirvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvm2x3dirvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvm2x4dirvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvm2x4dirvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvmf2x2bfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf2x2bfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf2x3bfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf2x3bfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf2x4bfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf2x4bfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf2x5bfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf2x5bfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf2x6bfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf2x6bfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf2x7bfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf2x7bfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf2x8bfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvmf2x8bfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvmf2x2hfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf2x2hfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf2x3hfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf2x3hfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf2x4hfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf2x4hfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf2x5hfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf2x5hfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf2x6hfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf2x6hfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf2x7hfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf2x7hfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvmf2x8hfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvmf2x8hfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvm1x2sfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvm1x2sfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvm1x3sfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvm1x3sfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvm1x4sfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvm1x4sfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvm1x5sfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvm1x5sfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvm1x6sfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvm1x6sfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvm1x7sfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvm1x7sfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvm1x8sfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvm1x8sfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvm2x2dfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm2x2dfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm2x3dfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm2x3dfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm2x4dfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm2x4dfrvvm2di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvmf2x2qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x2qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x3qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x3qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x4qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x4qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x5qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x5qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x6qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x6qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x7qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x7qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x8qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x8qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x2hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x2hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x3hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x3hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x4hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x4hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x5hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x5hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x6hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x6hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x7hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x7hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x8hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x8hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x2sirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x2sirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x3sirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x3sirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x4sirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x4sirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm4x2dirvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm4x2dirvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1x2bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1x2bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1x3bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1x3bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1x4bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1x4bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1x5bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1x5bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1x6bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1x6bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1x7bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1x7bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1x8bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1x8bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1x2hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm1x2hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm1x3hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm1x3hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm1x4hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm1x4hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm1x5hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm1x5hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm1x6hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm1x6hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm1x7hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm1x7hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm1x8hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm1x8hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm2x2sfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm2x2sfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm2x3sfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm2x3sfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm2x4sfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm2x4sfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm4x2dfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadrvvm4x2dfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadrvvmf2x2qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x2qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x3qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x3qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x4qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x4qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x5qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x5qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x6qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x6qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x7qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x7qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x8qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x8qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x2hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x2hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x3hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x3hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x4hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x4hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x5hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x5hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x6hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x6hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x7hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x7hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x8hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x8hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x2sirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x2sirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x3sirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x3sirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x4sirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x4sirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm4x2dirvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm4x2dirvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1x2bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1x2bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1x3bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1x3bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1x4bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1x4bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1x5bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1x5bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1x6bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1x6bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1x7bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1x7bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1x8bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1x8bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1x2hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm1x2hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm1x3hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm1x3hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm1x4hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm1x4hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm1x5hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm1x5hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm1x6hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm1x6hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm1x7hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm1x7hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm1x8hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm1x8hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm2x2sfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm2x2sfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm2x3sfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm2x3sfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm2x4sfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm2x4sfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm4x2dfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadrvvm4x2dfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadrvvmf2x2qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x2qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x3qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x3qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x4qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x4qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x5qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x5qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x6qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x6qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x7qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x7qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvmf2x8qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvmf2x8qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x2hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x2hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x3hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x3hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x4hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x4hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x5hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x5hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x6hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x6hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x7hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x7hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x8hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x8hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x2sirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x2sirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x3sirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x3sirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x4sirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x4sirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm4x2dirvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_uloadrvvm4x2dirvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_oloadrvvm1x2bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1x2bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1x3bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1x3bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1x4bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1x4bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1x5bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1x5bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1x6bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1x6bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1x7bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1x7bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1x8bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm1x8bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm1x2hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm1x2hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm1x3hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm1x3hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm1x4hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm1x4hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm1x5hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm1x5hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm1x6hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm1x6hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm1x7hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm1x7hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm1x8hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm1x8hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm2x2sfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm2x2sfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm2x3sfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm2x3sfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm2x4sfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm2x4sfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm4x2dfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_uloadrvvm4x2dfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_oloadrvvmf2x2qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf2x2qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf2x3qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf2x3qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf2x4qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf2x4qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf2x5qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf2x5qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf2x6qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf2x6qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf2x7qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf2x7qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvmf2x8qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvmf2x8qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1x2hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1x2hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1x3hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1x3hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1x4hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1x4hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1x5hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1x5hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1x6hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1x6hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1x7hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1x7hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1x8hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1x8hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm2x2sirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm2x2sirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm2x3sirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm2x3sirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm2x4sirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm2x4sirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm4x2dirvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_uloadrvvm4x2dirvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_oloadrvvm1x2bfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvm1x2bfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvm1x3bfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvm1x3bfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvm1x4bfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvm1x4bfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvm1x5bfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvm1x5bfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvm1x6bfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvm1x6bfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvm1x7bfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvm1x7bfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvm1x8bfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvm1x8bfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvm1x2hfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvm1x2hfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvm1x3hfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvm1x3hfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvm1x4hfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvm1x4hfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvm1x5hfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvm1x5hfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvm1x6hfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvm1x6hfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvm1x7hfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvm1x7hfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvm1x8hfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvm1x8hfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvm2x2sfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvm2x2sfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvm2x3sfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvm2x3sfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvm2x4sfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvm2x4sfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvm4x2dfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_uloadrvvm4x2dfrvvm4di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_64) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_oloadrvvm1x2qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x2qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x2qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x2qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x2qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x2qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x2qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1x2qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1x3qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x3qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x3qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x3qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x3qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x3qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x3qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1x3qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1x4qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x4qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x4qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x4qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x4qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x4qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x4qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1x4qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1x5qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x5qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x5qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x5qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x5qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x5qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x5qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1x5qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1x6qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x6qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x6qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x6qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x6qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x6qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x6qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1x6qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1x7qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x7qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x7qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x7qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x7qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x7qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x7qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1x7qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm1x8qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x8qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x8qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x8qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x8qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm1x8qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm1x8qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm1x8qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm2x2hirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x2hirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x2hirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x2hirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x2hirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x2hirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x2hirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm2x2hirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm2x3hirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x3hirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x3hirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x3hirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x3hirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x3hirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x3hirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm2x3hirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm2x4hirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x4hirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x4hirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x4hirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x4hirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x4hirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x4hirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm2x4hirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm4x2sirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm4x2sirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm4x2sirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm4x2sirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm4x2sirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm4x2sirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm4x2sirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_uloadrvvm4x2sirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_oloadrvvm2x2bfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm2x2bfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm2x2bfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm2x2bfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm2x2bfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm2x2bfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm2x2bfrvvm8di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvm2x2bfrvvm8di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvm2x3bfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm2x3bfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm2x3bfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm2x3bfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm2x3bfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm2x3bfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm2x3bfrvvm8di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvm2x3bfrvvm8di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvm2x4bfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm2x4bfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm2x4bfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm2x4bfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm2x4bfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm2x4bfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm2x4bfrvvm8di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_uloadrvvm2x4bfrvvm8di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_BF_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_oloadrvvm2x2hfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm2x2hfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm2x2hfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm2x2hfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm2x2hfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm2x2hfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm2x2hfrvvm8di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvm2x2hfrvvm8di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvm2x3hfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm2x3hfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm2x3hfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm2x3hfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm2x3hfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm2x3hfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm2x3hfrvvm8di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvm2x3hfrvvm8di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvm2x4hfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm2x4hfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm2x4hfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm2x4hfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm2x4hfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm2x4hfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm2x4hfrvvm8di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_uloadrvvm2x4hfrvvm8di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_16) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_oloadrvvm4x2sfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm4x2sfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm4x2sfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm4x2sfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm4x2sfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_uloadrvvm4x2sfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_oloadrvvm4x2sfrvvm8di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_uloadrvvm4x2sfrvvm8di ((TARGET_VECTOR) && (((TARGET_VECTOR_ELEN_FP_32) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT)) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_oloadrvvm2x2qirvvm2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x2qirvvm2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x2qirvvm4hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x2qirvvm4hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x2qirvvm8si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x2qirvvm8si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x3qirvvm2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x3qirvvm2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x3qirvvm4hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x3qirvvm4hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x3qirvvm8si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x3qirvvm8si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x4qirvvm2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x4qirvvm2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x4qirvvm4hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x4qirvvm4hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm2x4qirvvm8si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm2x4qirvvm8si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm4x2hirvvm2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm4x2hirvvm2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm4x2hirvvm4hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm4x2hirvvm4hi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm4x2hirvvm8si (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm4x2hirvvm8si (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm4x2bfrvvm2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm4x2bfrvvm2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm4x2bfrvvm4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm4x2bfrvvm4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm4x2bfrvvm8si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_uloadrvvm4x2bfrvvm8si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_oloadrvvm4x2hfrvvm2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm4x2hfrvvm2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm4x2hfrvvm4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm4x2hfrvvm4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm4x2hfrvvm8si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_uloadrvvm4x2hfrvvm8si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_oloadrvvm4x2qirvvm4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm4x2qirvvm4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_oloadrvvm4x2qirvvm8hi (TARGET_VECTOR)
#define HAVE_pred_indexed_uloadrvvm4x2qirvvm8hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf8x2qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf8x2qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf8x2qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf8x2qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf8x2qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf8x2qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf8x2qirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvmf8x2qirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvmf8x3qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf8x3qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf8x3qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf8x3qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf8x3qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf8x3qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf8x3qirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvmf8x3qirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvmf8x4qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf8x4qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf8x4qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf8x4qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf8x4qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf8x4qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf8x4qirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvmf8x4qirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvmf8x5qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf8x5qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf8x5qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf8x5qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf8x5qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf8x5qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf8x5qirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvmf8x5qirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvmf8x6qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf8x6qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf8x6qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf8x6qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf8x6qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf8x6qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf8x6qirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvmf8x6qirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvmf8x7qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf8x7qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf8x7qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf8x7qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf8x7qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf8x7qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf8x7qirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvmf8x7qirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvmf8x8qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf8x8qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf8x8qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf8x8qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf8x8qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf8x8qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf8x8qirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvmf8x8qirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvmf4x2hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4x2hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf4x2hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4x2hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf4x2hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4x2hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf4x2hirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvmf4x2hirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvmf4x3hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4x3hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf4x3hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4x3hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf4x3hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4x3hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf4x3hirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvmf4x3hirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvmf4x4hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4x4hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf4x4hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4x4hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf4x4hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4x4hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf4x4hirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvmf4x4hirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvmf4x5hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4x5hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf4x5hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4x5hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf4x5hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4x5hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf4x5hirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvmf4x5hirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvmf4x6hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4x6hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf4x6hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4x6hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf4x6hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4x6hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf4x6hirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvmf4x6hirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvmf4x7hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4x7hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf4x7hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4x7hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf4x7hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4x7hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf4x7hirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvmf4x7hirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvmf4x8hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4x8hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf4x8hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4x8hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf4x8hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf4x8hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf4x8hirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvmf4x8hirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvmf2x2sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2x2sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf2x2sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2x2sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf2x2sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2x2sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf2x2sirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvmf2x2sirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvmf2x3sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2x3sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf2x3sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2x3sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf2x3sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2x3sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf2x3sirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvmf2x3sirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvmf2x4sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2x4sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf2x4sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2x4sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf2x4sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2x4sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf2x4sirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvmf2x4sirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvmf2x5sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2x5sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf2x5sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2x5sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf2x5sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2x5sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf2x5sirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvmf2x5sirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvmf2x6sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2x6sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf2x6sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2x6sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf2x6sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2x6sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf2x6sirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvmf2x6sirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvmf2x7sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2x7sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf2x7sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2x7sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf2x7sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2x7sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf2x7sirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvmf2x7sirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvmf2x8sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2x8sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf2x8sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2x8sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf2x8sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvmf2x8sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf2x8sirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvmf2x8sirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvm1x2dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm1x2dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1x2dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm1x2dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1x2dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm1x2dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1x2dirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvm1x2dirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvm1x3dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm1x3dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1x3dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm1x3dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1x3dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm1x3dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1x3dirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvm1x3dirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvm1x4dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm1x4dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1x4dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm1x4dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1x4dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm1x4dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1x4dirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvm1x4dirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvm1x5dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm1x5dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1x5dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm1x5dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1x5dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm1x5dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1x5dirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvm1x5dirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvm1x6dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm1x6dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1x6dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm1x6dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1x6dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm1x6dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1x6dirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvm1x6dirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvm1x7dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm1x7dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1x7dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm1x7dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1x7dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm1x7dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1x7dirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvm1x7dirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvm1x8dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm1x8dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1x8dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm1x8dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1x8dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm1x8dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1x8dirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvm1x8dirvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvmf4x2bfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x2bfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x2bfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x2bfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x2bfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x2bfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x2bfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x2bfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x3bfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x3bfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x3bfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x3bfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x3bfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x3bfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x3bfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x3bfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x4bfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x4bfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x4bfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x4bfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x4bfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x4bfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x4bfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x4bfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x5bfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x5bfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x5bfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x5bfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x5bfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x5bfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x5bfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x5bfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x6bfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x6bfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x6bfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x6bfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x6bfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x6bfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x6bfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x6bfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x7bfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x7bfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x7bfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x7bfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x7bfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x7bfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x7bfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x7bfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x8bfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x8bfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x8bfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x8bfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x8bfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x8bfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x8bfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf4x8bfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf4x2hfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x2hfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x2hfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x2hfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x2hfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x2hfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x2hfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x2hfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x3hfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x3hfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x3hfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x3hfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x3hfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x3hfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x3hfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x3hfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x4hfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x4hfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x4hfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x4hfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x4hfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x4hfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x4hfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x4hfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x5hfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x5hfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x5hfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x5hfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x5hfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x5hfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x5hfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x5hfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x6hfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x6hfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x6hfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x6hfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x6hfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x6hfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x6hfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x6hfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x7hfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x7hfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x7hfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x7hfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x7hfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x7hfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x7hfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x7hfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x8hfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x8hfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x8hfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x8hfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x8hfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x8hfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf4x8hfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf4x8hfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf2x2sfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x2sfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x2sfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x2sfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x2sfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x2sfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x2sfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x2sfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x3sfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x3sfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x3sfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x3sfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x3sfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x3sfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x3sfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x3sfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x4sfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x4sfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x4sfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x4sfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x4sfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x4sfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x4sfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x4sfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x5sfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x5sfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x5sfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x5sfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x5sfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x5sfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x5sfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x5sfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x6sfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x6sfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x6sfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x6sfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x6sfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x6sfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x6sfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x6sfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x7sfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x7sfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x7sfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x7sfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x7sfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x7sfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x7sfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x7sfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x8sfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x8sfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x8sfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x8sfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x8sfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x8sfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvmf2x8sfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvmf2x8sfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvm1x2dfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x2dfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x2dfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x2dfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x2dfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x2dfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x2dfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x2dfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x3dfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x3dfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x3dfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x3dfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x3dfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x3dfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x3dfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x3dfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x4dfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x4dfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x4dfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x4dfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x4dfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x4dfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x4dfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x4dfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x5dfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x5dfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x5dfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x5dfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x5dfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x5dfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x5dfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x5dfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x6dfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x6dfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x6dfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x6dfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x6dfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x6dfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x6dfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x6dfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x7dfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x7dfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x7dfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x7dfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x7dfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x7dfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x7dfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x7dfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x8dfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x8dfrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x8dfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x8dfrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x8dfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x8dfrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x8dfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm1x8dfrvvm1di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvmf4x2qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf4x2qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf4x3qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf4x3qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf4x4qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf4x4qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf4x5qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf4x5qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf4x6qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf4x6qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf4x7qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf4x7qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf4x8qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf4x8qirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x2hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x2hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x3hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x3hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x4hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x4hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x5hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x5hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x6hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x6hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x7hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x7hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x8hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x8hirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x2sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x2sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x3sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x3sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x4sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x4sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x5sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x5sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x6sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x6sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x7sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x7sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x8sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x8sirvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x2dirvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm2x2dirvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm2x3dirvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm2x3dirvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm2x4dirvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm2x4dirvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf2x2bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2x2bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2x3bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2x3bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2x4bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2x4bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2x5bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2x5bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2x6bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2x6bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2x7bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2x7bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2x8bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2x8bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2x2hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvmf2x2hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvmf2x3hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvmf2x3hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvmf2x4hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvmf2x4hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvmf2x5hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvmf2x5hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvmf2x6hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvmf2x6hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvmf2x7hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvmf2x7hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvmf2x8hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvmf2x8hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm1x2sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm1x2sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm1x3sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm1x3sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm1x4sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm1x4sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm1x5sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm1x5sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm1x6sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm1x6sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm1x7sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm1x7sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm1x8sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm1x8sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm2x2dfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorervvm2x2dfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorervvm2x3dfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorervvm2x3dfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorervvm2x4dfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorervvm2x4dfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorervvmf4x2qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf4x2qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf4x3qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf4x3qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf4x4qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf4x4qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf4x5qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf4x5qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf4x6qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf4x6qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf4x7qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf4x7qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf4x8qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf4x8qirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x2hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x2hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x3hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x3hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x4hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x4hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x5hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x5hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x6hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x6hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x7hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x7hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x8hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x8hirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x2sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x2sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x3sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x3sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x4sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x4sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x5sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x5sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x6sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x6sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x7sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x7sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x8sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x8sirvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x2dirvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm2x2dirvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm2x3dirvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm2x3dirvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm2x4dirvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm2x4dirvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf2x2bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2x2bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2x3bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2x3bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2x4bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2x4bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2x5bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2x5bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2x6bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2x6bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2x7bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2x7bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2x8bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2x8bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2x2hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvmf2x2hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvmf2x3hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvmf2x3hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvmf2x4hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvmf2x4hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvmf2x5hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvmf2x5hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvmf2x6hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvmf2x6hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvmf2x7hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvmf2x7hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvmf2x8hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvmf2x8hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm1x2sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm1x2sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm1x3sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm1x3sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm1x4sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm1x4sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm1x5sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm1x5sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm1x6sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm1x6sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm1x7sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm1x7sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm1x8sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm1x8sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm2x2dfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorervvm2x2dfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorervvm2x3dfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorervvm2x3dfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorervvm2x4dfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorervvm2x4dfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorervvmf4x2qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf4x2qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf4x3qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf4x3qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf4x4qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf4x4qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf4x5qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf4x5qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf4x6qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf4x6qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf4x7qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf4x7qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf4x8qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf4x8qirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x2hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x2hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x3hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x3hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x4hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x4hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x5hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x5hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x6hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x6hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x7hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x7hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x8hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x8hirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x2sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x2sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x3sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x3sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x4sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x4sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x5sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x5sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x6sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x6sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x7sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x7sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x8sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x8sirvvm1si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x2dirvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm2x2dirvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm2x3dirvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm2x3dirvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm2x4dirvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm2x4dirvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvmf2x2bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2x2bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2x3bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2x3bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2x4bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2x4bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2x5bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2x5bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2x6bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2x6bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2x7bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2x7bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2x8bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvmf2x8bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvmf2x2hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvmf2x2hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvmf2x3hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvmf2x3hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvmf2x4hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvmf2x4hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvmf2x5hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvmf2x5hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvmf2x6hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvmf2x6hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvmf2x7hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvmf2x7hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvmf2x8hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvmf2x8hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm1x2sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm1x2sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm1x3sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm1x3sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm1x4sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm1x4sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm1x5sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm1x5sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm1x6sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm1x6sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm1x7sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm1x7sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm1x8sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm1x8sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm2x2dfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorervvm2x2dfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorervvm2x3dfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorervvm2x3dfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorervvm2x4dfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorervvm2x4dfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorervvmf4x2qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf4x2qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf4x3qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf4x3qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf4x4qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf4x4qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf4x5qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf4x5qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf4x6qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf4x6qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf4x7qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf4x7qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf4x8qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf4x8qirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf2x2hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf2x2hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf2x3hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf2x3hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf2x4hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf2x4hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf2x5hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf2x5hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf2x6hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf2x6hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf2x7hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf2x7hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf2x8hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf2x8hirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1x2sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1x2sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1x3sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1x3sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1x4sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1x4sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1x5sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1x5sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1x6sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1x6sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1x7sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1x7sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1x8sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1x8sirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm2x2dirvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvm2x2dirvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvm2x3dirvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvm2x3dirvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvm2x4dirvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvm2x4dirvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvmf2x2bfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf2x2bfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf2x3bfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf2x3bfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf2x4bfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf2x4bfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf2x5bfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf2x5bfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf2x6bfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf2x6bfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf2x7bfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf2x7bfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf2x8bfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvmf2x8bfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvmf2x2hfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf2x2hfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf2x3hfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf2x3hfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf2x4hfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf2x4hfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf2x5hfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf2x5hfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf2x6hfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf2x6hfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf2x7hfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf2x7hfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvmf2x8hfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvmf2x8hfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvm1x2sfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvm1x2sfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvm1x3sfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvm1x3sfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvm1x4sfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvm1x4sfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvm1x5sfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvm1x5sfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvm1x6sfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvm1x6sfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvm1x7sfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvm1x7sfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvm1x8sfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvm1x8sfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvm2x2dfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm2x2dfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm2x3dfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm2x3dfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm2x4dfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm2x4dfrvvm2di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvmf2x2qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x2qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x3qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x3qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x4qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x4qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x5qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x5qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x6qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x6qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x7qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x7qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x8qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x8qirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x2hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x2hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x3hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x3hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x4hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x4hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x5hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x5hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x6hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x6hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x7hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x7hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x8hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x8hirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x2sirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x2sirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x3sirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x3sirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x4sirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x4sirvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm4x2dirvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm4x2dirvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1x2bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1x2bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1x3bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1x3bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1x4bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1x4bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1x5bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1x5bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1x6bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1x6bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1x7bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1x7bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1x8bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1x8bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1x2hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm1x2hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm1x3hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm1x3hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm1x4hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm1x4hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm1x5hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm1x5hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm1x6hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm1x6hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm1x7hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm1x7hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm1x8hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm1x8hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm2x2sfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm2x2sfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm2x3sfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm2x3sfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm2x4sfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm2x4sfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm4x2dfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorervvm4x2dfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorervvmf2x2qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x2qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x3qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x3qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x4qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x4qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x5qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x5qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x6qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x6qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x7qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x7qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x8qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x8qirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x2hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x2hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x3hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x3hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x4hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x4hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x5hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x5hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x6hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x6hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x7hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x7hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x8hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x8hirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x2sirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x2sirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x3sirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x3sirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x4sirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x4sirvvm1hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm4x2dirvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm4x2dirvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1x2bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1x2bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1x3bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1x3bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1x4bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1x4bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1x5bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1x5bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1x6bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1x6bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1x7bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1x7bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1x8bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1x8bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1x2hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm1x2hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm1x3hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm1x3hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm1x4hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm1x4hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm1x5hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm1x5hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm1x6hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm1x6hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm1x7hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm1x7hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm1x8hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm1x8hfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm2x2sfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm2x2sfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm2x3sfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm2x3sfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm2x4sfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm2x4sfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm4x2dfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorervvm4x2dfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorervvmf2x2qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x2qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x3qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x3qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x4qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x4qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x5qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x5qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x6qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x6qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x7qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x7qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvmf2x8qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvmf2x8qirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x2hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x2hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x3hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x3hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x4hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x4hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x5hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x5hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x6hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x6hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x7hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x7hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x8hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x8hirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x2sirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x2sirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x3sirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x3sirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x4sirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x4sirvvm2si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm4x2dirvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ustorervvm4x2dirvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_indexed_ostorervvm1x2bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1x2bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1x3bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1x3bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1x4bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1x4bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1x5bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1x5bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1x6bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1x6bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1x7bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1x7bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1x8bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm1x8bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm1x2hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm1x2hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm1x3hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm1x3hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm1x4hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm1x4hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm1x5hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm1x5hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm1x6hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm1x6hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm1x7hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm1x7hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm1x8hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm1x8hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm2x2sfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm2x2sfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm2x3sfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm2x3sfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm2x4sfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm2x4sfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm4x2dfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ustorervvm4x2dfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_indexed_ostorervvmf2x2qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf2x2qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf2x3qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf2x3qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf2x4qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf2x4qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf2x5qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf2x5qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf2x6qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf2x6qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf2x7qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf2x7qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvmf2x8qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvmf2x8qirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1x2hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1x2hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1x3hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1x3hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1x4hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1x4hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1x5hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1x5hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1x6hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1x6hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1x7hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1x7hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1x8hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1x8hirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm2x2sirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm2x2sirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm2x3sirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm2x3sirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm2x4sirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm2x4sirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm4x2dirvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ustorervvm4x2dirvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_pred_indexed_ostorervvm1x2bfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvm1x2bfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvm1x3bfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvm1x3bfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvm1x4bfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvm1x4bfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvm1x5bfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvm1x5bfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvm1x6bfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvm1x6bfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvm1x7bfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvm1x7bfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvm1x8bfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvm1x8bfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvm1x2hfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvm1x2hfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvm1x3hfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvm1x3hfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvm1x4hfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvm1x4hfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvm1x5hfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvm1x5hfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvm1x6hfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvm1x6hfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvm1x7hfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvm1x7hfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvm1x8hfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvm1x8hfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvm2x2sfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvm2x2sfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvm2x3sfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvm2x3sfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvm2x4sfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvm2x4sfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvm4x2dfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ustorervvm4x2dfrvvm4di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_pred_indexed_ostorervvm1x2qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x2qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x2qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x2qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x2qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x2qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x2qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1x2qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1x3qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x3qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x3qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x3qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x3qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x3qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x3qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1x3qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1x4qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x4qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x4qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x4qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x4qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x4qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x4qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1x4qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1x5qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x5qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x5qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x5qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x5qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x5qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x5qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1x5qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1x6qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x6qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x6qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x6qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x6qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x6qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x6qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1x6qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1x7qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x7qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x7qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x7qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x7qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x7qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x7qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1x7qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm1x8qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x8qirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x8qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x8qirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x8qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm1x8qirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm1x8qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm1x8qirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm2x2hirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x2hirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x2hirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x2hirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x2hirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x2hirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x2hirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm2x2hirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm2x3hirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x3hirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x3hirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x3hirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x3hirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x3hirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x3hirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm2x3hirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm2x4hirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x4hirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x4hirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x4hirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x4hirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x4hirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x4hirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm2x4hirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm4x2sirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm4x2sirvvm1qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm4x2sirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm4x2sirvvm2hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm4x2sirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm4x2sirvvm4si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm4x2sirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ustorervvm4x2sirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_pred_indexed_ostorervvm2x2bfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm2x2bfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm2x2bfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm2x2bfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm2x2bfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm2x2bfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm2x2bfrvvm8di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvm2x2bfrvvm8di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvm2x3bfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm2x3bfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm2x3bfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm2x3bfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm2x3bfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm2x3bfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm2x3bfrvvm8di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvm2x3bfrvvm8di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvm2x4bfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm2x4bfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm2x4bfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm2x4bfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm2x4bfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm2x4bfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm2x4bfrvvm8di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ustorervvm2x4bfrvvm8di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_pred_indexed_ostorervvm2x2hfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm2x2hfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm2x2hfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm2x2hfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm2x2hfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm2x2hfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm2x2hfrvvm8di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvm2x2hfrvvm8di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvm2x3hfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm2x3hfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm2x3hfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm2x3hfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm2x3hfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm2x3hfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm2x3hfrvvm8di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvm2x3hfrvvm8di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvm2x4hfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm2x4hfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm2x4hfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm2x4hfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm2x4hfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm2x4hfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm2x4hfrvvm8di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ustorervvm2x4hfrvvm8di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_pred_indexed_ostorervvm4x2sfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm4x2sfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm4x2sfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm4x2sfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm4x2sfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ustorervvm4x2sfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_indexed_ostorervvm4x2sfrvvm8di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ustorervvm4x2sfrvvm8di ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64 && TARGET_64BIT) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_pred_indexed_ostorervvm2x2qirvvm2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x2qirvvm2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x2qirvvm4hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x2qirvvm4hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x2qirvvm8si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x2qirvvm8si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x3qirvvm2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x3qirvvm2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x3qirvvm4hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x3qirvvm4hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x3qirvvm8si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x3qirvvm8si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x4qirvvm2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x4qirvvm2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x4qirvvm4hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x4qirvvm4hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm2x4qirvvm8si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm2x4qirvvm8si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm4x2hirvvm2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm4x2hirvvm2qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm4x2hirvvm4hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm4x2hirvvm4hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm4x2hirvvm8si (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm4x2hirvvm8si (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm4x2bfrvvm2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm4x2bfrvvm2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm4x2bfrvvm4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm4x2bfrvvm4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm4x2bfrvvm8si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ustorervvm4x2bfrvvm8si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_indexed_ostorervvm4x2hfrvvm2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm4x2hfrvvm2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm4x2hfrvvm4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm4x2hfrvvm4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm4x2hfrvvm8si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ustorervvm4x2hfrvvm8si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_indexed_ostorervvm4x2qirvvm4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm4x2qirvvm4qi (TARGET_VECTOR)
#define HAVE_pred_indexed_ostorervvm4x2qirvvm8hi (TARGET_VECTOR)
#define HAVE_pred_indexed_ustorervvm4x2qirvvm8hi (TARGET_VECTOR)
#define HAVE_addrvvm8qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_subrvvm8qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_andrvvm8qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_iorrvvm8qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_xorrvvm8qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smaxrvvm8qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umaxrvvm8qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_sminrvvm8qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_uminrvvm8qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_mulrvvm8qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_divrvvm8qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_udivrvvm8qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_modrvvm8qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umodrvvm8qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_addrvvm4qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_subrvvm4qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_andrvvm4qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_iorrvvm4qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_xorrvvm4qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smaxrvvm4qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umaxrvvm4qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_sminrvvm4qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_uminrvvm4qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_mulrvvm4qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_divrvvm4qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_udivrvvm4qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_modrvvm4qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umodrvvm4qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_addrvvm2qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_subrvvm2qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_andrvvm2qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_iorrvvm2qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_xorrvvm2qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smaxrvvm2qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umaxrvvm2qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_sminrvvm2qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_uminrvvm2qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_mulrvvm2qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_divrvvm2qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_udivrvvm2qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_modrvvm2qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umodrvvm2qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_addrvvm1qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_subrvvm1qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_andrvvm1qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_iorrvvm1qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_xorrvvm1qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smaxrvvm1qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umaxrvvm1qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_sminrvvm1qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_uminrvvm1qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_mulrvvm1qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_divrvvm1qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_udivrvvm1qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_modrvvm1qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umodrvvm1qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_addrvvm8hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_subrvvm8hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_andrvvm8hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_iorrvvm8hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_xorrvvm8hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smaxrvvm8hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umaxrvvm8hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_sminrvvm8hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_uminrvvm8hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_mulrvvm8hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_divrvvm8hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_udivrvvm8hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_modrvvm8hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umodrvvm8hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_addrvvm4hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_subrvvm4hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_andrvvm4hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_iorrvvm4hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_xorrvvm4hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smaxrvvm4hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umaxrvvm4hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_sminrvvm4hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_uminrvvm4hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_mulrvvm4hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_divrvvm4hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_udivrvvm4hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_modrvvm4hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umodrvvm4hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_addrvvm2hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_subrvvm2hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_andrvvm2hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_iorrvvm2hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_xorrvvm2hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smaxrvvm2hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umaxrvvm2hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_sminrvvm2hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_uminrvvm2hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_mulrvvm2hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_divrvvm2hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_udivrvvm2hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_modrvvm2hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umodrvvm2hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_addrvvm1hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_subrvvm1hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_andrvvm1hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_iorrvvm1hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_xorrvvm1hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smaxrvvm1hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umaxrvvm1hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_sminrvvm1hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_uminrvvm1hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_mulrvvm1hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_divrvvm1hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_udivrvvm1hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_modrvvm1hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umodrvvm1hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_addrvvm8si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_subrvvm8si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_andrvvm8si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_iorrvvm8si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_xorrvvm8si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smaxrvvm8si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umaxrvvm8si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_sminrvvm8si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_uminrvvm8si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_mulrvvm8si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_divrvvm8si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_udivrvvm8si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_modrvvm8si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umodrvvm8si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_addrvvm4si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_subrvvm4si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_andrvvm4si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_iorrvvm4si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_xorrvvm4si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smaxrvvm4si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umaxrvvm4si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_sminrvvm4si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_uminrvvm4si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_mulrvvm4si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_divrvvm4si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_udivrvvm4si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_modrvvm4si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umodrvvm4si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_addrvvm2si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_subrvvm2si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_andrvvm2si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_iorrvvm2si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_xorrvvm2si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smaxrvvm2si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umaxrvvm2si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_sminrvvm2si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_uminrvvm2si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_mulrvvm2si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_divrvvm2si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_udivrvvm2si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_modrvvm2si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umodrvvm2si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_addrvvm1si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_subrvvm1si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_andrvvm1si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_iorrvvm1si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_xorrvvm1si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smaxrvvm1si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umaxrvvm1si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_sminrvvm1si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_uminrvvm1si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_mulrvvm1si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_divrvvm1si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_udivrvvm1si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_modrvvm1si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umodrvvm1si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_addrvvm8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_subrvvm8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_andrvvm8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_iorrvvm8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_xorrvvm8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_smaxrvvm8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_umaxrvvm8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sminrvvm8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_uminrvvm8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mulrvvm8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_divrvvm8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_udivrvvm8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_modrvvm8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_umodrvvm8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_addrvvm4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_subrvvm4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_andrvvm4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_iorrvvm4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_xorrvvm4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_smaxrvvm4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_umaxrvvm4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sminrvvm4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_uminrvvm4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mulrvvm4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_divrvvm4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_udivrvvm4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_modrvvm4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_umodrvvm4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_addrvvm2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_subrvvm2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_andrvvm2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_iorrvvm2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_xorrvvm2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_smaxrvvm2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_umaxrvvm2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sminrvvm2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_uminrvvm2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mulrvvm2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_divrvvm2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_udivrvvm2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_modrvvm2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_umodrvvm2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_addrvvm1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_subrvvm1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_andrvvm1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_iorrvvm1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_xorrvvm1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_smaxrvvm1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_umaxrvvm1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sminrvvm1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_uminrvvm1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mulrvvm1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_divrvvm1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_udivrvvm1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_modrvvm1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_umodrvvm1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_addrvvmf2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_subrvvmf2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_andrvvmf2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_iorrvvmf2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_xorrvvmf2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_smaxrvvmf2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_umaxrvvmf2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_sminrvvmf2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_uminrvvmf2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_mulrvvmf2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_divrvvmf2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_udivrvvmf2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_modrvvmf2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_umodrvvmf2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_addrvvmf4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_subrvvmf4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_andrvvmf4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_iorrvvmf4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_xorrvvmf4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_smaxrvvmf4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_umaxrvvmf4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_sminrvvmf4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_uminrvvmf4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_mulrvvmf4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_divrvvmf4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_udivrvvmf4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_modrvvmf4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_umodrvvmf4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_addrvvmf8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_subrvvmf8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_andrvvmf8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_iorrvvmf8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_xorrvvmf8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_smaxrvvmf8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_umaxrvvmf8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_sminrvvmf8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_uminrvvmf8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_mulrvvmf8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_divrvvmf8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_udivrvvmf8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_modrvvmf8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_umodrvvmf8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_addrvvmf2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_subrvvmf2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_andrvvmf2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_iorrvvmf2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_xorrvvmf2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_smaxrvvmf2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_umaxrvvmf2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_sminrvvmf2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_uminrvvmf2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_mulrvvmf2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_divrvvmf2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_udivrvvmf2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_modrvvmf2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_umodrvvmf2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_addrvvmf4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_subrvvmf4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_andrvvmf4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_iorrvvmf4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_xorrvvmf4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_smaxrvvmf4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_umaxrvvmf4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_sminrvvmf4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_uminrvvmf4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_mulrvvmf4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_divrvvmf4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_udivrvvmf4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_modrvvmf4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_umodrvvmf4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_addrvvmf2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_subrvvmf2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_andrvvmf2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_iorrvvmf2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_xorrvvmf2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_smaxrvvmf2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_umaxrvvmf2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_sminrvvmf2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_uminrvvmf2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_mulrvvmf2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_divrvvmf2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_udivrvvmf2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_modrvvmf2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_umodrvvmf2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_addv1qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_subv1qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_andv1qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_iorv1qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_xorv1qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_smaxv1qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_umaxv1qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sminv1qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_uminv1qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_mulv1qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_divv1qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_udivv1qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_modv1qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_umodv1qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_addv2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_subv2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_andv2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_iorv2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_xorv2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_smaxv2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_umaxv2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sminv2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_uminv2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_mulv2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_divv2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_udivv2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_modv2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_umodv2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_addv4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_subv4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_andv4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_iorv4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_xorv4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_smaxv4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_umaxv4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sminv4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_uminv4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_mulv4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_divv4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_udivv4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_modv4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_umodv4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_addv8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_subv8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_andv8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_iorv8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_xorv8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_smaxv8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_umaxv8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sminv8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_uminv8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_mulv8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_divv8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_udivv8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_modv8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_umodv8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_addv16qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_subv16qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_andv16qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_iorv16qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_xorv16qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_smaxv16qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_umaxv16qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sminv16qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_uminv16qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_mulv16qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_divv16qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_udivv16qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_modv16qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_umodv16qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_addv32qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_subv32qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_andv32qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_iorv32qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_xorv32qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_smaxv32qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_umaxv32qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sminv32qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_uminv32qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_mulv32qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_divv32qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_udivv32qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_modv32qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_umodv32qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_addv64qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_subv64qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_andv64qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_iorv64qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_xorv64qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_smaxv64qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_umaxv64qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sminv64qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_uminv64qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mulv64qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_divv64qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_udivv64qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_modv64qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_umodv64qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_addv128qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_subv128qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_andv128qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_iorv128qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_xorv128qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_smaxv128qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_umaxv128qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sminv128qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_uminv128qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mulv128qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_divv128qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_udivv128qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_modv128qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_umodv128qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_addv256qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_subv256qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_andv256qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_iorv256qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_xorv256qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_smaxv256qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_umaxv256qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sminv256qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_uminv256qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mulv256qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_divv256qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_udivv256qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_modv256qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_umodv256qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_addv512qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_subv512qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_andv512qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_iorv512qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_xorv512qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_smaxv512qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_umaxv512qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sminv512qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_uminv512qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mulv512qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_divv512qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_udivv512qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_modv512qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_umodv512qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_addv1024qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_subv1024qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_andv1024qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_iorv1024qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_xorv1024qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_smaxv1024qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_umaxv1024qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sminv1024qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_uminv1024qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mulv1024qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_divv1024qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_udivv1024qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_modv1024qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_umodv1024qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_addv2048qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_subv2048qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_andv2048qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_iorv2048qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_xorv2048qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_smaxv2048qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_umaxv2048qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sminv2048qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_uminv2048qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mulv2048qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_divv2048qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_udivv2048qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_modv2048qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_umodv2048qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_addv4096qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_subv4096qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_andv4096qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_iorv4096qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_xorv4096qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_smaxv4096qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_umaxv4096qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sminv4096qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_uminv4096qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mulv4096qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_divv4096qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_udivv4096qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_modv4096qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_umodv4096qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_addv1hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_subv1hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_andv1hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_iorv1hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_xorv1hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_smaxv1hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_umaxv1hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sminv1hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_uminv1hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_mulv1hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_divv1hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_udivv1hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_modv1hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_umodv1hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_addv2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_subv2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_andv2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_iorv2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_xorv2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_smaxv2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_umaxv2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sminv2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_uminv2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_mulv2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_divv2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_udivv2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_modv2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_umodv2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_addv4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_subv4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_andv4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_iorv4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_xorv4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_smaxv4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_umaxv4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sminv4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_uminv4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_mulv4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_divv4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_udivv4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_modv4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_umodv4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_addv8hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_subv8hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_andv8hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_iorv8hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_xorv8hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_smaxv8hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_umaxv8hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sminv8hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_uminv8hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_mulv8hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_divv8hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_udivv8hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_modv8hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_umodv8hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_addv16hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_subv16hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_andv16hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_iorv16hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_xorv16hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_smaxv16hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_umaxv16hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sminv16hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_uminv16hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_mulv16hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_divv16hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_udivv16hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_modv16hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_umodv16hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_addv32hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_subv32hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_andv32hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_iorv32hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_xorv32hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_smaxv32hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_umaxv32hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sminv32hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_uminv32hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mulv32hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_divv32hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_udivv32hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_modv32hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_umodv32hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_addv64hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_subv64hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_andv64hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_iorv64hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_xorv64hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_smaxv64hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_umaxv64hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sminv64hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_uminv64hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mulv64hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_divv64hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_udivv64hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_modv64hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_umodv64hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_addv128hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_subv128hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_andv128hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_iorv128hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_xorv128hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_smaxv128hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_umaxv128hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sminv128hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_uminv128hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mulv128hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_divv128hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_udivv128hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_modv128hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_umodv128hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_addv256hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_subv256hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_andv256hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_iorv256hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_xorv256hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_smaxv256hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_umaxv256hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sminv256hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_uminv256hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mulv256hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_divv256hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_udivv256hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_modv256hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_umodv256hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_addv512hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_subv512hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_andv512hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_iorv512hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_xorv512hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_smaxv512hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_umaxv512hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sminv512hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_uminv512hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mulv512hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_divv512hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_udivv512hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_modv512hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_umodv512hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_addv1024hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_subv1024hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_andv1024hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_iorv1024hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_xorv1024hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_smaxv1024hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_umaxv1024hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sminv1024hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_uminv1024hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mulv1024hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_divv1024hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_udivv1024hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_modv1024hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_umodv1024hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_addv2048hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_subv2048hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_andv2048hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_iorv2048hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_xorv2048hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_smaxv2048hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_umaxv2048hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sminv2048hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_uminv2048hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mulv2048hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_divv2048hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_udivv2048hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_modv2048hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_umodv2048hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_addv1si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_subv1si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_andv1si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_iorv1si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_xorv1si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_smaxv1si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_umaxv1si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sminv1si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_uminv1si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_mulv1si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_divv1si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_udivv1si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_modv1si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_umodv1si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_addv2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_subv2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_andv2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_iorv2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_xorv2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_smaxv2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_umaxv2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sminv2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_uminv2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_mulv2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_divv2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_udivv2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_modv2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_umodv2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_addv4si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_subv4si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_andv4si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_iorv4si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_xorv4si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_smaxv4si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_umaxv4si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sminv4si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_uminv4si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_mulv4si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_divv4si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_udivv4si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_modv4si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_umodv4si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_addv8si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_subv8si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_andv8si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_iorv8si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_xorv8si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_smaxv8si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_umaxv8si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sminv8si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_uminv8si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_mulv8si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_divv8si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_udivv8si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_modv8si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_umodv8si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_addv16si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_subv16si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_andv16si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_iorv16si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_xorv16si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_smaxv16si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_umaxv16si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sminv16si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_uminv16si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mulv16si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_divv16si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_udivv16si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_modv16si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_umodv16si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_addv32si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_subv32si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_andv32si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_iorv32si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_xorv32si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_smaxv32si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_umaxv32si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sminv32si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_uminv32si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mulv32si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_divv32si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_udivv32si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_modv32si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_umodv32si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_addv64si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_subv64si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_andv64si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_iorv64si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_xorv64si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_smaxv64si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_umaxv64si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sminv64si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_uminv64si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mulv64si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_divv64si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_udivv64si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_modv64si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_umodv64si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_addv128si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_subv128si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_andv128si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_iorv128si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_xorv128si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_smaxv128si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_umaxv128si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sminv128si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_uminv128si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mulv128si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_divv128si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_udivv128si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_modv128si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_umodv128si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_addv256si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_subv256si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_andv256si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_iorv256si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_xorv256si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_smaxv256si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_umaxv256si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sminv256si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_uminv256si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mulv256si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_divv256si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_udivv256si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_modv256si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_umodv256si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_addv512si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_subv512si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_andv512si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_iorv512si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_xorv512si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_smaxv512si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_umaxv512si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sminv512si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_uminv512si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mulv512si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_divv512si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_udivv512si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_modv512si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_umodv512si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_addv1024si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_subv1024si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_andv1024si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_iorv1024si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_xorv1024si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_smaxv1024si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_umaxv1024si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sminv1024si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_uminv1024si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mulv1024si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_divv1024si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_udivv1024si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_modv1024si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_umodv1024si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_addv1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_subv1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_andv1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_iorv1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_xorv1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_smaxv1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_umaxv1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_sminv1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_uminv1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mulv1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_divv1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_udivv1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_modv1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_umodv1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_addv2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_subv2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_andv2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_iorv2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_xorv2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_smaxv2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_umaxv2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_sminv2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_uminv2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mulv2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_divv2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_udivv2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_modv2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_umodv2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_addv4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_subv4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_andv4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_iorv4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_xorv4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_smaxv4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_umaxv4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_sminv4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_uminv4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mulv4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_divv4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_udivv4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_modv4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_umodv4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_addv8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_subv8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_andv8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_iorv8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_xorv8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_smaxv8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_umaxv8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_sminv8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_uminv8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_mulv8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_divv8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_udivv8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_modv8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_umodv8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_addv16di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_subv16di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_andv16di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_iorv16di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_xorv16di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_smaxv16di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_umaxv16di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_sminv16di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_uminv16di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_mulv16di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_divv16di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_udivv16di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_modv16di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_umodv16di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_addv32di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_subv32di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_andv32di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_iorv32di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_xorv32di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_smaxv32di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_umaxv32di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_sminv32di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_uminv32di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_mulv32di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_divv32di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_udivv32di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_modv32di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_umodv32di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_addv64di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_subv64di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_andv64di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_iorv64di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_xorv64di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_smaxv64di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_umaxv64di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_sminv64di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_uminv64di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_mulv64di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_divv64di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_udivv64di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_modv64di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_umodv64di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_addv128di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_subv128di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_andv128di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_iorv128di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_xorv128di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_smaxv128di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_umaxv128di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_sminv128di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_uminv128di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mulv128di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_divv128di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_udivv128di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_modv128di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_umodv128di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_addv256di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_subv256di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_andv256di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_iorv256di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_xorv256di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_smaxv256di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_umaxv256di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_sminv256di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_uminv256di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mulv256di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_divv256di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_udivv256di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_modv256di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_umodv256di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_addv512di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_subv512di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_andv512di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_iorv512di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_xorv512di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_smaxv512di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_umaxv512di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_sminv512di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_uminv512di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mulv512di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_divv512di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_udivv512di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_modv512di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_umodv512di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_ashlrvvm8qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_ashrrvvm8qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_lshrrvvm8qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_ashlrvvm4qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_ashrrvvm4qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_lshrrvvm4qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_ashlrvvm2qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_ashrrvvm2qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_lshrrvvm2qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_ashlrvvm1qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_ashrrvvm1qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_lshrrvvm1qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_ashlrvvm8hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_ashrrvvm8hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_lshrrvvm8hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_ashlrvvm4hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_ashrrvvm4hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_lshrrvvm4hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_ashlrvvm2hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_ashrrvvm2hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_lshrrvvm2hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_ashlrvvm1hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_ashrrvvm1hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_lshrrvvm1hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_ashlrvvm8si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_ashrrvvm8si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_lshrrvvm8si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_ashlrvvm4si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_ashrrvvm4si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_lshrrvvm4si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_ashlrvvm2si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_ashrrvvm2si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_lshrrvvm2si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_ashlrvvm1si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_ashrrvvm1si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_lshrrvvm1si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_ashlrvvm8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ashrrvvm8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_lshrrvvm8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ashlrvvm4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ashrrvvm4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_lshrrvvm4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ashlrvvm2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ashrrvvm2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_lshrrvvm2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ashlrvvm1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ashrrvvm1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_lshrrvvm1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ashlrvvmf2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_ashrrvvmf2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_lshrrvvmf2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_ashlrvvmf4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_ashrrvvmf4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_lshrrvvmf4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_ashlrvvmf8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_ashrrvvmf8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_lshrrvvmf8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_ashlrvvmf2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_ashrrvvmf2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_lshrrvvmf2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_ashlrvvmf4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_ashrrvvmf4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_lshrrvvmf4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_ashlrvvmf2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_ashrrvvmf2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_lshrrvvmf2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_ashlv1qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_ashrv1qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_lshrv1qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_ashlv2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_ashrv2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_lshrv2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_ashlv4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_ashrv4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_lshrv4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_ashlv8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_ashrv8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_lshrv8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_ashlv16qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_ashrv16qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_lshrv16qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_ashlv32qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_ashrv32qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_lshrv32qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_ashlv64qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_ashrv64qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_lshrv64qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_ashlv128qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_ashrv128qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_lshrv128qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_ashlv256qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_ashrv256qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_lshrv256qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_ashlv512qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_ashrv512qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_lshrv512qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_ashlv1024qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_ashrv1024qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_lshrv1024qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_ashlv2048qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_ashrv2048qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_lshrv2048qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_ashlv4096qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_ashrv4096qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_lshrv4096qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_ashlv1hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_ashrv1hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_lshrv1hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_ashlv2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_ashrv2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_lshrv2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_ashlv4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_ashrv4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_lshrv4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_ashlv8hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_ashrv8hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_lshrv8hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_ashlv16hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_ashrv16hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_lshrv16hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_ashlv32hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_ashrv32hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_lshrv32hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_ashlv64hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_ashrv64hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_lshrv64hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_ashlv128hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_ashrv128hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_lshrv128hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_ashlv256hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_ashrv256hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_lshrv256hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_ashlv512hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_ashrv512hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_lshrv512hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_ashlv1024hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_ashrv1024hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_lshrv1024hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_ashlv2048hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_ashrv2048hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_lshrv2048hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_ashlv1si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_ashrv1si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_lshrv1si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_ashlv2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_ashrv2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_lshrv2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_ashlv4si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_ashrv4si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_lshrv4si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_ashlv8si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_ashrv8si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_lshrv8si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_ashlv16si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_ashrv16si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_lshrv16si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_ashlv32si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_ashrv32si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_lshrv32si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_ashlv64si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_ashrv64si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_lshrv64si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_ashlv128si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_ashrv128si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_lshrv128si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_ashlv256si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_ashrv256si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_lshrv256si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_ashlv512si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_ashrv512si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_lshrv512si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_ashlv1024si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_ashrv1024si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_lshrv1024si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_ashlv1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_ashrv1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_lshrv1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_ashlv2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_ashrv2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_lshrv2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_ashlv4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_ashrv4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_lshrv4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_ashlv8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_ashrv8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_lshrv8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_ashlv16di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_ashrv16di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_lshrv16di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_ashlv32di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_ashrv32di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_lshrv32di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_ashlv64di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_ashrv64di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_lshrv64di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_ashlv128di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_ashrv128di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_lshrv128di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_ashlv256di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_ashrv256di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_lshrv256di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_ashlv512di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_ashrv512di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_lshrv512di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vashlrvvm8qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vashrrvvm8qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vlshrrvvm8qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vashlrvvm4qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vashrrvvm4qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vlshrrvvm4qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vashlrvvm2qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vashrrvvm2qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vlshrrvvm2qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vashlrvvm1qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vashrrvvm1qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vlshrrvvm1qi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vashlrvvm8hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vashrrvvm8hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vlshrrvvm8hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vashlrvvm4hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vashrrvvm4hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vlshrrvvm4hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vashlrvvm2hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vashrrvvm2hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vlshrrvvm2hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vashlrvvm1hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vashrrvvm1hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vlshrrvvm1hi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vashlrvvm8si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vashrrvvm8si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vlshrrvvm8si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vashlrvvm4si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vashrrvvm4si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vlshrrvvm4si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vashlrvvm2si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vashrrvvm2si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vlshrrvvm2si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vashlrvvm1si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vashrrvvm1si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vlshrrvvm1si3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vashlrvvm8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vashrrvvm8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vlshrrvvm8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vashlrvvm4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vashrrvvm4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vlshrrvvm4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vashlrvvm2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vashrrvvm2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vlshrrvvm2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vashlrvvm1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vashrrvvm1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vlshrrvvm1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vashlrvvmf2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_vashrrvvmf2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_vlshrrvvmf2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_vashlrvvmf4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_vashrrvvmf4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_vlshrrvvmf4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_vashlrvvmf8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vashrrvvmf8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vlshrrvvmf8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vashlrvvmf2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_vashrrvvmf2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_vlshrrvvmf2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_vashlrvvmf4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vashrrvvmf4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vlshrrvvmf4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vashlrvvmf2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vashrrvvmf2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vlshrrvvmf2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vashlv1qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_vashrv1qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_vlshrv1qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_vashlv2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_vashrv2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_vlshrv2qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_vashlv4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_vashrv4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_vlshrv4qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_vashlv8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_vashrv8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_vlshrv8qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_vashlv16qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_vashrv16qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_vlshrv16qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_vashlv32qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_vashrv32qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_vlshrv32qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_vashlv64qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vashrv64qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vlshrv64qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vashlv128qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vashrv128qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vlshrv128qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vashlv256qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vashrv256qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vlshrv256qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vashlv512qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vashrv512qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vlshrv512qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vashlv1024qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vashrv1024qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vlshrv1024qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vashlv2048qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vashrv2048qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vlshrv2048qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vashlv4096qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vashrv4096qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vlshrv4096qi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vashlv1hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_vashrv1hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_vlshrv1hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_vashlv2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_vashrv2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_vlshrv2hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_vashlv4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_vashrv4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_vlshrv4hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_vashlv8hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_vashrv8hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_vlshrv8hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_vashlv16hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_vashrv16hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_vlshrv16hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_vashlv32hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vashrv32hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vlshrv32hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vashlv64hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vashrv64hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vlshrv64hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vashlv128hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vashrv128hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vlshrv128hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vashlv256hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vashrv256hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vlshrv256hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vashlv512hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vashrv512hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vlshrv512hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vashlv1024hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vashrv1024hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vlshrv1024hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vashlv2048hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vashrv2048hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vlshrv2048hi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vashlv1si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_vashrv1si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_vlshrv1si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_vashlv2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_vashrv2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_vlshrv2si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_vashlv4si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_vashrv4si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_vlshrv4si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_vashlv8si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_vashrv8si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_vlshrv8si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_vashlv16si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vashrv16si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vlshrv16si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vashlv32si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vashrv32si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vlshrv32si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vashlv64si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vashrv64si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vlshrv64si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vashlv128si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vashrv128si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vlshrv128si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vashlv256si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vashrv256si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vlshrv256si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vashlv512si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vashrv512si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vlshrv512si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vashlv1024si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vashrv1024si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vlshrv1024si3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vashlv1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vashrv1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vlshrv1di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vashlv2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vashrv2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vlshrv2di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vashlv4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vashrv4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vlshrv4di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vashlv8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vashrv8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vlshrv8di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vashlv16di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vashrv16di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vlshrv16di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vashlv32di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vashrv32di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vlshrv32di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vashlv64di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vashrv64di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vlshrv64di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vashlv128di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vashrv128di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vlshrv128di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vashlv256di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vashrv256di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vlshrv256di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vashlv512di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vashrv512di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vlshrv512di3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_andrvvmf64bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_iorrvvmf64bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_xorrvvmf64bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_andrvvmf32bi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_iorrvvmf32bi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_xorrvvmf32bi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_andrvvmf16bi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_iorrvvmf16bi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_xorrvvmf16bi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_andrvvmf8bi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_iorrvvmf8bi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_xorrvvmf8bi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_andrvvmf4bi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_iorrvvmf4bi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_xorrvvmf4bi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_andrvvmf2bi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_iorrvvmf2bi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_xorrvvmf2bi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_andrvvm1bi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_iorrvvm1bi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_xorrvvm1bi3 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_andv1bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_iorv1bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_xorv1bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_andv2bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_iorv2bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_xorv2bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_andv4bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_iorv4bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_xorv4bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_andv8bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_iorv8bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_xorv8bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_andv16bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_iorv16bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_xorv16bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_andv32bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_iorv32bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_xorv32bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_andv64bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_iorv64bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_xorv64bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_andv128bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_iorv128bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_xorv128bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_andv256bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_iorv256bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_xorv256bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_andv512bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_iorv512bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_xorv512bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_andv1024bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_iorv1024bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_xorv1024bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_andv2048bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_iorv2048bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_xorv2048bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_andv4096bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_iorv4096bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_xorv4096bi3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_one_cmplrvvmf64bi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_one_cmplrvvmf32bi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_one_cmplrvvmf16bi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_one_cmplrvvmf8bi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_one_cmplrvvmf4bi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_one_cmplrvvmf2bi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_one_cmplrvvm1bi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_one_cmplv1bi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_one_cmplv2bi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_one_cmplv4bi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_one_cmplv8bi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_one_cmplv16bi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_one_cmplv32bi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_one_cmplv64bi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_one_cmplv128bi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_one_cmplv256bi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_one_cmplv512bi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_one_cmplv1024bi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_one_cmplv2048bi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_one_cmplv4096bi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vcond_mask_rvvm8qirvvm1bi (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vcond_mask_rvvm4qirvvmf2bi (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vcond_mask_rvvm2qirvvmf4bi (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vcond_mask_rvvm1qirvvmf8bi (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vcond_mask_rvvm8hirvvmf2bi (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vcond_mask_rvvm4hirvvmf4bi (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vcond_mask_rvvm2hirvvmf8bi (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vcond_mask_rvvm1hirvvmf16bi (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vcond_mask_rvvm8sirvvmf4bi (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vcond_mask_rvvm4sirvvmf8bi (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vcond_mask_rvvm2sirvvmf16bi (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vcond_mask_rvvm1sirvvmf32bi (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_vcond_mask_rvvm8dirvvmf8bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vcond_mask_rvvm4dirvvmf16bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vcond_mask_rvvm2dirvvmf32bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vcond_mask_rvvm1dirvvmf64bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vcond_mask_rvvmf2qirvvmf16bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_vcond_mask_rvvmf4qirvvmf32bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_vcond_mask_rvvmf8qirvvmf64bi ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vcond_mask_rvvmf2hirvvmf32bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_vcond_mask_rvvmf4hirvvmf64bi ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vcond_mask_rvvmf2sirvvmf64bi ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vcond_mask_rvvm8hfrvvmf2bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vcond_mask_rvvm4hfrvvmf4bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vcond_mask_rvvm2hfrvvmf8bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vcond_mask_rvvm1hfrvvmf16bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vcond_mask_rvvmf2hfrvvmf32bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vcond_mask_rvvmf4hfrvvmf64bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_vcond_mask_rvvm8sfrvvmf4bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vcond_mask_rvvm4sfrvvmf8bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vcond_mask_rvvm2sfrvvmf16bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vcond_mask_rvvm1sfrvvmf32bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vcond_mask_rvvmf2sfrvvmf64bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_vcond_mask_rvvm8dfrvvmf8bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vcond_mask_rvvm4dfrvvmf16bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vcond_mask_rvvm2dfrvvmf32bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vcond_mask_rvvm1dfrvvmf64bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vcond_mask_rvvm8bfrvvmf2bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vcond_mask_rvvm4bfrvvmf4bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vcond_mask_rvvm2bfrvvmf8bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vcond_mask_rvvm1bfrvvmf16bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vcond_mask_rvvmf2bfrvvmf32bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vcond_mask_rvvmf4bfrvvmf64bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_vcond_mask_v1qiv1bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_vcond_mask_v2qiv2bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_vcond_mask_v4qiv4bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_vcond_mask_v8qiv8bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_vcond_mask_v16qiv16bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_vcond_mask_v32qiv32bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_vcond_mask_v64qiv64bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vcond_mask_v128qiv128bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vcond_mask_v256qiv256bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vcond_mask_v512qiv512bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vcond_mask_v1024qiv1024bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vcond_mask_v2048qiv2048bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vcond_mask_v4096qiv4096bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vcond_mask_v1hiv1bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_vcond_mask_v2hiv2bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_vcond_mask_v4hiv4bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_vcond_mask_v8hiv8bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_vcond_mask_v16hiv16bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_vcond_mask_v32hiv32bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vcond_mask_v64hiv64bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vcond_mask_v128hiv128bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vcond_mask_v256hiv256bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vcond_mask_v512hiv512bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vcond_mask_v1024hiv1024bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vcond_mask_v2048hiv2048bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vcond_mask_v1siv1bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_vcond_mask_v2siv2bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_vcond_mask_v4siv4bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_vcond_mask_v8siv8bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_vcond_mask_v16siv16bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vcond_mask_v32siv32bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vcond_mask_v64siv64bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vcond_mask_v128siv128bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vcond_mask_v256siv256bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vcond_mask_v512siv512bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vcond_mask_v1024siv1024bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vcond_mask_v1div1bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vcond_mask_v2div2bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vcond_mask_v4div4bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vcond_mask_v8div8bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vcond_mask_v16div16bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vcond_mask_v32div32bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vcond_mask_v64div64bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vcond_mask_v128div128bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vcond_mask_v256div256bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vcond_mask_v512div512bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vcond_mask_v1hfv1bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vcond_mask_v2hfv2bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vcond_mask_v4hfv4bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vcond_mask_v8hfv8bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vcond_mask_v16hfv16bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vcond_mask_v32hfv32bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_vcond_mask_v64hfv64bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_vcond_mask_v128hfv128bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_vcond_mask_v256hfv256bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_vcond_mask_v512hfv512bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vcond_mask_v1024hfv1024bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vcond_mask_v2048hfv2048bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vcond_mask_v1sfv1bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vcond_mask_v2sfv2bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vcond_mask_v4sfv4bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vcond_mask_v8sfv8bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vcond_mask_v16sfv16bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_vcond_mask_v32sfv32bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_vcond_mask_v64sfv64bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_vcond_mask_v128sfv128bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_vcond_mask_v256sfv256bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vcond_mask_v512sfv512bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vcond_mask_v1024sfv1024bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vcond_mask_v1dfv1bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vcond_mask_v2dfv2bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vcond_mask_v4dfv4bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vcond_mask_v8dfv8bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vcond_mask_v16dfv16bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vcond_mask_v32dfv32bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vcond_mask_v64dfv64bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vcond_mask_v128dfv128bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vcond_mask_v256dfv256bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vcond_mask_v512dfv512bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vcond_mask_v1bfv1bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vcond_mask_v2bfv2bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vcond_mask_v4bfv4bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vcond_mask_v8bfv8bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vcond_mask_v16bfv16bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vcond_mask_v32bfv32bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_vcond_mask_v64bfv64bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_vcond_mask_v128bfv128bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_vcond_mask_v256bfv256bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_vcond_mask_v512bfv512bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vcond_mask_v1024bfv1024bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vcond_mask_v2048bfv2048bi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_extendrvvm4qirvvm8hi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_zero_extendrvvm4qirvvm8hi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_extendrvvm2qirvvm4hi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_zero_extendrvvm2qirvvm4hi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_extendrvvm1qirvvm2hi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_zero_extendrvvm1qirvvm2hi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_extendrvvmf2qirvvm1hi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_zero_extendrvvmf2qirvvm1hi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_extendrvvmf4qirvvmf2hi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_zero_extendrvvmf4qirvvmf2hi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_extendrvvmf8qirvvmf4hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_zero_extendrvvmf8qirvvmf4hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_extendrvvm4hirvvm8si2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_zero_extendrvvm4hirvvm8si2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_extendrvvm2hirvvm4si2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_zero_extendrvvm2hirvvm4si2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_extendrvvm1hirvvm2si2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_zero_extendrvvm1hirvvm2si2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_extendrvvmf2hirvvm1si2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_zero_extendrvvmf2hirvvm1si2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_extendrvvmf4hirvvmf2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_zero_extendrvvmf4hirvvmf2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_extendrvvm4sirvvm8di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_zero_extendrvvm4sirvvm8di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_extendrvvm2sirvvm4di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_zero_extendrvvm2sirvvm4di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_extendrvvm1sirvvm2di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_zero_extendrvvm1sirvvm2di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_extendrvvmf2sirvvm1di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_zero_extendrvvmf2sirvvm1di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_extendv1qiv1hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_zero_extendv1qiv1hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_extendv2qiv2hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_zero_extendv2qiv2hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_extendv4qiv4hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_zero_extendv4qiv4hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_extendv8qiv8hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_zero_extendv8qiv8hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_extendv16qiv16hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_zero_extendv16qiv16hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_extendv32qiv32hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_zero_extendv32qiv32hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_extendv64qiv64hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_zero_extendv64qiv64hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_extendv128qiv128hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_zero_extendv128qiv128hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_extendv256qiv256hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_zero_extendv256qiv256hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_extendv512qiv512hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_zero_extendv512qiv512hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_extendv1024qiv1024hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_zero_extendv1024qiv1024hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_extendv2048qiv2048hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_zero_extendv2048qiv2048hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_extendv1hiv1si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_zero_extendv1hiv1si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_extendv2hiv2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_zero_extendv2hiv2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_extendv4hiv4si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_zero_extendv4hiv4si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_extendv8hiv8si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_zero_extendv8hiv8si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_extendv16hiv16si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_zero_extendv16hiv16si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_extendv32hiv32si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_zero_extendv32hiv32si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_extendv64hiv64si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_zero_extendv64hiv64si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_extendv128hiv128si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_zero_extendv128hiv128si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_extendv256hiv256si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_zero_extendv256hiv256si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_extendv512hiv512si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_zero_extendv512hiv512si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_extendv1024hiv1024si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_zero_extendv1024hiv1024si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_extendv1siv1di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_zero_extendv1siv1di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_extendv2siv2di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_zero_extendv2siv2di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_extendv4siv4di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_zero_extendv4siv4di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_extendv8siv8di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_zero_extendv8siv8di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_extendv16siv16di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_zero_extendv16siv16di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_extendv32siv32di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_zero_extendv32siv32di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_extendv64siv64di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_zero_extendv64siv64di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_extendv128siv128di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_zero_extendv128siv128di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_extendv256siv256di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_zero_extendv256siv256di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_extendv512siv512di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_zero_extendv512siv512di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_extendrvvm2qirvvm8si2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_zero_extendrvvm2qirvvm8si2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_extendrvvm1qirvvm4si2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_zero_extendrvvm1qirvvm4si2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_extendrvvmf2qirvvm2si2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_zero_extendrvvmf2qirvvm2si2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_extendrvvmf4qirvvm1si2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_zero_extendrvvmf4qirvvm1si2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_extendrvvmf8qirvvmf2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_zero_extendrvvmf8qirvvmf2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_extendrvvm2hirvvm8di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_zero_extendrvvm2hirvvm8di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_extendrvvm1hirvvm4di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_zero_extendrvvm1hirvvm4di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_extendrvvmf2hirvvm2di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_zero_extendrvvmf2hirvvm2di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_extendrvvmf4hirvvm1di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_zero_extendrvvmf4hirvvm1di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_extendv1qiv1si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_zero_extendv1qiv1si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_extendv2qiv2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_zero_extendv2qiv2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_extendv4qiv4si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_zero_extendv4qiv4si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_extendv8qiv8si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_zero_extendv8qiv8si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_extendv16qiv16si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_zero_extendv16qiv16si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_extendv32qiv32si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_zero_extendv32qiv32si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_extendv64qiv64si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_zero_extendv64qiv64si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_extendv128qiv128si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_zero_extendv128qiv128si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_extendv256qiv256si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_zero_extendv256qiv256si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_extendv512qiv512si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_zero_extendv512qiv512si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_extendv1024qiv1024si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_zero_extendv1024qiv1024si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_extendv1hiv1di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_zero_extendv1hiv1di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_extendv2hiv2di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_zero_extendv2hiv2di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_extendv4hiv4di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_zero_extendv4hiv4di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_extendv8hiv8di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_zero_extendv8hiv8di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_extendv16hiv16di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_zero_extendv16hiv16di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_extendv32hiv32di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_zero_extendv32hiv32di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_extendv64hiv64di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_zero_extendv64hiv64di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_extendv128hiv128di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_zero_extendv128hiv128di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_extendv256hiv256di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_zero_extendv256hiv256di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_extendv512hiv512di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_zero_extendv512hiv512di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_extendrvvm1qirvvm8di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_zero_extendrvvm1qirvvm8di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_extendrvvmf2qirvvm4di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_zero_extendrvvmf2qirvvm4di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_extendrvvmf4qirvvm2di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_zero_extendrvvmf4qirvvm2di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_extendrvvmf8qirvvm1di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_zero_extendrvvmf8qirvvm1di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_extendv1qiv1di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_zero_extendv1qiv1di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_extendv2qiv2di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_zero_extendv2qiv2di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_extendv4qiv4di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_zero_extendv4qiv4di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_extendv8qiv8di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_zero_extendv8qiv8di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_extendv16qiv16di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_zero_extendv16qiv16di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_extendv32qiv32di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_zero_extendv32qiv32di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_extendv64qiv64di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_zero_extendv64qiv64di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_extendv128qiv128di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_zero_extendv128qiv128di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_extendv256qiv256di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_zero_extendv256qiv256di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_extendv512qiv512di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_zero_extendv512qiv512di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_truncrvvm8hirvvm4qi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_truncrvvm4hirvvm2qi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_truncrvvm2hirvvm1qi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_truncrvvm1hirvvmf2qi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_truncrvvmf2hirvvmf4qi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_truncrvvmf4hirvvmf8qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_truncrvvm8sirvvm4hi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_truncrvvm4sirvvm2hi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_truncrvvm2sirvvm1hi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_truncrvvm1sirvvmf2hi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_truncrvvmf2sirvvmf4hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_truncrvvm8dirvvm4si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_truncrvvm4dirvvm2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_truncrvvm2dirvvm1si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_truncrvvm1dirvvmf2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_truncv1hiv1qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_truncv2hiv2qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_truncv4hiv4qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_truncv8hiv8qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_truncv16hiv16qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_truncv32hiv32qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_truncv64hiv64qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_truncv128hiv128qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_truncv256hiv256qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_truncv512hiv512qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_truncv1024hiv1024qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_truncv2048hiv2048qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_truncv1siv1hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_truncv2siv2hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_truncv4siv4hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_truncv8siv8hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_truncv16siv16hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_truncv32siv32hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_truncv64siv64hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_truncv128siv128hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_truncv256siv256hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_truncv512siv512hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_truncv1024siv1024hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_truncv1div1si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_truncv2div2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_truncv4div4si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_truncv8div8si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_truncv16div16si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_truncv32div32si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_truncv64div64si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_truncv128div128si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_truncv256div256si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_truncv512div512si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_extendrvvm4hfrvvm8sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_extendrvvm2hfrvvm4sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_extendrvvm1hfrvvm2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_extendrvvmf2hfrvvm1sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_extendrvvmf4hfrvvmf2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_extendrvvm4sfrvvm8df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_extendrvvm2sfrvvm4df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_extendrvvm1sfrvvm2df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_extendrvvmf2sfrvvm1df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_extendv1hfv1sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_extendv2hfv2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_extendv4hfv4sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_extendv8hfv8sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_extendv16hfv16sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_extendv32hfv32sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_extendv64hfv64sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_extendv128hfv128sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_extendv256hfv256sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_extendv512hfv512sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_extendv1024hfv1024sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_extendv1sfv1df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_extendv2sfv2df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_extendv4sfv4df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_extendv8sfv8df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_extendv16sfv16df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_extendv32sfv32df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_extendv64sfv64df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_extendv128sfv128df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_extendv256sfv256df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_extendv512sfv512df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_truncrvvm8sfrvvm4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_truncrvvm4sfrvvm2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_truncrvvm2sfrvvm1hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_truncrvvm1sfrvvmf2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_truncrvvmf2sfrvvmf4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_truncrvvm8dfrvvm4sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_truncrvvm4dfrvvm2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_truncrvvm2dfrvvm1sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_truncrvvm1dfrvvmf2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_truncv1sfv1hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_truncv2sfv2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_truncv4sfv4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_truncv8sfv8hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_truncv16sfv16hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_truncv32sfv32hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_truncv64sfv64hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_truncv128sfv128hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_truncv256sfv256hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_truncv512sfv512hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_truncv1024sfv1024hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_truncv1dfv1sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_truncv2dfv2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_truncv4dfv4sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_truncv8dfv8sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_truncv16dfv16sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_truncv32dfv32sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_truncv64dfv64sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_truncv128dfv128sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_truncv256dfv256sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_truncv512dfv512sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fix_truncrvvm8hfrvvm8hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fixuns_truncrvvm8hfrvvm8hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fix_truncrvvm4hfrvvm4hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fixuns_truncrvvm4hfrvvm4hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fix_truncrvvm2hfrvvm2hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fixuns_truncrvvm2hfrvvm2hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fix_truncrvvm1hfrvvm1hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fixuns_truncrvvm1hfrvvm1hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fix_truncrvvmf2hfrvvmf2hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fixuns_truncrvvmf2hfrvvmf2hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fix_truncrvvmf4hfrvvmf4hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_fixuns_truncrvvmf4hfrvvmf4hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_fix_truncrvvm8sfrvvm8si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fixuns_truncrvvm8sfrvvm8si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fix_truncrvvm4sfrvvm4si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fixuns_truncrvvm4sfrvvm4si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fix_truncrvvm2sfrvvm2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fixuns_truncrvvm2sfrvvm2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fix_truncrvvm1sfrvvm1si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fixuns_truncrvvm1sfrvvm1si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fix_truncrvvmf2sfrvvmf2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_fixuns_truncrvvmf2sfrvvmf2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_fix_truncrvvm8dfrvvm8di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fixuns_truncrvvm8dfrvvm8di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fix_truncrvvm4dfrvvm4di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fixuns_truncrvvm4dfrvvm4di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fix_truncrvvm2dfrvvm2di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fixuns_truncrvvm2dfrvvm2di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fix_truncrvvm1dfrvvm1di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fixuns_truncrvvm1dfrvvm1di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fix_truncv1hfv1hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_fixuns_truncv1hfv1hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_fix_truncv2hfv2hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_fixuns_truncv2hfv2hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_fix_truncv4hfv4hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_fixuns_truncv4hfv4hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_fix_truncv8hfv8hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_fixuns_truncv8hfv8hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_fix_truncv16hfv16hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_fixuns_truncv16hfv16hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_fix_truncv32hfv32hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_fixuns_truncv32hfv32hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_fix_truncv64hfv64hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_fixuns_truncv64hfv64hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_fix_truncv128hfv128hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_fixuns_truncv128hfv128hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_fix_truncv256hfv256hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_fixuns_truncv256hfv256hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_fix_truncv512hfv512hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_fixuns_truncv512hfv512hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_fix_truncv1024hfv1024hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_fixuns_truncv1024hfv1024hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_fix_truncv2048hfv2048hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_fixuns_truncv2048hfv2048hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_fix_truncv1sfv1si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fixuns_truncv1sfv1si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fix_truncv2sfv2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fixuns_truncv2sfv2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fix_truncv4sfv4si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fixuns_truncv4sfv4si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fix_truncv8sfv8si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fixuns_truncv8sfv8si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fix_truncv16sfv16si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_fixuns_truncv16sfv16si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_fix_truncv32sfv32si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_fixuns_truncv32sfv32si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_fix_truncv64sfv64si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_fixuns_truncv64sfv64si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_fix_truncv128sfv128si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_fixuns_truncv128sfv128si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_fix_truncv256sfv256si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fixuns_truncv256sfv256si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fix_truncv512sfv512si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fixuns_truncv512sfv512si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fix_truncv1024sfv1024si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fixuns_truncv1024sfv1024si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fix_truncv1dfv1di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fixuns_truncv1dfv1di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fix_truncv2dfv2di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fixuns_truncv2dfv2di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fix_truncv4dfv4di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fixuns_truncv4dfv4di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fix_truncv8dfv8di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_fixuns_truncv8dfv8di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_fix_truncv16dfv16di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_fixuns_truncv16dfv16di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_fix_truncv32dfv32di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_fixuns_truncv32dfv32di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_fix_truncv64dfv64di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_fixuns_truncv64dfv64di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_fix_truncv128dfv128di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fixuns_truncv128dfv128di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fix_truncv256dfv256di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fixuns_truncv256dfv256di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fix_truncv512dfv512di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fixuns_truncv512dfv512di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_floatrvvm8hirvvm8hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatunsrvvm8hirvvm8hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatrvvm4hirvvm4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatunsrvvm4hirvvm4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatrvvm2hirvvm2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatunsrvvm2hirvvm2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatrvvm1hirvvm1hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatunsrvvm1hirvvm1hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatrvvmf2hirvvmf2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatunsrvvmf2hirvvmf2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatrvvmf4hirvvmf4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_floatunsrvvmf4hirvvmf4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_floatrvvm8sirvvm8sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatunsrvvm8sirvvm8sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatrvvm4sirvvm4sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatunsrvvm4sirvvm4sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatrvvm2sirvvm2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatunsrvvm2sirvvm2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatrvvm1sirvvm1sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatunsrvvm1sirvvm1sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatrvvmf2sirvvmf2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_floatunsrvvmf2sirvvmf2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_floatrvvm8dirvvm8df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatunsrvvm8dirvvm8df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatrvvm4dirvvm4df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatunsrvvm4dirvvm4df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatrvvm2dirvvm2df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatunsrvvm2dirvvm2df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatrvvm1dirvvm1df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatunsrvvm1dirvvm1df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatv1hiv1hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_floatunsv1hiv1hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_floatv2hiv2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_floatunsv2hiv2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_floatv4hiv4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_floatunsv4hiv4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_floatv8hiv8hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_floatunsv8hiv8hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_floatv16hiv16hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_floatunsv16hiv16hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_floatv32hiv32hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_floatunsv32hiv32hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_floatv64hiv64hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_floatunsv64hiv64hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_floatv128hiv128hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_floatunsv128hiv128hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_floatv256hiv256hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_floatunsv256hiv256hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_floatv512hiv512hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_floatunsv512hiv512hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_floatv1024hiv1024hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_floatunsv1024hiv1024hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_floatv2048hiv2048hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_floatunsv2048hiv2048hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_floatv1siv1sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatunsv1siv1sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatv2siv2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatunsv2siv2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatv4siv4sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatunsv4siv4sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatv8siv8sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatunsv8siv8sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatv16siv16sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_floatunsv16siv16sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_floatv32siv32sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_floatunsv32siv32sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_floatv64siv64sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_floatunsv64siv64sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_floatv128siv128sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_floatunsv128siv128sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_floatv256siv256sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_floatunsv256siv256sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_floatv512siv512sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_floatunsv512siv512sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_floatv1024siv1024sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_floatunsv1024siv1024sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_floatv1div1df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatunsv1div1df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatv2div2df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatunsv2div2df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatv4div4df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatunsv4div4df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatv8div8df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_floatunsv8div8df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_floatv16div16df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_floatunsv16div16df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_floatv32div32df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_floatunsv32div32df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_floatv64div64df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_floatunsv64div64df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_floatv128div128df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_floatunsv128div128df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_floatv256div256df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_floatunsv256div256df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_floatv512div512df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_floatunsv512div512df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fix_truncrvvm4hfrvvm8si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fixuns_truncrvvm4hfrvvm8si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fix_truncrvvm2hfrvvm4si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fixuns_truncrvvm2hfrvvm4si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fix_truncrvvm1hfrvvm2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fixuns_truncrvvm1hfrvvm2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fix_truncrvvmf2hfrvvm1si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fixuns_truncrvvmf2hfrvvm1si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fix_truncrvvmf4hfrvvmf2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fixuns_truncrvvmf4hfrvvmf2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fix_truncrvvm4sfrvvm8di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fixuns_truncrvvm4sfrvvm8di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fix_truncrvvm2sfrvvm4di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fixuns_truncrvvm2sfrvvm4di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fix_truncrvvm1sfrvvm2di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fixuns_truncrvvm1sfrvvm2di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fix_truncrvvmf2sfrvvm1di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fixuns_truncrvvmf2sfrvvm1di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fix_truncv1hfv1si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode) && TARGET_ZVFH))
#define HAVE_fixuns_truncv1hfv1si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode) && TARGET_ZVFH))
#define HAVE_fix_truncv2hfv2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode) && TARGET_ZVFH))
#define HAVE_fixuns_truncv2hfv2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode) && TARGET_ZVFH))
#define HAVE_fix_truncv4hfv4si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode) && TARGET_ZVFH))
#define HAVE_fixuns_truncv4hfv4si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode) && TARGET_ZVFH))
#define HAVE_fix_truncv8hfv8si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode) && TARGET_ZVFH))
#define HAVE_fixuns_truncv8hfv8si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode) && TARGET_ZVFH))
#define HAVE_fix_truncv16hfv16si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_fixuns_truncv16hfv16si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_fix_truncv32hfv32si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_fixuns_truncv32hfv32si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_fix_truncv64hfv64si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_fixuns_truncv64hfv64si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_fix_truncv128hfv128si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_fixuns_truncv128hfv128si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_fix_truncv256hfv256si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_fixuns_truncv256hfv256si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_fix_truncv512hfv512si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_fixuns_truncv512hfv512si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_fix_truncv1024hfv1024si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_fixuns_truncv1024hfv1024si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_fix_truncv1sfv1di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fixuns_truncv1sfv1di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fix_truncv2sfv2di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fixuns_truncv2sfv2di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fix_truncv4sfv4di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fixuns_truncv4sfv4di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fix_truncv8sfv8di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_fixuns_truncv8sfv8di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_fix_truncv16sfv16di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_fixuns_truncv16sfv16di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_fix_truncv32sfv32di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_fixuns_truncv32sfv32di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_fix_truncv64sfv64di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_fixuns_truncv64sfv64di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_fix_truncv128sfv128di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fixuns_truncv128sfv128di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fix_truncv256sfv256di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fixuns_truncv256sfv256di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fix_truncv512sfv512di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fixuns_truncv512sfv512di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_floatrvvm4qirvvm8hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatunsrvvm4qirvvm8hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatrvvm2qirvvm4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatunsrvvm2qirvvm4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatrvvm1qirvvm2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatunsrvvm1qirvvm2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatrvvmf2qirvvm1hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatunsrvvmf2qirvvm1hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatrvvmf4qirvvmf2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatunsrvvmf4qirvvmf2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatrvvmf8qirvvmf4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_floatunsrvvmf8qirvvmf4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_floatrvvm4hirvvm8sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatunsrvvm4hirvvm8sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatrvvm2hirvvm4sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatunsrvvm2hirvvm4sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatrvvm1hirvvm2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatunsrvvm1hirvvm2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatrvvmf2hirvvm1sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatunsrvvmf2hirvvm1sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatrvvmf4hirvvmf2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_floatunsrvvmf4hirvvmf2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_floatrvvm4sirvvm8df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatunsrvvm4sirvvm8df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatrvvm2sirvvm4df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatunsrvvm2sirvvm4df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatrvvm1sirvvm2df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatunsrvvm1sirvvm2df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatrvvmf2sirvvm1df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatunsrvvmf2sirvvm1df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatv1qiv1hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_floatunsv1qiv1hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_floatv2qiv2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_floatunsv2qiv2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_floatv4qiv4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_floatunsv4qiv4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_floatv8qiv8hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_floatunsv8qiv8hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_floatv16qiv16hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_floatunsv16qiv16hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_floatv32qiv32hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_floatunsv32qiv32hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_floatv64qiv64hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_floatunsv64qiv64hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_floatv128qiv128hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_floatunsv128qiv128hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_floatv256qiv256hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_floatunsv256qiv256hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_floatv512qiv512hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_floatunsv512qiv512hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_floatv1024qiv1024hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_floatunsv1024qiv1024hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_floatv2048qiv2048hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_floatunsv2048qiv2048hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_floatv1hiv1sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatunsv1hiv1sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatv2hiv2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatunsv2hiv2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatv4hiv4sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatunsv4hiv4sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatv8hiv8sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatunsv8hiv8sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatv16hiv16sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_floatunsv16hiv16sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_floatv32hiv32sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_floatunsv32hiv32sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_floatv64hiv64sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_floatunsv64hiv64sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_floatv128hiv128sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_floatunsv128hiv128sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_floatv256hiv256sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_floatunsv256hiv256sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_floatv512hiv512sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_floatunsv512hiv512sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_floatv1024hiv1024sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_floatunsv1024hiv1024sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_floatv1siv1df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatunsv1siv1df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatv2siv2df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatunsv2siv2df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatv4siv4df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatunsv4siv4df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floatv8siv8df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_floatunsv8siv8df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_floatv16siv16df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_floatunsv16siv16df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_floatv32siv32df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_floatunsv32siv32df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_floatv64siv64df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_floatunsv64siv64df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_floatv128siv128df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_floatunsv128siv128df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_floatv256siv256df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_floatunsv256siv256df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_floatv512siv512df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_floatunsv512siv512df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fix_truncrvvm8hfrvvm4qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fixuns_truncrvvm8hfrvvm4qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fix_truncrvvm4hfrvvm2qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fixuns_truncrvvm4hfrvvm2qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fix_truncrvvm2hfrvvm1qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fixuns_truncrvvm2hfrvvm1qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fix_truncrvvm1hfrvvmf2qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fixuns_truncrvvm1hfrvvmf2qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fix_truncrvvmf2hfrvvmf4qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fixuns_truncrvvmf2hfrvvmf4qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fix_truncrvvmf4hfrvvmf8qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_fixuns_truncrvvmf4hfrvvmf8qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_fix_truncrvvm8sfrvvm4hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fixuns_truncrvvm8sfrvvm4hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fix_truncrvvm4sfrvvm2hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fixuns_truncrvvm4sfrvvm2hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fix_truncrvvm2sfrvvm1hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fixuns_truncrvvm2sfrvvm1hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fix_truncrvvm1sfrvvmf2hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fixuns_truncrvvm1sfrvvmf2hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fix_truncrvvmf2sfrvvmf4hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_fixuns_truncrvvmf2sfrvvmf4hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_fix_truncrvvm8dfrvvm4si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fixuns_truncrvvm8dfrvvm4si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fix_truncrvvm4dfrvvm2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fixuns_truncrvvm4dfrvvm2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fix_truncrvvm2dfrvvm1si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fixuns_truncrvvm2dfrvvm1si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fix_truncrvvm1dfrvvmf2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fixuns_truncrvvm1dfrvvmf2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fix_truncv1hfv1qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_fixuns_truncv1hfv1qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_fix_truncv2hfv2qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_fixuns_truncv2hfv2qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_fix_truncv4hfv4qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_fixuns_truncv4hfv4qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_fix_truncv8hfv8qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_fixuns_truncv8hfv8qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_fix_truncv16hfv16qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_fixuns_truncv16hfv16qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_fix_truncv32hfv32qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_fixuns_truncv32hfv32qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_fix_truncv64hfv64qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_fixuns_truncv64hfv64qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_fix_truncv128hfv128qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_fixuns_truncv128hfv128qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_fix_truncv256hfv256qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_fixuns_truncv256hfv256qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_fix_truncv512hfv512qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_fixuns_truncv512hfv512qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_fix_truncv1024hfv1024qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_fixuns_truncv1024hfv1024qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_fix_truncv2048hfv2048qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_fixuns_truncv2048hfv2048qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_fix_truncv1sfv1hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fixuns_truncv1sfv1hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fix_truncv2sfv2hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fixuns_truncv2sfv2hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fix_truncv4sfv4hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fixuns_truncv4sfv4hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fix_truncv8sfv8hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fixuns_truncv8sfv8hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fix_truncv16sfv16hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_fixuns_truncv16sfv16hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_fix_truncv32sfv32hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_fixuns_truncv32sfv32hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_fix_truncv64sfv64hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_fixuns_truncv64sfv64hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_fix_truncv128sfv128hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_fixuns_truncv128sfv128hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_fix_truncv256sfv256hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fixuns_truncv256sfv256hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fix_truncv512sfv512hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fixuns_truncv512sfv512hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fix_truncv1024sfv1024hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fixuns_truncv1024sfv1024hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fix_truncv1dfv1si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fixuns_truncv1dfv1si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fix_truncv2dfv2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fixuns_truncv2dfv2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fix_truncv4dfv4si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fixuns_truncv4dfv4si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fix_truncv8dfv8si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_fixuns_truncv8dfv8si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_fix_truncv16dfv16si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_fixuns_truncv16dfv16si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_fix_truncv32dfv32si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_fixuns_truncv32dfv32si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_fix_truncv64dfv64si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_fixuns_truncv64dfv64si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_fix_truncv128dfv128si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fixuns_truncv128dfv128si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fix_truncv256dfv256si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fixuns_truncv256dfv256si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fix_truncv512dfv512si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fixuns_truncv512dfv512si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_floatrvvm8sirvvm4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatunsrvvm8sirvvm4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatrvvm4sirvvm2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatunsrvvm4sirvvm2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatrvvm2sirvvm1hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatunsrvvm2sirvvm1hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatrvvm1sirvvmf2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatunsrvvm1sirvvmf2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatrvvmf2sirvvmf4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatunsrvvmf2sirvvmf4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_floatrvvm8dirvvm4sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatunsrvvm8dirvvm4sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatrvvm4dirvvm2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatunsrvvm4dirvvm2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatrvvm2dirvvm1sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatunsrvvm2dirvvm1sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatrvvm1dirvvmf2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatunsrvvm1dirvvmf2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatv1siv1hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode) && TARGET_ZVFH))
#define HAVE_floatunsv1siv1hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode) && TARGET_ZVFH))
#define HAVE_floatv2siv2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode) && TARGET_ZVFH))
#define HAVE_floatunsv2siv2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode) && TARGET_ZVFH))
#define HAVE_floatv4siv4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode) && TARGET_ZVFH))
#define HAVE_floatunsv4siv4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode) && TARGET_ZVFH))
#define HAVE_floatv8siv8hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode) && TARGET_ZVFH))
#define HAVE_floatunsv8siv8hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode) && TARGET_ZVFH))
#define HAVE_floatv16siv16hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_floatunsv16siv16hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_floatv32siv32hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_floatunsv32siv32hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_floatv64siv64hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_floatunsv64siv64hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_floatv128siv128hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_floatunsv128siv128hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_floatv256siv256hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_floatunsv256siv256hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_floatv512siv512hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_floatunsv512siv512hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_floatv1024siv1024hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_floatunsv1024siv1024hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_floatv1div1sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatunsv1div1sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatv2div2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatunsv2div2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatv4div4sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatunsv4div4sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floatv8div8sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_floatunsv8div8sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_floatv16div16sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_floatunsv16div16sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_floatv32div32sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_floatunsv32div32sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_floatv64div64sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_floatunsv64div64sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_floatv128div128sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_floatunsv128div128sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_floatv256div256sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_floatunsv256div256sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_floatv512div512sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_floatunsv512div512sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_negrvvm8qi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_one_cmplrvvm8qi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_negrvvm4qi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_one_cmplrvvm4qi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_negrvvm2qi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_one_cmplrvvm2qi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_negrvvm1qi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_one_cmplrvvm1qi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_negrvvm8hi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_one_cmplrvvm8hi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_negrvvm4hi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_one_cmplrvvm4hi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_negrvvm2hi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_one_cmplrvvm2hi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_negrvvm1hi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_one_cmplrvvm1hi2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_negrvvm8si2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_one_cmplrvvm8si2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_negrvvm4si2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_one_cmplrvvm4si2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_negrvvm2si2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_one_cmplrvvm2si2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_negrvvm1si2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_one_cmplrvvm1si2 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_negrvvm8di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_one_cmplrvvm8di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_negrvvm4di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_one_cmplrvvm4di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_negrvvm2di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_one_cmplrvvm2di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_negrvvm1di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_one_cmplrvvm1di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_negrvvmf2qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_one_cmplrvvmf2qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_negrvvmf4qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_one_cmplrvvmf4qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_negrvvmf8qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_one_cmplrvvmf8qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_negrvvmf2hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_one_cmplrvvmf2hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_negrvvmf4hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_one_cmplrvvmf4hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_negrvvmf2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_one_cmplrvvmf2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_negv1qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_one_cmplv1qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_negv2qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_one_cmplv2qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_negv4qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_one_cmplv4qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_negv8qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_one_cmplv8qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_negv16qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_one_cmplv16qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_negv32qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_one_cmplv32qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_negv64qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_one_cmplv64qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_negv128qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_one_cmplv128qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_negv256qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_one_cmplv256qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_negv512qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_one_cmplv512qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_negv1024qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_one_cmplv1024qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_negv2048qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_one_cmplv2048qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_negv4096qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_one_cmplv4096qi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_negv1hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_one_cmplv1hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_negv2hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_one_cmplv2hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_negv4hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_one_cmplv4hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_negv8hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_one_cmplv8hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_negv16hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_one_cmplv16hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_negv32hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_one_cmplv32hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_negv64hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_one_cmplv64hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_negv128hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_one_cmplv128hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_negv256hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_one_cmplv256hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_negv512hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_one_cmplv512hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_negv1024hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_one_cmplv1024hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_negv2048hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_one_cmplv2048hi2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_negv1si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_one_cmplv1si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_negv2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_one_cmplv2si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_negv4si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_one_cmplv4si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_negv8si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_one_cmplv8si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_negv16si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_one_cmplv16si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_negv32si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_one_cmplv32si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_negv64si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_one_cmplv64si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_negv128si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_one_cmplv128si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_negv256si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_one_cmplv256si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_negv512si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_one_cmplv512si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_negv1024si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_one_cmplv1024si2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_negv1di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_one_cmplv1di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_negv2di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_one_cmplv2di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_negv4di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_one_cmplv4di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_negv8di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_one_cmplv8di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_negv16di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_one_cmplv16di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_negv32di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_one_cmplv32di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_negv64di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_one_cmplv64di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_negv128di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_one_cmplv128di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_negv256di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_one_cmplv256di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_negv512di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_one_cmplv512di2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_negrvvm8hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_absrvvm8hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_negrvvm4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_absrvvm4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_negrvvm2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_absrvvm2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_negrvvm1hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_absrvvm1hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_negrvvmf2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_absrvvmf2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_negrvvmf4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_absrvvmf4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_negrvvm8sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_absrvvm8sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_negrvvm4sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_absrvvm4sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_negrvvm2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_absrvvm2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_negrvvm1sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_absrvvm1sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_negrvvmf2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_absrvvmf2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_negrvvm8df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_absrvvm8df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_negrvvm4df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_absrvvm4df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_negrvvm2df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_absrvvm2df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_negrvvm1df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_absrvvm1df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_negv1hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_absv1hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_negv2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_absv2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_negv4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_absv4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_negv8hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_absv8hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_negv16hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_absv16hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_negv32hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_absv32hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_negv64hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_absv64hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_negv128hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_absv128hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_negv256hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_absv256hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_negv512hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_absv512hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_negv1024hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_absv1024hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_negv2048hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_absv2048hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_negv1sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_absv1sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_negv2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_absv2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_negv4sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_absv4sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_negv8sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_absv8sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_negv16sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_absv16sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_negv32sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_absv32sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_negv64sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_absv64sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_negv128sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_absv128sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_negv256sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_absv256sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_negv512sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_absv512sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_negv1024sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_absv1024sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_negv1df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_absv1df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_negv2df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_absv2df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_negv4df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_absv4df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_negv8df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_absv8df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_negv16df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_absv16df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_negv32df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_absv32df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_negv64df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_absv64df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_negv128df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_absv128df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_negv256df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_absv256df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_negv512df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_absv512df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_sqrtrvvm8hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_sqrtrvvm4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_sqrtrvvm2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_sqrtrvvm1hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_sqrtrvvmf2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_sqrtrvvmf4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_sqrtrvvm8sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_sqrtrvvm4sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_sqrtrvvm2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_sqrtrvvm1sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_sqrtrvvmf2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_sqrtrvvm8df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_sqrtrvvm4df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_sqrtrvvm2df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_sqrtrvvm1df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_sqrtv1hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_sqrtv2hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_sqrtv4hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_sqrtv8hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_sqrtv16hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_sqrtv32hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_sqrtv64hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_sqrtv128hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_sqrtv256hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_sqrtv512hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_sqrtv1024hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_sqrtv2048hf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_sqrtv1sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_sqrtv2sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_sqrtv4sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_sqrtv8sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_sqrtv16sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_sqrtv32sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_sqrtv64sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_sqrtv128sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_sqrtv256sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_sqrtv512sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_sqrtv1024sf2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_sqrtv1df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_sqrtv2df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_sqrtv4df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_sqrtv8df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_sqrtv16df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_sqrtv32df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_sqrtv64df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_sqrtv128df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_sqrtv256df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_sqrtv512df2 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fmarvvm8qi4 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_fmarvvm4qi4 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_fmarvvm2qi4 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_fmarvvm1qi4 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_fmarvvm8hi4 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_fmarvvm4hi4 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_fmarvvm2hi4 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_fmarvvm1hi4 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_fmarvvm8si4 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_fmarvvm4si4 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_fmarvvm2si4 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_fmarvvm1si4 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_fmarvvm8di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_fmarvvm4di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_fmarvvm2di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_fmarvvm1di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_fmarvvmf2qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_fmarvvmf4qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_fmarvvmf8qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_fmarvvmf2hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_fmarvvmf4hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_fmarvvmf2si4 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_fmav1qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_fmav2qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_fmav4qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_fmav8qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_fmav16qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_fmav32qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_fmav64qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_fmav128qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_fmav256qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_fmav512qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_fmav1024qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_fmav2048qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_fmav4096qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_fmav1hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_fmav2hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_fmav4hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_fmav8hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_fmav16hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_fmav32hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_fmav64hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_fmav128hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_fmav256hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_fmav512hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_fmav1024hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_fmav2048hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_fmav1si4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_fmav2si4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_fmav4si4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_fmav8si4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_fmav16si4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_fmav32si4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_fmav64si4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_fmav128si4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_fmav256si4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_fmav512si4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_fmav1024si4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_fmav1di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_fmav2di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_fmav4di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_fmav8di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_fmav16di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_fmav32di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_fmav64di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_fmav128di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fmav256di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fmav512di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fnmarvvm8qi4 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_fnmarvvm4qi4 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_fnmarvvm2qi4 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_fnmarvvm1qi4 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_fnmarvvm8hi4 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_fnmarvvm4hi4 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_fnmarvvm2hi4 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_fnmarvvm1hi4 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_fnmarvvm8si4 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_fnmarvvm4si4 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_fnmarvvm2si4 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_fnmarvvm1si4 (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_fnmarvvm8di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_fnmarvvm4di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_fnmarvvm2di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_fnmarvvm1di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_fnmarvvmf2qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_fnmarvvmf4qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_fnmarvvmf8qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_fnmarvvmf2hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_fnmarvvmf4hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_fnmarvvmf2si4 ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_fnmav1qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_fnmav2qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_fnmav4qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_fnmav8qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_fnmav16qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_fnmav32qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_fnmav64qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_fnmav128qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_fnmav256qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_fnmav512qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_fnmav1024qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_fnmav2048qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_fnmav4096qi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_fnmav1hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_fnmav2hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_fnmav4hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_fnmav8hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_fnmav16hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_fnmav32hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_fnmav64hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_fnmav128hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_fnmav256hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_fnmav512hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_fnmav1024hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_fnmav2048hi4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_fnmav1si4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_fnmav2si4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_fnmav4si4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_fnmav8si4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_fnmav16si4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_fnmav32si4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_fnmav64si4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_fnmav128si4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_fnmav256si4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_fnmav512si4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_fnmav1024si4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_fnmav1di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_fnmav2di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_fnmav4di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_fnmav8di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_fnmav16di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_fnmav32di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_fnmav64di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_fnmav128di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fnmav256di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fnmav512di4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fmarvvm8hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fmarvvm4hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fmarvvm2hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fmarvvm1hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fmarvvmf2hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fmarvvmf4hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_fmarvvm8sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fmarvvm4sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fmarvvm2sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fmarvvm1sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fmarvvmf2sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_fmarvvm8df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fmarvvm4df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fmarvvm2df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fmarvvm1df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fmav1hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_fmav2hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_fmav4hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_fmav8hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_fmav16hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_fmav32hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_fmav64hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_fmav128hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_fmav256hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_fmav512hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_fmav1024hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_fmav2048hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_fmav1sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fmav2sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fmav4sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fmav8sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fmav16sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_fmav32sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_fmav64sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_fmav128sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_fmav256sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fmav512sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fmav1024sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fmav1df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fmav2df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fmav4df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fmav8df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_fmav16df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_fmav32df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_fmav64df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_fmav128df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fmav256df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fmav512df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fnmarvvm8hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fnmarvvm4hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fnmarvvm2hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fnmarvvm1hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fnmarvvmf2hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fnmarvvmf4hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_fnmarvvm8sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fnmarvvm4sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fnmarvvm2sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fnmarvvm1sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fnmarvvmf2sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_fnmarvvm8df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fnmarvvm4df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fnmarvvm2df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fnmarvvm1df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fnmav1hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_fnmav2hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_fnmav4hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_fnmav8hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_fnmav16hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_fnmav32hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_fnmav64hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_fnmav128hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_fnmav256hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_fnmav512hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_fnmav1024hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_fnmav2048hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_fnmav1sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fnmav2sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fnmav4sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fnmav8sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fnmav16sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_fnmav32sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_fnmav64sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_fnmav128sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_fnmav256sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fnmav512sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fnmav1024sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fnmav1df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fnmav2df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fnmav4df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fnmav8df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_fnmav16df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_fnmav32df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_fnmav64df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_fnmav128df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fnmav256df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fnmav512df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fmsrvvm8hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fmsrvvm4hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fmsrvvm2hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fmsrvvm1hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fmsrvvmf2hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fmsrvvmf4hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_fmsrvvm8sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fmsrvvm4sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fmsrvvm2sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fmsrvvm1sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fmsrvvmf2sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_fmsrvvm8df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fmsrvvm4df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fmsrvvm2df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fmsrvvm1df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fmsv1hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_fmsv2hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_fmsv4hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_fmsv8hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_fmsv16hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_fmsv32hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_fmsv64hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_fmsv128hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_fmsv256hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_fmsv512hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_fmsv1024hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_fmsv2048hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_fmsv1sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fmsv2sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fmsv4sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fmsv8sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fmsv16sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_fmsv32sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_fmsv64sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_fmsv128sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_fmsv256sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fmsv512sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fmsv1024sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fmsv1df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fmsv2df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fmsv4df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fmsv8df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_fmsv16df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_fmsv32df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_fmsv64df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_fmsv128df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fmsv256df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fmsv512df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fnmsrvvm8hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fnmsrvvm4hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fnmsrvvm2hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fnmsrvvm1hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fnmsrvvmf2hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fnmsrvvmf4hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_fnmsrvvm8sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fnmsrvvm4sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fnmsrvvm2sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fnmsrvvm1sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fnmsrvvmf2sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_fnmsrvvm8df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fnmsrvvm4df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fnmsrvvm2df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fnmsrvvm1df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fnmsv1hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_fnmsv2hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_fnmsv4hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_fnmsv8hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_fnmsv16hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_fnmsv32hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_fnmsv64hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_fnmsv128hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_fnmsv256hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_fnmsv512hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_fnmsv1024hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_fnmsv2048hf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_fnmsv1sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fnmsv2sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fnmsv4sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fnmsv8sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fnmsv16sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_fnmsv32sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_fnmsv64sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_fnmsv128sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_fnmsv256sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fnmsv512sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fnmsv1024sf4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fnmsv1df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fnmsv2df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fnmsv4df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fnmsv8df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_fnmsv16df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_fnmsv32df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_fnmsv64df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_fnmsv128df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fnmsv256df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fnmsv512df4 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_addrvvm8hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_mulrvvm8hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_subrvvm8hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_divrvvm8hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_addrvvm4hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_mulrvvm4hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_subrvvm4hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_divrvvm4hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_addrvvm2hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_mulrvvm2hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_subrvvm2hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_divrvvm2hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_addrvvm1hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_mulrvvm1hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_subrvvm1hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_divrvvm1hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_addrvvmf2hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_mulrvvmf2hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_subrvvmf2hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_divrvvmf2hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_addrvvmf4hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_mulrvvmf4hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_subrvvmf4hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_divrvvmf4hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_addrvvm8sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mulrvvm8sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_subrvvm8sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_divrvvm8sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_addrvvm4sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mulrvvm4sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_subrvvm4sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_divrvvm4sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_addrvvm2sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mulrvvm2sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_subrvvm2sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_divrvvm2sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_addrvvm1sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mulrvvm1sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_subrvvm1sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_divrvvm1sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_addrvvmf2sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_mulrvvmf2sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_subrvvmf2sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_divrvvmf2sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_addrvvm8df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mulrvvm8df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_subrvvm8df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_divrvvm8df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_addrvvm4df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mulrvvm4df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_subrvvm4df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_divrvvm4df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_addrvvm2df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mulrvvm2df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_subrvvm2df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_divrvvm2df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_addrvvm1df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mulrvvm1df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_subrvvm1df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_divrvvm1df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_addv1hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_mulv1hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_subv1hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_divv1hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_addv2hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_mulv2hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_subv2hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_divv2hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_addv4hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_mulv4hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_subv4hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_divv4hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_addv8hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_mulv8hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_subv8hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_divv8hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_addv16hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_mulv16hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_subv16hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_divv16hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_addv32hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_mulv32hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_subv32hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_divv32hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_addv64hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_mulv64hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_subv64hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_divv64hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_addv128hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_mulv128hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_subv128hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_divv128hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_addv256hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_mulv256hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_subv256hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_divv256hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_addv512hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_mulv512hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_subv512hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_divv512hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_addv1024hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_mulv1024hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_subv1024hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_divv1024hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_addv2048hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_mulv2048hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_subv2048hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_divv2048hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_addv1sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mulv1sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_subv1sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_divv1sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_addv2sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mulv2sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_subv2sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_divv2sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_addv4sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mulv4sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_subv4sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_divv4sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_addv8sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mulv8sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_subv8sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_divv8sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_addv16sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_mulv16sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_subv16sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_divv16sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_addv32sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_mulv32sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_subv32sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_divv32sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_addv64sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_mulv64sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_subv64sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_divv64sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_addv128sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_mulv128sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_subv128sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_divv128sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_addv256sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mulv256sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_subv256sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_divv256sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_addv512sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mulv512sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_subv512sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_divv512sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_addv1024sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mulv1024sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_subv1024sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_divv1024sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_addv1df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mulv1df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_subv1df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_divv1df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_addv2df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mulv2df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_subv2df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_divv2df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_addv4df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mulv4df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_subv4df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_divv4df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_addv8df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_mulv8df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_subv8df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_divv8df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_addv16df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_mulv16df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_subv16df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_divv16df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_addv32df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_mulv32df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_subv32df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_divv32df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_addv64df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_mulv64df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_subv64df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_divv64df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_addv128df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mulv128df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_subv128df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_divv128df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_addv256df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mulv256df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_subv256df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_divv256df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_addv512df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mulv512df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_subv512df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_divv512df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_smaxrvvm8hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_sminrvvm8hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_smaxrvvm4hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_sminrvvm4hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_smaxrvvm2hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_sminrvvm2hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_smaxrvvm1hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_sminrvvm1hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_smaxrvvmf2hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_sminrvvmf2hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_smaxrvvmf4hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_sminrvvmf4hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_smaxrvvm8sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_sminrvvm8sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_smaxrvvm4sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_sminrvvm4sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_smaxrvvm2sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_sminrvvm2sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_smaxrvvm1sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_sminrvvm1sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_smaxrvvmf2sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_sminrvvmf2sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_smaxrvvm8df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_sminrvvm8df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_smaxrvvm4df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_sminrvvm4df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_smaxrvvm2df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_sminrvvm2df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_smaxrvvm1df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_sminrvvm1df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_smaxv1hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_sminv1hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_smaxv2hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_sminv2hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_smaxv4hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_sminv4hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_smaxv8hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_sminv8hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_smaxv16hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_sminv16hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_smaxv32hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_sminv32hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_smaxv64hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_sminv64hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_smaxv128hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_sminv128hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_smaxv256hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_sminv256hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_smaxv512hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_sminv512hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_smaxv1024hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_sminv1024hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_smaxv2048hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_sminv2048hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_smaxv1sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_sminv1sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_smaxv2sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_sminv2sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_smaxv4sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_sminv4sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_smaxv8sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_sminv8sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_smaxv16sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_sminv16sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_smaxv32sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_sminv32sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_smaxv64sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_sminv64sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_smaxv128sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_sminv128sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_smaxv256sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_sminv256sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_smaxv512sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_sminv512sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_smaxv1024sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_sminv1024sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_smaxv1df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_sminv1df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_smaxv2df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_sminv2df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_smaxv4df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_sminv4df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_smaxv8df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_sminv8df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_smaxv16df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_sminv16df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_smaxv32df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_sminv32df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_smaxv64df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_sminv64df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_smaxv128df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_sminv128df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_smaxv256df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_sminv256df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_smaxv512df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_sminv512df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fmaxrvvm8hf3 ((TARGET_VECTOR && !HONOR_SNANS (RVVM8HFmode) && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fminrvvm8hf3 ((TARGET_VECTOR && !HONOR_SNANS (RVVM8HFmode) && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fmaxrvvm4hf3 ((TARGET_VECTOR && !HONOR_SNANS (RVVM4HFmode) && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fminrvvm4hf3 ((TARGET_VECTOR && !HONOR_SNANS (RVVM4HFmode) && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fmaxrvvm2hf3 ((TARGET_VECTOR && !HONOR_SNANS (RVVM2HFmode) && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fminrvvm2hf3 ((TARGET_VECTOR && !HONOR_SNANS (RVVM2HFmode) && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fmaxrvvm1hf3 ((TARGET_VECTOR && !HONOR_SNANS (RVVM1HFmode) && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fminrvvm1hf3 ((TARGET_VECTOR && !HONOR_SNANS (RVVM1HFmode) && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fmaxrvvmf2hf3 ((TARGET_VECTOR && !HONOR_SNANS (RVVMF2HFmode) && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fminrvvmf2hf3 ((TARGET_VECTOR && !HONOR_SNANS (RVVMF2HFmode) && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fmaxrvvmf4hf3 ((TARGET_VECTOR && !HONOR_SNANS (RVVMF4HFmode) && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_fminrvvmf4hf3 ((TARGET_VECTOR && !HONOR_SNANS (RVVMF4HFmode) && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_fmaxrvvm8sf3 ((TARGET_VECTOR && !HONOR_SNANS (RVVM8SFmode) && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fminrvvm8sf3 ((TARGET_VECTOR && !HONOR_SNANS (RVVM8SFmode) && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fmaxrvvm4sf3 ((TARGET_VECTOR && !HONOR_SNANS (RVVM4SFmode) && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fminrvvm4sf3 ((TARGET_VECTOR && !HONOR_SNANS (RVVM4SFmode) && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fmaxrvvm2sf3 ((TARGET_VECTOR && !HONOR_SNANS (RVVM2SFmode) && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fminrvvm2sf3 ((TARGET_VECTOR && !HONOR_SNANS (RVVM2SFmode) && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fmaxrvvm1sf3 ((TARGET_VECTOR && !HONOR_SNANS (RVVM1SFmode) && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fminrvvm1sf3 ((TARGET_VECTOR && !HONOR_SNANS (RVVM1SFmode) && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fmaxrvvmf2sf3 ((TARGET_VECTOR && !HONOR_SNANS (RVVMF2SFmode) && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_fminrvvmf2sf3 ((TARGET_VECTOR && !HONOR_SNANS (RVVMF2SFmode) && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_fmaxrvvm8df3 ((TARGET_VECTOR && !HONOR_SNANS (RVVM8DFmode) && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fminrvvm8df3 ((TARGET_VECTOR && !HONOR_SNANS (RVVM8DFmode) && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fmaxrvvm4df3 ((TARGET_VECTOR && !HONOR_SNANS (RVVM4DFmode) && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fminrvvm4df3 ((TARGET_VECTOR && !HONOR_SNANS (RVVM4DFmode) && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fmaxrvvm2df3 ((TARGET_VECTOR && !HONOR_SNANS (RVVM2DFmode) && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fminrvvm2df3 ((TARGET_VECTOR && !HONOR_SNANS (RVVM2DFmode) && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fmaxrvvm1df3 ((TARGET_VECTOR && !HONOR_SNANS (RVVM1DFmode) && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fminrvvm1df3 ((TARGET_VECTOR && !HONOR_SNANS (RVVM1DFmode) && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fmaxv1hf3 ((TARGET_VECTOR && !HONOR_SNANS (V1HFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_fminv1hf3 ((TARGET_VECTOR && !HONOR_SNANS (V1HFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_fmaxv2hf3 ((TARGET_VECTOR && !HONOR_SNANS (V2HFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_fminv2hf3 ((TARGET_VECTOR && !HONOR_SNANS (V2HFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_fmaxv4hf3 ((TARGET_VECTOR && !HONOR_SNANS (V4HFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_fminv4hf3 ((TARGET_VECTOR && !HONOR_SNANS (V4HFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_fmaxv8hf3 ((TARGET_VECTOR && !HONOR_SNANS (V8HFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_fminv8hf3 ((TARGET_VECTOR && !HONOR_SNANS (V8HFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_fmaxv16hf3 ((TARGET_VECTOR && !HONOR_SNANS (V16HFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_fminv16hf3 ((TARGET_VECTOR && !HONOR_SNANS (V16HFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_fmaxv32hf3 ((TARGET_VECTOR && !HONOR_SNANS (V32HFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_fminv32hf3 ((TARGET_VECTOR && !HONOR_SNANS (V32HFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_fmaxv64hf3 ((TARGET_VECTOR && !HONOR_SNANS (V64HFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_fminv64hf3 ((TARGET_VECTOR && !HONOR_SNANS (V64HFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_fmaxv128hf3 ((TARGET_VECTOR && !HONOR_SNANS (V128HFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_fminv128hf3 ((TARGET_VECTOR && !HONOR_SNANS (V128HFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_fmaxv256hf3 ((TARGET_VECTOR && !HONOR_SNANS (V256HFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_fminv256hf3 ((TARGET_VECTOR && !HONOR_SNANS (V256HFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_fmaxv512hf3 ((TARGET_VECTOR && !HONOR_SNANS (V512HFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_fminv512hf3 ((TARGET_VECTOR && !HONOR_SNANS (V512HFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_fmaxv1024hf3 ((TARGET_VECTOR && !HONOR_SNANS (V1024HFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_fminv1024hf3 ((TARGET_VECTOR && !HONOR_SNANS (V1024HFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_fmaxv2048hf3 ((TARGET_VECTOR && !HONOR_SNANS (V2048HFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_fminv2048hf3 ((TARGET_VECTOR && !HONOR_SNANS (V2048HFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_fmaxv1sf3 ((TARGET_VECTOR && !HONOR_SNANS (V1SFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fminv1sf3 ((TARGET_VECTOR && !HONOR_SNANS (V1SFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fmaxv2sf3 ((TARGET_VECTOR && !HONOR_SNANS (V2SFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fminv2sf3 ((TARGET_VECTOR && !HONOR_SNANS (V2SFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fmaxv4sf3 ((TARGET_VECTOR && !HONOR_SNANS (V4SFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fminv4sf3 ((TARGET_VECTOR && !HONOR_SNANS (V4SFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fmaxv8sf3 ((TARGET_VECTOR && !HONOR_SNANS (V8SFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fminv8sf3 ((TARGET_VECTOR && !HONOR_SNANS (V8SFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fmaxv16sf3 ((TARGET_VECTOR && !HONOR_SNANS (V16SFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_fminv16sf3 ((TARGET_VECTOR && !HONOR_SNANS (V16SFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_fmaxv32sf3 ((TARGET_VECTOR && !HONOR_SNANS (V32SFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_fminv32sf3 ((TARGET_VECTOR && !HONOR_SNANS (V32SFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_fmaxv64sf3 ((TARGET_VECTOR && !HONOR_SNANS (V64SFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_fminv64sf3 ((TARGET_VECTOR && !HONOR_SNANS (V64SFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_fmaxv128sf3 ((TARGET_VECTOR && !HONOR_SNANS (V128SFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_fminv128sf3 ((TARGET_VECTOR && !HONOR_SNANS (V128SFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_fmaxv256sf3 ((TARGET_VECTOR && !HONOR_SNANS (V256SFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fminv256sf3 ((TARGET_VECTOR && !HONOR_SNANS (V256SFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fmaxv512sf3 ((TARGET_VECTOR && !HONOR_SNANS (V512SFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fminv512sf3 ((TARGET_VECTOR && !HONOR_SNANS (V512SFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fmaxv1024sf3 ((TARGET_VECTOR && !HONOR_SNANS (V1024SFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fminv1024sf3 ((TARGET_VECTOR && !HONOR_SNANS (V1024SFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fmaxv1df3 ((TARGET_VECTOR && !HONOR_SNANS (V1DFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fminv1df3 ((TARGET_VECTOR && !HONOR_SNANS (V1DFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fmaxv2df3 ((TARGET_VECTOR && !HONOR_SNANS (V2DFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fminv2df3 ((TARGET_VECTOR && !HONOR_SNANS (V2DFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fmaxv4df3 ((TARGET_VECTOR && !HONOR_SNANS (V4DFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fminv4df3 ((TARGET_VECTOR && !HONOR_SNANS (V4DFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fmaxv8df3 ((TARGET_VECTOR && !HONOR_SNANS (V8DFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_fminv8df3 ((TARGET_VECTOR && !HONOR_SNANS (V8DFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_fmaxv16df3 ((TARGET_VECTOR && !HONOR_SNANS (V16DFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_fminv16df3 ((TARGET_VECTOR && !HONOR_SNANS (V16DFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_fmaxv32df3 ((TARGET_VECTOR && !HONOR_SNANS (V32DFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_fminv32df3 ((TARGET_VECTOR && !HONOR_SNANS (V32DFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_fmaxv64df3 ((TARGET_VECTOR && !HONOR_SNANS (V64DFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_fminv64df3 ((TARGET_VECTOR && !HONOR_SNANS (V64DFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_fmaxv128df3 ((TARGET_VECTOR && !HONOR_SNANS (V128DFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fminv128df3 ((TARGET_VECTOR && !HONOR_SNANS (V128DFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fmaxv256df3 ((TARGET_VECTOR && !HONOR_SNANS (V256DFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fminv256df3 ((TARGET_VECTOR && !HONOR_SNANS (V256DFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fmaxv512df3 ((TARGET_VECTOR && !HONOR_SNANS (V512DFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fminv512df3 ((TARGET_VECTOR && !HONOR_SNANS (V512DFmode) && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_copysignrvvm8hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_copysignrvvm4hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_copysignrvvm2hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_copysignrvvm1hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_copysignrvvmf2hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_copysignrvvmf4hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_copysignrvvm8sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_copysignrvvm4sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_copysignrvvm2sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_copysignrvvm1sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_copysignrvvmf2sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_copysignrvvm8df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_copysignrvvm4df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_copysignrvvm2df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_copysignrvvm1df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_copysignv1hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_copysignv2hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_copysignv4hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_copysignv8hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_copysignv16hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_copysignv32hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_copysignv64hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_copysignv128hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_copysignv256hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_copysignv512hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_copysignv1024hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_copysignv2048hf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_copysignv1sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_copysignv2sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_copysignv4sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_copysignv8sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_copysignv16sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_copysignv32sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_copysignv64sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_copysignv128sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_copysignv256sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_copysignv512sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_copysignv1024sf3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_copysignv1df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_copysignv2df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_copysignv4df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_copysignv8df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_copysignv16df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_copysignv32df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_copysignv64df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_copysignv128df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_copysignv256df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_copysignv512df3 ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_smulrvvm8qi3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umulrvvm8qi3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smulrvvm4qi3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umulrvvm4qi3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smulrvvm2qi3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umulrvvm2qi3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smulrvvm1qi3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umulrvvm1qi3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smulrvvmf2qi3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umulrvvmf2qi3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smulrvvmf4qi3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umulrvvmf4qi3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smulrvvmf8qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_umulrvvmf8qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_smulrvvm8hi3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umulrvvm8hi3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smulrvvm4hi3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umulrvvm4hi3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smulrvvm2hi3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umulrvvm2hi3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smulrvvm1hi3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umulrvvm1hi3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smulrvvmf2hi3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umulrvvmf2hi3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smulrvvmf4hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_umulrvvmf4hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_smulrvvm8si3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umulrvvm8si3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smulrvvm4si3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umulrvvm4si3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smulrvvm2si3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umulrvvm2si3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smulrvvm1si3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_umulrvvm1si3_highpart (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_smulrvvmf2si3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_umulrvvmf2si3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_smulrvvm8di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_FULL_V))
#define HAVE_umulrvvm8di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_FULL_V))
#define HAVE_smulrvvm4di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_FULL_V))
#define HAVE_umulrvvm4di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_FULL_V))
#define HAVE_smulrvvm2di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_FULL_V))
#define HAVE_umulrvvm2di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_FULL_V))
#define HAVE_smulrvvm1di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_FULL_V))
#define HAVE_umulrvvm1di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_FULL_V))
#define HAVE_smulv1qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_umulv1qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_smulv2qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_umulv2qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_smulv4qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_umulv4qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_smulv8qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_umulv8qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_smulv16qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_umulv16qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_smulv32qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_umulv32qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_smulv64qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_umulv64qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_smulv128qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_umulv128qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_smulv256qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_umulv256qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_smulv512qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_umulv512qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_smulv1024qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_umulv1024qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_smulv2048qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_umulv2048qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_smulv4096qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_umulv4096qi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_smulv1hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_umulv1hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_smulv2hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_umulv2hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_smulv4hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_umulv4hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_smulv8hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_umulv8hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_smulv16hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_umulv16hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_smulv32hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_umulv32hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_smulv64hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_umulv64hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_smulv128hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_umulv128hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_smulv256hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_umulv256hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_smulv512hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_umulv512hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_smulv1024hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_umulv1024hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_smulv2048hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_umulv2048hi3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_smulv1si3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_umulv1si3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_smulv2si3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_umulv2si3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_smulv4si3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_umulv4si3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_smulv8si3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_umulv8si3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_smulv16si3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_umulv16si3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_smulv32si3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_umulv32si3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_smulv64si3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_umulv64si3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_smulv128si3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_umulv128si3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_smulv256si3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_umulv256si3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_smulv512si3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_umulv512si3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_smulv1024si3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_umulv1024si3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_smulv1di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_umulv1di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_smulv2di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_umulv2di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_smulv4di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_umulv4di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_smulv8di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_umulv8di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_smulv16di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_umulv16di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_smulv32di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_umulv32di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_smulv64di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_umulv64di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_smulv128di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_umulv128di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_smulv256di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_umulv256di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_smulv512di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_umulv512di3_highpart ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_plus_scal_rvvm8qi (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_reduc_plus_scal_rvvm4qi (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_reduc_plus_scal_rvvm2qi (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_reduc_plus_scal_rvvm1qi (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_reduc_plus_scal_rvvm8hi (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_reduc_plus_scal_rvvm4hi (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_reduc_plus_scal_rvvm2hi (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_reduc_plus_scal_rvvm1hi (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_reduc_plus_scal_rvvm8si (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_reduc_plus_scal_rvvm4si (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_reduc_plus_scal_rvvm2si (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_reduc_plus_scal_rvvm1si (TARGET_VECTOR && can_create_pseudo_p ())
#define HAVE_reduc_plus_scal_rvvm8di ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_plus_scal_rvvm4di ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_plus_scal_rvvm2di ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_plus_scal_rvvm1di ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_plus_scal_rvvmf2qi ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_reduc_plus_scal_rvvmf4qi ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_reduc_plus_scal_rvvmf8qi ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_reduc_plus_scal_rvvmf2hi ((TARGET_VECTOR && can_create_pseudo_p ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_reduc_plus_scal_rvvmf4hi ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_reduc_plus_scal_rvvmf2si ((TARGET_VECTOR && can_create_pseudo_p ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_reduc_plus_scal_v1qi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_reduc_plus_scal_v2qi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_reduc_plus_scal_v4qi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_reduc_plus_scal_v8qi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_reduc_plus_scal_v16qi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_reduc_plus_scal_v32qi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_reduc_plus_scal_v64qi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_plus_scal_v128qi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_plus_scal_v256qi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_plus_scal_v512qi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_plus_scal_v1024qi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_plus_scal_v2048qi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_plus_scal_v4096qi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_plus_scal_v1hi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_reduc_plus_scal_v2hi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_reduc_plus_scal_v4hi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_reduc_plus_scal_v8hi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_reduc_plus_scal_v16hi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_reduc_plus_scal_v32hi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_plus_scal_v64hi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_plus_scal_v128hi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_plus_scal_v256hi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_plus_scal_v512hi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_plus_scal_v1024hi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_plus_scal_v2048hi ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_plus_scal_v1si ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_reduc_plus_scal_v2si ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_reduc_plus_scal_v4si ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_reduc_plus_scal_v8si ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_reduc_plus_scal_v16si ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_plus_scal_v32si ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_plus_scal_v64si ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_plus_scal_v128si ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_plus_scal_v256si ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_plus_scal_v512si ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_plus_scal_v1024si ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_plus_scal_v1di ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_plus_scal_v2di ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_plus_scal_v4di ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_plus_scal_v8di ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_plus_scal_v16di ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_plus_scal_v32di ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_plus_scal_v64di ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_plus_scal_v128di ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_plus_scal_v256di ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_plus_scal_v512di ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_plus_scal_rvvm8hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_reduc_plus_scal_rvvm4hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_reduc_plus_scal_rvvm2hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_reduc_plus_scal_rvvm1hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_reduc_plus_scal_rvvmf2hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_reduc_plus_scal_rvvmf4hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_plus_scal_rvvm8sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_plus_scal_rvvm4sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_plus_scal_rvvm2sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_plus_scal_rvvm1sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_plus_scal_rvvmf2sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_plus_scal_rvvm8df ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_plus_scal_rvvm4df ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_plus_scal_rvvm2df ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_plus_scal_rvvm1df ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_plus_scal_v1hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_reduc_plus_scal_v2hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_reduc_plus_scal_v4hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_reduc_plus_scal_v8hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_reduc_plus_scal_v16hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_reduc_plus_scal_v32hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_plus_scal_v64hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_plus_scal_v128hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_plus_scal_v256hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_plus_scal_v512hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_plus_scal_v1024hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_plus_scal_v2048hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_plus_scal_v1sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_plus_scal_v2sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_plus_scal_v4sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_plus_scal_v8sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_plus_scal_v16sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_plus_scal_v32sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_plus_scal_v64sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_plus_scal_v128sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_plus_scal_v256sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_plus_scal_v512sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_plus_scal_v1024sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_plus_scal_v1df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_plus_scal_v2df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_plus_scal_v4df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_plus_scal_v8df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_plus_scal_v16df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_plus_scal_v32df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_plus_scal_v64df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_plus_scal_v128df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_plus_scal_v256df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_plus_scal_v512df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fold_left_plus_rvvm8hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fold_left_plus_rvvm4hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fold_left_plus_rvvm2hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fold_left_plus_rvvm1hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fold_left_plus_rvvmf2hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_fold_left_plus_rvvmf4hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_fold_left_plus_rvvm8sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fold_left_plus_rvvm4sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fold_left_plus_rvvm2sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fold_left_plus_rvvm1sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fold_left_plus_rvvmf2sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_fold_left_plus_rvvm8df ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fold_left_plus_rvvm4df ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fold_left_plus_rvvm2df ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fold_left_plus_rvvm1df ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fold_left_plus_v1hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_fold_left_plus_v2hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_fold_left_plus_v4hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_fold_left_plus_v8hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_fold_left_plus_v16hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_fold_left_plus_v32hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_fold_left_plus_v64hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_fold_left_plus_v128hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_fold_left_plus_v256hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_fold_left_plus_v512hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_fold_left_plus_v1024hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_fold_left_plus_v2048hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_fold_left_plus_v1sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fold_left_plus_v2sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fold_left_plus_v4sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fold_left_plus_v8sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_fold_left_plus_v16sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_fold_left_plus_v32sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_fold_left_plus_v64sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_fold_left_plus_v128sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_fold_left_plus_v256sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fold_left_plus_v512sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fold_left_plus_v1024sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_fold_left_plus_v1df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fold_left_plus_v2df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fold_left_plus_v4df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_fold_left_plus_v8df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_fold_left_plus_v16df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_fold_left_plus_v32df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_fold_left_plus_v64df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_fold_left_plus_v128df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_fold_left_plus_v256df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_fold_left_plus_v512df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_fold_left_plus_rvvm8hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_mask_len_fold_left_plus_rvvm4hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_mask_len_fold_left_plus_rvvm2hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_mask_len_fold_left_plus_rvvm1hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_mask_len_fold_left_plus_rvvmf2hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH))
#define HAVE_mask_len_fold_left_plus_rvvmf4hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_fold_left_plus_rvvm8sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_fold_left_plus_rvvm4sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_fold_left_plus_rvvm2sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_fold_left_plus_rvvm1sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_fold_left_plus_rvvmf2sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_fold_left_plus_rvvm8df ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_fold_left_plus_rvvm4df ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_fold_left_plus_rvvm2df ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_fold_left_plus_rvvm1df ((TARGET_VECTOR && can_create_pseudo_p ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_fold_left_plus_v1hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_mask_len_fold_left_plus_v2hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_mask_len_fold_left_plus_v4hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_mask_len_fold_left_plus_v8hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_mask_len_fold_left_plus_v16hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_mask_len_fold_left_plus_v32hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_fold_left_plus_v64hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_fold_left_plus_v128hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_fold_left_plus_v256hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_fold_left_plus_v512hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_fold_left_plus_v1024hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_fold_left_plus_v2048hf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_fold_left_plus_v1sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_fold_left_plus_v2sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_fold_left_plus_v4sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_fold_left_plus_v8sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_fold_left_plus_v16sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_fold_left_plus_v32sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_fold_left_plus_v64sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_fold_left_plus_v128sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_fold_left_plus_v256sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_fold_left_plus_v512sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_fold_left_plus_v1024sf ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_fold_left_plus_v1df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_fold_left_plus_v2df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_fold_left_plus_v4df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_fold_left_plus_v8df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_fold_left_plus_v16df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_fold_left_plus_v32df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_fold_left_plus_v64df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_fold_left_plus_v128df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_fold_left_plus_v256df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_fold_left_plus_v512df ((TARGET_VECTOR && can_create_pseudo_p ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vcond_mask_len_rvvmf64bi ((TARGET_VECTOR \
   && can_create_pseudo_p () \
   && riscv_vector::get_vector_mode (Pmode, GET_MODE_NUNITS (RVVMF64BImode)).exists ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vcond_mask_len_rvvmf32bi (TARGET_VECTOR \
   && can_create_pseudo_p () \
   && riscv_vector::get_vector_mode (Pmode, GET_MODE_NUNITS (RVVMF32BImode)).exists ())
#define HAVE_vcond_mask_len_rvvmf16bi (TARGET_VECTOR \
   && can_create_pseudo_p () \
   && riscv_vector::get_vector_mode (Pmode, GET_MODE_NUNITS (RVVMF16BImode)).exists ())
#define HAVE_vcond_mask_len_rvvmf8bi (TARGET_VECTOR \
   && can_create_pseudo_p () \
   && riscv_vector::get_vector_mode (Pmode, GET_MODE_NUNITS (RVVMF8BImode)).exists ())
#define HAVE_vcond_mask_len_rvvmf4bi (TARGET_VECTOR \
   && can_create_pseudo_p () \
   && riscv_vector::get_vector_mode (Pmode, GET_MODE_NUNITS (RVVMF4BImode)).exists ())
#define HAVE_vcond_mask_len_rvvmf2bi (TARGET_VECTOR \
   && can_create_pseudo_p () \
   && riscv_vector::get_vector_mode (Pmode, GET_MODE_NUNITS (RVVMF2BImode)).exists ())
#define HAVE_vcond_mask_len_rvvm1bi (TARGET_VECTOR \
   && can_create_pseudo_p () \
   && riscv_vector::get_vector_mode (Pmode, GET_MODE_NUNITS (RVVM1BImode)).exists ())
#define HAVE_pred_matrix_mul_plusrvvm8si_qoq (TARGET_VECTOR && TARGET_XSFVQMACCQOQ)
#define HAVE_pred_matrix_mul_plusurvvm8si_qoq (TARGET_VECTOR && TARGET_XSFVQMACCQOQ)
#define HAVE_pred_matrix_mul_plusrvvm4si_qoq (TARGET_VECTOR && TARGET_XSFVQMACCQOQ)
#define HAVE_pred_matrix_mul_plusurvvm4si_qoq (TARGET_VECTOR && TARGET_XSFVQMACCQOQ)
#define HAVE_pred_matrix_mul_plusrvvm2si_qoq (TARGET_VECTOR && TARGET_XSFVQMACCQOQ)
#define HAVE_pred_matrix_mul_plusurvvm2si_qoq (TARGET_VECTOR && TARGET_XSFVQMACCQOQ)
#define HAVE_pred_matrix_mul_plusrvvm1si_qoq (TARGET_VECTOR && TARGET_XSFVQMACCQOQ)
#define HAVE_pred_matrix_mul_plusurvvm1si_qoq (TARGET_VECTOR && TARGET_XSFVQMACCQOQ)
#define HAVE_pred_matrix_mul_plussurvvm8si_qoq (TARGET_VECTOR && TARGET_XSFVQMACCQOQ)
#define HAVE_pred_matrix_mul_plussurvvm4si_qoq (TARGET_VECTOR && TARGET_XSFVQMACCQOQ)
#define HAVE_pred_matrix_mul_plussurvvm2si_qoq (TARGET_VECTOR && TARGET_XSFVQMACCQOQ)
#define HAVE_pred_matrix_mul_plussurvvm1si_qoq (TARGET_VECTOR && TARGET_XSFVQMACCQOQ)
#define HAVE_pred_matrix_mul_plususrvvm8si_qoq (TARGET_VECTOR && TARGET_XSFVQMACCQOQ)
#define HAVE_pred_matrix_mul_plususrvvm4si_qoq (TARGET_VECTOR && TARGET_XSFVQMACCQOQ)
#define HAVE_pred_matrix_mul_plususrvvm2si_qoq (TARGET_VECTOR && TARGET_XSFVQMACCQOQ)
#define HAVE_pred_matrix_mul_plususrvvm1si_qoq (TARGET_VECTOR && TARGET_XSFVQMACCQOQ)
#define HAVE_pred_matrix_mul_plusrvvm8si_dod (TARGET_VECTOR && TARGET_XSFVQMACCDOD)
#define HAVE_pred_matrix_mul_plusurvvm8si_dod (TARGET_VECTOR && TARGET_XSFVQMACCDOD)
#define HAVE_pred_matrix_mul_plusrvvm4si_dod (TARGET_VECTOR && TARGET_XSFVQMACCDOD)
#define HAVE_pred_matrix_mul_plusurvvm4si_dod (TARGET_VECTOR && TARGET_XSFVQMACCDOD)
#define HAVE_pred_matrix_mul_plusrvvm2si_dod (TARGET_VECTOR && TARGET_XSFVQMACCDOD)
#define HAVE_pred_matrix_mul_plusurvvm2si_dod (TARGET_VECTOR && TARGET_XSFVQMACCDOD)
#define HAVE_pred_matrix_mul_plusrvvm1si_dod (TARGET_VECTOR && TARGET_XSFVQMACCDOD)
#define HAVE_pred_matrix_mul_plusurvvm1si_dod (TARGET_VECTOR && TARGET_XSFVQMACCDOD)
#define HAVE_pred_matrix_mul_plussurvvm8si_dod (TARGET_VECTOR && TARGET_XSFVQMACCDOD)
#define HAVE_pred_matrix_mul_plussurvvm4si_dod (TARGET_VECTOR && TARGET_XSFVQMACCDOD)
#define HAVE_pred_matrix_mul_plussurvvm2si_dod (TARGET_VECTOR && TARGET_XSFVQMACCDOD)
#define HAVE_pred_matrix_mul_plussurvvm1si_dod (TARGET_VECTOR && TARGET_XSFVQMACCDOD)
#define HAVE_pred_matrix_mul_plususrvvm8si_dod (TARGET_VECTOR && TARGET_XSFVQMACCDOD)
#define HAVE_pred_matrix_mul_plususrvvm4si_dod (TARGET_VECTOR && TARGET_XSFVQMACCDOD)
#define HAVE_pred_matrix_mul_plususrvvm2si_dod (TARGET_VECTOR && TARGET_XSFVQMACCDOD)
#define HAVE_pred_matrix_mul_plususrvvm1si_dod (TARGET_VECTOR && TARGET_XSFVQMACCDOD)
#define HAVE_pred_sf_vfnrcliprvvm2qi_x_f_qf (TARGET_VECTOR && TARGET_XSFVFNRCLIPXFQF)
#define HAVE_pred_sf_vfnrclipurvvm2qi_x_f_qf (TARGET_VECTOR && TARGET_XSFVFNRCLIPXFQF)
#define HAVE_pred_sf_vfnrcliprvvm1qi_x_f_qf (TARGET_VECTOR && TARGET_XSFVFNRCLIPXFQF)
#define HAVE_pred_sf_vfnrclipurvvm1qi_x_f_qf (TARGET_VECTOR && TARGET_XSFVFNRCLIPXFQF)
#define HAVE_pred_sf_vfnrcliprvvmf2qi_x_f_qf (TARGET_VECTOR && TARGET_XSFVFNRCLIPXFQF)
#define HAVE_pred_sf_vfnrclipurvvmf2qi_x_f_qf (TARGET_VECTOR && TARGET_XSFVFNRCLIPXFQF)
#define HAVE_pred_sf_vfnrcliprvvmf4qi_x_f_qf (TARGET_VECTOR && TARGET_XSFVFNRCLIPXFQF)
#define HAVE_pred_sf_vfnrclipurvvmf4qi_x_f_qf (TARGET_VECTOR && TARGET_XSFVFNRCLIPXFQF)
#define HAVE_pred_sf_vfnrcliprvvmf8qi_x_f_qf ((TARGET_VECTOR && TARGET_XSFVFNRCLIPXFQF) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sf_vfnrclipurvvmf8qi_x_f_qf ((TARGET_VECTOR && TARGET_XSFVFNRCLIPXFQF) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_x_servvm8qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_x_servvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_x_servvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_x_servvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_x_servvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_x_servvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_x_servvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_x_servvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_x_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_x_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_x_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_x_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_x_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_x_servvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_x_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_x_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_x_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_x_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_x_servvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_x_servvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_x_servvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_x_servvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_x_sev1qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sf_vc_x_sev2qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sf_vc_x_sev4qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sf_vc_x_sev8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sf_vc_x_sev16qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sf_vc_x_sev32qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sf_vc_x_sev64qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_x_sev128qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_x_sev256qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_x_sev512qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_x_sev1024qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_x_sev2048qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_x_sev4096qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_x_sev1hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sf_vc_x_sev2hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sf_vc_x_sev4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sf_vc_x_sev8hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sf_vc_x_sev16hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sf_vc_x_sev32hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_x_sev64hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_x_sev128hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_x_sev256hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_x_sev512hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_x_sev1024hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_x_sev2048hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_x_sev1si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sf_vc_x_sev2si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sf_vc_x_sev4si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sf_vc_x_sev8si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sf_vc_x_sev16si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_x_sev32si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_x_sev64si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_x_sev128si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_x_sev256si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_x_sev512si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_x_sev1024si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_x_sev1di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_x_sev2di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_x_sev4di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_x_sev8di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_x_sev16di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_x_sev32di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_x_sev64di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_x_sev128di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_x_sev256di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_x_sev512di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_x_servvm8qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_x_servvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_x_servvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_x_servvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_x_servvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_x_servvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_x_servvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_x_servvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_x_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_x_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_x_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_x_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_x_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_x_servvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_x_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_x_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_x_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_x_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_x_servvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_x_servvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_x_servvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_x_servvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_x_sev1qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sf_vc_v_x_sev2qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sf_vc_v_x_sev4qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sf_vc_v_x_sev8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sf_vc_v_x_sev16qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sf_vc_v_x_sev32qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sf_vc_v_x_sev64qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_x_sev128qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_x_sev256qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_x_sev512qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_x_sev1024qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_x_sev2048qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_x_sev4096qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_x_sev1hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sf_vc_v_x_sev2hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sf_vc_v_x_sev4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sf_vc_v_x_sev8hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sf_vc_v_x_sev16hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sf_vc_v_x_sev32hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_x_sev64hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_x_sev128hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_x_sev256hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_x_sev512hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_x_sev1024hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_x_sev2048hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_x_sev1si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sf_vc_v_x_sev2si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sf_vc_v_x_sev4si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sf_vc_v_x_sev8si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sf_vc_v_x_sev16si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_x_sev32si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_x_sev64si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_x_sev128si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_x_sev256si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_x_sev512si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_x_sev1024si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_x_sev1di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_x_sev2di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_x_sev4di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_x_sev8di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_x_sev16di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_x_sev32di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_x_sev64di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_x_sev128di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_x_sev256di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_x_sev512di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_xrvvm8qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xrvvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xrvvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xrvvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xrvvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xrvvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xrvvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_xrvvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xrvvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xrvvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xrvvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xrvvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xrvvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_xrvvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xrvvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xrvvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xrvvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xrvvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_xrvvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_xrvvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_xrvvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_xrvvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_xv1qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sf_vc_v_xv2qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sf_vc_v_xv4qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sf_vc_v_xv8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sf_vc_v_xv16qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sf_vc_v_xv32qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sf_vc_v_xv64qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_xv128qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_xv256qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_xv512qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_xv1024qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_xv2048qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_xv4096qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_xv1hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sf_vc_v_xv2hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sf_vc_v_xv4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sf_vc_v_xv8hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sf_vc_v_xv16hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sf_vc_v_xv32hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_xv64hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_xv128hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_xv256hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_xv512hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_xv1024hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_xv2048hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_xv1si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sf_vc_v_xv2si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sf_vc_v_xv4si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sf_vc_v_xv8si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sf_vc_v_xv16si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_xv32si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_xv64si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_xv128si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_xv256si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_xv512si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_xv1024si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_xv1di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_xv2di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_xv4di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_xv8di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_xv16di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_xv32di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_xv64di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_xv128di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_xv256di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_xv512di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_i_servvm8qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_i_servvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_i_servvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_i_servvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_i_servvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_i_servvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_i_servvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_i_servvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_i_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_i_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_i_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_i_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_i_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_i_servvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_i_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_i_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_i_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_i_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_i_servvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_i_servvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_i_servvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_i_servvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_i_sev1qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sf_vc_i_sev2qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sf_vc_i_sev4qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sf_vc_i_sev8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sf_vc_i_sev16qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sf_vc_i_sev32qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sf_vc_i_sev64qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_i_sev128qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_i_sev256qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_i_sev512qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_i_sev1024qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_i_sev2048qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_i_sev4096qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_i_sev1hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sf_vc_i_sev2hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sf_vc_i_sev4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sf_vc_i_sev8hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sf_vc_i_sev16hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sf_vc_i_sev32hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_i_sev64hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_i_sev128hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_i_sev256hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_i_sev512hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_i_sev1024hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_i_sev2048hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_i_sev1si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sf_vc_i_sev2si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sf_vc_i_sev4si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sf_vc_i_sev8si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sf_vc_i_sev16si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_i_sev32si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_i_sev64si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_i_sev128si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_i_sev256si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_i_sev512si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_i_sev1024si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_i_sev1di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_i_sev2di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_i_sev4di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_i_sev8di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_i_sev16di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_i_sev32di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_i_sev64di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_i_sev128di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_i_sev256di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_i_sev512di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_i_servvm8qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_i_servvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_i_servvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_i_servvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_i_servvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_i_servvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_i_servvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_i_servvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_i_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_i_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_i_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_i_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_i_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_i_servvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_i_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_i_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_i_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_i_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_i_servvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_i_servvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_i_servvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_i_servvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_i_sev1qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sf_vc_v_i_sev2qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sf_vc_v_i_sev4qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sf_vc_v_i_sev8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sf_vc_v_i_sev16qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sf_vc_v_i_sev32qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sf_vc_v_i_sev64qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_i_sev128qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_i_sev256qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_i_sev512qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_i_sev1024qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_i_sev2048qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_i_sev4096qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_i_sev1hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sf_vc_v_i_sev2hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sf_vc_v_i_sev4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sf_vc_v_i_sev8hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sf_vc_v_i_sev16hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sf_vc_v_i_sev32hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_i_sev64hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_i_sev128hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_i_sev256hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_i_sev512hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_i_sev1024hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_i_sev2048hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_i_sev1si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sf_vc_v_i_sev2si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sf_vc_v_i_sev4si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sf_vc_v_i_sev8si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sf_vc_v_i_sev16si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_i_sev32si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_i_sev64si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_i_sev128si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_i_sev256si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_i_sev512si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_i_sev1024si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_i_sev1di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_i_sev2di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_i_sev4di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_i_sev8di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_i_sev16di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_i_sev32di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_i_sev64di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_i_sev128di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_i_sev256di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_i_sev512di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_irvvm8qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_irvvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_irvvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_irvvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_irvvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_irvvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_irvvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_irvvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_irvvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_irvvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_irvvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_irvvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_irvvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_irvvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_irvvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_irvvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_irvvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_irvvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_irvvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_irvvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_irvvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_irvvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_iv1qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sf_vc_v_iv2qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sf_vc_v_iv4qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sf_vc_v_iv8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sf_vc_v_iv16qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sf_vc_v_iv32qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sf_vc_v_iv64qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_iv128qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_iv256qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_iv512qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_iv1024qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_iv2048qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_iv4096qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_iv1hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sf_vc_v_iv2hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sf_vc_v_iv4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sf_vc_v_iv8hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sf_vc_v_iv16hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sf_vc_v_iv32hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_iv64hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_iv128hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_iv256hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_iv512hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_iv1024hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_iv2048hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_iv1si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sf_vc_v_iv2si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sf_vc_v_iv4si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sf_vc_v_iv8si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sf_vc_v_iv16si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_iv32si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_iv64si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_iv128si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_iv256si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_iv512si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_iv1024si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_iv1di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_iv2di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_iv4di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_iv8di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_iv16di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_iv32di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_iv64di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_iv128di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_iv256di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_iv512di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_vv_servvm8qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vv_servvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vv_servvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vv_servvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vv_servvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vv_servvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vv_servvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_vv_servvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vv_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vv_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vv_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vv_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vv_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_vv_servvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vv_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vv_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vv_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vv_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_vv_servvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_vv_servvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_vv_servvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_vv_servvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_vv_sev1qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sf_vc_vv_sev2qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sf_vc_vv_sev4qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sf_vc_vv_sev8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sf_vc_vv_sev16qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sf_vc_vv_sev32qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sf_vc_vv_sev64qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_vv_sev128qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_vv_sev256qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_vv_sev512qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_vv_sev1024qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_vv_sev2048qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_vv_sev4096qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_vv_sev1hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sf_vc_vv_sev2hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sf_vc_vv_sev4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sf_vc_vv_sev8hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sf_vc_vv_sev16hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sf_vc_vv_sev32hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_vv_sev64hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_vv_sev128hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_vv_sev256hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_vv_sev512hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_vv_sev1024hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_vv_sev2048hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_vv_sev1si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sf_vc_vv_sev2si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sf_vc_vv_sev4si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sf_vc_vv_sev8si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sf_vc_vv_sev16si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_vv_sev32si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_vv_sev64si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_vv_sev128si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_vv_sev256si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_vv_sev512si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_vv_sev1024si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_vv_sev1di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_vv_sev2di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_vv_sev4di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_vv_sev8di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_vv_sev16di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_vv_sev32di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_vv_sev64di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_vv_sev128di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_vv_sev256di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_vv_sev512di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_vv_servvm8qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vv_servvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vv_servvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vv_servvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vv_servvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vv_servvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vv_servvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_vv_servvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vv_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vv_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vv_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vv_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vv_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_vv_servvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vv_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vv_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vv_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vv_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_vv_servvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_vv_servvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_vv_servvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_vv_servvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_vv_sev1qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sf_vc_v_vv_sev2qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sf_vc_v_vv_sev4qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sf_vc_v_vv_sev8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sf_vc_v_vv_sev16qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sf_vc_v_vv_sev32qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sf_vc_v_vv_sev64qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_vv_sev128qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_vv_sev256qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_vv_sev512qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_vv_sev1024qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_vv_sev2048qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_vv_sev4096qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_vv_sev1hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sf_vc_v_vv_sev2hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sf_vc_v_vv_sev4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sf_vc_v_vv_sev8hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sf_vc_v_vv_sev16hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sf_vc_v_vv_sev32hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_vv_sev64hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_vv_sev128hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_vv_sev256hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_vv_sev512hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_vv_sev1024hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_vv_sev2048hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_vv_sev1si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sf_vc_v_vv_sev2si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sf_vc_v_vv_sev4si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sf_vc_v_vv_sev8si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sf_vc_v_vv_sev16si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_vv_sev32si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_vv_sev64si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_vv_sev128si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_vv_sev256si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_vv_sev512si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_vv_sev1024si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_vv_sev1di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_vv_sev2di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_vv_sev4di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_vv_sev8di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_vv_sev16di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_vv_sev32di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_vv_sev64di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_vv_sev128di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_vv_sev256di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_vv_sev512di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_vvrvvm8qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvrvvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvrvvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvrvvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvrvvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvrvvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvrvvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_vvrvvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvrvvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvrvvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvrvvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvrvvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvrvvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_vvrvvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvrvvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvrvvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvrvvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvrvvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_vvrvvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_vvrvvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_vvrvvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_vvrvvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_vvv1qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sf_vc_v_vvv2qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sf_vc_v_vvv4qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sf_vc_v_vvv8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sf_vc_v_vvv16qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sf_vc_v_vvv32qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sf_vc_v_vvv64qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_vvv128qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_vvv256qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_vvv512qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_vvv1024qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_vvv2048qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_vvv4096qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_vvv1hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sf_vc_v_vvv2hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sf_vc_v_vvv4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sf_vc_v_vvv8hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sf_vc_v_vvv16hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sf_vc_v_vvv32hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_vvv64hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_vvv128hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_vvv256hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_vvv512hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_vvv1024hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_vvv2048hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_vvv1si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sf_vc_v_vvv2si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sf_vc_v_vvv4si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sf_vc_v_vvv8si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sf_vc_v_vvv16si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_vvv32si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_vvv64si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_vvv128si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_vvv256si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_vvv512si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_vvv1024si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_vvv1di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_vvv2di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_vvv4di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_vvv8di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_vvv16di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_vvv32di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_vvv64di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_vvv128di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_vvv256di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_vvv512di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_xv_servvm8qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xv_servvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xv_servvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xv_servvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xv_servvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xv_servvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xv_servvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_xv_servvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xv_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xv_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xv_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xv_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xv_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_xv_servvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xv_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xv_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xv_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xv_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_xv_servvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_xv_servvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_xv_servvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_xv_servvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_xv_sev1qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sf_vc_xv_sev2qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sf_vc_xv_sev4qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sf_vc_xv_sev8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sf_vc_xv_sev16qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sf_vc_xv_sev32qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sf_vc_xv_sev64qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_xv_sev128qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_xv_sev256qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_xv_sev512qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_xv_sev1024qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_xv_sev2048qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_xv_sev4096qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_xv_sev1hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sf_vc_xv_sev2hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sf_vc_xv_sev4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sf_vc_xv_sev8hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sf_vc_xv_sev16hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sf_vc_xv_sev32hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_xv_sev64hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_xv_sev128hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_xv_sev256hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_xv_sev512hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_xv_sev1024hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_xv_sev2048hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_xv_sev1si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sf_vc_xv_sev2si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sf_vc_xv_sev4si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sf_vc_xv_sev8si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sf_vc_xv_sev16si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_xv_sev32si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_xv_sev64si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_xv_sev128si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_xv_sev256si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_xv_sev512si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_xv_sev1024si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_xv_sev1di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_xv_sev2di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_xv_sev4di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_xv_sev8di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_xv_sev16di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_xv_sev32di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_xv_sev64di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_xv_sev128di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_xv_sev256di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_xv_sev512di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_xv_servvm8qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xv_servvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xv_servvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xv_servvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xv_servvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xv_servvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xv_servvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_xv_servvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xv_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xv_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xv_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xv_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xv_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_xv_servvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xv_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xv_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xv_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xv_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_xv_servvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_xv_servvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_xv_servvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_xv_servvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_xv_sev1qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sf_vc_v_xv_sev2qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sf_vc_v_xv_sev4qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sf_vc_v_xv_sev8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sf_vc_v_xv_sev16qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sf_vc_v_xv_sev32qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sf_vc_v_xv_sev64qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_xv_sev128qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_xv_sev256qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_xv_sev512qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_xv_sev1024qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_xv_sev2048qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_xv_sev4096qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_xv_sev1hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sf_vc_v_xv_sev2hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sf_vc_v_xv_sev4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sf_vc_v_xv_sev8hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sf_vc_v_xv_sev16hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sf_vc_v_xv_sev32hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_xv_sev64hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_xv_sev128hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_xv_sev256hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_xv_sev512hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_xv_sev1024hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_xv_sev2048hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_xv_sev1si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sf_vc_v_xv_sev2si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sf_vc_v_xv_sev4si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sf_vc_v_xv_sev8si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sf_vc_v_xv_sev16si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_xv_sev32si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_xv_sev64si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_xv_sev128si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_xv_sev256si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_xv_sev512si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_xv_sev1024si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_xv_sev1di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_xv_sev2di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_xv_sev4di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_xv_sev8di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_xv_sev16di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_xv_sev32di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_xv_sev64di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_xv_sev128di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_xv_sev256di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_xv_sev512di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_xvrvvm8qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvrvvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvrvvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvrvvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvrvvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvrvvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvrvvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_xvrvvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvrvvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvrvvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvrvvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvrvvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvrvvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_xvrvvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvrvvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvrvvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvrvvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvrvvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_xvrvvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_xvrvvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_xvrvvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_xvrvvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_xvv1qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sf_vc_v_xvv2qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sf_vc_v_xvv4qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sf_vc_v_xvv8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sf_vc_v_xvv16qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sf_vc_v_xvv32qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sf_vc_v_xvv64qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_xvv128qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_xvv256qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_xvv512qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_xvv1024qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_xvv2048qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_xvv4096qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_xvv1hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sf_vc_v_xvv2hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sf_vc_v_xvv4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sf_vc_v_xvv8hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sf_vc_v_xvv16hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sf_vc_v_xvv32hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_xvv64hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_xvv128hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_xvv256hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_xvv512hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_xvv1024hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_xvv2048hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_xvv1si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sf_vc_v_xvv2si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sf_vc_v_xvv4si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sf_vc_v_xvv8si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sf_vc_v_xvv16si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_xvv32si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_xvv64si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_xvv128si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_xvv256si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_xvv512si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_xvv1024si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_xvv1di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_xvv2di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_xvv4di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_xvv8di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_xvv16di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_xvv32di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_xvv64di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_xvv128di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_xvv256di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_xvv512di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_iv_servvm8qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_iv_servvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_iv_servvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_iv_servvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_iv_servvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_iv_servvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_iv_servvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_iv_servvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_iv_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_iv_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_iv_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_iv_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_iv_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_iv_servvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_iv_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_iv_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_iv_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_iv_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_iv_servvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_iv_servvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_iv_servvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_iv_servvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_iv_sev1qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sf_vc_iv_sev2qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sf_vc_iv_sev4qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sf_vc_iv_sev8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sf_vc_iv_sev16qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sf_vc_iv_sev32qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sf_vc_iv_sev64qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_iv_sev128qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_iv_sev256qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_iv_sev512qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_iv_sev1024qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_iv_sev2048qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_iv_sev4096qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_iv_sev1hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sf_vc_iv_sev2hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sf_vc_iv_sev4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sf_vc_iv_sev8hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sf_vc_iv_sev16hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sf_vc_iv_sev32hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_iv_sev64hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_iv_sev128hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_iv_sev256hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_iv_sev512hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_iv_sev1024hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_iv_sev2048hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_iv_sev1si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sf_vc_iv_sev2si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sf_vc_iv_sev4si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sf_vc_iv_sev8si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sf_vc_iv_sev16si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_iv_sev32si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_iv_sev64si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_iv_sev128si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_iv_sev256si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_iv_sev512si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_iv_sev1024si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_iv_sev1di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_iv_sev2di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_iv_sev4di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_iv_sev8di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_iv_sev16di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_iv_sev32di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_iv_sev64di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_iv_sev128di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_iv_sev256di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_iv_sev512di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_iv_servvm8qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_iv_servvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_iv_servvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_iv_servvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_iv_servvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_iv_servvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_iv_servvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_iv_servvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_iv_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_iv_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_iv_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_iv_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_iv_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_iv_servvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_iv_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_iv_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_iv_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_iv_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_iv_servvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_iv_servvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_iv_servvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_iv_servvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_iv_sev1qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sf_vc_v_iv_sev2qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sf_vc_v_iv_sev4qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sf_vc_v_iv_sev8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sf_vc_v_iv_sev16qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sf_vc_v_iv_sev32qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sf_vc_v_iv_sev64qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_iv_sev128qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_iv_sev256qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_iv_sev512qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_iv_sev1024qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_iv_sev2048qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_iv_sev4096qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_iv_sev1hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sf_vc_v_iv_sev2hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sf_vc_v_iv_sev4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sf_vc_v_iv_sev8hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sf_vc_v_iv_sev16hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sf_vc_v_iv_sev32hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_iv_sev64hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_iv_sev128hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_iv_sev256hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_iv_sev512hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_iv_sev1024hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_iv_sev2048hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_iv_sev1si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sf_vc_v_iv_sev2si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sf_vc_v_iv_sev4si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sf_vc_v_iv_sev8si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sf_vc_v_iv_sev16si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_iv_sev32si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_iv_sev64si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_iv_sev128si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_iv_sev256si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_iv_sev512si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_iv_sev1024si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_iv_sev1di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_iv_sev2di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_iv_sev4di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_iv_sev8di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_iv_sev16di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_iv_sev32di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_iv_sev64di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_iv_sev128di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_iv_sev256di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_iv_sev512di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_ivrvvm8qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivrvvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivrvvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivrvvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivrvvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivrvvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivrvvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_ivrvvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivrvvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivrvvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivrvvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivrvvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivrvvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_ivrvvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivrvvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivrvvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivrvvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivrvvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_ivrvvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_ivrvvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_ivrvvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_ivrvvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_ivv1qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sf_vc_v_ivv2qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sf_vc_v_ivv4qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sf_vc_v_ivv8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sf_vc_v_ivv16qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sf_vc_v_ivv32qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sf_vc_v_ivv64qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_ivv128qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_ivv256qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_ivv512qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_ivv1024qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_ivv2048qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_ivv4096qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_ivv1hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sf_vc_v_ivv2hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sf_vc_v_ivv4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sf_vc_v_ivv8hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sf_vc_v_ivv16hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sf_vc_v_ivv32hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_ivv64hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_ivv128hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_ivv256hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_ivv512hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_ivv1024hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_ivv2048hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_ivv1si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sf_vc_v_ivv2si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sf_vc_v_ivv4si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sf_vc_v_ivv8si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sf_vc_v_ivv16si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_ivv32si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_ivv64si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_ivv128si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_ivv256si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_ivv512si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_ivv1024si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_ivv1di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_ivv2di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_ivv4di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_ivv8di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_ivv16di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_ivv32di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_ivv64di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_ivv128di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_ivv256di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_ivv512di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_fv_servvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fv_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fv_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fv_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fv_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fv_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_fv_servvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fv_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fv_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fv_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fv_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_fv_servvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_fv_servvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_fv_servvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_fv_servvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_fv_servvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fv_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fv_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fv_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fv_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fv_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_fv_servvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fv_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fv_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fv_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fv_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_fv_servvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_fv_servvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_fv_servvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_fv_servvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_fvrvvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvrvvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvrvvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvrvvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvrvvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvrvvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_fvrvvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvrvvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvrvvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvrvvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvrvvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_fvrvvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_fvrvvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_fvrvvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_fvrvvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_vvv_servvm8qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvv_servvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvv_servvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvv_servvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvv_servvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvv_servvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvv_servvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_vvv_servvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvv_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvv_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvv_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvv_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvv_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_vvv_servvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvv_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvv_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvv_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvv_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_vvv_servvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_vvv_servvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_vvv_servvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_vvv_servvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_vvv_sev1qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sf_vc_vvv_sev2qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sf_vc_vvv_sev4qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sf_vc_vvv_sev8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sf_vc_vvv_sev16qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sf_vc_vvv_sev32qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sf_vc_vvv_sev64qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_vvv_sev128qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_vvv_sev256qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_vvv_sev512qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_vvv_sev1024qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_vvv_sev2048qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_vvv_sev4096qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_vvv_sev1hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sf_vc_vvv_sev2hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sf_vc_vvv_sev4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sf_vc_vvv_sev8hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sf_vc_vvv_sev16hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sf_vc_vvv_sev32hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_vvv_sev64hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_vvv_sev128hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_vvv_sev256hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_vvv_sev512hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_vvv_sev1024hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_vvv_sev2048hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_vvv_sev1si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sf_vc_vvv_sev2si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sf_vc_vvv_sev4si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sf_vc_vvv_sev8si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sf_vc_vvv_sev16si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_vvv_sev32si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_vvv_sev64si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_vvv_sev128si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_vvv_sev256si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_vvv_sev512si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_vvv_sev1024si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_vvv_sev1di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_vvv_sev2di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_vvv_sev4di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_vvv_sev8di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_vvv_sev16di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_vvv_sev32di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_vvv_sev64di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_vvv_sev128di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_vvv_sev256di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_vvv_sev512di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_vvv_servvm8qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvv_servvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvv_servvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvv_servvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvv_servvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvv_servvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvv_servvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_vvv_servvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvv_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvv_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvv_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvv_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvv_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_vvv_servvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvv_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvv_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvv_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvv_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_vvv_servvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_vvv_servvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_vvv_servvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_vvv_servvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_vvv_sev1qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sf_vc_v_vvv_sev2qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sf_vc_v_vvv_sev4qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sf_vc_v_vvv_sev8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sf_vc_v_vvv_sev16qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sf_vc_v_vvv_sev32qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sf_vc_v_vvv_sev64qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_vvv_sev128qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_vvv_sev256qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_vvv_sev512qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_vvv_sev1024qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_vvv_sev2048qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_vvv_sev4096qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_vvv_sev1hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sf_vc_v_vvv_sev2hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sf_vc_v_vvv_sev4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sf_vc_v_vvv_sev8hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sf_vc_v_vvv_sev16hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sf_vc_v_vvv_sev32hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_vvv_sev64hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_vvv_sev128hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_vvv_sev256hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_vvv_sev512hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_vvv_sev1024hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_vvv_sev2048hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_vvv_sev1si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sf_vc_v_vvv_sev2si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sf_vc_v_vvv_sev4si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sf_vc_v_vvv_sev8si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sf_vc_v_vvv_sev16si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_vvv_sev32si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_vvv_sev64si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_vvv_sev128si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_vvv_sev256si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_vvv_sev512si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_vvv_sev1024si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_vvv_sev1di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_vvv_sev2di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_vvv_sev4di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_vvv_sev8di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_vvv_sev16di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_vvv_sev32di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_vvv_sev64di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_vvv_sev128di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_vvv_sev256di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_vvv_sev512di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_vvvrvvm8qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvvrvvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvvrvvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvvrvvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvvrvvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvvrvvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvvrvvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_vvvrvvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvvrvvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvvrvvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvvrvvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvvrvvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvvrvvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_vvvrvvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvvrvvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvvrvvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvvrvvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvvrvvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_vvvrvvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_vvvrvvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_vvvrvvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_vvvrvvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_vvvv1qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sf_vc_v_vvvv2qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sf_vc_v_vvvv4qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sf_vc_v_vvvv8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sf_vc_v_vvvv16qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sf_vc_v_vvvv32qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sf_vc_v_vvvv64qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_vvvv128qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_vvvv256qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_vvvv512qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_vvvv1024qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_vvvv2048qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_vvvv4096qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_vvvv1hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sf_vc_v_vvvv2hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sf_vc_v_vvvv4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sf_vc_v_vvvv8hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sf_vc_v_vvvv16hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sf_vc_v_vvvv32hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_vvvv64hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_vvvv128hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_vvvv256hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_vvvv512hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_vvvv1024hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_vvvv2048hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_vvvv1si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sf_vc_v_vvvv2si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sf_vc_v_vvvv4si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sf_vc_v_vvvv8si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sf_vc_v_vvvv16si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_vvvv32si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_vvvv64si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_vvvv128si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_vvvv256si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_vvvv512si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_vvvv1024si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_vvvv1di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_vvvv2di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_vvvv4di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_vvvv8di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_vvvv16di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_vvvv32di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_vvvv64di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_vvvv128di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_vvvv256di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_vvvv512di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_xvv_servvm8qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvv_servvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvv_servvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvv_servvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvv_servvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvv_servvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvv_servvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_xvv_servvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvv_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvv_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvv_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvv_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvv_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_xvv_servvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvv_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvv_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvv_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvv_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_xvv_servvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_xvv_servvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_xvv_servvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_xvv_servvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_xvv_sev1qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sf_vc_xvv_sev2qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sf_vc_xvv_sev4qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sf_vc_xvv_sev8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sf_vc_xvv_sev16qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sf_vc_xvv_sev32qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sf_vc_xvv_sev64qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_xvv_sev128qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_xvv_sev256qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_xvv_sev512qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_xvv_sev1024qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_xvv_sev2048qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_xvv_sev4096qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_xvv_sev1hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sf_vc_xvv_sev2hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sf_vc_xvv_sev4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sf_vc_xvv_sev8hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sf_vc_xvv_sev16hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sf_vc_xvv_sev32hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_xvv_sev64hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_xvv_sev128hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_xvv_sev256hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_xvv_sev512hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_xvv_sev1024hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_xvv_sev2048hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_xvv_sev1si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sf_vc_xvv_sev2si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sf_vc_xvv_sev4si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sf_vc_xvv_sev8si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sf_vc_xvv_sev16si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_xvv_sev32si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_xvv_sev64si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_xvv_sev128si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_xvv_sev256si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_xvv_sev512si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_xvv_sev1024si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_xvv_sev1di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_xvv_sev2di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_xvv_sev4di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_xvv_sev8di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_xvv_sev16di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_xvv_sev32di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_xvv_sev64di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_xvv_sev128di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_xvv_sev256di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_xvv_sev512di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_xvv_servvm8qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvv_servvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvv_servvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvv_servvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvv_servvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvv_servvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvv_servvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_xvv_servvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvv_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvv_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvv_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvv_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvv_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_xvv_servvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvv_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvv_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvv_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvv_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_xvv_servvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_xvv_servvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_xvv_servvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_xvv_servvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_xvv_sev1qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sf_vc_v_xvv_sev2qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sf_vc_v_xvv_sev4qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sf_vc_v_xvv_sev8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sf_vc_v_xvv_sev16qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sf_vc_v_xvv_sev32qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sf_vc_v_xvv_sev64qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_xvv_sev128qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_xvv_sev256qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_xvv_sev512qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_xvv_sev1024qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_xvv_sev2048qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_xvv_sev4096qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_xvv_sev1hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sf_vc_v_xvv_sev2hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sf_vc_v_xvv_sev4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sf_vc_v_xvv_sev8hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sf_vc_v_xvv_sev16hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sf_vc_v_xvv_sev32hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_xvv_sev64hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_xvv_sev128hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_xvv_sev256hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_xvv_sev512hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_xvv_sev1024hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_xvv_sev2048hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_xvv_sev1si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sf_vc_v_xvv_sev2si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sf_vc_v_xvv_sev4si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sf_vc_v_xvv_sev8si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sf_vc_v_xvv_sev16si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_xvv_sev32si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_xvv_sev64si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_xvv_sev128si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_xvv_sev256si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_xvv_sev512si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_xvv_sev1024si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_xvv_sev1di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_xvv_sev2di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_xvv_sev4di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_xvv_sev8di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_xvv_sev16di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_xvv_sev32di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_xvv_sev64di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_xvv_sev128di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_xvv_sev256di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_xvv_sev512di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_xvvrvvm8qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvvrvvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvvrvvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvvrvvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvvrvvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvvrvvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvvrvvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_xvvrvvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvvrvvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvvrvvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvvrvvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvvrvvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvvrvvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_xvvrvvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvvrvvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvvrvvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvvrvvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvvrvvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_xvvrvvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_xvvrvvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_xvvrvvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_xvvrvvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_xvvv1qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sf_vc_v_xvvv2qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sf_vc_v_xvvv4qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sf_vc_v_xvvv8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sf_vc_v_xvvv16qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sf_vc_v_xvvv32qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sf_vc_v_xvvv64qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_xvvv128qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_xvvv256qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_xvvv512qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_xvvv1024qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_xvvv2048qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_xvvv4096qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_xvvv1hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sf_vc_v_xvvv2hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sf_vc_v_xvvv4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sf_vc_v_xvvv8hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sf_vc_v_xvvv16hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sf_vc_v_xvvv32hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_xvvv64hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_xvvv128hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_xvvv256hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_xvvv512hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_xvvv1024hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_xvvv2048hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_xvvv1si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sf_vc_v_xvvv2si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sf_vc_v_xvvv4si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sf_vc_v_xvvv8si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sf_vc_v_xvvv16si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_xvvv32si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_xvvv64si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_xvvv128si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_xvvv256si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_xvvv512si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_xvvv1024si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_xvvv1di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_xvvv2di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_xvvv4di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_xvvv8di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_xvvv16di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_xvvv32di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_xvvv64di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_xvvv128di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_xvvv256di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_xvvv512di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_ivv_servvm8qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivv_servvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivv_servvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivv_servvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivv_servvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivv_servvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivv_servvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_ivv_servvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivv_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivv_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivv_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivv_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivv_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_ivv_servvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivv_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivv_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivv_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivv_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_ivv_servvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_ivv_servvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_ivv_servvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_ivv_servvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_ivv_sev1qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sf_vc_ivv_sev2qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sf_vc_ivv_sev4qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sf_vc_ivv_sev8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sf_vc_ivv_sev16qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sf_vc_ivv_sev32qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sf_vc_ivv_sev64qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_ivv_sev128qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_ivv_sev256qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_ivv_sev512qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_ivv_sev1024qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_ivv_sev2048qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_ivv_sev4096qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_ivv_sev1hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sf_vc_ivv_sev2hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sf_vc_ivv_sev4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sf_vc_ivv_sev8hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sf_vc_ivv_sev16hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sf_vc_ivv_sev32hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_ivv_sev64hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_ivv_sev128hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_ivv_sev256hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_ivv_sev512hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_ivv_sev1024hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_ivv_sev2048hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_ivv_sev1si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sf_vc_ivv_sev2si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sf_vc_ivv_sev4si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sf_vc_ivv_sev8si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sf_vc_ivv_sev16si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_ivv_sev32si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_ivv_sev64si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_ivv_sev128si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_ivv_sev256si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_ivv_sev512si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_ivv_sev1024si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_ivv_sev1di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_ivv_sev2di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_ivv_sev4di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_ivv_sev8di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_ivv_sev16di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_ivv_sev32di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_ivv_sev64di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_ivv_sev128di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_ivv_sev256di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_ivv_sev512di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_ivv_servvm8qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivv_servvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivv_servvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivv_servvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivv_servvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivv_servvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivv_servvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_ivv_servvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivv_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivv_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivv_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivv_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivv_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_ivv_servvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivv_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivv_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivv_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivv_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_ivv_servvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_ivv_servvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_ivv_servvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_ivv_servvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_ivv_sev1qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sf_vc_v_ivv_sev2qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sf_vc_v_ivv_sev4qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sf_vc_v_ivv_sev8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sf_vc_v_ivv_sev16qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sf_vc_v_ivv_sev32qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sf_vc_v_ivv_sev64qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_ivv_sev128qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_ivv_sev256qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_ivv_sev512qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_ivv_sev1024qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_ivv_sev2048qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_ivv_sev4096qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_ivv_sev1hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sf_vc_v_ivv_sev2hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sf_vc_v_ivv_sev4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sf_vc_v_ivv_sev8hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sf_vc_v_ivv_sev16hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sf_vc_v_ivv_sev32hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_ivv_sev64hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_ivv_sev128hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_ivv_sev256hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_ivv_sev512hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_ivv_sev1024hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_ivv_sev2048hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_ivv_sev1si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sf_vc_v_ivv_sev2si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sf_vc_v_ivv_sev4si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sf_vc_v_ivv_sev8si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sf_vc_v_ivv_sev16si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_ivv_sev32si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_ivv_sev64si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_ivv_sev128si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_ivv_sev256si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_ivv_sev512si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_ivv_sev1024si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_ivv_sev1di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_ivv_sev2di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_ivv_sev4di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_ivv_sev8di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_ivv_sev16di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_ivv_sev32di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_ivv_sev64di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_ivv_sev128di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_ivv_sev256di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_ivv_sev512di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_ivvrvvm8qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivvrvvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivvrvvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivvrvvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivvrvvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivvrvvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivvrvvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_ivvrvvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivvrvvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivvrvvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivvrvvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivvrvvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivvrvvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_ivvrvvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivvrvvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivvrvvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivvrvvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivvrvvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_ivvrvvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_ivvrvvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_ivvrvvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_ivvrvvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_FULL_V))
#define HAVE_sf_vc_v_ivvv1qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sf_vc_v_ivvv2qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sf_vc_v_ivvv4qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sf_vc_v_ivvv8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sf_vc_v_ivvv16qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sf_vc_v_ivvv32qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sf_vc_v_ivvv64qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_ivvv128qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_ivvv256qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_ivvv512qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_ivvv1024qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_ivvv2048qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_ivvv4096qi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_ivvv1hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sf_vc_v_ivvv2hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sf_vc_v_ivvv4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sf_vc_v_ivvv8hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sf_vc_v_ivvv16hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sf_vc_v_ivvv32hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_ivvv64hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_ivvv128hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_ivvv256hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_ivvv512hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_ivvv1024hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_ivvv2048hi ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_ivvv1si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sf_vc_v_ivvv2si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sf_vc_v_ivvv4si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sf_vc_v_ivvv8si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sf_vc_v_ivvv16si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_ivvv32si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_ivvv64si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_ivvv128si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_ivvv256si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_ivvv512si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_ivvv1024si ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_v_ivvv1di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_ivvv2di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_ivvv4di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_FULL_V))
#define HAVE_sf_vc_v_ivvv8di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 64))
#define HAVE_sf_vc_v_ivvv16di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 128))
#define HAVE_sf_vc_v_ivvv32di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 256))
#define HAVE_sf_vc_v_ivvv64di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 512))
#define HAVE_sf_vc_v_ivvv128di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 1024))
#define HAVE_sf_vc_v_ivvv256di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 2048))
#define HAVE_sf_vc_v_ivvv512di ((TARGET_VECTOR && TARGET_XSFVCP) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_FULL_V && TARGET_MIN_VLEN >= 4096))
#define HAVE_sf_vc_fvv_servvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fvv_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fvv_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fvv_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fvv_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fvv_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_fvv_servvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fvv_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fvv_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fvv_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fvv_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_fvv_servvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_fvv_servvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_fvv_servvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_fvv_servvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_fvv_servvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvv_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvv_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvv_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvv_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvv_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_fvv_servvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvv_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvv_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvv_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvv_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_fvv_servvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_fvv_servvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_fvv_servvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_fvv_servvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_fvvrvvm8hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvvrvvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvvrvvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvvrvvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvvrvvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvvrvvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_fvvrvvm8si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvvrvvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvvrvvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvvrvvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvvrvvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_fvvrvvm8di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_fvvrvvm4di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_fvvrvvm2di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_v_fvvrvvm1di ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sf_vc_vvw_servvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvw_servvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvw_servvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvw_servvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvw_servvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvw_servvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_vvw_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvw_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvw_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvw_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvw_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_vvw_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvw_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvw_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_vvw_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_vvw_servvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvw_servvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvw_servvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvw_servvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvw_servvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvw_servvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_vvw_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvw_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvw_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvw_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvw_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_vvw_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvw_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvw_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvw_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_vvwrvvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvwrvvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvwrvvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvwrvvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvwrvvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvwrvvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_vvwrvvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvwrvvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvwrvvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvwrvvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvwrvvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_vvwrvvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvwrvvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvwrvvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_vvwrvvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_xvw_servvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvw_servvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvw_servvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvw_servvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvw_servvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvw_servvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_xvw_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvw_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvw_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvw_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvw_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_xvw_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvw_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvw_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_xvw_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_xvw_servvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvw_servvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvw_servvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvw_servvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvw_servvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvw_servvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_xvw_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvw_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvw_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvw_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvw_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_xvw_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvw_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvw_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvw_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_xvwrvvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvwrvvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvwrvvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvwrvvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvwrvvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvwrvvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_xvwrvvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvwrvvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvwrvvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvwrvvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvwrvvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_xvwrvvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvwrvvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvwrvvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_xvwrvvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_ivw_servvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivw_servvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivw_servvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivw_servvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivw_servvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivw_servvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_ivw_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivw_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivw_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivw_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivw_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_ivw_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivw_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivw_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_ivw_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_ivw_servvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivw_servvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivw_servvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivw_servvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivw_servvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivw_servvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_ivw_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivw_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivw_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivw_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivw_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_ivw_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivw_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivw_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivw_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_ivwrvvm4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivwrvvm2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivwrvvm1qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivwrvvmf2qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivwrvvmf4qi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivwrvvmf8qi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_ivwrvvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivwrvvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivwrvvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivwrvvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivwrvvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_ivwrvvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivwrvvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivwrvvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_ivwrvvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_fvw_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fvw_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fvw_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fvw_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fvw_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_fvw_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fvw_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fvw_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_fvw_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_fvw_servvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvw_servvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvw_servvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvw_servvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvw_servvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_fvw_servvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvw_servvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvw_servvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvw_servvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_fvwrvvm4hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvwrvvm2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvwrvvm1hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvwrvvmf2hi (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvwrvvmf4hi ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_sf_vc_v_fvwrvvm4si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvwrvvm2si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvwrvvm1si (TARGET_VECTOR && TARGET_XSFVCP)
#define HAVE_sf_vc_v_fvwrvvmf2si ((TARGET_VECTOR && TARGET_XSFVCP) && (TARGET_MIN_VLEN > 32))
#define HAVE_pred_nds_vfncvt_bf16rvvm8sf ((TARGET_VECTOR && TARGET_XANDESVBFHCVT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_nds_vfncvt_bf16rvvm4sf ((TARGET_VECTOR && TARGET_XANDESVBFHCVT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_nds_vfncvt_bf16rvvm2sf ((TARGET_VECTOR && TARGET_XANDESVBFHCVT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_nds_vfncvt_bf16rvvm1sf ((TARGET_VECTOR && TARGET_XANDESVBFHCVT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_nds_vfncvt_bf16rvvmf2sf ((TARGET_VECTOR && TARGET_XANDESVBFHCVT) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN > 32))
#define HAVE_pred_nds_vfwcvt_bf16rvvm8sf ((TARGET_VECTOR && TARGET_XANDESVBFHCVT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_nds_vfwcvt_bf16rvvm4sf ((TARGET_VECTOR && TARGET_XANDESVBFHCVT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_nds_vfwcvt_bf16rvvm2sf ((TARGET_VECTOR && TARGET_XANDESVBFHCVT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_nds_vfwcvt_bf16rvvm1sf ((TARGET_VECTOR && TARGET_XANDESVBFHCVT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_nds_vfwcvt_bf16rvvmf2sf ((TARGET_VECTOR && TARGET_XANDESVBFHCVT) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN > 32))
#define HAVE_pred_intload_movsrvvm8qi ((TARGET_VECTOR && TARGET_XANDESVSINTLOAD \
    && register_operand (operands[0], RVVM8QImode)))
#define HAVE_pred_intload_movurvvm8qi ((TARGET_VECTOR && TARGET_XANDESVSINTLOAD \
    && register_operand (operands[0], RVVM8QImode)))
#define HAVE_pred_intload_movsrvvm4qi ((TARGET_VECTOR && TARGET_XANDESVSINTLOAD \
    && register_operand (operands[0], RVVM4QImode)))
#define HAVE_pred_intload_movurvvm4qi ((TARGET_VECTOR && TARGET_XANDESVSINTLOAD \
    && register_operand (operands[0], RVVM4QImode)))
#define HAVE_pred_intload_movsrvvm2qi ((TARGET_VECTOR && TARGET_XANDESVSINTLOAD \
    && register_operand (operands[0], RVVM2QImode)))
#define HAVE_pred_intload_movurvvm2qi ((TARGET_VECTOR && TARGET_XANDESVSINTLOAD \
    && register_operand (operands[0], RVVM2QImode)))
#define HAVE_pred_intload_movsrvvm1qi ((TARGET_VECTOR && TARGET_XANDESVSINTLOAD \
    && register_operand (operands[0], RVVM1QImode)))
#define HAVE_pred_intload_movurvvm1qi ((TARGET_VECTOR && TARGET_XANDESVSINTLOAD \
    && register_operand (operands[0], RVVM1QImode)))
#define HAVE_pred_intload_movsrvvmf2qi ((TARGET_VECTOR && TARGET_XANDESVSINTLOAD \
    && register_operand (operands[0], RVVMF2QImode)))
#define HAVE_pred_intload_movurvvmf2qi ((TARGET_VECTOR && TARGET_XANDESVSINTLOAD \
    && register_operand (operands[0], RVVMF2QImode)))
#define HAVE_pred_intload_movsrvvmf4qi ((TARGET_VECTOR && TARGET_XANDESVSINTLOAD \
    && register_operand (operands[0], RVVMF4QImode)))
#define HAVE_pred_intload_movurvvmf4qi ((TARGET_VECTOR && TARGET_XANDESVSINTLOAD \
    && register_operand (operands[0], RVVMF4QImode)))
#define HAVE_pred_intload_movsrvvmf8qi (((TARGET_VECTOR && TARGET_XANDESVSINTLOAD \
    && register_operand (operands[0], RVVMF8QImode))) && (TARGET_MIN_VLEN > 32))
#define HAVE_pred_intload_movurvvmf8qi (((TARGET_VECTOR && TARGET_XANDESVSINTLOAD \
    && register_operand (operands[0], RVVMF8QImode))) && (TARGET_MIN_VLEN > 32))
#define HAVE_pred_nds_vfpmadtrvvm8hf (TARGET_VECTOR && TARGET_XANDESVPACKFPH)
#define HAVE_pred_nds_vfpmadbrvvm8hf (TARGET_VECTOR && TARGET_XANDESVPACKFPH)
#define HAVE_pred_nds_vfpmadtrvvm4hf (TARGET_VECTOR && TARGET_XANDESVPACKFPH)
#define HAVE_pred_nds_vfpmadbrvvm4hf (TARGET_VECTOR && TARGET_XANDESVPACKFPH)
#define HAVE_pred_nds_vfpmadtrvvm2hf (TARGET_VECTOR && TARGET_XANDESVPACKFPH)
#define HAVE_pred_nds_vfpmadbrvvm2hf (TARGET_VECTOR && TARGET_XANDESVPACKFPH)
#define HAVE_pred_nds_vfpmadtrvvm1hf (TARGET_VECTOR && TARGET_XANDESVPACKFPH)
#define HAVE_pred_nds_vfpmadbrvvm1hf (TARGET_VECTOR && TARGET_XANDESVPACKFPH)
#define HAVE_pred_nds_vfpmadtrvvmf2hf (TARGET_VECTOR && TARGET_XANDESVPACKFPH)
#define HAVE_pred_nds_vfpmadbrvvmf2hf (TARGET_VECTOR && TARGET_XANDESVPACKFPH)
#define HAVE_pred_nds_vfpmadtrvvmf4hf ((TARGET_VECTOR && TARGET_XANDESVPACKFPH) && (TARGET_MIN_VLEN > 32))
#define HAVE_pred_nds_vfpmadbrvvmf4hf ((TARGET_VECTOR && TARGET_XANDESVPACKFPH) && (TARGET_MIN_VLEN > 32))
#define HAVE_pred_nds_vd4dotsrvvm8si (TARGET_VECTOR && TARGET_XANDESVDOT)
#define HAVE_pred_nds_vd4doturvvm8si (TARGET_VECTOR && TARGET_XANDESVDOT)
#define HAVE_pred_nds_vd4dotsrvvm4si (TARGET_VECTOR && TARGET_XANDESVDOT)
#define HAVE_pred_nds_vd4doturvvm4si (TARGET_VECTOR && TARGET_XANDESVDOT)
#define HAVE_pred_nds_vd4dotsrvvm2si (TARGET_VECTOR && TARGET_XANDESVDOT)
#define HAVE_pred_nds_vd4doturvvm2si (TARGET_VECTOR && TARGET_XANDESVDOT)
#define HAVE_pred_nds_vd4dotsrvvm1si (TARGET_VECTOR && TARGET_XANDESVDOT)
#define HAVE_pred_nds_vd4doturvvm1si (TARGET_VECTOR && TARGET_XANDESVDOT)
#define HAVE_pred_nds_vd4dotsrvvmf2si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nds_vd4doturvvmf2si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nds_vd4dotsrvvm8di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nds_vd4doturvvm8di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nds_vd4dotsrvvm4di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nds_vd4doturvvm4di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nds_vd4dotsrvvm2di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nds_vd4doturvvm2di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nds_vd4dotsrvvm1di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nds_vd4doturvvm1di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nds_vd4dotsv1si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_nds_vd4dotuv1si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_nds_vd4dotsv2si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_nds_vd4dotuv2si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_nds_vd4dotsv4si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_nds_vd4dotuv4si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_nds_vd4dotsv8si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_nds_vd4dotuv8si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_nds_vd4dotsv16si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_nds_vd4dotuv16si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_nds_vd4dotsv32si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_nds_vd4dotuv32si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_nds_vd4dotsv64si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_nds_vd4dotuv64si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_nds_vd4dotsv128si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_nds_vd4dotuv128si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_nds_vd4dotsv256si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_nds_vd4dotuv256si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_nds_vd4dotsv512si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_nds_vd4dotuv512si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_nds_vd4dotsv1024si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_nds_vd4dotuv1024si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_nds_vd4dotsv1di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nds_vd4dotuv1di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nds_vd4dotsv2di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nds_vd4dotuv2di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nds_vd4dotsv4di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nds_vd4dotuv4di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nds_vd4dotsv8di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_nds_vd4dotuv8di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_nds_vd4dotsv16di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_nds_vd4dotuv16di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_nds_vd4dotsv32di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_nds_vd4dotuv32di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_nds_vd4dotsv64di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_nds_vd4dotuv64di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_nds_vd4dotsv128di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_nds_vd4dotuv128di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_nds_vd4dotsv256di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_nds_vd4dotuv256di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_nds_vd4dotsv512di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_nds_vd4dotuv512di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_nds_vd4dotsurvvm8si (TARGET_VECTOR && TARGET_XANDESVDOT)
#define HAVE_pred_nds_vd4dotsurvvm4si (TARGET_VECTOR && TARGET_XANDESVDOT)
#define HAVE_pred_nds_vd4dotsurvvm2si (TARGET_VECTOR && TARGET_XANDESVDOT)
#define HAVE_pred_nds_vd4dotsurvvm1si (TARGET_VECTOR && TARGET_XANDESVDOT)
#define HAVE_pred_nds_vd4dotsurvvmf2si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nds_vd4dotsurvvm8di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nds_vd4dotsurvvm4di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nds_vd4dotsurvvm2di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nds_vd4dotsurvvm1di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nds_vd4dotsuv1si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_nds_vd4dotsuv2si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_nds_vd4dotsuv4si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_nds_vd4dotsuv8si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_nds_vd4dotsuv16si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_nds_vd4dotsuv32si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_nds_vd4dotsuv64si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_nds_vd4dotsuv128si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_nds_vd4dotsuv256si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_nds_vd4dotsuv512si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_nds_vd4dotsuv1024si ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_nds_vd4dotsuv1di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nds_vd4dotsuv2di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nds_vd4dotsuv4di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_nds_vd4dotsuv8di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_nds_vd4dotsuv16di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_nds_vd4dotsuv32di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_nds_vd4dotsuv64di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_nds_vd4dotsuv128di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_nds_vd4dotsuv256di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_nds_vd4dotsuv512di ((TARGET_VECTOR && TARGET_XANDESVDOT) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vandnrvvm8qi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvm4qi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvm2qi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvm1qi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvm8hi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvm4hi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvm2hi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvm1hi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvm8si (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvm4si (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvm2si (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvm1si (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvm8di ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vandnrvvm4di ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vandnrvvm2di ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vandnrvvm1di ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vandnrvvmf2qi ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vandnrvvmf4qi ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vandnrvvmf8qi ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vandnrvvmf2hi ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vandnrvvmf4hi ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vandnrvvmf2si ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vandnv1qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_vandnv2qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_vandnv4qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_vandnv8qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_vandnv16qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_vandnv32qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_vandnv64qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vandnv128qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vandnv256qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vandnv512qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vandnv1024qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vandnv2048qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vandnv4096qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vandnv1hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_vandnv2hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_vandnv4hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_vandnv8hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_vandnv16hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_vandnv32hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vandnv64hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vandnv128hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vandnv256hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vandnv512hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vandnv1024hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vandnv2048hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vandnv1si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_vandnv2si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_vandnv4si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_vandnv8si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_vandnv16si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vandnv32si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vandnv64si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vandnv128si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vandnv256si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vandnv512si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vandnv1024si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vandnv1di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vandnv2di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vandnv4di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vandnv8di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vandnv16di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vandnv32di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vandnv64di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vandnv128di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vandnv256di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vandnv512di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vandnrvvm8qi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvm4qi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvm2qi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvm1qi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvmf2qi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvmf4qi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvmf8qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vandnrvvm8hi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvm4hi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvm2hi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvm1hi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvmf2hi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvmf4hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vandnrvvm8si_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvm4si_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvm2si_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvm1si_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vandnrvvmf2si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vandnv1qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_vandnv2qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_vandnv4qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_vandnv8qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_vandnv16qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_vandnv32qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_vandnv64qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vandnv128qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vandnv256qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vandnv512qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vandnv1024qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vandnv2048qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vandnv4096qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vandnv1hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_vandnv2hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_vandnv4hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_vandnv8hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_vandnv16hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_vandnv32hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vandnv64hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vandnv128hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vandnv256hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vandnv512hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vandnv1024hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vandnv2048hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vandnv1si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_vandnv2si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_vandnv4si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_vandnv8si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_vandnv16si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vandnv32si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vandnv64si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vandnv128si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vandnv256si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vandnv512si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vandnv1024si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vrotlrvvm8qi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotrrvvm8qi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotlrvvm4qi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotrrvvm4qi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotlrvvm2qi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotrrvvm2qi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotlrvvm1qi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotrrvvm1qi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotlrvvm8hi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotrrvvm8hi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotlrvvm4hi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotrrvvm4hi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotlrvvm2hi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotrrvvm2hi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotlrvvm1hi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotrrvvm1hi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotlrvvm8si (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotrrvvm8si (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotlrvvm4si (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotrrvvm4si (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotlrvvm2si (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotrrvvm2si (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotlrvvm1si (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotrrvvm1si (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotlrvvm8di ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotrrvvm8di ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotlrvvm4di ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotrrvvm4di ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotlrvvm2di ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotrrvvm2di ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotlrvvm1di ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotrrvvm1di ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotlrvvmf2qi ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vrotrrvvmf2qi ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vrotlrvvmf4qi ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vrotrrvvmf4qi ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vrotlrvvmf8qi ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vrotrrvvmf8qi ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vrotlrvvmf2hi ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vrotrrvvmf2hi ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vrotlrvvmf4hi ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vrotrrvvmf4hi ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vrotlrvvmf2si ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vrotrrvvmf2si ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vrotlv1qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_vrotrv1qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_vrotlv2qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_vrotrv2qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_vrotlv4qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_vrotrv4qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_vrotlv8qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_vrotrv8qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_vrotlv16qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_vrotrv16qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_vrotlv32qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_vrotrv32qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_vrotlv64qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vrotrv64qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vrotlv128qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vrotrv128qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vrotlv256qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vrotrv256qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vrotlv512qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vrotrv512qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vrotlv1024qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vrotrv1024qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vrotlv2048qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vrotrv2048qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vrotlv4096qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vrotrv4096qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vrotlv1hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_vrotrv1hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_vrotlv2hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_vrotrv2hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_vrotlv4hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_vrotrv4hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_vrotlv8hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_vrotrv8hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_vrotlv16hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_vrotrv16hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_vrotlv32hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vrotrv32hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vrotlv64hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vrotrv64hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vrotlv128hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vrotrv128hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vrotlv256hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vrotrv256hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vrotlv512hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vrotrv512hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vrotlv1024hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vrotrv1024hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vrotlv2048hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vrotrv2048hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vrotlv1si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_vrotrv1si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_vrotlv2si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_vrotrv2si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_vrotlv4si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_vrotrv4si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_vrotlv8si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_vrotrv8si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_vrotlv16si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vrotrv16si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vrotlv32si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vrotrv32si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vrotlv64si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vrotrv64si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vrotlv128si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vrotrv128si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vrotlv256si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vrotrv256si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vrotlv512si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vrotrv512si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vrotlv1024si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vrotrv1024si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vrotlv1di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotrv1di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotlv2di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotrv2di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotlv4di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotrv4di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotlv8di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vrotrv8di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vrotlv16di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vrotrv16di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vrotlv32di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vrotrv32di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vrotlv64di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vrotrv64di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vrotlv128di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vrotrv128di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vrotlv256di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vrotrv256di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vrotlv512di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vrotrv512di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vrotlrvvm8qi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotrrvvm8qi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotlrvvm4qi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotrrvvm4qi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotlrvvm2qi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotrrvvm2qi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotlrvvm1qi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotrrvvm1qi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotlrvvm8hi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotrrvvm8hi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotlrvvm4hi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotrrvvm4hi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotlrvvm2hi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotrrvvm2hi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotlrvvm1hi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotrrvvm1hi_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotlrvvm8si_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotrrvvm8si_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotlrvvm4si_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotrrvvm4si_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotlrvvm2si_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotrrvvm2si_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotlrvvm1si_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotrrvvm1si_scalar (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrotlrvvm8di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotrrvvm8di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotlrvvm4di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotrrvvm4di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotlrvvm2di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotrrvvm2di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotlrvvm1di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotrrvvm1di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotlrvvmf2qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vrotrrvvmf2qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vrotlrvvmf4qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vrotrrvvmf4qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vrotlrvvmf8qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vrotrrvvmf8qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vrotlrvvmf2hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vrotrrvvmf2hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vrotlrvvmf4hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vrotrrvvmf4hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vrotlrvvmf2si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vrotrrvvmf2si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vrotlv1qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_vrotrv1qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_vrotlv2qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_vrotrv2qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_vrotlv4qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_vrotrv4qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_vrotlv8qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_vrotrv8qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_vrotlv16qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_vrotrv16qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_vrotlv32qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_vrotrv32qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_vrotlv64qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vrotrv64qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vrotlv128qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vrotrv128qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vrotlv256qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vrotrv256qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vrotlv512qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vrotrv512qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vrotlv1024qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vrotrv1024qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vrotlv2048qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vrotrv2048qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vrotlv4096qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vrotrv4096qi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vrotlv1hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_vrotrv1hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_vrotlv2hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_vrotrv2hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_vrotlv4hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_vrotrv4hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_vrotlv8hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_vrotrv8hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_vrotlv16hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_vrotrv16hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_vrotlv32hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vrotrv32hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vrotlv64hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vrotrv64hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vrotlv128hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vrotrv128hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vrotlv256hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vrotrv256hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vrotlv512hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vrotrv512hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vrotlv1024hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vrotrv1024hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vrotlv2048hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vrotrv2048hi_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vrotlv1si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_vrotrv1si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_vrotlv2si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_vrotrv2si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_vrotlv4si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_vrotrv4si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_vrotlv8si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_vrotrv8si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_vrotlv16si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vrotrv16si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vrotlv32si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vrotrv32si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vrotlv64si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vrotrv64si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vrotlv128si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vrotrv128si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vrotlv256si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vrotrv256si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vrotlv512si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vrotrv512si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vrotlv1024si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vrotrv1024si_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vrotlv1di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotrv1di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotlv2di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotrv2di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotlv4di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotrv4di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrotlv8di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vrotrv8di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vrotlv16di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vrotrv16di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vrotlv32di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vrotrv32di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vrotlv64di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vrotrv64di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vrotlv128di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vrotrv128di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vrotlv256di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vrotrv256di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vrotlv512di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vrotrv512di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vwsllrvvm8hi (TARGET_ZVBB)
#define HAVE_pred_vwsllrvvm4hi (TARGET_ZVBB)
#define HAVE_pred_vwsllrvvm2hi (TARGET_ZVBB)
#define HAVE_pred_vwsllrvvm1hi (TARGET_ZVBB)
#define HAVE_pred_vwsllrvvmf2hi (TARGET_ZVBB)
#define HAVE_pred_vwsllrvvmf4hi ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vwsllrvvm8si (TARGET_ZVBB)
#define HAVE_pred_vwsllrvvm4si (TARGET_ZVBB)
#define HAVE_pred_vwsllrvvm2si (TARGET_ZVBB)
#define HAVE_pred_vwsllrvvm1si (TARGET_ZVBB)
#define HAVE_pred_vwsllrvvmf2si ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vwsllrvvm8di ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vwsllrvvm4di ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vwsllrvvm2di ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vwsllrvvm1di ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vwsllv1hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_vwsllv2hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_vwsllv4hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_vwsllv8hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_vwsllv16hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_vwsllv32hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vwsllv64hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vwsllv128hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vwsllv256hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vwsllv512hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vwsllv1024hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vwsllv2048hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vwsllv1si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_vwsllv2si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_vwsllv4si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_vwsllv8si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_vwsllv16si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vwsllv32si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vwsllv64si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vwsllv128si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vwsllv256si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vwsllv512si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vwsllv1024si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vwsllv1di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vwsllv2di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vwsllv4di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vwsllv8di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vwsllv16di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vwsllv32di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vwsllv64di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vwsllv128di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vwsllv256di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vwsllv512di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vwsllrvvm8hi_scalar (TARGET_ZVBB)
#define HAVE_pred_vwsllrvvm4hi_scalar (TARGET_ZVBB)
#define HAVE_pred_vwsllrvvm2hi_scalar (TARGET_ZVBB)
#define HAVE_pred_vwsllrvvm1hi_scalar (TARGET_ZVBB)
#define HAVE_pred_vwsllrvvmf2hi_scalar (TARGET_ZVBB)
#define HAVE_pred_vwsllrvvmf4hi_scalar ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vwsllrvvm8si_scalar (TARGET_ZVBB)
#define HAVE_pred_vwsllrvvm4si_scalar (TARGET_ZVBB)
#define HAVE_pred_vwsllrvvm2si_scalar (TARGET_ZVBB)
#define HAVE_pred_vwsllrvvm1si_scalar (TARGET_ZVBB)
#define HAVE_pred_vwsllrvvmf2si_scalar ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vwsllrvvm8di_scalar ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vwsllrvvm4di_scalar ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vwsllrvvm2di_scalar ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vwsllrvvm1di_scalar ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vwsllv1hi_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_vwsllv2hi_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_vwsllv4hi_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_vwsllv8hi_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_vwsllv16hi_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_vwsllv32hi_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vwsllv64hi_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vwsllv128hi_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vwsllv256hi_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vwsllv512hi_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vwsllv1024hi_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vwsllv2048hi_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vwsllv1si_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_vwsllv2si_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_vwsllv4si_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_vwsllv8si_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_vwsllv16si_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vwsllv32si_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vwsllv64si_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vwsllv128si_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vwsllv256si_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vwsllv512si_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vwsllv1024si_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vwsllv1di_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vwsllv2di_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vwsllv4di_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vwsllv8di_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vwsllv16di_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vwsllv32di_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vwsllv64di_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vwsllv128di_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vwsllv256di_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vwsllv512di_scalar ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vbrevrvvm8qi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vbrev8rvvm8qi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrev8rvvm8qi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vbrevrvvm4qi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vbrev8rvvm4qi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrev8rvvm4qi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vbrevrvvm2qi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vbrev8rvvm2qi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrev8rvvm2qi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vbrevrvvm1qi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vbrev8rvvm1qi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrev8rvvm1qi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vbrevrvvm8hi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vbrev8rvvm8hi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrev8rvvm8hi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vbrevrvvm4hi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vbrev8rvvm4hi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrev8rvvm4hi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vbrevrvvm2hi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vbrev8rvvm2hi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrev8rvvm2hi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vbrevrvvm1hi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vbrev8rvvm1hi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrev8rvvm1hi (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vbrevrvvm8si (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vbrev8rvvm8si (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrev8rvvm8si (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vbrevrvvm4si (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vbrev8rvvm4si (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrev8rvvm4si (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vbrevrvvm2si (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vbrev8rvvm2si (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrev8rvvm2si (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vbrevrvvm1si (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vbrev8rvvm1si (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vrev8rvvm1si (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_pred_vbrevrvvm8di ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vbrev8rvvm8di ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrev8rvvm8di ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vbrevrvvm4di ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vbrev8rvvm4di ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrev8rvvm4di ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vbrevrvvm2di ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vbrev8rvvm2di ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrev8rvvm2di ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vbrevrvvm1di ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vbrev8rvvm1di ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrev8rvvm1di ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vbrevrvvmf2qi ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vbrev8rvvmf2qi ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vrev8rvvmf2qi ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vbrevrvvmf4qi ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vbrev8rvvmf4qi ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vrev8rvvmf4qi ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vbrevrvvmf8qi ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vbrev8rvvmf8qi ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vrev8rvvmf8qi ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vbrevrvvmf2hi ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vbrev8rvvmf2hi ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vrev8rvvmf2hi ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vbrevrvvmf4hi ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vbrev8rvvmf4hi ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vrev8rvvmf4hi ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vbrevrvvmf2si ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vbrev8rvvmf2si ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vrev8rvvmf2si ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vbrevv1qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_vbrev8v1qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_vrev8v1qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_vbrevv2qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_vbrev8v2qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_vrev8v2qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_vbrevv4qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_vbrev8v4qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_vrev8v4qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_vbrevv8qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_vbrev8v8qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_vrev8v8qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_vbrevv16qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_vbrev8v16qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_vrev8v16qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_vbrevv32qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_vbrev8v32qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_vrev8v32qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_vbrevv64qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vbrev8v64qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vrev8v64qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vbrevv128qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vbrev8v128qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vrev8v128qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vbrevv256qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vbrev8v256qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vrev8v256qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vbrevv512qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vbrev8v512qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vrev8v512qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vbrevv1024qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vbrev8v1024qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vrev8v1024qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vbrevv2048qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vbrev8v2048qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vrev8v2048qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vbrevv4096qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vbrev8v4096qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vrev8v4096qi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vbrevv1hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_vbrev8v1hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_vrev8v1hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_vbrevv2hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_vbrev8v2hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_vrev8v2hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_vbrevv4hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_vbrev8v4hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_vrev8v4hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_vbrevv8hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_vbrev8v8hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_vrev8v8hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_vbrevv16hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_vbrev8v16hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_vrev8v16hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_vbrevv32hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vbrev8v32hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vrev8v32hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vbrevv64hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vbrev8v64hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vrev8v64hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vbrevv128hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vbrev8v128hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vrev8v128hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vbrevv256hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vbrev8v256hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vrev8v256hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vbrevv512hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vbrev8v512hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vrev8v512hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vbrevv1024hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vbrev8v1024hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vrev8v1024hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vbrevv2048hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vbrev8v2048hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vrev8v2048hi ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vbrevv1si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_vbrev8v1si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_vrev8v1si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_vbrevv2si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_vbrev8v2si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_vrev8v2si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_vbrevv4si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_vbrev8v4si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_vrev8v4si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_vbrevv8si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_vbrev8v8si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_vrev8v8si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_vbrevv16si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vbrev8v16si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vrev8v16si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vbrevv32si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vbrev8v32si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vrev8v32si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vbrevv64si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vbrev8v64si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vrev8v64si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vbrevv128si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vbrev8v128si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vrev8v128si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vbrevv256si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vbrev8v256si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vrev8v256si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vbrevv512si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vbrev8v512si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vrev8v512si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vbrevv1024si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vbrev8v1024si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vrev8v1024si ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vbrevv1di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vbrev8v1di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrev8v1di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vbrevv2di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vbrev8v2di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrev8v2di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vbrevv4di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vbrev8v4di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vrev8v4di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vbrevv8di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vbrev8v8di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vrev8v8di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vbrevv16di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vbrev8v16di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vrev8v16di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vbrevv32di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vbrev8v32di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vrev8v32di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vbrevv64di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vbrev8v64di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vrev8v64di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vbrevv128di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vbrev8v128di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vrev8v128di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vbrevv256di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vbrev8v256di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vrev8v256di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vbrevv512di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vbrev8v512di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vrev8v512di ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vclzrvvm8qi (TARGET_ZVBB)
#define HAVE_pred_vctzrvvm8qi (TARGET_ZVBB)
#define HAVE_pred_vpopcountrvvm8qi (TARGET_ZVBB)
#define HAVE_pred_vclzrvvm4qi (TARGET_ZVBB)
#define HAVE_pred_vctzrvvm4qi (TARGET_ZVBB)
#define HAVE_pred_vpopcountrvvm4qi (TARGET_ZVBB)
#define HAVE_pred_vclzrvvm2qi (TARGET_ZVBB)
#define HAVE_pred_vctzrvvm2qi (TARGET_ZVBB)
#define HAVE_pred_vpopcountrvvm2qi (TARGET_ZVBB)
#define HAVE_pred_vclzrvvm1qi (TARGET_ZVBB)
#define HAVE_pred_vctzrvvm1qi (TARGET_ZVBB)
#define HAVE_pred_vpopcountrvvm1qi (TARGET_ZVBB)
#define HAVE_pred_vclzrvvm8hi (TARGET_ZVBB)
#define HAVE_pred_vctzrvvm8hi (TARGET_ZVBB)
#define HAVE_pred_vpopcountrvvm8hi (TARGET_ZVBB)
#define HAVE_pred_vclzrvvm4hi (TARGET_ZVBB)
#define HAVE_pred_vctzrvvm4hi (TARGET_ZVBB)
#define HAVE_pred_vpopcountrvvm4hi (TARGET_ZVBB)
#define HAVE_pred_vclzrvvm2hi (TARGET_ZVBB)
#define HAVE_pred_vctzrvvm2hi (TARGET_ZVBB)
#define HAVE_pred_vpopcountrvvm2hi (TARGET_ZVBB)
#define HAVE_pred_vclzrvvm1hi (TARGET_ZVBB)
#define HAVE_pred_vctzrvvm1hi (TARGET_ZVBB)
#define HAVE_pred_vpopcountrvvm1hi (TARGET_ZVBB)
#define HAVE_pred_vclzrvvm8si (TARGET_ZVBB)
#define HAVE_pred_vctzrvvm8si (TARGET_ZVBB)
#define HAVE_pred_vpopcountrvvm8si (TARGET_ZVBB)
#define HAVE_pred_vclzrvvm4si (TARGET_ZVBB)
#define HAVE_pred_vctzrvvm4si (TARGET_ZVBB)
#define HAVE_pred_vpopcountrvvm4si (TARGET_ZVBB)
#define HAVE_pred_vclzrvvm2si (TARGET_ZVBB)
#define HAVE_pred_vctzrvvm2si (TARGET_ZVBB)
#define HAVE_pred_vpopcountrvvm2si (TARGET_ZVBB)
#define HAVE_pred_vclzrvvm1si (TARGET_ZVBB)
#define HAVE_pred_vctzrvvm1si (TARGET_ZVBB)
#define HAVE_pred_vpopcountrvvm1si (TARGET_ZVBB)
#define HAVE_pred_vclzrvvm8di ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vctzrvvm8di ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vpopcountrvvm8di ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclzrvvm4di ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vctzrvvm4di ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vpopcountrvvm4di ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclzrvvm2di ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vctzrvvm2di ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vpopcountrvvm2di ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclzrvvm1di ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vctzrvvm1di ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vpopcountrvvm1di ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclzrvvmf2qi ((TARGET_ZVBB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vctzrvvmf2qi ((TARGET_ZVBB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vpopcountrvvmf2qi ((TARGET_ZVBB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vclzrvvmf4qi ((TARGET_ZVBB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vctzrvvmf4qi ((TARGET_ZVBB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vpopcountrvvmf4qi ((TARGET_ZVBB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vclzrvvmf8qi ((TARGET_ZVBB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vctzrvvmf8qi ((TARGET_ZVBB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vpopcountrvvmf8qi ((TARGET_ZVBB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vclzrvvmf2hi ((TARGET_ZVBB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vctzrvvmf2hi ((TARGET_ZVBB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vpopcountrvvmf2hi ((TARGET_ZVBB) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_vclzrvvmf4hi ((TARGET_ZVBB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vctzrvvmf4hi ((TARGET_ZVBB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vpopcountrvvmf4hi ((TARGET_ZVBB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vclzrvvmf2si ((TARGET_ZVBB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vctzrvvmf2si ((TARGET_ZVBB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vpopcountrvvmf2si ((TARGET_ZVBB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_vclzv1qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_vctzv1qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_vpopcountv1qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_vclzv2qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_vctzv2qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_vpopcountv2qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_vclzv4qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_vctzv4qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_vpopcountv4qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_vclzv8qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_vctzv8qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_vpopcountv8qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_vclzv16qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_vctzv16qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_vpopcountv16qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_vclzv32qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_vctzv32qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_vpopcountv32qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_vclzv64qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vctzv64qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vpopcountv64qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vclzv128qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vctzv128qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vpopcountv128qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vclzv256qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vctzv256qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vpopcountv256qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vclzv512qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vctzv512qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vpopcountv512qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vclzv1024qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vctzv1024qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vpopcountv1024qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vclzv2048qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vctzv2048qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vpopcountv2048qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vclzv4096qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vctzv4096qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vpopcountv4096qi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vclzv1hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_vctzv1hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_vpopcountv1hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_vclzv2hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_vctzv2hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_vpopcountv2hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_vclzv4hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_vctzv4hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_vpopcountv4hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_vclzv8hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_vctzv8hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_vpopcountv8hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_vclzv16hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_vctzv16hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_vpopcountv16hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_vclzv32hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vctzv32hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vpopcountv32hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vclzv64hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vctzv64hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vpopcountv64hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vclzv128hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vctzv128hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vpopcountv128hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vclzv256hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vctzv256hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vpopcountv256hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vclzv512hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vctzv512hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vpopcountv512hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vclzv1024hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vctzv1024hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vpopcountv1024hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vclzv2048hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vctzv2048hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vpopcountv2048hi ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vclzv1si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_vctzv1si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_vpopcountv1si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_vclzv2si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_vctzv2si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_vpopcountv2si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_vclzv4si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_vctzv4si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_vpopcountv4si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_vclzv8si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_vctzv8si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_vpopcountv8si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_vclzv16si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vctzv16si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vpopcountv16si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vclzv32si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vctzv32si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vpopcountv32si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vclzv64si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vctzv64si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vpopcountv64si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vclzv128si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vctzv128si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vpopcountv128si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vclzv256si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vctzv256si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vpopcountv256si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vclzv512si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vctzv512si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vpopcountv512si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vclzv1024si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vctzv1024si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vpopcountv1024si ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vclzv1di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vctzv1di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vpopcountv1di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclzv2di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vctzv2di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vpopcountv2di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclzv4di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vctzv4di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vpopcountv4di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclzv8di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vctzv8di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vpopcountv8di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vclzv16di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vctzv16di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vpopcountv16di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vclzv32di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vctzv32di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vpopcountv32di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vclzv64di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vctzv64di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vpopcountv64di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vclzv128di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vctzv128di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vpopcountv128di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vclzv256di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vctzv256di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vpopcountv256di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vclzv512di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vctzv512di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vpopcountv512di ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vclmulrvvm8di ((TARGET_ZVBC) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulhrvvm8di ((TARGET_ZVBC) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulrvvm4di ((TARGET_ZVBC) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulhrvvm4di ((TARGET_ZVBC) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulrvvm2di ((TARGET_ZVBC) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulhrvvm2di ((TARGET_ZVBC) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulrvvm1di ((TARGET_ZVBC) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulhrvvm1di ((TARGET_ZVBC) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulv1di ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulhv1di ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulv2di ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulhv2di ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulv4di ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulhv4di ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulv8di ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vclmulhv8di ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vclmulv16di ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vclmulhv16di ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vclmulv32di ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vclmulhv32di ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vclmulv64di ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vclmulhv64di ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vclmulv128di ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vclmulhv128di ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vclmulv256di ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vclmulhv256di ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vclmulv512di ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vclmulhv512di ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vghshrvvm8si (TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG)
#define HAVE_pred_vsha2msrvvm8si (TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG)
#define HAVE_pred_vsha2chrvvm8si (TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG)
#define HAVE_pred_vsha2clrvvm8si (TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG)
#define HAVE_pred_vghshrvvm4si (TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG)
#define HAVE_pred_vsha2msrvvm4si (TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG)
#define HAVE_pred_vsha2chrvvm4si (TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG)
#define HAVE_pred_vsha2clrvvm4si (TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG)
#define HAVE_pred_vghshrvvm2si (TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG)
#define HAVE_pred_vsha2msrvvm2si (TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG)
#define HAVE_pred_vsha2chrvvm2si (TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG)
#define HAVE_pred_vsha2clrvvm2si (TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG)
#define HAVE_pred_vghshrvvm1si (TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG)
#define HAVE_pred_vsha2msrvvm1si (TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG)
#define HAVE_pred_vsha2chrvvm1si (TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG)
#define HAVE_pred_vsha2clrvvm1si (TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG)
#define HAVE_pred_vghshrvvmf2si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsha2msrvvmf2si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsha2chrvvmf2si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsha2clrvvmf2si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vghshrvvm8di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsha2msrvvm8di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsha2chrvvm8di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsha2clrvvm8di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vghshrvvm4di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsha2msrvvm4di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsha2chrvvm4di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsha2clrvvm4di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vghshrvvm2di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsha2msrvvm2di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsha2chrvvm2di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsha2clrvvm2di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vghshrvvm1di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsha2msrvvm1di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsha2chrvvm1di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsha2clrvvm1di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vghshv1si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_vsha2msv1si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_vsha2chv1si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_vsha2clv1si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_vghshv2si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_vsha2msv2si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_vsha2chv2si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_vsha2clv2si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_vghshv4si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_vsha2msv4si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_vsha2chv4si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_vsha2clv4si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_vghshv8si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_vsha2msv8si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_vsha2chv8si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_vsha2clv8si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_vghshv16si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vsha2msv16si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vsha2chv16si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vsha2clv16si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vghshv32si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vsha2msv32si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vsha2chv32si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vsha2clv32si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vghshv64si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vsha2msv64si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vsha2chv64si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vsha2clv64si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vghshv128si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vsha2msv128si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vsha2chv128si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vsha2clv128si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vghshv256si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vsha2msv256si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vsha2chv256si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vsha2clv256si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vghshv512si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vsha2msv512si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vsha2chv512si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vsha2clv512si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vghshv1024si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vsha2msv1024si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vsha2chv1024si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vsha2clv1024si ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vghshv1di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsha2msv1di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsha2chv1di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsha2clv1di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vghshv2di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsha2msv2di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsha2chv2di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsha2clv2di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vghshv4di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsha2msv4di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsha2chv4di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsha2clv4di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vghshv8di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vsha2msv8di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vsha2chv8di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vsha2clv8di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vghshv16di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vsha2msv16di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vsha2chv16di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vsha2clv16di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vghshv32di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vsha2msv32di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vsha2chv32di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vsha2clv32di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vghshv64di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vsha2msv64di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vsha2chv64di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vsha2clv64di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vghshv128di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vsha2msv128di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vsha2chv128di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vsha2clv128di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vghshv256di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vsha2msv256di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vsha2chv256di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vsha2clv256di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vghshv512di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vsha2msv512di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vsha2chv512di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vsha2clv512di ((TARGET_ZVKNHA || TARGET_ZVKNHB || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvgmulvvrvvm8si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesefvvrvvm8si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesemvvrvvm8si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesdfvvrvvm8si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesdmvvrvvm8si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesefvsrvvm8si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesemvsrvvm8si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesdfvsrvvm8si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesdmvsrvvm8si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaeszvsrvvm8si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvsm4rvvrvvm8si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvsm4rvsrvvm8si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvgmulvvrvvm4si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesefvvrvvm4si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesemvvrvvm4si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesdfvvrvvm4si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesdmvvrvvm4si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesefvsrvvm4si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesemvsrvvm4si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesdfvsrvvm4si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesdmvsrvvm4si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaeszvsrvvm4si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvsm4rvvrvvm4si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvsm4rvsrvvm4si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvgmulvvrvvm2si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesefvvrvvm2si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesemvvrvvm2si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesdfvvrvvm2si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesdmvvrvvm2si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesefvsrvvm2si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesemvsrvvm2si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesdfvsrvvm2si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesdmvsrvvm2si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaeszvsrvvm2si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvsm4rvvrvvm2si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvsm4rvsrvvm2si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvgmulvvrvvm1si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesefvvrvvm1si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesemvvrvvm1si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesdfvvrvvm1si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesdmvvrvvm1si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesefvsrvvm1si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesemvsrvvm1si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesdfvsrvvm1si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaesdmvsrvvm1si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvaeszvsrvvm1si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvsm4rvvrvvm1si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvsm4rvsrvvm1si (TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG)
#define HAVE_pred_crypto_vvgmulvvrvvmf2si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesefvvrvvmf2si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesemvvrvvmf2si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesdfvvrvvmf2si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesdmvvrvvmf2si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesefvsrvvmf2si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesemvsrvvmf2si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesdfvsrvvmf2si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesdmvsrvvmf2si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaeszvsrvvmf2si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvsm4rvvrvvmf2si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvsm4rvsrvvmf2si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvgmulvvv1si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesefvvv1si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesemvvv1si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesdfvvv1si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesdmvvv1si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesefvsv1si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesemvsv1si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesdfvsv1si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesdmvsv1si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaeszvsv1si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvsm4rvvv1si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvsm4rvsv1si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvgmulvvv2si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesefvvv2si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesemvvv2si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesdfvvv2si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesdmvvv2si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesefvsv2si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesemvsv2si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesdfvsv2si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesdmvsv2si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaeszvsv2si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvsm4rvvv2si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvsm4rvsv2si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvgmulvvv4si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesefvvv4si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesemvvv4si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesdfvvv4si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesdmvvv4si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesefvsv4si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesemvsv4si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesdfvsv4si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesdmvsv4si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaeszvsv4si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvsm4rvvv4si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvsm4rvsv4si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvgmulvvv8si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesefvvv8si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesemvvv8si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesdfvvv8si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesdmvvv8si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesefvsv8si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesemvsv8si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesdfvsv8si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesdmvsv8si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaeszvsv8si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvsm4rvvv8si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvsm4rvsv8si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvgmulvvv16si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesefvvv16si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesemvvv16si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesdfvvv16si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesdmvvv16si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesefvsv16si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesemvsv16si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesdfvsv16si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesdmvsv16si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaeszvsv16si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvsm4rvvv16si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvsm4rvsv16si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvgmulvvv32si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesefvvv32si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesemvvv32si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesdfvvv32si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesdmvvv32si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesefvsv32si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesemvsv32si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesdfvsv32si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesdmvsv32si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaeszvsv32si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvsm4rvvv32si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvsm4rvsv32si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvgmulvvv64si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesefvvv64si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesemvvv64si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesdfvvv64si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesdmvvv64si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesefvsv64si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesemvsv64si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesdfvsv64si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesdmvsv64si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaeszvsv64si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvsm4rvvv64si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvsm4rvsv64si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvgmulvvv128si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesefvvv128si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesemvvv128si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesdfvvv128si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesdmvvv128si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesefvsv128si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesemvsv128si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesdfvsv128si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesdmvsv128si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaeszvsv128si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvsm4rvvv128si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvsm4rvsv128si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvgmulvvv256si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesefvvv256si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesemvvv256si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesdfvvv256si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesdmvvv256si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesefvsv256si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesemvsv256si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesdfvsv256si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesdmvsv256si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaeszvsv256si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvsm4rvvv256si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvsm4rvsv256si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvgmulvvv512si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaesefvvv512si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaesemvvv512si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaesdfvvv512si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaesdmvvv512si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaesefvsv512si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaesemvsv512si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaesdfvsv512si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaesdmvsv512si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaeszvsv512si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvsm4rvvv512si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvsm4rvsv512si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvgmulvvv1024si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvaesefvvv1024si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvaesemvvv1024si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvaesdfvvv1024si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvaesdmvvv1024si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvaesefvsv1024si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvaesemvsv1024si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvaesdfvsv1024si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvaesdmvsv1024si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvaeszvsv1024si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvsm4rvvv1024si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvsm4rvsv1024si ((TARGET_ZVKNED || TARGET_ZVKSED || TARGET_ZVKG) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvgmulvvx1rvvm8si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesefvvx1rvvm8si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesemvvx1rvvm8si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdfvvx1rvvm8si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdmvvx1rvvm8si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesefvsx1rvvm8si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesemvsx1rvvm8si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdfvsx1rvvm8si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdmvsx1rvvm8si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaeszvsx1rvvm8si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvsm4rvvx1rvvm8si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvsm4rvsx1rvvm8si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvgmulvvx1rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesefvvx1rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesemvvx1rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdfvvx1rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdmvvx1rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesefvsx1rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesemvsx1rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdfvsx1rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdmvsx1rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaeszvsx1rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvsm4rvvx1rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvsm4rvsx1rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvgmulvvx1rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesefvvx1rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesemvvx1rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdfvvx1rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdmvvx1rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesefvsx1rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesemvsx1rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdfvsx1rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdmvsx1rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaeszvsx1rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvsm4rvvx1rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvsm4rvsx1rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvgmulvvx1rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesefvvx1rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesemvvx1rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdfvvx1rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdmvvx1rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesefvsx1rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesemvsx1rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdfvsx1rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdmvsx1rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaeszvsx1rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvsm4rvvx1rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvsm4rvsx1rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvgmulvvx1rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesefvvx1rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesemvvx1rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesdfvvx1rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesdmvvx1rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesefvsx1rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesemvsx1rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesdfvsx1rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesdmvsx1rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaeszvsx1rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvsm4rvvx1rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvsm4rvsx1rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvgmulvvx1v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesefvvx1v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesemvvx1v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesdfvvx1v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesdmvvx1v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesefvsx1v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesemvsx1v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesdfvsx1v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesdmvsx1v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaeszvsx1v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvsm4rvvx1v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvsm4rvsx1v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvgmulvvx1v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesefvvx1v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesemvvx1v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesdfvvx1v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesdmvvx1v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesefvsx1v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesemvsx1v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesdfvsx1v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesdmvsx1v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaeszvsx1v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvsm4rvvx1v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvsm4rvsx1v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvgmulvvx1v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesefvvx1v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesemvvx1v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesdfvvx1v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesdmvvx1v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesefvsx1v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesemvsx1v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesdfvsx1v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesdmvsx1v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaeszvsx1v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvsm4rvvx1v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvsm4rvsx1v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvgmulvvx1v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesefvvx1v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesemvvx1v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesdfvvx1v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesdmvvx1v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesefvsx1v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesemvsx1v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesdfvsx1v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesdmvsx1v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaeszvsx1v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvsm4rvvx1v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvsm4rvsx1v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvgmulvvx1v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesefvvx1v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesemvvx1v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesdfvvx1v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesdmvvx1v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesefvsx1v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesemvsx1v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesdfvsx1v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesdmvsx1v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaeszvsx1v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvsm4rvvx1v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvsm4rvsx1v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvgmulvvx1v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesefvvx1v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesemvvx1v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesdfvvx1v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesdmvvx1v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesefvsx1v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesemvsx1v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesdfvsx1v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesdmvsx1v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaeszvsx1v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvsm4rvvx1v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvsm4rvsx1v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvgmulvvx1v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesefvvx1v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesemvvx1v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesdfvvx1v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesdmvvx1v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesefvsx1v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesemvsx1v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesdfvsx1v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesdmvsx1v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaeszvsx1v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvsm4rvvx1v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvsm4rvsx1v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvgmulvvx1v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesefvvx1v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesemvvx1v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesdfvvx1v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesdmvvx1v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesefvsx1v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesemvsx1v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesdfvsx1v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesdmvsx1v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaeszvsx1v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvsm4rvvx1v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvsm4rvsx1v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvgmulvvx1v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesefvvx1v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesemvvx1v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesdfvvx1v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesdmvvx1v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesefvsx1v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesemvsx1v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesdfvsx1v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesdmvsx1v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaeszvsx1v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvsm4rvvx1v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvsm4rvsx1v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvgmulvvx1v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaesefvvx1v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaesemvvx1v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaesdfvvx1v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaesdmvvx1v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaesefvsx1v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaesemvsx1v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaesdfvsx1v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaesdmvsx1v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaeszvsx1v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvsm4rvvx1v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvsm4rvsx1v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvgmulvvx1v1024si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvaesefvvx1v1024si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvaesemvvx1v1024si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvaesdfvvx1v1024si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvaesdmvvx1v1024si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvaesefvsx1v1024si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvaesemvsx1v1024si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvaesdfvsx1v1024si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvaesdmvsx1v1024si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvaeszvsx1v1024si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvsm4rvvx1v1024si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvsm4rvsx1v1024si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vvgmulvvx2rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesefvvx2rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesemvvx2rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdfvvx2rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdmvvx2rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesefvsx2rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesemvsx2rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdfvsx2rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdmvsx2rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaeszvsx2rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvsm4rvvx2rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvsm4rvsx2rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvgmulvvx2rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesefvvx2rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesemvvx2rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdfvvx2rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdmvvx2rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesefvsx2rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesemvsx2rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdfvsx2rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdmvsx2rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaeszvsx2rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvsm4rvvx2rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvsm4rvsx2rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvgmulvvx2rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesefvvx2rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesemvvx2rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdfvvx2rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdmvvx2rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesefvsx2rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesemvsx2rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdfvsx2rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdmvsx2rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaeszvsx2rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvsm4rvvx2rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvsm4rvsx2rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvgmulvvx2rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesefvvx2rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesemvvx2rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesdfvvx2rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesdmvvx2rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesefvsx2rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesemvsx2rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesdfvsx2rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesdmvsx2rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaeszvsx2rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvsm4rvvx2rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvsm4rvsx2rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvgmulvvx2v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesefvvx2v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesemvvx2v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesdfvvx2v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesdmvvx2v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesefvsx2v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesemvsx2v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesdfvsx2v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesdmvsx2v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaeszvsx2v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvsm4rvvx2v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvsm4rvsx2v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvgmulvvx2v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesefvvx2v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesemvvx2v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesdfvvx2v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesdmvvx2v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesefvsx2v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesemvsx2v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesdfvsx2v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesdmvsx2v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaeszvsx2v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvsm4rvvx2v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvsm4rvsx2v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvgmulvvx2v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesefvvx2v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesemvvx2v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesdfvvx2v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesdmvvx2v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesefvsx2v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesemvsx2v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesdfvsx2v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesdmvsx2v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaeszvsx2v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvsm4rvvx2v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvsm4rvsx2v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvgmulvvx2v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesefvvx2v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesemvvx2v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesdfvvx2v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesdmvvx2v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesefvsx2v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesemvsx2v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesdfvsx2v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesdmvsx2v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaeszvsx2v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvsm4rvvx2v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvsm4rvsx2v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvgmulvvx2v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesefvvx2v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesemvvx2v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesdfvvx2v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesdmvvx2v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesefvsx2v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesemvsx2v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesdfvsx2v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesdmvsx2v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaeszvsx2v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvsm4rvvx2v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvsm4rvsx2v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvgmulvvx2v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesefvvx2v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesemvvx2v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesdfvvx2v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesdmvvx2v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesefvsx2v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesemvsx2v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesdfvsx2v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesdmvsx2v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaeszvsx2v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvsm4rvvx2v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvsm4rvsx2v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvgmulvvx2v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesefvvx2v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesemvvx2v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesdfvvx2v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesdmvvx2v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesefvsx2v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesemvsx2v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesdfvsx2v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesdmvsx2v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaeszvsx2v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvsm4rvvx2v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvsm4rvsx2v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvgmulvvx2v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesefvvx2v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesemvvx2v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesdfvvx2v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesdmvvx2v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesefvsx2v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesemvsx2v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesdfvsx2v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesdmvsx2v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaeszvsx2v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvsm4rvvx2v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvsm4rvsx2v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvgmulvvx2v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesefvvx2v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesemvvx2v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesdfvvx2v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesdmvvx2v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesefvsx2v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesemvsx2v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesdfvsx2v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesdmvsx2v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaeszvsx2v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvsm4rvvx2v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvsm4rvsx2v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvgmulvvx2v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaesefvvx2v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaesemvvx2v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaesdfvvx2v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaesdmvvx2v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaesefvsx2v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaesemvsx2v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaesdfvsx2v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaesdmvsx2v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvaeszvsx2v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvsm4rvvx2v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvsm4rvsx2v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vvgmulvvx4rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesefvvx4rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesemvvx4rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdfvvx4rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdmvvx4rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesefvsx4rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesemvsx4rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdfvsx4rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdmvsx4rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaeszvsx4rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvsm4rvvx4rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvsm4rvsx4rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvgmulvvx4rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesefvvx4rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesemvvx4rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdfvvx4rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdmvvx4rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesefvsx4rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesemvsx4rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdfvsx4rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdmvsx4rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaeszvsx4rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvsm4rvvx4rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvsm4rvsx4rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvgmulvvx4rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesefvvx4rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesemvvx4rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesdfvvx4rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesdmvvx4rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesefvsx4rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesemvsx4rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesdfvsx4rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesdmvsx4rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaeszvsx4rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvsm4rvvx4rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvsm4rvsx4rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvgmulvvx4v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesefvvx4v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesemvvx4v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesdfvvx4v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesdmvvx4v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesefvsx4v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesemvsx4v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesdfvsx4v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesdmvsx4v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaeszvsx4v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvsm4rvvx4v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvsm4rvsx4v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvgmulvvx4v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesefvvx4v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesemvvx4v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesdfvvx4v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesdmvvx4v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesefvsx4v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesemvsx4v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesdfvsx4v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesdmvsx4v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaeszvsx4v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvsm4rvvx4v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvsm4rvsx4v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvgmulvvx4v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesefvvx4v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesemvvx4v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesdfvvx4v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesdmvvx4v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesefvsx4v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesemvsx4v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesdfvsx4v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesdmvsx4v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaeszvsx4v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvsm4rvvx4v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvsm4rvsx4v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvgmulvvx4v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesefvvx4v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesemvvx4v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesdfvvx4v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesdmvvx4v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesefvsx4v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesemvsx4v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesdfvsx4v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesdmvsx4v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaeszvsx4v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvsm4rvvx4v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvsm4rvsx4v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvgmulvvx4v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesefvvx4v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesemvvx4v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesdfvvx4v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesdmvvx4v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesefvsx4v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesemvsx4v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesdfvsx4v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesdmvsx4v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaeszvsx4v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvsm4rvvx4v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvsm4rvsx4v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvgmulvvx4v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesefvvx4v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesemvvx4v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesdfvvx4v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesdmvvx4v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesefvsx4v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesemvsx4v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesdfvsx4v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesdmvsx4v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaeszvsx4v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvsm4rvvx4v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvsm4rvsx4v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvgmulvvx4v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesefvvx4v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesemvvx4v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesdfvvx4v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesdmvvx4v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesefvsx4v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesemvsx4v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesdfvsx4v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesdmvsx4v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaeszvsx4v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvsm4rvvx4v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvsm4rvsx4v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvgmulvvx4v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesefvvx4v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesemvvx4v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesdfvvx4v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesdmvvx4v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesefvsx4v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesemvsx4v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesdfvsx4v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesdmvsx4v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaeszvsx4v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvsm4rvvx4v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvsm4rvsx4v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvgmulvvx4v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesefvvx4v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesemvvx4v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesdfvvx4v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesdmvvx4v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesefvsx4v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesemvsx4v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesdfvsx4v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaesdmvsx4v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvaeszvsx4v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvsm4rvvx4v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvsm4rvsx4v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vvgmulvvx8rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesefvvx8rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesemvvx8rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdfvvx8rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdmvvx8rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesefvsx8rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesemvsx8rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdfvsx8rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaesdmvsx8rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvaeszvsx8rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvsm4rvvx8rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvsm4rvsx8rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vvgmulvvx8rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesefvvx8rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesemvvx8rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesdfvvx8rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesdmvvx8rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesefvsx8rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesemvsx8rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesdfvsx8rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesdmvsx8rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaeszvsx8rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvsm4rvvx8rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvsm4rvsx8rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvgmulvvx8v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesefvvx8v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesemvvx8v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesdfvvx8v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesdmvvx8v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesefvsx8v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesemvsx8v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesdfvsx8v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesdmvsx8v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaeszvsx8v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvsm4rvvx8v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvsm4rvsx8v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvgmulvvx8v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesefvvx8v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesemvvx8v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesdfvvx8v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesdmvvx8v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesefvsx8v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesemvsx8v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesdfvsx8v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesdmvsx8v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaeszvsx8v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvsm4rvvx8v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvsm4rvsx8v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvgmulvvx8v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesefvvx8v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesemvvx8v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesdfvvx8v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesdmvvx8v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesefvsx8v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesemvsx8v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesdfvsx8v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesdmvsx8v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaeszvsx8v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvsm4rvvx8v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvsm4rvsx8v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvgmulvvx8v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesefvvx8v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesemvvx8v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesdfvvx8v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesdmvvx8v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesefvsx8v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesemvsx8v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesdfvsx8v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesdmvsx8v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaeszvsx8v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvsm4rvvx8v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvsm4rvsx8v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvgmulvvx8v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesefvvx8v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesemvvx8v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesdfvvx8v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesdmvvx8v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesefvsx8v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesemvsx8v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesdfvsx8v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesdmvsx8v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaeszvsx8v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvsm4rvvx8v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvsm4rvsx8v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvgmulvvx8v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesefvvx8v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesemvvx8v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesdfvvx8v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesdmvvx8v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesefvsx8v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesemvsx8v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesdfvsx8v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesdmvsx8v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaeszvsx8v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvsm4rvvx8v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvsm4rvsx8v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvgmulvvx8v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesefvvx8v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesemvvx8v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesdfvvx8v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesdmvvx8v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesefvsx8v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesemvsx8v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesdfvsx8v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesdmvsx8v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaeszvsx8v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvsm4rvvx8v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvsm4rvsx8v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvgmulvvx8v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesefvvx8v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesemvvx8v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesdfvvx8v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesdmvvx8v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesefvsx8v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesemvsx8v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesdfvsx8v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaesdmvsx8v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvaeszvsx8v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvsm4rvvx8v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvsm4rvsx8v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vvgmulvvx16rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesefvvx16rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesemvvx16rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesdfvvx16rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesdmvvx16rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesefvsx16rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesemvsx16rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesdfvsx16rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaesdmvsx16rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvaeszvsx16rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvsm4rvvx16rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvsm4rvsx16rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vvgmulvvx16v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesefvvx16v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesemvvx16v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesdfvvx16v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesdmvvx16v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesefvsx16v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesemvsx16v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesdfvsx16v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaesdmvsx16v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvaeszvsx16v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvsm4rvvx16v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvsm4rvsx16v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vvgmulvvx16v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesefvvx16v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesemvvx16v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesdfvvx16v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesdmvvx16v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesefvsx16v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesemvsx16v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesdfvsx16v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaesdmvsx16v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvaeszvsx16v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvsm4rvvx16v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvsm4rvsx16v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vvgmulvvx16v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesefvvx16v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesemvvx16v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesdfvvx16v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesdmvvx16v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesefvsx16v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesemvsx16v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesdfvsx16v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaesdmvsx16v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvaeszvsx16v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvsm4rvvx16v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvsm4rvsx16v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vvgmulvvx16v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesefvvx16v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesemvvx16v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesdfvvx16v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesdmvvx16v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesefvsx16v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesemvsx16v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesdfvsx16v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaesdmvsx16v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvaeszvsx16v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvsm4rvvx16v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvsm4rvsx16v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vvgmulvvx16v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesefvvx16v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesemvvx16v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesdfvvx16v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesdmvvx16v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesefvsx16v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesemvsx16v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesdfvsx16v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaesdmvsx16v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvaeszvsx16v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvsm4rvvx16v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvsm4rvsx16v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vvgmulvvx16v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesefvvx16v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesemvvx16v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesdfvvx16v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesdmvvx16v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesefvsx16v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesemvsx16v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesdfvsx16v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaesdmvsx16v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvaeszvsx16v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvsm4rvvx16v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvsm4rvsx16v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vvgmulvvx16v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesefvvx16v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesemvvx16v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesdfvvx16v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesdmvvx16v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesefvsx16v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesemvsx16v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesdfvsx16v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaesdmvsx16v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvaeszvsx16v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvsm4rvvx16v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vvsm4rvsx16v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_viaeskf1rvvm8si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vism4krvvm8si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_viaeskf1rvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vism4krvvm4si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_viaeskf1rvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vism4krvvm2si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_viaeskf1rvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_vism4krvvm1si_scalar (TARGET_ZVKNED || TARGET_ZVKSED)
#define HAVE_pred_crypto_viaeskf1rvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_vism4krvvmf2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_crypto_viaeskf1v1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_vism4kv1si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_crypto_viaeskf1v2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_vism4kv2si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_crypto_viaeskf1v4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_vism4kv4si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_crypto_viaeskf1v8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_vism4kv8si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_crypto_viaeskf1v16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_vism4kv16si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_crypto_viaeskf1v32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_vism4kv32si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_crypto_viaeskf1v64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_vism4kv64si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_crypto_viaeskf1v128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_vism4kv128si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_crypto_viaeskf1v256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_vism4kv256si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_crypto_viaeskf1v512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_vism4kv512si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_crypto_viaeskf1v1024si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_crypto_vism4kv1024si_scalar ((TARGET_ZVKNED || TARGET_ZVKSED) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_viaeskf2rvvm8si_nomaskedoff_scalar (TARGET_ZVKNED || TARGET_ZVKSH)
#define HAVE_pred_vism3crvvm8si_nomaskedoff_scalar (TARGET_ZVKNED || TARGET_ZVKSH)
#define HAVE_pred_viaeskf2rvvm4si_nomaskedoff_scalar (TARGET_ZVKNED || TARGET_ZVKSH)
#define HAVE_pred_vism3crvvm4si_nomaskedoff_scalar (TARGET_ZVKNED || TARGET_ZVKSH)
#define HAVE_pred_viaeskf2rvvm2si_nomaskedoff_scalar (TARGET_ZVKNED || TARGET_ZVKSH)
#define HAVE_pred_vism3crvvm2si_nomaskedoff_scalar (TARGET_ZVKNED || TARGET_ZVKSH)
#define HAVE_pred_viaeskf2rvvm1si_nomaskedoff_scalar (TARGET_ZVKNED || TARGET_ZVKSH)
#define HAVE_pred_vism3crvvm1si_nomaskedoff_scalar (TARGET_ZVKNED || TARGET_ZVKSH)
#define HAVE_pred_viaeskf2rvvmf2si_nomaskedoff_scalar ((TARGET_ZVKNED || TARGET_ZVKSH) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vism3crvvmf2si_nomaskedoff_scalar ((TARGET_ZVKNED || TARGET_ZVKSH) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_viaeskf2v1si_nomaskedoff_scalar ((TARGET_ZVKNED || TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_vism3cv1si_nomaskedoff_scalar ((TARGET_ZVKNED || TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_viaeskf2v2si_nomaskedoff_scalar ((TARGET_ZVKNED || TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_vism3cv2si_nomaskedoff_scalar ((TARGET_ZVKNED || TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_viaeskf2v4si_nomaskedoff_scalar ((TARGET_ZVKNED || TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_vism3cv4si_nomaskedoff_scalar ((TARGET_ZVKNED || TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_viaeskf2v8si_nomaskedoff_scalar ((TARGET_ZVKNED || TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_vism3cv8si_nomaskedoff_scalar ((TARGET_ZVKNED || TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_viaeskf2v16si_nomaskedoff_scalar ((TARGET_ZVKNED || TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vism3cv16si_nomaskedoff_scalar ((TARGET_ZVKNED || TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_viaeskf2v32si_nomaskedoff_scalar ((TARGET_ZVKNED || TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vism3cv32si_nomaskedoff_scalar ((TARGET_ZVKNED || TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_viaeskf2v64si_nomaskedoff_scalar ((TARGET_ZVKNED || TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vism3cv64si_nomaskedoff_scalar ((TARGET_ZVKNED || TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_viaeskf2v128si_nomaskedoff_scalar ((TARGET_ZVKNED || TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vism3cv128si_nomaskedoff_scalar ((TARGET_ZVKNED || TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_viaeskf2v256si_nomaskedoff_scalar ((TARGET_ZVKNED || TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vism3cv256si_nomaskedoff_scalar ((TARGET_ZVKNED || TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_viaeskf2v512si_nomaskedoff_scalar ((TARGET_ZVKNED || TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vism3cv512si_nomaskedoff_scalar ((TARGET_ZVKNED || TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_viaeskf2v1024si_nomaskedoff_scalar ((TARGET_ZVKNED || TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vism3cv1024si_nomaskedoff_scalar ((TARGET_ZVKNED || TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vsm3mervvm8si (TARGET_ZVKSH)
#define HAVE_pred_vsm3mervvm4si (TARGET_ZVKSH)
#define HAVE_pred_vsm3mervvm2si (TARGET_ZVKSH)
#define HAVE_pred_vsm3mervvm1si (TARGET_ZVKSH)
#define HAVE_pred_vsm3mervvmf2si ((TARGET_ZVKSH) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vsm3mev1si ((TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_vsm3mev2si ((TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_vsm3mev4si ((TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_vsm3mev8si ((TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_vsm3mev16si ((TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vsm3mev32si ((TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vsm3mev64si ((TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vsm3mev128si ((TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vsm3mev256si ((TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vsm3mev512si ((TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vsm3mev1024si ((TARGET_ZVKSH) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_truncrvvm8sf_to_bf16 ((TARGET_ZVFBFMIN) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_truncrvvm4sf_to_bf16 ((TARGET_ZVFBFMIN) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_truncrvvm2sf_to_bf16 ((TARGET_ZVFBFMIN) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_truncrvvm1sf_to_bf16 ((TARGET_ZVFBFMIN) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_truncrvvmf2sf_to_bf16 ((TARGET_ZVFBFMIN) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN > 32))
#define HAVE_pred_extend_bf16_to_rvvm8sf ((TARGET_ZVFBFMIN) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_extend_bf16_to_rvvm4sf ((TARGET_ZVFBFMIN) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_extend_bf16_to_rvvm2sf ((TARGET_ZVFBFMIN) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_extend_bf16_to_rvvm1sf ((TARGET_ZVFBFMIN) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_extend_bf16_to_rvvmf2sf ((TARGET_ZVFBFMIN) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN > 32))
#define HAVE_pred_widen_bf16_mul_rvvm8sf ((TARGET_ZVFBFWMA) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_bf16_mul_rvvm4sf ((TARGET_ZVFBFWMA) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_bf16_mul_rvvm2sf ((TARGET_ZVFBFWMA) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_bf16_mul_rvvm1sf ((TARGET_ZVFBFWMA) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_bf16_mul_rvvmf2sf ((TARGET_ZVFBFWMA) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN > 32))
#define HAVE_pred_widen_bf16_mul_rvvm8sf_scalar ((TARGET_ZVFBFWMA) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_bf16_mul_rvvm4sf_scalar ((TARGET_ZVFBFWMA) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_bf16_mul_rvvm2sf_scalar ((TARGET_ZVFBFWMA) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_bf16_mul_rvvm1sf_scalar ((TARGET_ZVFBFWMA) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_widen_bf16_mul_rvvmf2sf_scalar ((TARGET_ZVFBFWMA) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN > 32))
#define HAVE_conditional_andsi (((TARGET_ZICOND_LIKE || TARGET_XTHEADCONDMOV) && can_create_pseudo_p ()) && (!TARGET_64BIT))
#define HAVE_conditional_anddi (((TARGET_ZICOND_LIKE || TARGET_XTHEADCONDMOV) && can_create_pseudo_p ()) && (TARGET_64BIT))
#define HAVE_conditional_randsi (((TARGET_ZICOND_LIKE || TARGET_XTHEADCONDMOV) && can_create_pseudo_p ()) && (!TARGET_64BIT))
#define HAVE_conditional_randdi (((TARGET_ZICOND_LIKE || TARGET_XTHEADCONDMOV) && can_create_pseudo_p ()) && (TARGET_64BIT))
#define HAVE_gpr_multi_pop_up_to_ra_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_pop_up_to_ra_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_pop_up_to_s0_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_pop_up_to_s0_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_pop_up_to_s1_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_pop_up_to_s1_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_pop_up_to_s2_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_pop_up_to_s2_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_pop_up_to_s3_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_pop_up_to_s3_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_pop_up_to_s4_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_pop_up_to_s4_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_pop_up_to_s5_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_pop_up_to_s5_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_pop_up_to_s6_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_pop_up_to_s6_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_pop_up_to_s7_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_pop_up_to_s7_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_pop_up_to_s8_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_pop_up_to_s8_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_pop_up_to_s9_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_pop_up_to_s9_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_pop_up_to_s11_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_pop_up_to_s11_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_popret_up_to_ra_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_popret_up_to_ra_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_popret_up_to_s0_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_popret_up_to_s0_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_popret_up_to_s1_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_popret_up_to_s1_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_popret_up_to_s2_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_popret_up_to_s2_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_popret_up_to_s3_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_popret_up_to_s3_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_popret_up_to_s4_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_popret_up_to_s4_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_popret_up_to_s5_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_popret_up_to_s5_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_popret_up_to_s6_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_popret_up_to_s6_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_popret_up_to_s7_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_popret_up_to_s7_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_popret_up_to_s8_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_popret_up_to_s8_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_popret_up_to_s9_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_popret_up_to_s9_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_popret_up_to_s11_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_popret_up_to_s11_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_popretz_up_to_ra_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_popretz_up_to_ra_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_popretz_up_to_s0_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_popretz_up_to_s0_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_popretz_up_to_s1_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_popretz_up_to_s1_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_popretz_up_to_s2_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_popretz_up_to_s2_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_popretz_up_to_s3_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_popretz_up_to_s3_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_popretz_up_to_s4_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_popretz_up_to_s4_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_popretz_up_to_s5_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_popretz_up_to_s5_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_popretz_up_to_s6_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_popretz_up_to_s6_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_popretz_up_to_s7_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_popretz_up_to_s7_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_popretz_up_to_s8_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_popretz_up_to_s8_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_popretz_up_to_s9_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_popretz_up_to_s9_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_popretz_up_to_s11_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_popretz_up_to_s11_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_push_up_to_ra_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_push_up_to_ra_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_push_up_to_s0_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_push_up_to_s0_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_push_up_to_s1_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_push_up_to_s1_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_push_up_to_s2_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_push_up_to_s2_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_push_up_to_s3_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_push_up_to_s3_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_push_up_to_s4_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_push_up_to_s4_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_push_up_to_s5_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_push_up_to_s5_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_push_up_to_s6_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_push_up_to_s6_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_push_up_to_s7_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_push_up_to_s7_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_push_up_to_s8_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_push_up_to_s8_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_push_up_to_s9_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_push_up_to_s9_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_gpr_multi_push_up_to_s11_si ((TARGET_ZCMP) && (!TARGET_64BIT))
#define HAVE_gpr_multi_push_up_to_s11_di ((TARGET_ZCMP) && (TARGET_64BIT))
#define HAVE_th_revsi2 (TARGET_XTHEADBB && (TARGET_64BIT || SImode == SImode))
#define HAVE_th_revdi2 ((TARGET_XTHEADBB && (TARGET_64BIT || DImode == SImode)) && (TARGET_64BIT))
#define HAVE_th_tstnbzsi2 ((TARGET_XTHEADBB) && (!TARGET_64BIT))
#define HAVE_th_tstnbzdi2 ((TARGET_XTHEADBB) && (TARGET_64BIT))
#define HAVE_th_fmv_hw_w_x (!TARGET_64BIT && TARGET_XTHEADFMV)
#define HAVE_th_fmv_x_w (!TARGET_64BIT && TARGET_XTHEADFMV)
#define HAVE_th_fmv_x_hw (!TARGET_64BIT && TARGET_XTHEADFMV)
#define HAVE_th_int_push (TARGET_XTHEADINT && !TARGET_64BIT)
#define HAVE_th_int_pop (TARGET_XTHEADINT && !TARGET_64BIT)
#define HAVE_riscv_cv_mac_mac (TARGET_XCVMAC && !TARGET_64BIT)
#define HAVE_riscv_cv_mac_msu (TARGET_XCVMAC && !TARGET_64BIT)
#define HAVE_riscv_cv_mac_muluN (TARGET_XCVMAC && !TARGET_64BIT)
#define HAVE_riscv_cv_mac_mulhhuN (TARGET_XCVMAC && !TARGET_64BIT)
#define HAVE_riscv_cv_mac_mulsN (TARGET_XCVMAC && !TARGET_64BIT)
#define HAVE_riscv_cv_mac_mulhhsN (TARGET_XCVMAC && !TARGET_64BIT)
#define HAVE_riscv_cv_mac_muluRN (TARGET_XCVMAC && !TARGET_64BIT)
#define HAVE_riscv_cv_mac_mulhhuRN (TARGET_XCVMAC && !TARGET_64BIT)
#define HAVE_riscv_cv_mac_mulsRN (TARGET_XCVMAC && !TARGET_64BIT)
#define HAVE_riscv_cv_mac_mulhhsRN (TARGET_XCVMAC && !TARGET_64BIT)
#define HAVE_riscv_cv_mac_macuN (TARGET_XCVMAC && !TARGET_64BIT)
#define HAVE_riscv_cv_mac_machhuN (TARGET_XCVMAC && !TARGET_64BIT)
#define HAVE_riscv_cv_mac_macsN (TARGET_XCVMAC && !TARGET_64BIT)
#define HAVE_riscv_cv_mac_machhsN (TARGET_XCVMAC && !TARGET_64BIT)
#define HAVE_riscv_cv_mac_macuRN (TARGET_XCVMAC && !TARGET_64BIT)
#define HAVE_riscv_cv_mac_machhuRN (TARGET_XCVMAC && !TARGET_64BIT)
#define HAVE_riscv_cv_mac_macsRN (TARGET_XCVMAC && !TARGET_64BIT)
#define HAVE_riscv_cv_mac_machhsRN (TARGET_XCVMAC && !TARGET_64BIT)
#define HAVE_riscv_cv_alu_slet (TARGET_XCVALU && !TARGET_64BIT)
#define HAVE_riscv_cv_alu_sletu (TARGET_XCVALU && !TARGET_64BIT)
#define HAVE_riscv_cv_alu_min (TARGET_XCVALU && !TARGET_64BIT)
#define HAVE_riscv_cv_alu_minu (TARGET_XCVALU && !TARGET_64BIT)
#define HAVE_riscv_cv_alu_max (TARGET_XCVALU && !TARGET_64BIT)
#define HAVE_riscv_cv_alu_maxu (TARGET_XCVALU && !TARGET_64BIT)
#define HAVE_riscv_cv_alu_exths (TARGET_XCVALU && !TARGET_64BIT)
#define HAVE_riscv_cv_alu_exthz (TARGET_XCVALU && !TARGET_64BIT)
#define HAVE_riscv_cv_alu_extbs (TARGET_XCVALU && !TARGET_64BIT)
#define HAVE_riscv_cv_alu_extbz (TARGET_XCVALU && !TARGET_64BIT)
#define HAVE_riscv_cv_alu_clip (TARGET_XCVALU && !TARGET_64BIT)
#define HAVE_riscv_cv_alu_clipu (TARGET_XCVALU && !TARGET_64BIT)
#define HAVE_riscv_cv_alu_addN (TARGET_XCVALU && !TARGET_64BIT)
#define HAVE_riscv_cv_alu_adduN (TARGET_XCVALU && !TARGET_64BIT)
#define HAVE_riscv_cv_alu_addRN (TARGET_XCVALU && !TARGET_64BIT)
#define HAVE_riscv_cv_alu_adduRN (TARGET_XCVALU && !TARGET_64BIT)
#define HAVE_riscv_cv_alu_subN (TARGET_XCVALU && !TARGET_64BIT)
#define HAVE_riscv_cv_alu_subuN (TARGET_XCVALU && !TARGET_64BIT)
#define HAVE_riscv_cv_alu_subRN (TARGET_XCVALU && !TARGET_64BIT)
#define HAVE_riscv_cv_alu_subuRN (TARGET_XCVALU && !TARGET_64BIT)
#define HAVE_riscv_cv_elw_elw_si (TARGET_XCVELW && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_add_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_add_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_add_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_add_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_sub_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_sub_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_sub_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_sub_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_avg_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_avg_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_avg_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_avg_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_avgu_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_avgu_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_avgu_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_avgu_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_min_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_min_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_min_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_min_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_minu_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_minu_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_minu_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_minu_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_max_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_max_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_max_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_max_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_maxu_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_maxu_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_maxu_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_maxu_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_srl_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_srl_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_srl_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_srl_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_sra_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_sra_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_sra_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_sra_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_sll_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_sll_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_sll_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_sll_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_or_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_or_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_or_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_or_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_xor_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_xor_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_xor_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_xor_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_and_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_and_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_and_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_and_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_abs_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_abs_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_neg_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_neg_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_extract_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_extract_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_extractu_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_extractu_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_insert_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_insert_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_dotup_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_dotup_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_dotup_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_dotup_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_dotusp_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_dotusp_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_dotusp_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_dotusp_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_dotsp_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_dotsp_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_dotsp_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_dotsp_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_sdotup_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_sdotup_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_sdotup_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_sdotup_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_sdotusp_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_sdotusp_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_sdotusp_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_sdotusp_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_sdotsp_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_sdotsp_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_sdotsp_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_sdotsp_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_shuffle_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_shuffle_sci_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_shuffle_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_shuffle_sci_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_shuffle2_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_shuffle2_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_packhi_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_packlo_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_packhi_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_packlo_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpeq_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpeq_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpeq_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpeq_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpne_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpne_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpne_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpne_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpgt_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpgt_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpgt_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpgt_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpge_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpge_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpge_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpge_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmplt_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmplt_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmplt_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmplt_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmple_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmple_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmple_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmple_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpgtu_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpgtu_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpgtu_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpgtu_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpgeu_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpgeu_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpgeu_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpgeu_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpltu_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpltu_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpltu_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpltu_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpleu_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpleu_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpleu_sc_h_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cmpleu_sc_b_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cplxmul_r_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cplxmul_i_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_cplxconj_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_riscv_cv_simd_subrotmj_si (TARGET_XCVSIMD && !TARGET_64BIT)
#define HAVE_lea_hsi ((TARGET_XANDESPERF) && (Pmode == SImode))
#define HAVE_lea_hdi ((TARGET_XANDESPERF) && (Pmode == DImode))
#define HAVE_lea_wsi ((TARGET_XANDESPERF) && (Pmode == SImode))
#define HAVE_lea_wdi ((TARGET_XANDESPERF) && (Pmode == DImode))
#define HAVE_lea_dsi ((TARGET_XANDESPERF) && (Pmode == SImode))
#define HAVE_lea_ddi ((TARGET_XANDESPERF) && (Pmode == DImode))
#define HAVE_lea_b_ze (TARGET_64BIT && TARGET_XANDESPERF)
#define HAVE_lea_h_ze (TARGET_64BIT && TARGET_XANDESPERF)
#define HAVE_lea_w_ze (TARGET_64BIT && TARGET_XANDESPERF)
#define HAVE_lea_d_ze (TARGET_64BIT && TARGET_XANDESPERF)
#define HAVE_lea_andim_ashift (TARGET_64BIT && TARGET_XANDESPERF \
   && IN_RANGE (UINTVAL (operands[2]), 0, 3) \
   && exact_log2 ((INTVAL (operands[3]) >> INTVAL (operands[2])) + 1) == 32 \
   && (INTVAL (operands[3]) & ((1 << INTVAL (operands[2])) - 1)) == 0)
#define HAVE_riscv_nds_ffbsi 1
#define HAVE_riscv_nds_ffbdi (TARGET_64BIT)
#define HAVE_riscv_nds_ffzmismsi 1
#define HAVE_riscv_nds_ffzmismdi (TARGET_64BIT)
#define HAVE_riscv_nds_ffmismsi 1
#define HAVE_riscv_nds_ffmismdi (TARGET_64BIT)
#define HAVE_riscv_nds_flmismsi 1
#define HAVE_riscv_nds_flmismdi (TARGET_64BIT)
#define HAVE_addptrsi3 (!TARGET_64BIT)
#define HAVE_addptrdi3 (TARGET_64BIT)
#define HAVE_addsi3 1
#define HAVE_adddi3 (TARGET_64BIT)
#define HAVE_addvsi4 1
#define HAVE_addvdi4 (TARGET_64BIT)
#define HAVE_uaddvsi4 1
#define HAVE_uaddvdi4 (TARGET_64BIT)
#define HAVE_subsi3 1
#define HAVE_subvsi4 1
#define HAVE_subvdi4 (TARGET_64BIT)
#define HAVE_usubvsi4 1
#define HAVE_usubvdi4 (TARGET_64BIT)
#define HAVE_negsi2 1
#define HAVE_mulsi3 (TARGET_ZMMUL || TARGET_MUL)
#define HAVE_mulvsi4 (TARGET_ZMMUL || TARGET_MUL)
#define HAVE_mulvdi4 ((TARGET_ZMMUL || TARGET_MUL) && (TARGET_64BIT))
#define HAVE_umulvsi4 (TARGET_ZMMUL || TARGET_MUL)
#define HAVE_umulvdi4 ((TARGET_ZMMUL || TARGET_MUL) && (TARGET_64BIT))
#define HAVE_mulditi3 ((TARGET_ZMMUL || TARGET_MUL) && TARGET_64BIT)
#define HAVE_umulditi3 ((TARGET_ZMMUL || TARGET_MUL) && TARGET_64BIT)
#define HAVE_usmulditi3 ((TARGET_ZMMUL || TARGET_MUL) && TARGET_64BIT)
#define HAVE_mulsidi3 ((TARGET_ZMMUL || TARGET_MUL) && !TARGET_64BIT)
#define HAVE_umulsidi3 ((TARGET_ZMMUL || TARGET_MUL) && !TARGET_64BIT)
#define HAVE_usmulsidi3 ((TARGET_ZMMUL || TARGET_MUL) && !TARGET_64BIT)
#define HAVE_divsi3 (TARGET_DIV)
#define HAVE_udivsi3 (TARGET_DIV)
#define HAVE_modsi3 (TARGET_DIV)
#define HAVE_umodsi3 (TARGET_DIV)
#define HAVE_divmodsi4 (TARGET_DIV && riscv_use_divmod_expander ())
#define HAVE_udivmodsi4 (TARGET_DIV && riscv_use_divmod_expander ())
#define HAVE_divmoddi4 ((TARGET_DIV && riscv_use_divmod_expander ()) && (TARGET_64BIT))
#define HAVE_udivmoddi4 ((TARGET_DIV && riscv_use_divmod_expander ()) && (TARGET_64BIT))
#define HAVE_andsi3 (!TARGET_64BIT)
#define HAVE_anddi3 (TARGET_64BIT)
#define HAVE_iorsi3 (!TARGET_64BIT)
#define HAVE_xorsi3 (!TARGET_64BIT)
#define HAVE_iordi3 (TARGET_64BIT)
#define HAVE_xordi3 (TARGET_64BIT)
#define HAVE_trunchfbf2 (TARGET_ZFBFMIN)
#define HAVE_truncdfbf2 (TARGET_ZFBFMIN)
#define HAVE_trunctfbf2 (TARGET_ZFBFMIN)
#define HAVE_zero_extendsidi2 (TARGET_64BIT)
#define HAVE_zero_extendhisi2 1
#define HAVE_zero_extendhidi2 (TARGET_64BIT)
#define HAVE_zero_extendqihi2 1
#define HAVE_zero_extendqisi2 1
#define HAVE_zero_extendqidi2 (TARGET_64BIT)
#define HAVE_extendsidi2 (TARGET_64BIT)
#define HAVE_extendqihi2 1
#define HAVE_extendqisi2 1
#define HAVE_extendqidi2 (TARGET_64BIT)
#define HAVE_extendhihi2 1
#define HAVE_extendhisi2 1
#define HAVE_extendhidi2 (TARGET_64BIT)
#define HAVE_movhf 1
#define HAVE_movbf 1
#define HAVE_fix_truncsfsi2 (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_fixuns_truncsfsi2 (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_fix_truncdfsi2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_fixuns_truncdfsi2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_fix_trunchfsi2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_fixuns_trunchfsi2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_lrintsfsi2 (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_lrintdfsi2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_lrinthfsi2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_lroundsfsi2 (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_lfloorsfsi2 (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_lceilsfsi2 (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_lbtruncsfsi2 (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_lroundevensfsi2 (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_lnearbyintsfsi2 (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_lrounddfsi2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_lfloordfsi2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_lceildfsi2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_lbtruncdfsi2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_lroundevendfsi2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_lnearbyintdfsi2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_lroundhfsi2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_lfloorhfsi2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_lceilhfsi2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_lbtrunchfsi2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_lroundevenhfsi2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_lnearbyinthfsi2 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_roundsf2 (((TARGET_HARD_FLOAT \
    && (TARGET_ZFA || flag_fp_int_builtin_inexact || !flag_trapping_math) \
    && (TARGET_ZFA || TARGET_64BIT || SFmode != DFmode) \
    && (TARGET_ZFA || SFmode != HFmode))) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_floorsf2 (((TARGET_HARD_FLOAT \
    && (TARGET_ZFA || flag_fp_int_builtin_inexact || !flag_trapping_math) \
    && (TARGET_ZFA || TARGET_64BIT || SFmode != DFmode) \
    && (TARGET_ZFA || SFmode != HFmode))) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_ceilsf2 (((TARGET_HARD_FLOAT \
    && (TARGET_ZFA || flag_fp_int_builtin_inexact || !flag_trapping_math) \
    && (TARGET_ZFA || TARGET_64BIT || SFmode != DFmode) \
    && (TARGET_ZFA || SFmode != HFmode))) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_btruncsf2 (((TARGET_HARD_FLOAT \
    && (TARGET_ZFA || flag_fp_int_builtin_inexact || !flag_trapping_math) \
    && (TARGET_ZFA || TARGET_64BIT || SFmode != DFmode) \
    && (TARGET_ZFA || SFmode != HFmode))) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_roundevensf2 (((TARGET_HARD_FLOAT \
    && (TARGET_ZFA || flag_fp_int_builtin_inexact || !flag_trapping_math) \
    && (TARGET_ZFA || TARGET_64BIT || SFmode != DFmode) \
    && (TARGET_ZFA || SFmode != HFmode))) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_nearbyintsf2 (((TARGET_HARD_FLOAT \
    && (TARGET_ZFA || flag_fp_int_builtin_inexact || !flag_trapping_math) \
    && (TARGET_ZFA || TARGET_64BIT || SFmode != DFmode) \
    && (TARGET_ZFA || SFmode != HFmode))) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_rounddf2 (((TARGET_HARD_FLOAT \
    && (TARGET_ZFA || flag_fp_int_builtin_inexact || !flag_trapping_math) \
    && (TARGET_ZFA || TARGET_64BIT || DFmode != DFmode) \
    && (TARGET_ZFA || DFmode != HFmode))) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_floordf2 (((TARGET_HARD_FLOAT \
    && (TARGET_ZFA || flag_fp_int_builtin_inexact || !flag_trapping_math) \
    && (TARGET_ZFA || TARGET_64BIT || DFmode != DFmode) \
    && (TARGET_ZFA || DFmode != HFmode))) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_ceildf2 (((TARGET_HARD_FLOAT \
    && (TARGET_ZFA || flag_fp_int_builtin_inexact || !flag_trapping_math) \
    && (TARGET_ZFA || TARGET_64BIT || DFmode != DFmode) \
    && (TARGET_ZFA || DFmode != HFmode))) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_btruncdf2 (((TARGET_HARD_FLOAT \
    && (TARGET_ZFA || flag_fp_int_builtin_inexact || !flag_trapping_math) \
    && (TARGET_ZFA || TARGET_64BIT || DFmode != DFmode) \
    && (TARGET_ZFA || DFmode != HFmode))) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_roundevendf2 (((TARGET_HARD_FLOAT \
    && (TARGET_ZFA || flag_fp_int_builtin_inexact || !flag_trapping_math) \
    && (TARGET_ZFA || TARGET_64BIT || DFmode != DFmode) \
    && (TARGET_ZFA || DFmode != HFmode))) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_nearbyintdf2 (((TARGET_HARD_FLOAT \
    && (TARGET_ZFA || flag_fp_int_builtin_inexact || !flag_trapping_math) \
    && (TARGET_ZFA || TARGET_64BIT || DFmode != DFmode) \
    && (TARGET_ZFA || DFmode != HFmode))) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_roundhf2 (((TARGET_HARD_FLOAT \
    && (TARGET_ZFA || flag_fp_int_builtin_inexact || !flag_trapping_math) \
    && (TARGET_ZFA || TARGET_64BIT || HFmode != DFmode) \
    && (TARGET_ZFA || HFmode != HFmode))) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_floorhf2 (((TARGET_HARD_FLOAT \
    && (TARGET_ZFA || flag_fp_int_builtin_inexact || !flag_trapping_math) \
    && (TARGET_ZFA || TARGET_64BIT || HFmode != DFmode) \
    && (TARGET_ZFA || HFmode != HFmode))) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_ceilhf2 (((TARGET_HARD_FLOAT \
    && (TARGET_ZFA || flag_fp_int_builtin_inexact || !flag_trapping_math) \
    && (TARGET_ZFA || TARGET_64BIT || HFmode != DFmode) \
    && (TARGET_ZFA || HFmode != HFmode))) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_btrunchf2 (((TARGET_HARD_FLOAT \
    && (TARGET_ZFA || flag_fp_int_builtin_inexact || !flag_trapping_math) \
    && (TARGET_ZFA || TARGET_64BIT || HFmode != DFmode) \
    && (TARGET_ZFA || HFmode != HFmode))) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_roundevenhf2 (((TARGET_HARD_FLOAT \
    && (TARGET_ZFA || flag_fp_int_builtin_inexact || !flag_trapping_math) \
    && (TARGET_ZFA || TARGET_64BIT || HFmode != DFmode) \
    && (TARGET_ZFA || HFmode != HFmode))) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_nearbyinthf2 (((TARGET_HARD_FLOAT \
    && (TARGET_ZFA || flag_fp_int_builtin_inexact || !flag_trapping_math) \
    && (TARGET_ZFA || TARGET_64BIT || HFmode != DFmode) \
    && (TARGET_ZFA || HFmode != HFmode))) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_movdi 1
#define HAVE_movsi 1
#define HAVE_movhi 1
#define HAVE_movqi 1
#define HAVE_movsf 1
#define HAVE_movdf 1
#define HAVE_cmpmemsi (!optimize_size)
#define HAVE_cpymemsi (Pmode == SImode)
#define HAVE_cpymemdi (Pmode == DImode)
#define HAVE_setmemsi (Pmode == SImode)
#define HAVE_setmemdi (Pmode == DImode)
#define HAVE_movmemsi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_movmemdi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_clear_cache 1
#define HAVE_ashlsi3 1
#define HAVE_ashrsi3 1
#define HAVE_lshrsi3 1
#define HAVE_movsicc (TARGET_SFB_ALU || TARGET_XTHEADCONDMOV || TARGET_ZICOND_LIKE \
   || TARGET_MOVCC || TARGET_XMIPSCMOV)
#define HAVE_movdicc ((TARGET_SFB_ALU || TARGET_XTHEADCONDMOV || TARGET_ZICOND_LIKE \
   || TARGET_MOVCC || TARGET_XMIPSCMOV) && (TARGET_64BIT))
#define HAVE_addsicc (TARGET_MOVCC)
#define HAVE_adddicc ((TARGET_MOVCC) && (TARGET_64BIT))
#define HAVE_condjump 1
#define HAVE_cbranchqi4 (TARGET_64BIT)
#define HAVE_cbranchsi4 1
#define HAVE_cbranchdi4 (TARGET_64BIT)
#define HAVE_cbranchsf4 (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_cbranchdf4 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_cbranchhf4 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_cstoresi4 1
#define HAVE_cstoredi4 (TARGET_64BIT)
#define HAVE_cstoresf4 (TARGET_HARD_FLOAT || TARGET_ZFINX)
#define HAVE_cstoredf4 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_cstorehf4 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_flt_quietsfsi4 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (((!TARGET_64BIT) && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX)))
#define HAVE_fle_quietsfsi4 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (((!TARGET_64BIT) && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX)))
#define HAVE_flt_quietsfdi4 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (((TARGET_64BIT) && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX)))
#define HAVE_fle_quietsfdi4 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (((TARGET_64BIT) && (TARGET_HARD_FLOAT || TARGET_ZFINX)) && (TARGET_HARD_FLOAT || TARGET_ZFINX)))
#define HAVE_flt_quietdfsi4 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (((!TARGET_64BIT) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX)))
#define HAVE_fle_quietdfsi4 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (((!TARGET_64BIT) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX)))
#define HAVE_flt_quietdfdi4 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (((TARGET_64BIT) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX)))
#define HAVE_fle_quietdfdi4 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (((TARGET_64BIT) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX)) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX)))
#define HAVE_flt_quiethfsi4 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (((!TARGET_64BIT) && (TARGET_ZFH || TARGET_ZHINX)) && (TARGET_ZFH || TARGET_ZHINX)))
#define HAVE_fle_quiethfsi4 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (((!TARGET_64BIT) && (TARGET_ZFH || TARGET_ZHINX)) && (TARGET_ZFH || TARGET_ZHINX)))
#define HAVE_flt_quiethfdi4 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (((TARGET_64BIT) && (TARGET_ZFH || TARGET_ZHINX)) && (TARGET_ZFH || TARGET_ZHINX)))
#define HAVE_fle_quiethfdi4 ((TARGET_HARD_FLOAT || TARGET_ZFINX) && (((TARGET_64BIT) && (TARGET_ZFH || TARGET_ZHINX)) && (TARGET_ZFH || TARGET_ZHINX)))
#define HAVE_isfinitesf2 ((TARGET_HARD_FLOAT) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_isnormalsf2 ((TARGET_HARD_FLOAT) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_isinfsf2 ((TARGET_HARD_FLOAT) && (TARGET_HARD_FLOAT || TARGET_ZFINX))
#define HAVE_isfinitedf2 ((TARGET_HARD_FLOAT) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_isnormaldf2 ((TARGET_HARD_FLOAT) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_isinfdf2 ((TARGET_HARD_FLOAT) && (TARGET_DOUBLE_FLOAT || TARGET_ZDINX))
#define HAVE_isfinitehf2 ((TARGET_HARD_FLOAT) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_isnormalhf2 ((TARGET_HARD_FLOAT) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_isinfhf2 ((TARGET_HARD_FLOAT) && (TARGET_ZFH || TARGET_ZHINX))
#define HAVE_indirect_jump 1
#define HAVE_tablejump 1
#define HAVE_prologue 1
#define HAVE_epilogue 1
#define HAVE_sibcall_epilogue 1
#define HAVE_return (riscv_can_use_return_insn ())
#define HAVE_eh_return 1
#define HAVE_sibcall 1
#define HAVE_sibcall_value 1
#define HAVE_call 1
#define HAVE_call_value 1
#define HAVE_untyped_call 1
#define HAVE_save_stack_nonlocal 1
#define HAVE_restore_stack_nonlocal 1
#define HAVE_get_thread_pointersi (Pmode == SImode)
#define HAVE_get_thread_pointerdi (Pmode == DImode)
#define HAVE_stack_protect_set 1
#define HAVE_stack_protect_test 1
#define HAVE_extvsi (TARGET_XTHEADBB)
#define HAVE_extvdi ((TARGET_XTHEADBB) && (TARGET_64BIT))
#define HAVE_extzvsi (TARGET_XTHEADBB)
#define HAVE_extzvdi ((TARGET_XTHEADBB) && (TARGET_64BIT))
#define HAVE_maddhisi4 (TARGET_XTHEADMAC)
#define HAVE_msubhisi4 (TARGET_XTHEADMAC)
#define HAVE_cmpstrnsi (riscv_inline_strncmp && !optimize_size \
    && (TARGET_ZBB || TARGET_XTHEADBB || TARGET_VECTOR))
#define HAVE_cmpstrsi (riscv_inline_strcmp && !optimize_size \
    && (TARGET_ZBB || TARGET_XTHEADBB || TARGET_VECTOR))
#define HAVE_strlensi ((riscv_inline_strlen && !optimize_size \
    && (TARGET_ZBB || TARGET_XTHEADBB || TARGET_VECTOR)) && (!TARGET_64BIT))
#define HAVE_strlendi ((riscv_inline_strlen && !optimize_size \
    && (TARGET_ZBB || TARGET_XTHEADBB || TARGET_VECTOR)) && (TARGET_64BIT))
#define HAVE_usaddqi3 1
#define HAVE_usaddhi3 1
#define HAVE_usaddsi3 1
#define HAVE_usadddi3 (TARGET_64BIT)
#define HAVE_ssaddqi3 1
#define HAVE_ssaddhi3 1
#define HAVE_ssaddsi3 1
#define HAVE_ssadddi3 (TARGET_64BIT)
#define HAVE_ussubqi3 1
#define HAVE_ussubhi3 1
#define HAVE_ussubsi3 1
#define HAVE_ussubdi3 (TARGET_64BIT)
#define HAVE_sssubqi3 1
#define HAVE_sssubhi3 1
#define HAVE_sssubsi3 1
#define HAVE_sssubdi3 (TARGET_64BIT)
#define HAVE_usmulqi3 (TARGET_ZMMUL || TARGET_MUL)
#define HAVE_usmulhi3 (TARGET_ZMMUL || TARGET_MUL)
#define HAVE_usmulsi3 (TARGET_ZMMUL || TARGET_MUL)
#define HAVE_usmuldi3 ((TARGET_ZMMUL || TARGET_MUL) && (TARGET_64BIT))
#define HAVE_ustrunchiqi2 1
#define HAVE_ustruncsihi2 1
#define HAVE_ustruncdisi2 (TARGET_64BIT)
#define HAVE_sstrunchiqi2 1
#define HAVE_sstruncsihi2 1
#define HAVE_sstruncdisi2 (TARGET_64BIT)
#define HAVE_ustruncsiqi2 1
#define HAVE_ustruncdihi2 (TARGET_64BIT)
#define HAVE_sstruncsiqi2 1
#define HAVE_sstruncdihi2 (TARGET_64BIT)
#define HAVE_ustruncdiqi2 (TARGET_64BIT)
#define HAVE_sstruncdiqi2 (TARGET_64BIT)
#define HAVE_clzdi2 (TARGET_64BIT && (TARGET_ZBB || TARGET_XTHEADBB))
#define HAVE_clzsi2 (TARGET_ZBB || (!TARGET_64BIT && TARGET_XTHEADBB))
#define HAVE_ctzsi2 (TARGET_ZBB)
#define HAVE_ctzdi2 ((TARGET_ZBB) && (TARGET_64BIT))
#define HAVE_popcountsi2 (TARGET_ZBB)
#define HAVE_popcountdi2 ((TARGET_ZBB) && (TARGET_64BIT))
#define HAVE_rotrdi3 (TARGET_64BIT && (TARGET_ZBB || TARGET_XTHEADBB || TARGET_ZBKB))
#define HAVE_rotrsi3 (TARGET_ZBB || TARGET_ZBKB || TARGET_XTHEADBB)
#define HAVE_rotlsi3 (TARGET_ZBB || TARGET_ZBKB)
#define HAVE_bswapdi2 (TARGET_64BIT && (TARGET_ZBB || TARGET_XTHEADBB || TARGET_ZBKB))
#define HAVE_bswapsi2 (TARGET_ZBB || TARGET_ZBKB || TARGET_XTHEADBB)
#define HAVE_bswaphi2 (TARGET_ZBB)
#define HAVE_smindi3 (TARGET_64BIT && TARGET_ZBB)
#define HAVE_umindi3 (TARGET_64BIT && TARGET_ZBB)
#define HAVE_smaxdi3 (TARGET_64BIT && TARGET_ZBB)
#define HAVE_umaxdi3 (TARGET_64BIT && TARGET_ZBB)
#define HAVE_sminsi3 (TARGET_ZBB)
#define HAVE_uminsi3 (TARGET_ZBB)
#define HAVE_smaxsi3 (TARGET_ZBB)
#define HAVE_umaxsi3 (TARGET_ZBB)
#define HAVE_crc_revqiqi4 1
#define HAVE_crc_revqihi4 1
#define HAVE_crc_revqisi4 1
#define HAVE_crc_revqidi4 ((DImode >= QImode) && (TARGET_64BIT))
#define HAVE_crc_revhihi4 1
#define HAVE_crc_revhisi4 1
#define HAVE_crc_revhidi4 ((DImode >= HImode) && (TARGET_64BIT))
#define HAVE_crc_revsisi4 1
#define HAVE_crc_revsidi4 ((DImode >= SImode) && (TARGET_64BIT))
#define HAVE_crc_revdidi4 ((DImode >= DImode) && (TARGET_64BIT))
#define HAVE_crcqiqi4 ((TARGET_ZBKC || TARGET_ZBC || TARGET_ZVBC) \
   && QImode >= QImode)
#define HAVE_crcqihi4 ((TARGET_ZBKC || TARGET_ZBC || TARGET_ZVBC) \
   && HImode >= QImode)
#define HAVE_crcqisi4 (((TARGET_ZBKC || TARGET_ZBC || TARGET_ZVBC) \
   && SImode >= QImode) && (TARGET_64BIT))
#define HAVE_crchihi4 ((TARGET_ZBKC || TARGET_ZBC || TARGET_ZVBC) \
   && HImode >= HImode)
#define HAVE_crchisi4 (((TARGET_ZBKC || TARGET_ZBC || TARGET_ZVBC) \
   && SImode >= HImode) && (TARGET_64BIT))
#define HAVE_crcsisi4 (((TARGET_ZBKC || TARGET_ZBC || TARGET_ZVBC) \
   && SImode >= SImode) && (TARGET_64BIT))
#define HAVE_riscv_sha256sig0_si (TARGET_ZKNH)
#define HAVE_riscv_sha256sig1_si (TARGET_ZKNH)
#define HAVE_riscv_sha256sum0_si (TARGET_ZKNH)
#define HAVE_riscv_sha256sum1_si (TARGET_ZKNH)
#define HAVE_riscv_sm3p0_si (TARGET_ZKSH)
#define HAVE_riscv_sm3p1_si (TARGET_ZKSH)
#define HAVE_riscv_sm4ed_si (TARGET_ZKSED)
#define HAVE_riscv_sm4ks_si (TARGET_ZKSED)
#define HAVE_mem_thread_fence 1
#define HAVE_atomic_loadqi 1
#define HAVE_atomic_loadhi 1
#define HAVE_atomic_loadsi 1
#define HAVE_atomic_loaddi (TARGET_64BIT)
#define HAVE_atomic_storeqi 1
#define HAVE_atomic_storehi 1
#define HAVE_atomic_storesi 1
#define HAVE_atomic_storedi (TARGET_64BIT)
#define HAVE_atomic_addsi (TARGET_ZAAMO || TARGET_ZALRSC)
#define HAVE_atomic_orsi (TARGET_ZAAMO || TARGET_ZALRSC)
#define HAVE_atomic_xorsi (TARGET_ZAAMO || TARGET_ZALRSC)
#define HAVE_atomic_andsi (TARGET_ZAAMO || TARGET_ZALRSC)
#define HAVE_atomic_adddi ((TARGET_ZAAMO || TARGET_ZALRSC) && (TARGET_64BIT))
#define HAVE_atomic_ordi ((TARGET_ZAAMO || TARGET_ZALRSC) && (TARGET_64BIT))
#define HAVE_atomic_xordi ((TARGET_ZAAMO || TARGET_ZALRSC) && (TARGET_64BIT))
#define HAVE_atomic_anddi ((TARGET_ZAAMO || TARGET_ZALRSC) && (TARGET_64BIT))
#define HAVE_atomic_fetch_addsi (TARGET_ZAAMO || TARGET_ZALRSC)
#define HAVE_atomic_fetch_orsi (TARGET_ZAAMO || TARGET_ZALRSC)
#define HAVE_atomic_fetch_xorsi (TARGET_ZAAMO || TARGET_ZALRSC)
#define HAVE_atomic_fetch_andsi (TARGET_ZAAMO || TARGET_ZALRSC)
#define HAVE_atomic_fetch_adddi ((TARGET_ZAAMO || TARGET_ZALRSC) && (TARGET_64BIT))
#define HAVE_atomic_fetch_ordi ((TARGET_ZAAMO || TARGET_ZALRSC) && (TARGET_64BIT))
#define HAVE_atomic_fetch_xordi ((TARGET_ZAAMO || TARGET_ZALRSC) && (TARGET_64BIT))
#define HAVE_atomic_fetch_anddi ((TARGET_ZAAMO || TARGET_ZALRSC) && (TARGET_64BIT))
#define HAVE_atomic_fetch_nandqi (TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC)
#define HAVE_atomic_fetch_nandhi (TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC)
#define HAVE_atomic_fetch_addqi ((TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC) || TARGET_ZABHA)
#define HAVE_atomic_fetch_orqi ((TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC) || TARGET_ZABHA)
#define HAVE_atomic_fetch_xorqi ((TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC) || TARGET_ZABHA)
#define HAVE_atomic_fetch_andqi ((TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC) || TARGET_ZABHA)
#define HAVE_atomic_fetch_addhi ((TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC) || TARGET_ZABHA)
#define HAVE_atomic_fetch_orhi ((TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC) || TARGET_ZABHA)
#define HAVE_atomic_fetch_xorhi ((TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC) || TARGET_ZABHA)
#define HAVE_atomic_fetch_andhi ((TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC) || TARGET_ZABHA)
#define HAVE_lrsc_atomic_fetch_addqi (!TARGET_ZABHA && TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC)
#define HAVE_lrsc_atomic_fetch_orqi (!TARGET_ZABHA && TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC)
#define HAVE_lrsc_atomic_fetch_xorqi (!TARGET_ZABHA && TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC)
#define HAVE_lrsc_atomic_fetch_andqi (!TARGET_ZABHA && TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC)
#define HAVE_lrsc_atomic_fetch_addhi (!TARGET_ZABHA && TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC)
#define HAVE_lrsc_atomic_fetch_orhi (!TARGET_ZABHA && TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC)
#define HAVE_lrsc_atomic_fetch_xorhi (!TARGET_ZABHA && TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC)
#define HAVE_lrsc_atomic_fetch_andhi (!TARGET_ZABHA && TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC)
#define HAVE_atomic_exchangesi (TARGET_ZAAMO || TARGET_ZALRSC)
#define HAVE_atomic_exchangedi ((TARGET_ZAAMO || TARGET_ZALRSC) && (TARGET_64BIT))
#define HAVE_atomic_exchangeqi ((TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC) || TARGET_ZABHA)
#define HAVE_atomic_exchangehi ((TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC) || TARGET_ZABHA)
#define HAVE_lrsc_atomic_exchangeqi (!TARGET_ZABHA && TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC)
#define HAVE_lrsc_atomic_exchangehi (!TARGET_ZABHA && TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC)
#define HAVE_atomic_compare_and_swapsi (TARGET_ZALRSC || TARGET_ZACAS)
#define HAVE_atomic_compare_and_swapdi ((TARGET_ZALRSC || TARGET_ZACAS) && (TARGET_64BIT))
#define HAVE_atomic_compare_and_swapqi ((TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC) || (TARGET_ZACAS && TARGET_ZABHA))
#define HAVE_atomic_compare_and_swaphi ((TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC) || (TARGET_ZACAS && TARGET_ZABHA))
#define HAVE_zalrsc_atomic_cas_value_strongqi (TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC)
#define HAVE_zalrsc_atomic_cas_value_stronghi (TARGET_ZALRSC && TARGET_INLINE_SUBWORD_ATOMIC)
#define HAVE_atomic_test_and_set (TARGET_ZAAMO || TARGET_ZALRSC)
#define HAVE_pred_mov_widthbrvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthburvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthhrvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthhurvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthwrvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthwurvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthbrvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthburvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthhrvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthhurvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthwrvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthwurvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthbrvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthburvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthhrvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthhurvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthwrvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthwurvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthbrvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthburvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthhrvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthhurvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthwrvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthwurvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthbrvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthburvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthhrvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthhurvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthwrvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthwurvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthbrvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthburvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthhrvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthhurvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthwrvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthwurvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthbrvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthburvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthhrvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthhurvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthwrvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthwurvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthbrvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthburvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthhrvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthhurvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthwrvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthwurvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthbrvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthburvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthhrvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthhurvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthwrvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthwurvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthbrvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthburvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthhrvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthhurvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthwrvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthwurvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthbrvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthburvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthhrvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthhurvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthwrvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthwurvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthbrvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthburvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthhrvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthhurvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthwrvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthwurvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_mov_widthbrvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthburvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthhrvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthhurvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthwrvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthwurvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthbrvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthburvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthhrvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthhurvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthwrvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthwurvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthbrvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthburvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthhrvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthhurvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthwrvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthwurvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthbrvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthburvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthhrvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthhurvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthwrvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthwurvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthbrvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mov_widthburvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mov_widthhrvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mov_widthhurvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mov_widthwrvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mov_widthwurvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mov_widthbrvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mov_widthburvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mov_widthhrvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mov_widthhurvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mov_widthwrvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mov_widthwurvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mov_widthbrvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mov_widthburvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mov_widthhrvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mov_widthhurvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mov_widthwrvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mov_widthwurvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mov_widthbrvvm8hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthburvvm8hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthhrvvm8hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthhurvvm8hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthwrvvm8hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthwurvvm8hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthbrvvm4hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthburvvm4hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthhrvvm4hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthhurvvm4hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthwrvvm4hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthwurvvm4hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthbrvvm2hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthburvvm2hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthhrvvm2hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthhurvvm2hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthwrvvm2hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthwurvvm2hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthbrvvm1hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthburvvm1hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthhrvvm1hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthhurvvm1hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthwrvvm1hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthwurvvm1hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthbrvvmf2hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthburvvmf2hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthhrvvmf2hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthhurvvmf2hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthwrvvmf2hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthwurvvmf2hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthbrvvmf4hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthburvvmf4hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthhrvvmf4hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthhurvvmf4hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthwrvvmf4hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthwurvvmf4hf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthbrvvm8sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthburvvm8sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthhrvvm8sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthhurvvm8sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthwrvvm8sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthwurvvm8sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthbrvvm4sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthburvvm4sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthhrvvm4sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthhurvvm4sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthwrvvm4sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthwurvvm4sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthbrvvm2sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthburvvm2sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthhrvvm2sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthhurvvm2sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthwrvvm2sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthwurvvm2sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthbrvvm1sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthburvvm1sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthhrvvm1sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthhurvvm1sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthwrvvm1sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthwurvvm1sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthbrvvmf2sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthburvvmf2sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthhrvvmf2sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthhurvvmf2sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthwrvvmf2sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthwurvvmf2sf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthbrvvm8df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthburvvm8df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthhrvvm8df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthhurvvm8df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthwrvvm8df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthwurvvm8df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthbrvvm4df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthburvvm4df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthhrvvm4df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthhurvvm4df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthwrvvm4df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthwurvvm4df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthbrvvm2df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthburvvm2df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthhrvvm2df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthhurvvm2df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthwrvvm2df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthwurvvm2df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthbrvvm1df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthburvvm1df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthhrvvm1df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthhurvvm1df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthwrvvm1df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthwurvvm1df ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthbrvvm8bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthburvvm8bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthhrvvm8bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthhurvvm8bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthwrvvm8bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthwurvvm8bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthbrvvm4bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthburvvm4bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthhrvvm4bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthhurvvm4bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthwrvvm4bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthwurvvm4bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthbrvvm2bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthburvvm2bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthhrvvm2bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthhurvvm2bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthwrvvm2bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthwurvvm2bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthbrvvm1bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthburvvm1bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthhrvvm1bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthhurvvm1bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthwrvvm1bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthwurvvm1bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthbrvvmf2bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthburvvmf2bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthhrvvmf2bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthhurvvmf2bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthwrvvmf2bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthwurvvmf2bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthbrvvmf4bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthburvvmf4bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthhrvvmf4bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthhurvvmf4bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthwrvvmf4bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthwurvvmf4bf ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthbv1qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_mov_widthbuv1qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_mov_widthhv1qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_mov_widthhuv1qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_mov_widthwv1qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_mov_widthwuv1qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_mov_widthbv2qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_mov_widthbuv2qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_mov_widthhv2qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_mov_widthhuv2qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_mov_widthwv2qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_mov_widthwuv2qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_mov_widthbv4qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_mov_widthbuv4qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_mov_widthhv4qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_mov_widthhuv4qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_mov_widthwv4qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_mov_widthwuv4qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_mov_widthbv8qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_mov_widthbuv8qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_mov_widthhv8qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_mov_widthhuv8qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_mov_widthwv8qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_mov_widthwuv8qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_mov_widthbv16qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_mov_widthbuv16qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_mov_widthhv16qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_mov_widthhuv16qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_mov_widthwv16qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_mov_widthwuv16qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_mov_widthbv32qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_mov_widthbuv32qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_mov_widthhv32qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_mov_widthhuv32qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_mov_widthwv32qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_mov_widthwuv32qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_mov_widthbv64qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthbuv64qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthhv64qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthhuv64qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthwv64qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthwuv64qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthbv128qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthbuv128qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthhv128qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthhuv128qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthwv128qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthwuv128qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthbv256qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthbuv256qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthhv256qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthhuv256qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthwv256qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthwuv256qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthbv512qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthbuv512qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthhv512qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthhuv512qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthwv512qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthwuv512qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthbv1024qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthbuv1024qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthhv1024qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthhuv1024qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthwv1024qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthwuv1024qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthbv2048qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthbuv2048qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthhv2048qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthhuv2048qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthwv2048qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthwuv2048qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthbv4096qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthbuv4096qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthhv4096qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthhuv4096qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthwv4096qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthwuv4096qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthbv1hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_mov_widthbuv1hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_mov_widthhv1hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_mov_widthhuv1hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_mov_widthwv1hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_mov_widthwuv1hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_mov_widthbv2hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_mov_widthbuv2hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_mov_widthhv2hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_mov_widthhuv2hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_mov_widthwv2hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_mov_widthwuv2hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_mov_widthbv4hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_mov_widthbuv4hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_mov_widthhv4hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_mov_widthhuv4hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_mov_widthwv4hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_mov_widthwuv4hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_mov_widthbv8hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_mov_widthbuv8hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_mov_widthhv8hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_mov_widthhuv8hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_mov_widthwv8hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_mov_widthwuv8hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_mov_widthbv16hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_mov_widthbuv16hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_mov_widthhv16hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_mov_widthhuv16hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_mov_widthwv16hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_mov_widthwuv16hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_mov_widthbv32hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthbuv32hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthhv32hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthhuv32hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthwv32hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthwuv32hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthbv64hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthbuv64hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthhv64hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthhuv64hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthwv64hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthwuv64hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthbv128hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthbuv128hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthhv128hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthhuv128hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthwv128hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthwuv128hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthbv256hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthbuv256hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthhv256hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthhuv256hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthwv256hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthwuv256hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthbv512hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthbuv512hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthhv512hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthhuv512hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthwv512hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthwuv512hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthbv1024hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthbuv1024hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthhv1024hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthhuv1024hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthwv1024hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthwuv1024hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthbv2048hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthbuv2048hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthhv2048hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthhuv2048hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthwv2048hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthwuv2048hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthbv1si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_mov_widthbuv1si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_mov_widthhv1si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_mov_widthhuv1si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_mov_widthwv1si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_mov_widthwuv1si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_mov_widthbv2si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_mov_widthbuv2si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_mov_widthhv2si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_mov_widthhuv2si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_mov_widthwv2si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_mov_widthwuv2si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_mov_widthbv4si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_mov_widthbuv4si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_mov_widthhv4si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_mov_widthhuv4si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_mov_widthwv4si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_mov_widthwuv4si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_mov_widthbv8si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_mov_widthbuv8si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_mov_widthhv8si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_mov_widthhuv8si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_mov_widthwv8si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_mov_widthwuv8si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_mov_widthbv16si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthbuv16si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthhv16si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthhuv16si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthwv16si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthwuv16si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthbv32si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthbuv32si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthhv32si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthhuv32si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthwv32si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthwuv32si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthbv64si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthbuv64si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthhv64si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthhuv64si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthwv64si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthwuv64si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthbv128si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthbuv128si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthhv128si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthhuv128si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthwv128si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthwuv128si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthbv256si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthbuv256si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthhv256si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthhuv256si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthwv256si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthwuv256si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthbv512si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthbuv512si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthhv512si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthhuv512si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthwv512si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthwuv512si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthbv1024si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthbuv1024si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthhv1024si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthhuv1024si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthwv1024si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthwuv1024si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthbv1di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthbuv1di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthhv1di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthhuv1di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthwv1di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthwuv1di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthbv2di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthbuv2di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthhv2di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthhuv2di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthwv2di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthwuv2di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthbv4di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthbuv4di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthhv4di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthhuv4di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthwv4di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthwuv4di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mov_widthbv8di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthbuv8di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthhv8di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthhuv8di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthwv8di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthwuv8di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthbv16di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthbuv16di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthhv16di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthhuv16di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthwv16di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthwuv16di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthbv32di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthbuv32di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthhv32di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthhuv32di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthwv32di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthwuv32di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthbv64di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthbuv64di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthhv64di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthhuv64di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthwv64di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthwuv64di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthbv128di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthbuv128di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthhv128di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthhuv128di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthwv128di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthwuv128di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthbv256di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthbuv256di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthhv256di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthhuv256di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthwv256di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthwuv256di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthbv512di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthbuv512di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthhv512di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthhuv512di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthwv512di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthwuv512di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthbv1hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthbuv1hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthhv1hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthhuv1hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthwv1hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthwuv1hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthbv2hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthbuv2hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthhv2hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthhuv2hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthwv2hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthwuv2hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthbv4hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthbuv4hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthhv4hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthhuv4hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthwv4hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthwuv4hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthbv8hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthbuv8hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthhv8hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthhuv8hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthwv8hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthwuv8hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthbv16hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthbuv16hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthhv16hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthhuv16hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthwv16hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthwuv16hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_mov_widthbv32hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthbuv32hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthhv32hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthhuv32hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthwv32hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthwuv32hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthbv64hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthbuv64hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthhv64hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthhuv64hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthwv64hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthwuv64hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthbv128hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthbuv128hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthhv128hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthhuv128hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthwv128hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthwuv128hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthbv256hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthbuv256hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthhv256hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthhuv256hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthwv256hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthwuv256hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthbv512hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthbuv512hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthhv512hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthhuv512hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthwv512hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthwuv512hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthbv1024hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthbuv1024hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthhv1024hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthhuv1024hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthwv1024hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthwuv1024hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthbv2048hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthbuv2048hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthhv2048hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthhuv2048hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthwv2048hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthwuv2048hf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthbv1sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthbuv1sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthhv1sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthhuv1sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthwv1sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthwuv1sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthbv2sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthbuv2sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthhv2sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthhuv2sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthwv2sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthwuv2sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthbv4sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthbuv4sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthhv4sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthhuv4sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthwv4sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthwuv4sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthbv8sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthbuv8sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthhv8sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthhuv8sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthwv8sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthwuv8sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mov_widthbv16sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthbuv16sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthhv16sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthhuv16sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthwv16sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthwuv16sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthbv32sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthbuv32sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthhv32sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthhuv32sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthwv32sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthwuv32sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthbv64sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthbuv64sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthhv64sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthhuv64sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthwv64sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthwuv64sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthbv128sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthbuv128sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthhv128sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthhuv128sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthwv128sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthwuv128sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthbv256sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthbuv256sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthhv256sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthhuv256sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthwv256sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthwuv256sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthbv512sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthbuv512sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthhv512sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthhuv512sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthwv512sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthwuv512sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthbv1024sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthbuv1024sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthhv1024sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthhuv1024sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthwv1024sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthwuv1024sf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthbv1df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthbuv1df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthhv1df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthhuv1df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthwv1df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthwuv1df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthbv2df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthbuv2df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthhv2df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthhuv2df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthwv2df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthwuv2df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthbv4df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthbuv4df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthhv4df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthhuv4df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthwv4df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthwuv4df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mov_widthbv8df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthbuv8df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthhv8df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthhuv8df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthwv8df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthwuv8df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthbv16df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthbuv16df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthhv16df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthhuv16df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthwv16df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthwuv16df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthbv32df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthbuv32df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthhv32df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthhuv32df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthwv32df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthwuv32df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthbv64df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthbuv64df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthhv64df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthhuv64df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthwv64df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthwuv64df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthbv128df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthbuv128df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthhv128df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthhuv128df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthwv128df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthwuv128df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthbv256df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthbuv256df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthhv256df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthhuv256df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthwv256df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthwuv256df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthbv512df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthbuv512df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthhv512df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthhuv512df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthwv512df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthwuv512df ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthbv1bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthbuv1bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthhv1bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthhuv1bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthwv1bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthwuv1bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthbv2bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthbuv2bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthhv2bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthhuv2bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthwv2bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthwuv2bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthbv4bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthbuv4bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthhv4bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthhuv4bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthwv4bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthwuv4bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthbv8bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthbuv8bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthhv8bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthhuv8bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthwv8bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthwuv8bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthbv16bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthbuv16bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthhv16bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthhuv16bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthwv16bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthwuv16bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_mov_widthbv32bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthbuv32bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthhv32bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthhuv32bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthwv32bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthwuv32bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mov_widthbv64bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthbuv64bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthhv64bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthhuv64bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthwv64bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthwuv64bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mov_widthbv128bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthbuv128bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthhv128bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthhuv128bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthwv128bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthwuv128bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mov_widthbv256bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthbuv256bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthhv256bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthhuv256bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthwv256bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthwuv256bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mov_widthbv512bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthbuv512bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthhv512bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthhuv512bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthwv512bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthwuv512bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mov_widthbv1024bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthbuv1024bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthhv1024bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthhuv1024bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthwv1024bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthwuv1024bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mov_widthbv2048bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthbuv2048bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthhv2048bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthhuv2048bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthwv2048bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mov_widthwuv2048bf ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_th_extractrvvm8qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_extractrvvm4qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_extractrvvm2qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_extractrvvm1qi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_extractrvvm8hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_extractrvvm4hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_extractrvvm2hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_extractrvvm1hi (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_extractrvvm8si (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_extractrvvm4si (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_extractrvvm2si (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_extractrvvm1si (TARGET_XTHEADVECTOR)
#define HAVE_pred_th_extractrvvm8di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_extractrvvm4di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_extractrvvm2di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_extractrvvm1di ((TARGET_XTHEADVECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_extractrvvmf8qi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_th_extractrvvmf4hi ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_th_extractrvvmf2si ((TARGET_XTHEADVECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_th_extractv1qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_th_extractv2qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_th_extractv4qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_th_extractv8qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_th_extractv16qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_th_extractv32qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_th_extractv64qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_th_extractv128qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_th_extractv256qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_th_extractv512qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_th_extractv1024qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_th_extractv2048qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_th_extractv4096qi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_th_extractv1hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_th_extractv2hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_th_extractv4hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_th_extractv8hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_th_extractv16hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_th_extractv32hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_th_extractv64hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_th_extractv128hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_th_extractv256hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_th_extractv512hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_th_extractv1024hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_th_extractv2048hi ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_th_extractv1si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_th_extractv2si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_th_extractv4si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_th_extractv8si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_th_extractv16si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_th_extractv32si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_th_extractv64si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_th_extractv128si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_th_extractv256si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_th_extractv512si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_th_extractv1024si ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_th_extractv1di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_extractv2di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_extractv4di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_th_extractv8di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_th_extractv16di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_th_extractv32di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_th_extractv64di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_th_extractv128di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_th_extractv256di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_th_extractv512di ((TARGET_XTHEADVECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vreinterpretrvvm8qi (TARGET_VECTOR)
#define HAVE_vreinterpretrvvm4qi (TARGET_VECTOR)
#define HAVE_vreinterpretrvvm2qi (TARGET_VECTOR)
#define HAVE_vreinterpretrvvm1qi (TARGET_VECTOR)
#define HAVE_vreinterpretrvvm8hi (TARGET_VECTOR)
#define HAVE_vreinterpretrvvm4hi (TARGET_VECTOR)
#define HAVE_vreinterpretrvvm2hi (TARGET_VECTOR)
#define HAVE_vreinterpretrvvm1hi (TARGET_VECTOR)
#define HAVE_vreinterpretrvvm8si (TARGET_VECTOR)
#define HAVE_vreinterpretrvvm4si (TARGET_VECTOR)
#define HAVE_vreinterpretrvvm2si (TARGET_VECTOR)
#define HAVE_vreinterpretrvvm1si (TARGET_VECTOR)
#define HAVE_vreinterpretrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vreinterpretrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vreinterpretrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vreinterpretrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vreinterpretrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vreinterpretrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vreinterpretrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vreinterpretrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vreinterpretrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vreinterpretrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vreinterpretrvvm8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vreinterpretrvvm4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vreinterpretrvvm2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vreinterpretrvvm1hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vreinterpretrvvmf2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vreinterpretrvvmf4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_vreinterpretrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vreinterpretrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vreinterpretrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vreinterpretrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vreinterpretrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_vreinterpretrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vreinterpretrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vreinterpretrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vreinterpretrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vreinterpretrvvm8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vreinterpretrvvm4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vreinterpretrvvm2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vreinterpretrvvm1bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vreinterpretrvvmf2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vreinterpretrvvmf4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_vreinterpretv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_vreinterpretv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_vreinterpretv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_vreinterpretv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_vreinterpretv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_vreinterpretv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_vreinterpretv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vreinterpretv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vreinterpretv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vreinterpretv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vreinterpretv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vreinterpretv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vreinterpretv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vreinterpretv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_vreinterpretv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_vreinterpretv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_vreinterpretv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_vreinterpretv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_vreinterpretv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vreinterpretv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vreinterpretv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vreinterpretv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vreinterpretv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vreinterpretv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vreinterpretv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vreinterpretv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_vreinterpretv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_vreinterpretv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_vreinterpretv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_vreinterpretv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vreinterpretv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vreinterpretv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vreinterpretv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vreinterpretv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vreinterpretv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vreinterpretv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vreinterpretv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vreinterpretv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vreinterpretv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vreinterpretv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vreinterpretv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vreinterpretv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vreinterpretv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vreinterpretv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vreinterpretv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vreinterpretv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vreinterpretv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vreinterpretv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vreinterpretv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vreinterpretv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vreinterpretv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vreinterpretv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_vreinterpretv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_vreinterpretv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_vreinterpretv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_vreinterpretv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vreinterpretv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vreinterpretv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vreinterpretv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vreinterpretv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vreinterpretv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vreinterpretv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vreinterpretv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_vreinterpretv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_vreinterpretv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_vreinterpretv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_vreinterpretv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vreinterpretv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vreinterpretv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vreinterpretv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vreinterpretv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vreinterpretv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vreinterpretv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vreinterpretv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vreinterpretv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vreinterpretv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vreinterpretv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vreinterpretv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vreinterpretv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vreinterpretv1bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vreinterpretv2bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vreinterpretv4bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vreinterpretv8bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vreinterpretv16bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vreinterpretv32bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_vreinterpretv64bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_vreinterpretv128bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_vreinterpretv256bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_vreinterpretv512bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vreinterpretv1024bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vreinterpretv2048bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vreinterpretrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vreinterpretrvvmf32bi (TARGET_VECTOR)
#define HAVE_vreinterpretrvvmf16bi (TARGET_VECTOR)
#define HAVE_vreinterpretrvvmf8bi (TARGET_VECTOR)
#define HAVE_vreinterpretrvvmf4bi (TARGET_VECTOR)
#define HAVE_vreinterpretrvvmf2bi (TARGET_VECTOR)
#define HAVE_vreinterpretrvvm1bi (TARGET_VECTOR)
#define HAVE_movrvvm8qi (TARGET_VECTOR)
#define HAVE_movrvvm4qi (TARGET_VECTOR)
#define HAVE_movrvvm2qi (TARGET_VECTOR)
#define HAVE_movrvvm1qi (TARGET_VECTOR)
#define HAVE_movrvvm8hi (TARGET_VECTOR)
#define HAVE_movrvvm4hi (TARGET_VECTOR)
#define HAVE_movrvvm2hi (TARGET_VECTOR)
#define HAVE_movrvvm1hi (TARGET_VECTOR)
#define HAVE_movrvvm8si (TARGET_VECTOR)
#define HAVE_movrvvm4si (TARGET_VECTOR)
#define HAVE_movrvvm2si (TARGET_VECTOR)
#define HAVE_movrvvm1si (TARGET_VECTOR)
#define HAVE_movrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_movrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_movrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_movrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_movrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_movrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_movrvvm8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvm4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvm2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvm1hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvmf2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvmf4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movrvvm8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvm4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvm2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvm1bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvmf2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvmf4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf32bi (TARGET_VECTOR)
#define HAVE_movrvvmf16bi (TARGET_VECTOR)
#define HAVE_movrvvmf8bi (TARGET_VECTOR)
#define HAVE_movrvvmf4bi (TARGET_VECTOR)
#define HAVE_movrvvmf2bi (TARGET_VECTOR)
#define HAVE_movrvvm1bi (TARGET_VECTOR)
#define HAVE_movrvvmf2qisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && (Pmode == SImode))
#define HAVE_movrvvmf4qisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && (Pmode == SImode))
#define HAVE_movrvvmf8qisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)))
#define HAVE_movrvvmf2hisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && (Pmode == SImode))
#define HAVE_movrvvmf4hisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)))
#define HAVE_movrvvmf2bfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((TARGET_VECTOR_ELEN_BF_16) && (Pmode == SImode)))
#define HAVE_movrvvmf4bfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64) && (Pmode == SImode)))
#define HAVE_movrvvmf2hfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((TARGET_VECTOR_ELEN_FP_16) && (Pmode == SImode)))
#define HAVE_movrvvmf4hfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64) && (Pmode == SImode)))
#define HAVE_movrvvmf2sisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)))
#define HAVE_movrvvmf2sfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64) && (Pmode == SImode)))
#define HAVE_movrvvmf2qidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && (Pmode == DImode))
#define HAVE_movrvvmf4qidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && (Pmode == DImode))
#define HAVE_movrvvmf8qidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)))
#define HAVE_movrvvmf2hidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && (Pmode == DImode))
#define HAVE_movrvvmf4hidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)))
#define HAVE_movrvvmf2bfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((TARGET_VECTOR_ELEN_BF_16) && (Pmode == DImode)))
#define HAVE_movrvvmf4bfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64) && (Pmode == DImode)))
#define HAVE_movrvvmf2hfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((TARGET_VECTOR_ELEN_FP_16) && (Pmode == DImode)))
#define HAVE_movrvvmf4hfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64) && (Pmode == DImode)))
#define HAVE_movrvvmf2sidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)))
#define HAVE_movrvvmf2sfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64) && (Pmode == DImode)))
#define HAVE_movrvvmf64bisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((TARGET_VECTOR_ELEN_64) && (Pmode == SImode)))
#define HAVE_movrvvmf64bidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((TARGET_VECTOR_ELEN_64) && (Pmode == DImode)))
#define HAVE_movrvvmf32bisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && (Pmode == SImode))
#define HAVE_movrvvmf32bidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && (Pmode == DImode))
#define HAVE_movrvvmf16bisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && (Pmode == SImode))
#define HAVE_movrvvmf16bidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && (Pmode == DImode))
#define HAVE_movrvvmf8bisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && (Pmode == SImode))
#define HAVE_movrvvmf8bidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && (Pmode == DImode))
#define HAVE_movrvvmf4bisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && (Pmode == SImode))
#define HAVE_movrvvmf4bidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && (Pmode == DImode))
#define HAVE_movrvvmf2bisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && (Pmode == SImode))
#define HAVE_movrvvmf2bidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && (Pmode == DImode))
#define HAVE_movrvvm1bisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && (Pmode == SImode))
#define HAVE_movrvvm1bidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && (Pmode == DImode))
#define HAVE_movrvvmf8x2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf8x3qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf8x4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf8x5qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf8x6qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf8x7qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf8x8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf4x2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf4x3hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf4x4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf4x5hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf4x6hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf4x7hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf4x8hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf2x2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf2x3si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf2x4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf2x5si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf2x6si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf2x7si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf2x8si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvm1x2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvm1x3di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvm1x4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvm1x5di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvm1x6di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvm1x7di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvm1x8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf4x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvmf4x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvmf4x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvmf4x5bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvmf4x6bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvmf4x7bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvmf4x8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvmf4x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvmf4x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvmf4x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvmf4x5hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvmf4x6hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvmf4x7hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvmf4x8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvmf2x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movrvvmf2x3sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movrvvmf2x4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movrvvmf2x5sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movrvvmf2x6sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movrvvmf2x7sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movrvvmf2x8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movrvvm1x2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movrvvm1x3df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movrvvm1x4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movrvvm1x5df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movrvvm1x6df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movrvvm1x7df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movrvvm1x8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movrvvmf4x2qi (TARGET_VECTOR)
#define HAVE_movrvvmf4x3qi (TARGET_VECTOR)
#define HAVE_movrvvmf4x4qi (TARGET_VECTOR)
#define HAVE_movrvvmf4x5qi (TARGET_VECTOR)
#define HAVE_movrvvmf4x6qi (TARGET_VECTOR)
#define HAVE_movrvvmf4x7qi (TARGET_VECTOR)
#define HAVE_movrvvmf4x8qi (TARGET_VECTOR)
#define HAVE_movrvvmf2x2hi (TARGET_VECTOR)
#define HAVE_movrvvmf2x3hi (TARGET_VECTOR)
#define HAVE_movrvvmf2x4hi (TARGET_VECTOR)
#define HAVE_movrvvmf2x5hi (TARGET_VECTOR)
#define HAVE_movrvvmf2x6hi (TARGET_VECTOR)
#define HAVE_movrvvmf2x7hi (TARGET_VECTOR)
#define HAVE_movrvvmf2x8hi (TARGET_VECTOR)
#define HAVE_movrvvm1x2si (TARGET_VECTOR)
#define HAVE_movrvvm1x3si (TARGET_VECTOR)
#define HAVE_movrvvm1x4si (TARGET_VECTOR)
#define HAVE_movrvvm1x5si (TARGET_VECTOR)
#define HAVE_movrvvm1x6si (TARGET_VECTOR)
#define HAVE_movrvvm1x7si (TARGET_VECTOR)
#define HAVE_movrvvm1x8si (TARGET_VECTOR)
#define HAVE_movrvvm2x2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvm2x3di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvm2x4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvmf2x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvmf2x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvmf2x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvmf2x5bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvmf2x6bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvmf2x7bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvmf2x8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvmf2x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvmf2x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvmf2x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvmf2x5hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvmf2x6hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvmf2x7hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvmf2x8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvm1x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movrvvm1x3sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movrvvm1x4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movrvvm1x5sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movrvvm1x6sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movrvvm1x7sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movrvvm1x8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movrvvm2x2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movrvvm2x3df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movrvvm2x4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movrvvmf2x2qi (TARGET_VECTOR)
#define HAVE_movrvvmf2x3qi (TARGET_VECTOR)
#define HAVE_movrvvmf2x4qi (TARGET_VECTOR)
#define HAVE_movrvvmf2x5qi (TARGET_VECTOR)
#define HAVE_movrvvmf2x6qi (TARGET_VECTOR)
#define HAVE_movrvvmf2x7qi (TARGET_VECTOR)
#define HAVE_movrvvmf2x8qi (TARGET_VECTOR)
#define HAVE_movrvvm1x2hi (TARGET_VECTOR)
#define HAVE_movrvvm1x3hi (TARGET_VECTOR)
#define HAVE_movrvvm1x4hi (TARGET_VECTOR)
#define HAVE_movrvvm1x5hi (TARGET_VECTOR)
#define HAVE_movrvvm1x6hi (TARGET_VECTOR)
#define HAVE_movrvvm1x7hi (TARGET_VECTOR)
#define HAVE_movrvvm1x8hi (TARGET_VECTOR)
#define HAVE_movrvvm2x2si (TARGET_VECTOR)
#define HAVE_movrvvm2x3si (TARGET_VECTOR)
#define HAVE_movrvvm2x4si (TARGET_VECTOR)
#define HAVE_movrvvm4x2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movrvvm1x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvm1x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvm1x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvm1x5bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvm1x6bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvm1x7bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvm1x8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvm1x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvm1x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvm1x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvm1x5hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvm1x6hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvm1x7hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvm1x8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvm2x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movrvvm2x3sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movrvvm2x4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movrvvm4x2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movrvvm1x2qi (TARGET_VECTOR)
#define HAVE_movrvvm1x3qi (TARGET_VECTOR)
#define HAVE_movrvvm1x4qi (TARGET_VECTOR)
#define HAVE_movrvvm1x5qi (TARGET_VECTOR)
#define HAVE_movrvvm1x6qi (TARGET_VECTOR)
#define HAVE_movrvvm1x7qi (TARGET_VECTOR)
#define HAVE_movrvvm1x8qi (TARGET_VECTOR)
#define HAVE_movrvvm2x2hi (TARGET_VECTOR)
#define HAVE_movrvvm2x3hi (TARGET_VECTOR)
#define HAVE_movrvvm2x4hi (TARGET_VECTOR)
#define HAVE_movrvvm4x2si (TARGET_VECTOR)
#define HAVE_movrvvm2x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvm2x3bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvm2x4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvm2x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvm2x3hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvm2x4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvm4x2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movrvvm2x2qi (TARGET_VECTOR)
#define HAVE_movrvvm2x3qi (TARGET_VECTOR)
#define HAVE_movrvvm2x4qi (TARGET_VECTOR)
#define HAVE_movrvvm4x2hi (TARGET_VECTOR)
#define HAVE_movrvvm4x2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movrvvm4x2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movrvvm4x2qi (TARGET_VECTOR)
#define HAVE_movv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_movv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_movv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_movv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_movv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_movv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_movv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_movv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_movv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_movv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_movv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_movv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_movv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_movv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_movv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_movv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_movv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_movv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_movv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_movv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_movv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movv1bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movv2bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movv4bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movv8bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movv16bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_movv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_movv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_movv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_movv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_movv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_movv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_movv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_movv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_movv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_movv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_movv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_movv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_movv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_movv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_movv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_movv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_movv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_movv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_movv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_movv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_movv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_movv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_movv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_movv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_movv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_movv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_movv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_movv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_movv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_movv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_movv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_movv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_movv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_movv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_movv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_movv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_movv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_movv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_movv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_movv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_movv32bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_movv64bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_movv128bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_movv256bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_movv512bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_movv1024bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_movv2048bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_movv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_movv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_movv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_movv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_movv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_movv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_movv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_movv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_movv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_movv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_movv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_movv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_movv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_movv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_movv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_movv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_movv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_movv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_movv4096bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_movv32qisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V32QImode)) && (Pmode == SImode)))
#define HAVE_movv32qidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V32QImode)) && (Pmode == DImode)))
#define HAVE_movv64qisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64) && (Pmode == SImode)))
#define HAVE_movv64qidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64) && (Pmode == DImode)))
#define HAVE_movv128qisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128) && (Pmode == SImode)))
#define HAVE_movv128qidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128) && (Pmode == DImode)))
#define HAVE_movv256qisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256) && (Pmode == SImode)))
#define HAVE_movv256qidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256) && (Pmode == DImode)))
#define HAVE_movv512qisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512) && (Pmode == SImode)))
#define HAVE_movv512qidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512) && (Pmode == DImode)))
#define HAVE_movv1024qisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024) && (Pmode == SImode)))
#define HAVE_movv1024qidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024) && (Pmode == DImode)))
#define HAVE_movv2048qisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048) && (Pmode == SImode)))
#define HAVE_movv2048qidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048) && (Pmode == DImode)))
#define HAVE_movv4096qisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096) && (Pmode == SImode)))
#define HAVE_movv4096qidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096) && (Pmode == DImode)))
#define HAVE_movv32hisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64) && (Pmode == SImode)))
#define HAVE_movv32hidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64) && (Pmode == DImode)))
#define HAVE_movv64hisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128) && (Pmode == SImode)))
#define HAVE_movv64hidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128) && (Pmode == DImode)))
#define HAVE_movv128hisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256) && (Pmode == SImode)))
#define HAVE_movv128hidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256) && (Pmode == DImode)))
#define HAVE_movv256hisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512) && (Pmode == SImode)))
#define HAVE_movv256hidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512) && (Pmode == DImode)))
#define HAVE_movv512hisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024) && (Pmode == SImode)))
#define HAVE_movv512hidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024) && (Pmode == DImode)))
#define HAVE_movv1024hisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048) && (Pmode == SImode)))
#define HAVE_movv1024hidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048) && (Pmode == DImode)))
#define HAVE_movv2048hisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096) && (Pmode == SImode)))
#define HAVE_movv2048hidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096) && (Pmode == DImode)))
#define HAVE_movv32sisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128) && (Pmode == SImode)))
#define HAVE_movv32sidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128) && (Pmode == DImode)))
#define HAVE_movv64sisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256) && (Pmode == SImode)))
#define HAVE_movv64sidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256) && (Pmode == DImode)))
#define HAVE_movv128sisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512) && (Pmode == SImode)))
#define HAVE_movv128sidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512) && (Pmode == DImode)))
#define HAVE_movv256sisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024) && (Pmode == SImode)))
#define HAVE_movv256sidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024) && (Pmode == DImode)))
#define HAVE_movv512sisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048) && (Pmode == SImode)))
#define HAVE_movv512sidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048) && (Pmode == DImode)))
#define HAVE_movv1024sisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096) && (Pmode == SImode)))
#define HAVE_movv1024sidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096) && (Pmode == DImode)))
#define HAVE_movv32disi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256) && (Pmode == SImode)))
#define HAVE_movv32didi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256) && (Pmode == DImode)))
#define HAVE_movv64disi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512) && (Pmode == SImode)))
#define HAVE_movv64didi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512) && (Pmode == DImode)))
#define HAVE_movv128disi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024) && (Pmode == SImode)))
#define HAVE_movv128didi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024) && (Pmode == DImode)))
#define HAVE_movv256disi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048) && (Pmode == SImode)))
#define HAVE_movv256didi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048) && (Pmode == DImode)))
#define HAVE_movv512disi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096) && (Pmode == SImode)))
#define HAVE_movv512didi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096) && (Pmode == DImode)))
#define HAVE_movv32hfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64) && (Pmode == SImode)))
#define HAVE_movv32hfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64) && (Pmode == DImode)))
#define HAVE_movv64hfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128) && (Pmode == SImode)))
#define HAVE_movv64hfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128) && (Pmode == DImode)))
#define HAVE_movv128hfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256) && (Pmode == SImode)))
#define HAVE_movv128hfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256) && (Pmode == DImode)))
#define HAVE_movv256hfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512) && (Pmode == SImode)))
#define HAVE_movv256hfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512) && (Pmode == DImode)))
#define HAVE_movv512hfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024) && (Pmode == SImode)))
#define HAVE_movv512hfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024) && (Pmode == DImode)))
#define HAVE_movv1024hfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048) && (Pmode == SImode)))
#define HAVE_movv1024hfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048) && (Pmode == DImode)))
#define HAVE_movv2048hfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096) && (Pmode == SImode)))
#define HAVE_movv2048hfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096) && (Pmode == DImode)))
#define HAVE_movv32bfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64) && (Pmode == SImode)))
#define HAVE_movv32bfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64) && (Pmode == DImode)))
#define HAVE_movv64bfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128) && (Pmode == SImode)))
#define HAVE_movv64bfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128) && (Pmode == DImode)))
#define HAVE_movv128bfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256) && (Pmode == SImode)))
#define HAVE_movv128bfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256) && (Pmode == DImode)))
#define HAVE_movv256bfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512) && (Pmode == SImode)))
#define HAVE_movv256bfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512) && (Pmode == DImode)))
#define HAVE_movv512bfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024) && (Pmode == SImode)))
#define HAVE_movv512bfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024) && (Pmode == DImode)))
#define HAVE_movv1024bfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048) && (Pmode == SImode)))
#define HAVE_movv1024bfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048) && (Pmode == DImode)))
#define HAVE_movv2048bfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096) && (Pmode == SImode)))
#define HAVE_movv2048bfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096) && (Pmode == DImode)))
#define HAVE_movv32sfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128) && (Pmode == SImode)))
#define HAVE_movv32sfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128) && (Pmode == DImode)))
#define HAVE_movv64sfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256) && (Pmode == SImode)))
#define HAVE_movv64sfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256) && (Pmode == DImode)))
#define HAVE_movv128sfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512) && (Pmode == SImode)))
#define HAVE_movv128sfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512) && (Pmode == DImode)))
#define HAVE_movv256sfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024) && (Pmode == SImode)))
#define HAVE_movv256sfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024) && (Pmode == DImode)))
#define HAVE_movv512sfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048) && (Pmode == SImode)))
#define HAVE_movv512sfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048) && (Pmode == DImode)))
#define HAVE_movv1024sfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096) && (Pmode == SImode)))
#define HAVE_movv1024sfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096) && (Pmode == DImode)))
#define HAVE_movv32dfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256) && (Pmode == SImode)))
#define HAVE_movv32dfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256) && (Pmode == DImode)))
#define HAVE_movv64dfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512) && (Pmode == SImode)))
#define HAVE_movv64dfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512) && (Pmode == DImode)))
#define HAVE_movv128dfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024) && (Pmode == SImode)))
#define HAVE_movv128dfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024) && (Pmode == DImode)))
#define HAVE_movv256dfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048) && (Pmode == SImode)))
#define HAVE_movv256dfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048) && (Pmode == DImode)))
#define HAVE_movv512dfsi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096) && (Pmode == SImode)))
#define HAVE_movv512dfdi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096) && (Pmode == DImode)))
#define HAVE_movv32bisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V32BImode)) && (Pmode == SImode)))
#define HAVE_movv32bidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V32BImode)) && (Pmode == DImode)))
#define HAVE_movv64bisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64) && (Pmode == SImode)))
#define HAVE_movv64bidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64) && (Pmode == DImode)))
#define HAVE_movv128bisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128) && (Pmode == SImode)))
#define HAVE_movv128bidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128) && (Pmode == DImode)))
#define HAVE_movv256bisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256) && (Pmode == SImode)))
#define HAVE_movv256bidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256) && (Pmode == DImode)))
#define HAVE_movv512bisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512) && (Pmode == SImode)))
#define HAVE_movv512bidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512) && (Pmode == DImode)))
#define HAVE_movv1024bisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024) && (Pmode == SImode)))
#define HAVE_movv1024bidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024) && (Pmode == DImode)))
#define HAVE_movv2048bisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048) && (Pmode == SImode)))
#define HAVE_movv2048bidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048) && (Pmode == DImode)))
#define HAVE_movv4096bisi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096) && (Pmode == SImode)))
#define HAVE_movv4096bidi_lra ((TARGET_VECTOR && (lra_in_progress || reload_completed)) && ((riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096) && (Pmode == DImode)))
#define HAVE_movmisalignrvvm8qi (TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED)
#define HAVE_movmisalignrvvm4qi (TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED)
#define HAVE_movmisalignrvvm2qi (TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED)
#define HAVE_movmisalignrvvm1qi (TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED)
#define HAVE_movmisalignrvvm8hi (TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED)
#define HAVE_movmisalignrvvm4hi (TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED)
#define HAVE_movmisalignrvvm2hi (TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED)
#define HAVE_movmisalignrvvm1hi (TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED)
#define HAVE_movmisalignrvvm8si (TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED)
#define HAVE_movmisalignrvvm4si (TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED)
#define HAVE_movmisalignrvvm2si (TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED)
#define HAVE_movmisalignrvvm1si (TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED)
#define HAVE_movmisalignrvvm8di ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movmisalignrvvm4di ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movmisalignrvvm2di ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movmisalignrvvm1di ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_64))
#define HAVE_movmisalignrvvmf2qi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (!TARGET_XTHEADVECTOR))
#define HAVE_movmisalignrvvmf4qi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (!TARGET_XTHEADVECTOR))
#define HAVE_movmisalignrvvmf8qi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_movmisalignrvvmf2hi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (!TARGET_XTHEADVECTOR))
#define HAVE_movmisalignrvvmf4hi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_movmisalignrvvmf2si ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_movmisalignrvvm8hf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movmisalignrvvm4hf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movmisalignrvvm2hf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movmisalignrvvm1hf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movmisalignrvvmf2hf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movmisalignrvvmf4hf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_movmisalignrvvm8sf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movmisalignrvvm4sf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movmisalignrvvm2sf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movmisalignrvvm1sf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movmisalignrvvmf2sf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_movmisalignrvvm8df ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movmisalignrvvm4df ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movmisalignrvvm2df ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movmisalignrvvm1df ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movmisalignrvvm8bf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movmisalignrvvm4bf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movmisalignrvvm2bf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movmisalignrvvm1bf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movmisalignrvvmf2bf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movmisalignrvvmf4bf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_movmisalignv1qi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_movmisalignv2qi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_movmisalignv4qi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_movmisalignv8qi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_movmisalignv16qi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_movmisalignv32qi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_movmisalignv64qi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_movmisalignv128qi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_movmisalignv256qi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_movmisalignv512qi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_movmisalignv1024qi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_movmisalignv2048qi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_movmisalignv4096qi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_movmisalignv1hi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_movmisalignv2hi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_movmisalignv4hi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_movmisalignv8hi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_movmisalignv16hi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_movmisalignv32hi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_movmisalignv64hi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_movmisalignv128hi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_movmisalignv256hi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_movmisalignv512hi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_movmisalignv1024hi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_movmisalignv2048hi ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_movmisalignv1si ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_movmisalignv2si ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_movmisalignv4si ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_movmisalignv8si ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_movmisalignv16si ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_movmisalignv32si ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_movmisalignv64si ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_movmisalignv128si ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_movmisalignv256si ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_movmisalignv512si ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_movmisalignv1024si ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_movmisalignv1di ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_movmisalignv2di ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_movmisalignv4di ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_movmisalignv8di ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_movmisalignv16di ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_movmisalignv32di ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_movmisalignv64di ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_movmisalignv128di ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_movmisalignv256di ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_movmisalignv512di ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_movmisalignv1hf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movmisalignv2hf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movmisalignv4hf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movmisalignv8hf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movmisalignv16hf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_movmisalignv32hf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_movmisalignv64hf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_movmisalignv128hf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_movmisalignv256hf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_movmisalignv512hf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_movmisalignv1024hf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_movmisalignv2048hf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_movmisalignv1sf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movmisalignv2sf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movmisalignv4sf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movmisalignv8sf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_movmisalignv16sf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_movmisalignv32sf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_movmisalignv64sf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_movmisalignv128sf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_movmisalignv256sf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_movmisalignv512sf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_movmisalignv1024sf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_movmisalignv1df ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movmisalignv2df ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movmisalignv4df ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_movmisalignv8df ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_movmisalignv16df ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_movmisalignv32df ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_movmisalignv64df ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_movmisalignv128df ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_movmisalignv256df ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_movmisalignv512df ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_movmisalignv1bf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movmisalignv2bf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movmisalignv4bf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movmisalignv8bf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movmisalignv16bf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_movmisalignv32bf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_movmisalignv64bf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_movmisalignv128bf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_movmisalignv256bf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_movmisalignv512bf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_movmisalignv1024bf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_movmisalignv2048bf ((TARGET_VECTOR && TARGET_VECTOR_MISALIGN_SUPPORTED) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_duplicatervvm8qi (TARGET_VECTOR)
#define HAVE_vec_duplicatervvm4qi (TARGET_VECTOR)
#define HAVE_vec_duplicatervvm2qi (TARGET_VECTOR)
#define HAVE_vec_duplicatervvm1qi (TARGET_VECTOR)
#define HAVE_vec_duplicatervvm8hi (TARGET_VECTOR)
#define HAVE_vec_duplicatervvm4hi (TARGET_VECTOR)
#define HAVE_vec_duplicatervvm2hi (TARGET_VECTOR)
#define HAVE_vec_duplicatervvm1hi (TARGET_VECTOR)
#define HAVE_vec_duplicatervvm8si (TARGET_VECTOR)
#define HAVE_vec_duplicatervvm4si (TARGET_VECTOR)
#define HAVE_vec_duplicatervvm2si (TARGET_VECTOR)
#define HAVE_vec_duplicatervvm1si (TARGET_VECTOR)
#define HAVE_vec_duplicatervvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_duplicatervvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_duplicatervvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_duplicatervvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_duplicatervvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_duplicatervvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_duplicatervvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_duplicatervvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_duplicatervvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_duplicatervvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_duplicatervvm8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_duplicatervvm4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_duplicatervvm2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_duplicatervvm1hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_duplicatervvmf2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_duplicatervvmf4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_duplicatervvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_duplicatervvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_duplicatervvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_duplicatervvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_duplicatervvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_duplicatervvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_duplicatervvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_duplicatervvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_duplicatervvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_duplicatervvm8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_duplicatervvm4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_duplicatervvm2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_duplicatervvm1bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_duplicatervvmf2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_duplicatervvmf4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_duplicatev1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_vec_duplicatev2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_vec_duplicatev4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_vec_duplicatev8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_vec_duplicatev16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_vec_duplicatev32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_vec_duplicatev64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_duplicatev128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_duplicatev256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_duplicatev512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_duplicatev1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_duplicatev2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_duplicatev4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_duplicatev1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_vec_duplicatev2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_vec_duplicatev4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_vec_duplicatev8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_vec_duplicatev16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_vec_duplicatev32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_duplicatev64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_duplicatev128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_duplicatev256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_duplicatev512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_duplicatev1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_duplicatev2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_duplicatev1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_vec_duplicatev2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_vec_duplicatev4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_vec_duplicatev8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_vec_duplicatev16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_duplicatev32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_duplicatev64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_duplicatev128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_duplicatev256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_duplicatev512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_duplicatev1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_duplicatev1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_duplicatev2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_duplicatev4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_duplicatev8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_duplicatev16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_duplicatev32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_duplicatev64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_duplicatev128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_duplicatev256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_duplicatev512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_duplicatev1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_duplicatev2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_duplicatev4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_duplicatev8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_duplicatev16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_duplicatev32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_duplicatev64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_duplicatev128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_duplicatev256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_duplicatev512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_duplicatev1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_duplicatev2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_duplicatev1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_duplicatev2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_duplicatev4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_duplicatev8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_duplicatev16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_duplicatev32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_duplicatev64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_duplicatev128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_duplicatev256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_duplicatev512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_duplicatev1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_duplicatev1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_duplicatev2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_duplicatev4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_duplicatev8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_duplicatev16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_duplicatev32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_duplicatev64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_duplicatev128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_duplicatev256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_duplicatev512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_duplicatev1bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_duplicatev2bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_duplicatev4bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_duplicatev8bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_duplicatev16bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_duplicatev32bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_duplicatev64bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_duplicatev128bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_duplicatev256bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_duplicatev512bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_duplicatev1024bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_duplicatev2048bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_movrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_movrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_movrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_movrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_movrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_movrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_movrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_movrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_movrvvm8si (TARGET_VECTOR)
#define HAVE_pred_movrvvm4si (TARGET_VECTOR)
#define HAVE_pred_movrvvm2si (TARGET_VECTOR)
#define HAVE_pred_movrvvm1si (TARGET_VECTOR)
#define HAVE_pred_movrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_movrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_movrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_movrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_movrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_movrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_movrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_movrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_movrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_movrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_movrvvm8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_movrvvm4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_movrvvm2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_movrvvm1hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_movrvvmf2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_movrvvmf4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_movrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_movrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_movrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_movrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_movrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_movrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_movrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_movrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_movrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_movrvvm8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_movrvvm4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_movrvvm2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_movrvvm1bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_movrvvmf2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_movrvvmf4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_movv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_movv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_movv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_movv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_movv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_movv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_movv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_movv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_movv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_movv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_movv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_movv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_movv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_movv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_movv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_movv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_movv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_movv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_movv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_movv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_movv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_movv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_movv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_movv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_movv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_movv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_movv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_movv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_movv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_movv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_movv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_movv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_movv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_movv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_movv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_movv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_movv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_movv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_movv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_movv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_movv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_movv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_movv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_movv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_movv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_movv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_movv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_movv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_movv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_movv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_movv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_movv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_movv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_movv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_movv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_movv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_movv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_movv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_movv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_movv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_movv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_movv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_movv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_movv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_movv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_movv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_movv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_movv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_movv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_movv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_movv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_movv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_movv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_movv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_movv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_movv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_movv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_movv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_movv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_movv1bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_movv2bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_movv4bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_movv8bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_movv16bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_movv32bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_movv64bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_movv128bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_movv256bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_movv512bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_movv1024bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_movv2048bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mergervvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mergervvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mergervvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mergervvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mergev1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mergev2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mergev4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mergev8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mergev16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mergev32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mergev64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mergev128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mergev256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mergev512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_broadcastrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_broadcastrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_broadcastrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_broadcastrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_broadcastrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_broadcastrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_broadcastrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_broadcastrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_broadcastrvvm8si (TARGET_VECTOR)
#define HAVE_pred_broadcastrvvm4si (TARGET_VECTOR)
#define HAVE_pred_broadcastrvvm2si (TARGET_VECTOR)
#define HAVE_pred_broadcastrvvm1si (TARGET_VECTOR)
#define HAVE_pred_broadcastrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_broadcastrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_broadcastrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_broadcastrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_broadcastrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_broadcastrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_broadcastrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_broadcastrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_broadcastrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_broadcastrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_broadcastrvvm8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_broadcastrvvm4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_broadcastrvvm2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_broadcastrvvm1hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_broadcastrvvmf2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_broadcastrvvmf4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_broadcastrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_broadcastrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_broadcastrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_broadcastrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_broadcastrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_broadcastrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_broadcastrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_broadcastrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_broadcastrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_broadcastrvvm8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_broadcastrvvm4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_broadcastrvvm2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_broadcastrvvm1bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_broadcastrvvmf2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_broadcastrvvmf4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_broadcastv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_broadcastv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_broadcastv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_broadcastv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_broadcastv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_broadcastv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_broadcastv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_broadcastv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_broadcastv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_broadcastv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_broadcastv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_broadcastv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_broadcastv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_broadcastv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_broadcastv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_broadcastv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_broadcastv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_broadcastv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_broadcastv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_broadcastv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_broadcastv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_broadcastv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_broadcastv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_broadcastv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_broadcastv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_broadcastv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_broadcastv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_broadcastv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_broadcastv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_broadcastv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_broadcastv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_broadcastv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_broadcastv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_broadcastv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_broadcastv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_broadcastv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_broadcastv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_broadcastv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_broadcastv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_broadcastv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_broadcastv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_broadcastv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_broadcastv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_broadcastv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_broadcastv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_broadcastv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_broadcastv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_broadcastv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_broadcastv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_broadcastv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_broadcastv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_broadcastv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_broadcastv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_broadcastv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_broadcastv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_broadcastv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_broadcastv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_broadcastv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_broadcastv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_broadcastv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_broadcastv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_broadcastv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_broadcastv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_broadcastv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_broadcastv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_broadcastv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_broadcastv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_broadcastv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_broadcastv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_broadcastv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_broadcastv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_broadcastv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_broadcastv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_broadcastv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_broadcastv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_broadcastv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_broadcastv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_broadcastv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_broadcastv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_broadcastv1bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_broadcastv2bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_broadcastv4bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_broadcastv8bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_broadcastv16bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_broadcastv32bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_broadcastv64bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_broadcastv128bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_broadcastv256bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_broadcastv512bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_broadcastv1024bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_broadcastv2048bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_strided_broadcastrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_strided_broadcastrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_strided_broadcastrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_strided_broadcastrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_strided_broadcastrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_strided_broadcastrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_strided_broadcastrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_strided_broadcastrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_strided_broadcastrvvm8si (TARGET_VECTOR)
#define HAVE_pred_strided_broadcastrvvm4si (TARGET_VECTOR)
#define HAVE_pred_strided_broadcastrvvm2si (TARGET_VECTOR)
#define HAVE_pred_strided_broadcastrvvm1si (TARGET_VECTOR)
#define HAVE_pred_strided_broadcastrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_broadcastrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_broadcastrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_broadcastrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_broadcastrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_strided_broadcastrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_strided_broadcastrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_broadcastrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_strided_broadcastrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_broadcastrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_strided_broadcastrvvm8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_broadcastrvvm4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_broadcastrvvm2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_broadcastrvvm1hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_broadcastrvvmf2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_broadcastrvvmf4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_broadcastrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_broadcastrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_broadcastrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_broadcastrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_broadcastrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_broadcastrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_broadcastrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_broadcastrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_broadcastrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_broadcastrvvm8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_broadcastrvvm4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_broadcastrvvm2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_broadcastrvvm1bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_broadcastrvvmf2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_broadcastrvvmf4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_broadcastv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_strided_broadcastv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_strided_broadcastv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_strided_broadcastv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_strided_broadcastv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_strided_broadcastv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_strided_broadcastv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_strided_broadcastv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_strided_broadcastv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_strided_broadcastv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_strided_broadcastv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_strided_broadcastv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_strided_broadcastv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_strided_broadcastv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_strided_broadcastv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_strided_broadcastv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_strided_broadcastv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_strided_broadcastv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_strided_broadcastv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_strided_broadcastv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_strided_broadcastv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_strided_broadcastv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_strided_broadcastv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_strided_broadcastv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_strided_broadcastv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_strided_broadcastv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_strided_broadcastv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_strided_broadcastv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_strided_broadcastv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_strided_broadcastv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_strided_broadcastv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_strided_broadcastv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_strided_broadcastv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_strided_broadcastv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_strided_broadcastv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_strided_broadcastv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_strided_broadcastv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_broadcastv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_broadcastv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_strided_broadcastv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_strided_broadcastv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_strided_broadcastv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_strided_broadcastv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_strided_broadcastv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_strided_broadcastv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_strided_broadcastv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_strided_broadcastv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_broadcastv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_broadcastv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_broadcastv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_broadcastv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_pred_strided_broadcastv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_strided_broadcastv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_strided_broadcastv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_strided_broadcastv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_strided_broadcastv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_strided_broadcastv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_strided_broadcastv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_strided_broadcastv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_broadcastv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_broadcastv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_broadcastv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_strided_broadcastv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_strided_broadcastv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_strided_broadcastv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_strided_broadcastv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_strided_broadcastv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_strided_broadcastv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_strided_broadcastv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_strided_broadcastv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_broadcastv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_broadcastv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_strided_broadcastv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_strided_broadcastv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_strided_broadcastv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_strided_broadcastv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_strided_broadcastv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_strided_broadcastv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_strided_broadcastv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_strided_broadcastv1bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_broadcastv2bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_broadcastv4bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_broadcastv8bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_broadcastv16bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_pred_strided_broadcastv32bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_strided_broadcastv64bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_strided_broadcastv128bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_strided_broadcastv256bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_strided_broadcastv512bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_strided_broadcastv1024bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_strided_broadcastv2048bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_addrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_andrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iorrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_xorrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smaxrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umaxrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sminrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_uminrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_addrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_andrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iorrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_xorrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smaxrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umaxrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sminrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_uminrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_addrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_andrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iorrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_xorrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smaxrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umaxrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sminrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_uminrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_addrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_andrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iorrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_xorrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smaxrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umaxrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sminrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_uminrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_addv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_andv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iorv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_xorv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smaxv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umaxv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sminv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_uminv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_addv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_andv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iorv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_xorv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smaxv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umaxv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sminv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_uminv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_addv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_andv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_iorv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_xorv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smaxv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umaxv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sminv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_uminv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mulv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_addv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_andv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_iorv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_xorv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_smaxv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_umaxv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_sminv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_uminv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mulv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_addv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_andv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_iorv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_xorv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_smaxv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_umaxv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_sminv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_uminv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mulv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_addv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_andv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_iorv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_xorv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_smaxv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_umaxv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_sminv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_uminv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mulv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_addv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_andv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_iorv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_xorv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_smaxv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_umaxv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_sminv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_uminv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mulv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_addv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_andv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_iorv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_xorv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_smaxv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_umaxv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_sminv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_uminv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mulv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_addv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_andv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_iorv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_xorv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_smaxv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_umaxv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_sminv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_uminv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mulv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_addv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_andv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_iorv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_xorv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_smaxv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_umaxv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_sminv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_uminv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_subrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_divrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_udivrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_modrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umodrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_divrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_udivrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_modrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umodrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_divrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_udivrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_modrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umodrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_divrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_udivrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_modrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umodrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_divv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_udivv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_modv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umodv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_divv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_udivv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_modv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umodv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_divv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_udivv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_modv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_umodv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_divv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_udivv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_modv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_umodv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_subv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_divv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_udivv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_modv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_umodv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_subv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_divv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_udivv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_modv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_umodv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_subv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_divv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_udivv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_modv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_umodv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_subv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_divv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_udivv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_modv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_umodv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_subv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_divv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_udivv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_modv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_umodv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_subv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_divv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_udivv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_modv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_umodv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_subrvvm8di_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subrvvm4di_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subrvvm2di_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subrvvm1di_reverse_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subv1di_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subv2di_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subv4di_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_subv8di_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_subv16di_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_subv32di_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_subv64di_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_subv128di_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_subv256di_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_subv512di_reverse_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mulhrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_FULL_V))
#define HAVE_pred_mulhurvvm8di_scalar ((TARGET_VECTOR) && (TARGET_FULL_V))
#define HAVE_pred_mulhsurvvm8di_scalar ((TARGET_VECTOR) && (TARGET_FULL_V))
#define HAVE_pred_mulhrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_FULL_V))
#define HAVE_pred_mulhurvvm4di_scalar ((TARGET_VECTOR) && (TARGET_FULL_V))
#define HAVE_pred_mulhsurvvm4di_scalar ((TARGET_VECTOR) && (TARGET_FULL_V))
#define HAVE_pred_mulhrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_FULL_V))
#define HAVE_pred_mulhurvvm2di_scalar ((TARGET_VECTOR) && (TARGET_FULL_V))
#define HAVE_pred_mulhsurvvm2di_scalar ((TARGET_VECTOR) && (TARGET_FULL_V))
#define HAVE_pred_mulhrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_FULL_V))
#define HAVE_pred_mulhurvvm1di_scalar ((TARGET_VECTOR) && (TARGET_FULL_V))
#define HAVE_pred_mulhsurvvm1di_scalar ((TARGET_VECTOR) && (TARGET_FULL_V))
#define HAVE_pred_adcrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_adcrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_adcrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_adcrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sbcrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sbcrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sbcrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sbcrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_madcrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_madcrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_madcrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_madcrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_msbcrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_msbcrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_msbcrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_msbcrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_madcrvvm8di_overflow_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_madcrvvm4di_overflow_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_madcrvvm2di_overflow_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_madcrvvm1di_overflow_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_msbcrvvm8di_overflow_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_msbcrvvm4di_overflow_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_msbcrvvm2di_overflow_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_msbcrvvm1di_overflow_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssaddrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_usaddrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssaddrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_usaddrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssaddrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_usaddrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ssaddrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_usaddrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sssubrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ussubrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sssubrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ussubrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sssubrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ussubrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_sssubrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ussubrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddurvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asuburvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asubrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smulrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddurvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asuburvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asubrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smulrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddurvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asuburvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asubrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smulrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddurvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asuburvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asubrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smulrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aadduv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asubuv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asubv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smulv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aadduv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asubuv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asubv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smulv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aadduv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aaddv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asubuv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_asubv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_smulv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_aadduv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_aaddv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_asubuv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_asubv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_smulv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_aadduv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_aaddv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_asubuv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_asubv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_smulv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_aadduv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_aaddv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_asubuv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_asubv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_smulv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_aadduv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_aaddv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_asubuv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_asubv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_smulv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_aadduv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_aaddv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_asubuv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_asubv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_smulv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_aadduv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_aaddv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_asubuv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_asubv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_smulv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_aadduv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_aaddv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_asubuv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_asubv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_smulv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_cmprvvm8qi (TARGET_VECTOR)
#define HAVE_pred_cmprvvm4qi (TARGET_VECTOR)
#define HAVE_pred_cmprvvm2qi (TARGET_VECTOR)
#define HAVE_pred_cmprvvm1qi (TARGET_VECTOR)
#define HAVE_pred_cmprvvm8hi (TARGET_VECTOR)
#define HAVE_pred_cmprvvm4hi (TARGET_VECTOR)
#define HAVE_pred_cmprvvm2hi (TARGET_VECTOR)
#define HAVE_pred_cmprvvm1hi (TARGET_VECTOR)
#define HAVE_pred_cmprvvm8si (TARGET_VECTOR)
#define HAVE_pred_cmprvvm4si (TARGET_VECTOR)
#define HAVE_pred_cmprvvm2si (TARGET_VECTOR)
#define HAVE_pred_cmprvvm1si (TARGET_VECTOR)
#define HAVE_pred_cmprvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_cmprvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_cmprvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_cmprvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_cmprvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_cmprvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_cmprvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_cmprvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_cmprvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_cmprvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_cmpv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_cmpv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_cmpv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_cmpv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_cmpv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_cmpv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_cmpv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_cmpv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_cmpv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_cmpv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_cmpv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_cmpv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_cmpv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_cmpv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_cmpv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_cmpv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_cmpv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_cmpv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_cmpv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_cmpv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_cmpv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_cmpv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_cmpv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_cmpv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_cmpv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_cmpv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_cmpv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_cmpv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_cmpv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_cmpv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_cmpv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_cmpv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_cmpv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_cmpv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_cmpv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_cmpv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_cmpv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_cmpv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_cmpv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_cmpv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_cmpv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_cmpv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_cmpv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_cmpv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_cmpv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_cmpv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ltgervvm8qi (TARGET_VECTOR)
#define HAVE_pred_ltgervvm4qi (TARGET_VECTOR)
#define HAVE_pred_ltgervvm2qi (TARGET_VECTOR)
#define HAVE_pred_ltgervvm1qi (TARGET_VECTOR)
#define HAVE_pred_ltgervvm8hi (TARGET_VECTOR)
#define HAVE_pred_ltgervvm4hi (TARGET_VECTOR)
#define HAVE_pred_ltgervvm2hi (TARGET_VECTOR)
#define HAVE_pred_ltgervvm1hi (TARGET_VECTOR)
#define HAVE_pred_ltgervvm8si (TARGET_VECTOR)
#define HAVE_pred_ltgervvm4si (TARGET_VECTOR)
#define HAVE_pred_ltgervvm2si (TARGET_VECTOR)
#define HAVE_pred_ltgervvm1si (TARGET_VECTOR)
#define HAVE_pred_ltgervvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ltgervvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ltgervvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ltgervvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ltgervvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ltgervvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ltgervvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ltgervvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_ltgervvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ltgervvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_ltgev1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_ltgev2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_ltgev4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_ltgev8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_ltgev16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_ltgev32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_ltgev64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ltgev128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ltgev256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ltgev512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ltgev1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ltgev2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ltgev4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ltgev1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_ltgev2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_ltgev4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_ltgev8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_ltgev16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_ltgev32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ltgev64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ltgev128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ltgev256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ltgev512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ltgev1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ltgev2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ltgev1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_ltgev2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_ltgev4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_ltgev8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_ltgev16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ltgev32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ltgev64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ltgev128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ltgev256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ltgev512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ltgev1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_ltgev1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ltgev2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ltgev4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_ltgev8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_ltgev16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_ltgev32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_ltgev64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_ltgev128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_ltgev256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_ltgev512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_cmprvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_cmprvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_cmprvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_cmprvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_cmprvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_cmprvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_cmprvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_cmprvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_cmprvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_cmprvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_cmprvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_cmprvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_cmprvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_cmprvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_cmprvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_cmprvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_cmprvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_cmprvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_cmpv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_cmpv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_cmpv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_cmpv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_cmpv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_cmpv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_cmpv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_cmpv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_cmpv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_cmpv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_cmpv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_cmpv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_cmpv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_cmpv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_cmpv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_cmpv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_cmpv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_cmpv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_cmpv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_cmpv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_cmpv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_cmpv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_cmpv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_cmpv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_cmpv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_cmpv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_cmpv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_cmpv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_cmpv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_cmpv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_cmpv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_cmpv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_cmpv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_cmpv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_cmpv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_cmpv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_cmprvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_cmprvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_cmprvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_cmprvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_cmpv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_cmpv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_cmpv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_cmpv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_cmpv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_cmpv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_cmpv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_cmpv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_cmpv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_cmpv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gervvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_gervvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_gervvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_gervvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_gervvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_gervvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_gervvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_gervvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_gervvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_gervvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_gervvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_gervvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_gervvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gervvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gervvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gervvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gervvmf2qi_scalar ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_gervvmf4qi_scalar ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_gervvmf8qi_scalar ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_gervvmf2hi_scalar ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_gervvmf4hi_scalar ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_gervvmf2si_scalar ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_gev1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_gev2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_gev4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_gev8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_gev16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_gev32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_gev64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gev128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gev256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gev512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gev1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gev2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gev4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gev1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_gev2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_gev4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_gev8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_gev16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_gev32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gev64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gev128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gev256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gev512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gev1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gev2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gev1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_gev2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_gev4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_gev8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_gev16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gev32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gev64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gev128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gev256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gev512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gev1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_gev1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gev2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gev4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_gev8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_gev16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_gev32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_gev64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_gev128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_gev256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_gev512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_plusrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvm8si (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvm4si (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvm2si (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvm1si (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plusrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plusrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plusrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plusrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_mul_plusrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_mul_plusrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mul_plusrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_mul_plusrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mul_plusrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_mul_plusv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_mul_plusv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_mul_plusv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_mul_plusv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_mul_plusv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_mul_plusv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_mul_plusv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_plusv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_plusv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_plusv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_plusv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_plusv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_plusv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_plusv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_mul_plusv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_mul_plusv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_mul_plusv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_mul_plusv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_mul_plusv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_plusv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_plusv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_plusv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_plusv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_plusv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_plusv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_plusv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_mul_plusv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_mul_plusv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_mul_plusv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_mul_plusv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_plusv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_plusv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_plusv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_plusv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_plusv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_plusv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_plusv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plusv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plusv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plusv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_plusv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_plusv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_plusv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_plusv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_plusv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_plusv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_plusrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plusrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plusrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_mul_plusrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plusv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_mul_plusv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_mul_plusv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_mul_plusv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_mul_plusv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_mul_plusv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_mul_plusv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_plusv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_plusv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_plusv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_plusv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_plusv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_plusv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_plusv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_mul_plusv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_mul_plusv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_mul_plusv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_mul_plusv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_mul_plusv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_plusv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_plusv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_plusv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_plusv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_plusv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_plusv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_plusv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_mul_plusv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_mul_plusv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_mul_plusv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_mul_plusv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_plusv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_plusv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_plusv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_plusv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_plusv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_plusv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_minus_vx_rvvm8qi (TARGET_VECTOR)
#define HAVE_pred_mul_minus_vx_rvvm4qi (TARGET_VECTOR)
#define HAVE_pred_mul_minus_vx_rvvm2qi (TARGET_VECTOR)
#define HAVE_pred_mul_minus_vx_rvvm1qi (TARGET_VECTOR)
#define HAVE_pred_mul_minus_vx_rvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_mul_minus_vx_rvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_mul_minus_vx_rvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_minus_vx_rvvm8hi (TARGET_VECTOR)
#define HAVE_pred_mul_minus_vx_rvvm4hi (TARGET_VECTOR)
#define HAVE_pred_mul_minus_vx_rvvm2hi (TARGET_VECTOR)
#define HAVE_pred_mul_minus_vx_rvvm1hi (TARGET_VECTOR)
#define HAVE_pred_mul_minus_vx_rvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_mul_minus_vx_rvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_minus_vx_rvvm8si (TARGET_VECTOR)
#define HAVE_pred_mul_minus_vx_rvvm4si (TARGET_VECTOR)
#define HAVE_pred_mul_minus_vx_rvvm2si (TARGET_VECTOR)
#define HAVE_pred_mul_minus_vx_rvvm1si (TARGET_VECTOR)
#define HAVE_pred_mul_minus_vx_rvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_minus_vx_v1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_mul_minus_vx_v2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_mul_minus_vx_v4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_mul_minus_vx_v8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_mul_minus_vx_v16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_mul_minus_vx_v32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_mul_minus_vx_v64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_minus_vx_v128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_minus_vx_v256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_minus_vx_v512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_minus_vx_v1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_minus_vx_v2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_minus_vx_v4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_minus_vx_v1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_mul_minus_vx_v2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_mul_minus_vx_v4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_mul_minus_vx_v8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_mul_minus_vx_v16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_mul_minus_vx_v32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_minus_vx_v64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_minus_vx_v128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_minus_vx_v256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_minus_vx_v512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_minus_vx_v1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_minus_vx_v2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_minus_vx_v1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_mul_minus_vx_v2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_mul_minus_vx_v4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_mul_minus_vx_v8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_mul_minus_vx_v16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_minus_vx_v32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_minus_vx_v64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_minus_vx_v128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_minus_vx_v256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_minus_vx_v512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_minus_vx_v1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_minus_vx_rvvm8di ((TARGET_VECTOR && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_minus_vx_rvvm4di ((TARGET_VECTOR && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_minus_vx_rvvm2di ((TARGET_VECTOR && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_minus_vx_rvvm1di ((TARGET_VECTOR && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_minus_vx_v1di ((TARGET_VECTOR && TARGET_64BIT) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_minus_vx_v2di ((TARGET_VECTOR && TARGET_64BIT) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_minus_vx_v4di ((TARGET_VECTOR && TARGET_64BIT) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_minus_vx_v8di ((TARGET_VECTOR && TARGET_64BIT) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_minus_vx_v16di ((TARGET_VECTOR && TARGET_64BIT) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_minus_vx_v32di ((TARGET_VECTOR && TARGET_64BIT) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_minus_vx_v64di ((TARGET_VECTOR && TARGET_64BIT) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_minus_vx_v128di ((TARGET_VECTOR && TARGET_64BIT) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_minus_vx_v256di ((TARGET_VECTOR && TARGET_64BIT) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_minus_vx_v512di ((TARGET_VECTOR && TARGET_64BIT) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_plusrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plusrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plusrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plusrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plusv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plusv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plusv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plusv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_plusv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_plusv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_plusv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_plusv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_plusv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_plusv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_minus_mulrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvm8si (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvm4si (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvm2si (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvm1si (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_minus_mulrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_minus_mulrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_minus_mulrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_minus_mulrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_minus_mulrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_minus_mulrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_minus_mulrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_minus_mulrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_minus_mulrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_minus_mulv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_minus_mulv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_minus_mulv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_minus_mulv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_minus_mulv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_minus_mulv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_minus_mulv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_minus_mulv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_minus_mulv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_minus_mulv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_minus_mulv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_minus_mulv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_minus_mulv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_minus_mulv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_minus_mulv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_minus_mulv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_minus_mulv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_minus_mulv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_minus_mulv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_minus_mulv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_minus_mulv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_minus_mulv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_minus_mulv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_minus_mulv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_minus_mulv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_minus_mulv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_minus_mulv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_minus_mulv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_minus_mulv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_minus_mulv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_minus_mulv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_minus_mulv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_minus_mulv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_minus_mulv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_minus_mulv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_minus_mulv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_minus_mulv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_minus_mulv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_minus_mulv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_minus_mulv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_minus_mulv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_minus_mulv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_minus_mulv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_minus_mulv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_minus_mulv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_minus_mulv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_minus_mulrvvm8qi_scalar (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvm4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvm2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvm1qi_scalar (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvmf2qi_scalar (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvmf4qi_scalar (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvmf8qi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_minus_mulrvvm8hi_scalar (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvm4hi_scalar (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvm2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvm1hi_scalar (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvmf2hi_scalar (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvmf4hi_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_minus_mulrvvm8si_scalar (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvm4si_scalar (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvm2si_scalar (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvm1si_scalar (TARGET_VECTOR)
#define HAVE_pred_minus_mulrvvmf2si_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_minus_mulv1qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_minus_mulv2qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_minus_mulv4qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_minus_mulv8qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_minus_mulv16qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_minus_mulv32qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_minus_mulv64qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_minus_mulv128qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_minus_mulv256qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_minus_mulv512qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_minus_mulv1024qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_minus_mulv2048qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_minus_mulv4096qi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_minus_mulv1hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_minus_mulv2hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_minus_mulv4hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_minus_mulv8hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_minus_mulv16hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_minus_mulv32hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_minus_mulv64hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_minus_mulv128hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_minus_mulv256hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_minus_mulv512hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_minus_mulv1024hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_minus_mulv2048hi_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_minus_mulv1si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_minus_mulv2si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_minus_mulv4si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_minus_mulv8si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_minus_mulv16si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_minus_mulv32si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_minus_mulv64si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_minus_mulv128si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_minus_mulv256si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_minus_mulv512si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_minus_mulv1024si_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_minus_mulrvvm8di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_minus_mulrvvm4di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_minus_mulrvvm2di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_minus_mulrvvm1di_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_minus_mulv1di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_minus_mulv2di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_minus_mulv4di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_minus_mulv8di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_minus_mulv16di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_minus_mulv32di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_minus_mulv64di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_minus_mulv128di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_minus_mulv256di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_minus_mulv512di_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_addrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_subrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_addrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_subrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_addrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_subrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_addrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_subrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_addrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_subrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_addrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_subrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_addrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_subrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_addrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_subrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_addrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_subrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_addrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_subrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_addrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_subrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_addrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_subrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_addrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_subrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_addrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_subrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_addrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_subrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_addv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_subv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_addv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_subv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_addv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_subv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_addv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_subv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_addv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_subv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_addv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_subv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_addv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_subv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_addv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_subv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_addv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_subv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_addv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_subv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_addv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_subv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_addv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_subv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_addv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_subv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_addv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_subv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_addv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_subv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_addv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_subv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_addv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_subv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_addv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_subv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_addv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_subv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_addv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_subv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_addv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_subv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_addv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_subv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_addv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_subv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_addv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_subv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_addv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_subv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_addv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_subv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_addv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_subv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_addv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_subv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_addv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_subv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_addv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_subv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_addv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_subv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_addv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_subv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_addv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_subv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_addrvvm8hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_subrvvm8hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_addrvvm4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_subrvvm4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_addrvvm2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_subrvvm2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_addrvvm1hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_subrvvm1hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_addrvvmf2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_subrvvmf2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_addrvvmf4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_subrvvmf4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_addrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_subrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_addrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_subrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_addrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_subrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_addrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_subrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_addrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_subrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_addrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_subrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_addrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_subrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_addrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_subrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_addrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_subrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_addv1hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_subv1hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_addv2hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_subv2hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_addv4hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_subv4hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_addv8hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_subv8hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_addv16hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_subv16hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_addv32hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_subv32hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_addv64hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_subv64hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_addv128hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_subv128hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_addv256hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_subv256hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_addv512hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_subv512hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_addv1024hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_subv1024hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_addv2048hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_subv2048hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_addv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_subv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_addv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_subv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_addv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_subv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_addv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_subv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_addv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_subv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_addv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_subv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_addv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_subv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_addv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_subv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_addv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_subv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_addv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_subv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_addv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_subv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_addv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_subv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_addv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_subv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_addv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_subv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_addv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_subv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_addv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_subv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_addv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_subv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_addv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_subv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_addv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_subv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_addv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_subv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_addv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_subv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_neg_addrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_neg_subrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_neg_addrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_neg_subrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_neg_addrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_neg_subrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_neg_addrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_neg_subrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_neg_addrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_neg_subrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_neg_addrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_neg_subrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_neg_addrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_subrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_addrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_subrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_addrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_subrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_addrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_subrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_addrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_neg_subrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_neg_addrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_subrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_addrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_subrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_addrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_subrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_addrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_subrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_addv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_neg_subv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_neg_addv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_neg_subv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_neg_addv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_neg_subv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_neg_addv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_neg_subv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_neg_addv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_neg_subv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_neg_addv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_neg_subv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_neg_addv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_neg_subv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_neg_addv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_neg_subv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_neg_addv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_neg_subv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_neg_addv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_neg_subv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_neg_addv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_neg_subv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_neg_addv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_neg_subv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_neg_addv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_subv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_addv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_subv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_addv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_subv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_addv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_subv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_addv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_neg_subv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_neg_addv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_neg_subv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_neg_addv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_neg_subv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_neg_addv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_neg_subv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_neg_addv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_neg_subv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_neg_addv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_neg_subv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_neg_addv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_neg_subv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_neg_addv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_subv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_addv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_subv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_addv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_subv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_addv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_neg_subv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_neg_addv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_neg_subv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_neg_addv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_neg_subv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_neg_addv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_neg_subv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_neg_addv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_neg_subv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_neg_addv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_neg_subv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_neg_addv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_neg_subv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_neg_addrvvm8hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_neg_subrvvm8hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_neg_addrvvm4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_neg_subrvvm4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_neg_addrvvm2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_neg_subrvvm2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_neg_addrvvm1hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_neg_subrvvm1hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_neg_addrvvmf2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_neg_subrvvmf2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_mul_neg_addrvvmf4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_neg_subrvvmf4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_neg_addrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_subrvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_addrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_subrvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_addrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_subrvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_addrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_subrvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_addrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_neg_subrvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_neg_addrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_subrvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_addrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_subrvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_addrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_subrvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_addrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_subrvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_addv1hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_neg_subv1hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_neg_addv2hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_neg_subv2hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_neg_addv4hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_neg_subv4hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_neg_addv8hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_neg_subv8hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_neg_addv16hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_neg_subv16hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_mul_neg_addv32hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_neg_subv32hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_neg_addv64hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_neg_subv64hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_neg_addv128hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_neg_subv128hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_neg_addv256hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_neg_subv256hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_neg_addv512hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_neg_subv512hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_neg_addv1024hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_neg_subv1024hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_neg_addv2048hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_neg_subv2048hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_neg_addv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_subv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_addv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_subv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_addv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_subv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_addv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_subv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_mul_neg_addv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_neg_subv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_neg_addv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_neg_subv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_neg_addv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_neg_subv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_neg_addv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_neg_subv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_neg_addv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_neg_subv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_neg_addv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_neg_subv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_neg_addv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_neg_subv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_neg_addv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_subv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_addv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_subv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_addv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_subv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_mul_neg_addv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_neg_subv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_neg_addv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_neg_subv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_neg_addv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_neg_subv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_neg_addv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_neg_subv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_neg_addv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_neg_subv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_neg_addv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_neg_subv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_neg_addv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_neg_subv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_cmprvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_cmprvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_cmprvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_cmprvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_cmprvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_cmprvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_cmprvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_cmprvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_cmprvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_cmprvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_cmprvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_cmprvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_cmprvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_cmprvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_cmprvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_cmpv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_cmpv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_cmpv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_cmpv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_cmpv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_cmpv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_cmpv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_cmpv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_cmpv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_cmpv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_cmpv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_cmpv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_cmpv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_cmpv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_cmpv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_cmpv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_cmpv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_cmpv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_cmpv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_cmpv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_cmpv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_cmpv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_cmpv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_cmpv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_cmpv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_cmpv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_cmpv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_cmpv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_cmpv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_cmpv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_cmpv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_cmpv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_cmpv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_cmprvvm8hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_cmprvvm4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_cmprvvm2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_cmprvvm1hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_cmprvvmf2hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_cmprvvmf4hf_scalar ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_cmprvvm8sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_cmprvvm4sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_cmprvvm2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_cmprvvm1sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_cmprvvmf2sf_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_cmprvvm8df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_cmprvvm4df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_cmprvvm2df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_cmprvvm1df_scalar ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_cmpv1hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_cmpv2hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_cmpv4hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_cmpv8hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_cmpv16hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_cmpv32hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_cmpv64hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_cmpv128hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_cmpv256hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_cmpv512hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_cmpv1024hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_cmpv2048hf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_cmpv1sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_cmpv2sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_cmpv4sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_cmpv8sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_cmpv16sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_cmpv32sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_cmpv64sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_cmpv128sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_cmpv256sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_cmpv512sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_cmpv1024sf_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_cmpv1df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_cmpv2df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_cmpv4df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_cmpv8df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_cmpv16df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_cmpv32df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_cmpv64df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_cmpv128df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_cmpv256df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_cmpv512df_scalar ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_extract_firstrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_extract_firstrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_extract_firstrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_extract_firstrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_extract_firstrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_extract_firstrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_extract_firstrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_extract_firstrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_extract_firstrvvm8si (TARGET_VECTOR)
#define HAVE_pred_extract_firstrvvm4si (TARGET_VECTOR)
#define HAVE_pred_extract_firstrvvm2si (TARGET_VECTOR)
#define HAVE_pred_extract_firstrvvm1si (TARGET_VECTOR)
#define HAVE_pred_extract_firstrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extract_firstrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extract_firstrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extract_firstrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extract_firstrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_extract_firstrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_extract_firstrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_extract_firstrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_pred_extract_firstrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_extract_firstrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_pred_extract_firstv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_extract_firstv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_extract_firstv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_extract_firstv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_extract_firstv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_extract_firstv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_extract_firstv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_extract_firstv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_extract_firstv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_extract_firstv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_extract_firstv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_extract_firstv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_extract_firstv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_extract_firstv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_extract_firstv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_extract_firstv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_extract_firstv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_extract_firstv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_extract_firstv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_extract_firstv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_extract_firstv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_extract_firstv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_extract_firstv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_extract_firstv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_extract_firstv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_extract_firstv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_extract_firstv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_extract_firstv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_extract_firstv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_extract_firstv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_extract_firstv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_extract_firstv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_extract_firstv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_extract_firstv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_extract_firstv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_extract_firstv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_extract_firstv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extract_firstv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extract_firstv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extract_firstv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_extract_firstv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_extract_firstv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_extract_firstv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_extract_firstv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_extract_firstv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_extract_firstv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_extract_firstrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_extract_firstrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_extract_firstrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_extract_firstrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_extract_firstrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_pred_extract_firstrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extract_firstrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_extract_firstrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_extract_firstrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_extract_firstrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_extract_firstrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_extract_firstrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_extract_firstrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_extract_firstrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_extract_firstrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_extract_firstv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_pred_extract_firstv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_pred_extract_firstv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_pred_extract_firstv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_pred_extract_firstv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_pred_extract_firstv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_extract_firstv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_extract_firstv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_extract_firstv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_extract_firstv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_extract_firstv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_extract_firstv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_extract_firstv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_extract_firstv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_extract_firstv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_extract_firstv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_pred_extract_firstv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_extract_firstv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_extract_firstv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_extract_firstv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_extract_firstv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_extract_firstv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_extract_firstv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_extract_firstv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_extract_firstv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_extract_firstv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_pred_extract_firstv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_extract_firstv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_extract_firstv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_extract_firstv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_extract_firstv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_extract_firstv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_extract_firstv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slide1uprvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slide1downrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slide1uprvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slide1downrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slide1uprvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slide1downrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slide1uprvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slide1downrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slide1upv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slide1downv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slide1upv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slide1downv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slide1upv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slide1downv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_slide1upv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slide1downv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_slide1upv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slide1downv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_slide1upv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slide1downv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_slide1upv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slide1downv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_slide1upv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slide1downv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_slide1upv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slide1downv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_slide1upv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_slide1downv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_plus_vxrvvm8qi (TARGET_VECTOR)
#define HAVE_pred_mul_plus_vxrvvm4qi (TARGET_VECTOR)
#define HAVE_pred_mul_plus_vxrvvm2qi (TARGET_VECTOR)
#define HAVE_pred_mul_plus_vxrvvm1qi (TARGET_VECTOR)
#define HAVE_pred_mul_plus_vxrvvmf2qi (TARGET_VECTOR)
#define HAVE_pred_mul_plus_vxrvvmf4qi (TARGET_VECTOR)
#define HAVE_pred_mul_plus_vxrvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plus_vxrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_mul_plus_vxrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_mul_plus_vxrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_mul_plus_vxrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_mul_plus_vxrvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_mul_plus_vxrvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plus_vxrvvm8si (TARGET_VECTOR)
#define HAVE_pred_mul_plus_vxrvvm4si (TARGET_VECTOR)
#define HAVE_pred_mul_plus_vxrvvm2si (TARGET_VECTOR)
#define HAVE_pred_mul_plus_vxrvvm1si (TARGET_VECTOR)
#define HAVE_pred_mul_plus_vxrvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plus_vxv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_pred_mul_plus_vxv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_pred_mul_plus_vxv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_pred_mul_plus_vxv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_pred_mul_plus_vxv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_pred_mul_plus_vxv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_pred_mul_plus_vxv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_plus_vxv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_plus_vxv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_plus_vxv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_plus_vxv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_plus_vxv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_plus_vxv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_plus_vxv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_mul_plus_vxv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_mul_plus_vxv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_mul_plus_vxv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_mul_plus_vxv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_mul_plus_vxv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_plus_vxv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_plus_vxv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_plus_vxv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_plus_vxv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_plus_vxv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_plus_vxv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_plus_vxv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_mul_plus_vxv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_mul_plus_vxv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_mul_plus_vxv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_mul_plus_vxv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_plus_vxv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_plus_vxv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_plus_vxv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_plus_vxv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_plus_vxv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_plus_vxv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_mul_plus_vxrvvm8di ((TARGET_VECTOR && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plus_vxrvvm4di ((TARGET_VECTOR && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plus_vxrvvm2di ((TARGET_VECTOR && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plus_vxrvvm1di ((TARGET_VECTOR && TARGET_64BIT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plus_vxv1di ((TARGET_VECTOR && TARGET_64BIT) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plus_vxv2di ((TARGET_VECTOR && TARGET_64BIT) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plus_vxv4di ((TARGET_VECTOR && TARGET_64BIT) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_mul_plus_vxv8di ((TARGET_VECTOR && TARGET_64BIT) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_mul_plus_vxv16di ((TARGET_VECTOR && TARGET_64BIT) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_mul_plus_vxv32di ((TARGET_VECTOR && TARGET_64BIT) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_mul_plus_vxv64di ((TARGET_VECTOR && TARGET_64BIT) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_mul_plus_vxv128di ((TARGET_VECTOR && TARGET_64BIT) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_mul_plus_vxv256di ((TARGET_VECTOR && TARGET_64BIT) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_mul_plus_vxv512di ((TARGET_VECTOR && TARGET_64BIT) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_plus_u_vxrvvm8hi (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plus_u_vxrvvm4hi (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plus_u_vxrvvm2hi (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plus_u_vxrvvm1hi (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plus_u_vxrvvmf2hi (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plus_u_vxrvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plus_u_vxrvvm8si (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plus_u_vxrvvm4si (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plus_u_vxrvvm2si (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plus_u_vxrvvm1si (TARGET_VECTOR)
#define HAVE_pred_widen_mul_plus_u_vxrvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plus_u_vxrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plus_u_vxrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plus_u_vxrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plus_u_vxrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plus_u_vxv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_pred_widen_mul_plus_u_vxv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_pred_widen_mul_plus_u_vxv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_pred_widen_mul_plus_u_vxv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_pred_widen_mul_plus_u_vxv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_pred_widen_mul_plus_u_vxv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_plus_u_vxv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_plus_u_vxv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_plus_u_vxv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_plus_u_vxv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_plus_u_vxv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_plus_u_vxv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_plus_u_vxv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_pred_widen_mul_plus_u_vxv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_pred_widen_mul_plus_u_vxv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_pred_widen_mul_plus_u_vxv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_pred_widen_mul_plus_u_vxv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_plus_u_vxv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_plus_u_vxv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_plus_u_vxv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_plus_u_vxv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_plus_u_vxv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_plus_u_vxv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_widen_mul_plus_u_vxv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plus_u_vxv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plus_u_vxv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_widen_mul_plus_u_vxv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_widen_mul_plus_u_vxv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_widen_mul_plus_u_vxv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_widen_mul_plus_u_vxv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_widen_mul_plus_u_vxv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_widen_mul_plus_u_vxv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_widen_mul_plus_u_vxv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_loadrvvm8qirvvm1bi (TARGET_VECTOR)
#define HAVE_mask_len_loadrvvm4qirvvmf2bi (TARGET_VECTOR)
#define HAVE_mask_len_loadrvvm2qirvvmf4bi (TARGET_VECTOR)
#define HAVE_mask_len_loadrvvm1qirvvmf8bi (TARGET_VECTOR)
#define HAVE_mask_len_loadrvvm8hirvvmf2bi (TARGET_VECTOR)
#define HAVE_mask_len_loadrvvm4hirvvmf4bi (TARGET_VECTOR)
#define HAVE_mask_len_loadrvvm2hirvvmf8bi (TARGET_VECTOR)
#define HAVE_mask_len_loadrvvm1hirvvmf16bi (TARGET_VECTOR)
#define HAVE_mask_len_loadrvvm8sirvvmf4bi (TARGET_VECTOR)
#define HAVE_mask_len_loadrvvm4sirvvmf8bi (TARGET_VECTOR)
#define HAVE_mask_len_loadrvvm2sirvvmf16bi (TARGET_VECTOR)
#define HAVE_mask_len_loadrvvm1sirvvmf32bi (TARGET_VECTOR)
#define HAVE_mask_len_loadrvvm8dirvvmf8bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_loadrvvm4dirvvmf16bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_loadrvvm2dirvvmf32bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_loadrvvm1dirvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_loadrvvmf2qirvvmf16bi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_mask_len_loadrvvmf4qirvvmf32bi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_mask_len_loadrvvmf8qirvvmf64bi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_mask_len_loadrvvmf2hirvvmf32bi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_mask_len_loadrvvmf4hirvvmf64bi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_mask_len_loadrvvmf2sirvvmf64bi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_mask_len_loadrvvm8hfrvvmf2bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_loadrvvm4hfrvvmf4bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_loadrvvm2hfrvvmf8bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_loadrvvm1hfrvvmf16bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_loadrvvmf2hfrvvmf32bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_loadrvvmf4hfrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_loadrvvm8sfrvvmf4bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_loadrvvm4sfrvvmf8bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_loadrvvm2sfrvvmf16bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_loadrvvm1sfrvvmf32bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_loadrvvmf2sfrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_loadrvvm8dfrvvmf8bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_loadrvvm4dfrvvmf16bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_loadrvvm2dfrvvmf32bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_loadrvvm1dfrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_loadrvvm8bfrvvmf2bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_loadrvvm4bfrvvmf4bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_loadrvvm2bfrvvmf8bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_loadrvvm1bfrvvmf16bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_loadrvvmf2bfrvvmf32bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_loadrvvmf4bfrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_loadv1qiv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_mask_len_loadv2qiv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_mask_len_loadv4qiv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_mask_len_loadv8qiv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_mask_len_loadv16qiv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_mask_len_loadv32qiv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_mask_len_loadv64qiv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_loadv128qiv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_loadv256qiv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_loadv512qiv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_loadv1024qiv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_loadv2048qiv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_loadv4096qiv4096bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_loadv1hiv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_mask_len_loadv2hiv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_mask_len_loadv4hiv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_mask_len_loadv8hiv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_mask_len_loadv16hiv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_mask_len_loadv32hiv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_loadv64hiv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_loadv128hiv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_loadv256hiv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_loadv512hiv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_loadv1024hiv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_loadv2048hiv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_loadv1siv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_mask_len_loadv2siv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_mask_len_loadv4siv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_mask_len_loadv8siv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_mask_len_loadv16siv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_loadv32siv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_loadv64siv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_loadv128siv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_loadv256siv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_loadv512siv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_loadv1024siv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_loadv1div1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_loadv2div2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_loadv4div4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_loadv8div8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_loadv16div16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_loadv32div32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_loadv64div64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_loadv128div128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_loadv256div256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_loadv512div512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_loadv1hfv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_loadv2hfv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_loadv4hfv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_loadv8hfv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_loadv16hfv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_loadv32hfv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_loadv64hfv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_loadv128hfv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_loadv256hfv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_loadv512hfv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_loadv1024hfv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_loadv2048hfv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_loadv1sfv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_loadv2sfv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_loadv4sfv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_loadv8sfv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_loadv16sfv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_loadv32sfv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_loadv64sfv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_loadv128sfv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_loadv256sfv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_loadv512sfv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_loadv1024sfv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_loadv1dfv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_loadv2dfv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_loadv4dfv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_loadv8dfv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_loadv16dfv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_loadv32dfv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_loadv64dfv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_loadv128dfv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_loadv256dfv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_loadv512dfv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_loadv1bfv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_loadv2bfv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_loadv4bfv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_loadv8bfv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_loadv16bfv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_loadv32bfv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_loadv64bfv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_loadv128bfv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_loadv256bfv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_loadv512bfv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_loadv1024bfv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_loadv2048bfv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_storervvm8qirvvm1bi (TARGET_VECTOR)
#define HAVE_mask_len_storervvm4qirvvmf2bi (TARGET_VECTOR)
#define HAVE_mask_len_storervvm2qirvvmf4bi (TARGET_VECTOR)
#define HAVE_mask_len_storervvm1qirvvmf8bi (TARGET_VECTOR)
#define HAVE_mask_len_storervvm8hirvvmf2bi (TARGET_VECTOR)
#define HAVE_mask_len_storervvm4hirvvmf4bi (TARGET_VECTOR)
#define HAVE_mask_len_storervvm2hirvvmf8bi (TARGET_VECTOR)
#define HAVE_mask_len_storervvm1hirvvmf16bi (TARGET_VECTOR)
#define HAVE_mask_len_storervvm8sirvvmf4bi (TARGET_VECTOR)
#define HAVE_mask_len_storervvm4sirvvmf8bi (TARGET_VECTOR)
#define HAVE_mask_len_storervvm2sirvvmf16bi (TARGET_VECTOR)
#define HAVE_mask_len_storervvm1sirvvmf32bi (TARGET_VECTOR)
#define HAVE_mask_len_storervvm8dirvvmf8bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_storervvm4dirvvmf16bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_storervvm2dirvvmf32bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_storervvm1dirvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_storervvmf2qirvvmf16bi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_mask_len_storervvmf4qirvvmf32bi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_mask_len_storervvmf8qirvvmf64bi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_mask_len_storervvmf2hirvvmf32bi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_mask_len_storervvmf4hirvvmf64bi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_mask_len_storervvmf2sirvvmf64bi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_mask_len_storervvm8hfrvvmf2bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_storervvm4hfrvvmf4bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_storervvm2hfrvvmf8bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_storervvm1hfrvvmf16bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_storervvmf2hfrvvmf32bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_storervvmf4hfrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_storervvm8sfrvvmf4bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_storervvm4sfrvvmf8bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_storervvm2sfrvvmf16bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_storervvm1sfrvvmf32bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_storervvmf2sfrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_storervvm8dfrvvmf8bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_storervvm4dfrvvmf16bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_storervvm2dfrvvmf32bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_storervvm1dfrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_storervvm8bfrvvmf2bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_storervvm4bfrvvmf4bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_storervvm2bfrvvmf8bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_storervvm1bfrvvmf16bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_storervvmf2bfrvvmf32bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_storervvmf4bfrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_storev1qiv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_mask_len_storev2qiv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_mask_len_storev4qiv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_mask_len_storev8qiv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_mask_len_storev16qiv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_mask_len_storev32qiv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_mask_len_storev64qiv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_storev128qiv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_storev256qiv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_storev512qiv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_storev1024qiv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_storev2048qiv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_storev4096qiv4096bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_storev1hiv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_mask_len_storev2hiv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_mask_len_storev4hiv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_mask_len_storev8hiv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_mask_len_storev16hiv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_mask_len_storev32hiv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_storev64hiv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_storev128hiv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_storev256hiv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_storev512hiv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_storev1024hiv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_storev2048hiv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_storev1siv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_mask_len_storev2siv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_mask_len_storev4siv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_mask_len_storev8siv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_mask_len_storev16siv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_storev32siv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_storev64siv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_storev128siv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_storev256siv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_storev512siv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_storev1024siv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_storev1div1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_storev2div2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_storev4div4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_storev8div8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_storev16div16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_storev32div32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_storev64div64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_storev128div128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_storev256div256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_storev512div512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_storev1hfv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_storev2hfv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_storev4hfv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_storev8hfv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_storev16hfv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_storev32hfv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_storev64hfv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_storev128hfv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_storev256hfv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_storev512hfv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_storev1024hfv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_storev2048hfv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_storev1sfv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_storev2sfv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_storev4sfv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_storev8sfv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_storev16sfv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_storev32sfv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_storev64sfv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_storev128sfv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_storev256sfv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_storev512sfv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_storev1024sfv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_storev1dfv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_storev2dfv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_storev4dfv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_storev8dfv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_storev16dfv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_storev32dfv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_storev64dfv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_storev128dfv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_storev256dfv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_storev512dfv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_storev1bfv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_storev2bfv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_storev4bfv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_storev8bfv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_storev16bfv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_storev32bfv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_storev64bfv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_storev128bfv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_storev256bfv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_storev512bfv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_storev1024bfv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_storev2048bfv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_gather_loadrvvm8qirvvm8qi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvm4qirvvm4qi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvm2qirvvm2qi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvm1qirvvm1qi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvmf2qirvvmf2qi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvmf4qirvvmf4qi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvmf8qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm8hirvvm8hi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvm4hirvvm4hi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvm2hirvvm2hi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvm1hirvvm1hi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvmf2hirvvmf2hi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvmf4hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm8sirvvm8si (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvm4sirvvm4si (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvm2sirvvm2si (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvm1sirvvm1si (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvmf2sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm8dirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvm4dirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvm2dirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvm1dirvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvm8bfrvvm8hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadrvvm4bfrvvm4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadrvvm2bfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadrvvm1bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadrvvmf2bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadrvvmf4bfrvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm8hfrvvm8hi ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_mask_len_gather_loadrvvm4hfrvvm4hi ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_mask_len_gather_loadrvvm2hfrvvm2hi ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_mask_len_gather_loadrvvm1hfrvvm1hi ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_mask_len_gather_loadrvvmf2hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_mask_len_gather_loadrvvmf4hfrvvmf4hi ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm8sfrvvm8si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadrvvm4sfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadrvvm2sfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadrvvm1sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadrvvmf2sfrvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm8dfrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvm4dfrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvm2dfrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvm1dfrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadv1qiv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_mask_len_gather_loadv2qiv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_mask_len_gather_loadv4qiv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_mask_len_gather_loadv8qiv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_mask_len_gather_loadv16qiv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_mask_len_gather_loadv32qiv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_mask_len_gather_loadv64qiv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv128qiv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv256qiv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv512qiv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv1024qiv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv2048qiv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv4096qiv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_gather_loadv1hiv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_mask_len_gather_loadv2hiv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_mask_len_gather_loadv4hiv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_mask_len_gather_loadv8hiv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_mask_len_gather_loadv16hiv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_mask_len_gather_loadv32hiv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv64hiv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv128hiv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv256hiv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv512hiv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv1024hiv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv2048hiv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_gather_loadv1siv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_mask_len_gather_loadv2siv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_mask_len_gather_loadv4siv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_mask_len_gather_loadv8siV8SI ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_mask_len_gather_loadv16siv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv32siv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv64siv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv128siv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv256siv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv512siv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv1024siv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_gather_loadv1div1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadv2div2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadv4div4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadv8div8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadv16div16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadv32div32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadv64div64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadv128div128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadv256div256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadv512div512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadv1hfv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_mask_len_gather_loadv2hfv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_mask_len_gather_loadv4hfv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_mask_len_gather_loadv8hfv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_mask_len_gather_loadv16hfv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_mask_len_gather_loadv32hfv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv64hfv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv128hfv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv256hfv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv512hfv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv1024hfv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv2048hfv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_gather_loadv1bfv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadv2bfv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadv4bfv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadv8bfv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadv16bfv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadv32bfv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv64bfv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv128bfv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv256bfv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv512bfv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv1024bfv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv2048bfv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_gather_loadv1sfv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadv2sfv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadv4sfv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadv8sfv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadv16sfv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv32sfv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv64sfv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv128sfv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv256sfv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv512sfv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv1024sfv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_gather_loadv1dfv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadv2dfv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadv4dfv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadv8dfv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadv16dfv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadv32dfv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadv64dfv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadv128dfv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadv256dfv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadv512dfv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvm8hirvvm4qi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvm4hirvvm2qi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvm2hirvvm1qi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvm1hirvvmf2qi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvmf2hirvvmf4qi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvmf4hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm8bfrvvm4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadrvvm4bfrvvm2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadrvvm2bfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadrvvm1bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadrvvmf2bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadrvvmf4bfrvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm8hfrvvm4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_gather_loadrvvm4hfrvvm2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_gather_loadrvvm2hfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_gather_loadrvvm1hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_gather_loadrvvmf2hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_gather_loadrvvmf4hfrvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm8sirvvm4hi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvm4sirvvm2hi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvm2sirvvm1hi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvm1sirvvmf2hi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvmf2sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm8sfrvvm4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadrvvm4sfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadrvvm2sfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadrvvm1sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadrvvmf2sfrvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm8dirvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm4dirvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm2dirvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm1dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm8dfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_gather_loadrvvm4dfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_gather_loadrvvm2dfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_gather_loadrvvm1dfrvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_gather_loadv1hiv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_mask_len_gather_loadv2hiv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_mask_len_gather_loadv4hiv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_mask_len_gather_loadv8hiv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_mask_len_gather_loadv16hiv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_mask_len_gather_loadv32hiv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv64hiv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv128hiv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv256hiv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv512hiv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv1024hiv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv1siv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_mask_len_gather_loadv2siv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_mask_len_gather_loadv4siv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_mask_len_gather_loadv8siv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_mask_len_gather_loadv16siv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv32siv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv64siv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv128siv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv256siv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv512siv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv1024siv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_gather_loadv1div1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadv2div2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadv4div4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadv8div8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv16div16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv32div32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv64div64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv128div128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv256div256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv512div512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_gather_loadv1hfv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_gather_loadv2hfv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_gather_loadv4hfv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_gather_loadv8hfv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_gather_loadv16hfv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_gather_loadv32hfv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv64hfv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv128hfv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv256hfv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv512hfv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv1024hfv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv2048hfv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_gather_loadv1bfv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadv2bfv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadv4bfv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadv8bfv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadv16bfv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadv32bfv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv64bfv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv128bfv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv256bfv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv512bfv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv1024bfv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv2048bfv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_gather_loadv1sfv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadv2sfv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadv4sfv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadv8sfv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadv16sfv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv32sfv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv64sfv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv128sfv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv256sfv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv512sfv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv1024sfv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_gather_loadv1dfv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_gather_loadv2dfv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_gather_loadv4dfv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_gather_loadv8dfv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv16dfv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv32dfv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv64dfv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv128dfv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv256dfv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv512dfv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_gather_loadrvvm8sirvvm2qi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvm4sirvvm1qi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvm2sirvvmf2qi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvm1sirvvmf4qi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvmf2sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm8sfrvvm2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadrvvm4sfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadrvvm2sfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadrvvm1sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadrvvmf2sfrvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm8dirvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm4dirvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm2dirvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm1dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm8dfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_gather_loadrvvm4dfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_gather_loadrvvm2dfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_gather_loadrvvm1dfrvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_gather_loadv1siv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_mask_len_gather_loadv2siv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_mask_len_gather_loadv4siv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_mask_len_gather_loadv8siv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_mask_len_gather_loadv16siv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv32siv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv64siv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv128siv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv256siv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv512siv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv1024siv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_gather_loadv1div1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadv2div2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadv4div4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadv8div8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv16div16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv32div32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv64div64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv128div128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv256div256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv512div512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_gather_loadv1sfv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadv2sfv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadv4sfv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadv8sfv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadv16sfv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv32sfv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv64sfv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv128sfv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv256sfv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv512sfv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv1024sfv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_gather_loadv1dfv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_gather_loadv2dfv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_gather_loadv4dfv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_gather_loadv8dfv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv16dfv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv32dfv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv64dfv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv128dfv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv256dfv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv512dfv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_gather_loadrvvm8dirvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm4dirvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm2dirvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm1dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm8dfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_gather_loadrvvm4dfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_gather_loadrvvm2dfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_gather_loadrvvm1dfrvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_gather_loadv1div1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadv2div2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadv4div4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadv8div8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv16div16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv32div32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv64div64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv128div128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv256div256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv512div512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_gather_loadv1dfv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_gather_loadv2dfv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_gather_loadv4dfv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_gather_loadv8dfv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv16dfv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv32dfv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv64dfv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv128dfv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv256dfv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv512dfv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_gather_loadrvvm4qirvvm8hi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvm2qirvvm4hi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvm1qirvvm2hi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvmf2qirvvm1hi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvmf4qirvvmf2hi (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvmf8qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm4hirvvm8si (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvm2hirvvm4si (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvm1hirvvm2si (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvmf2hirvvm1si (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvmf4hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm4bfrvvm8si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadrvvm2bfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadrvvm1bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadrvvmf2bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadrvvmf4bfrvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm4hfrvvm8si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_gather_loadrvvm2hfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_gather_loadrvvm1hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_gather_loadrvvmf2hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_gather_loadrvvmf4hfrvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm4sirvvm8di ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvm2sirvvm4di ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvm1sirvvm2di ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvmf2sirvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvm4sfrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvm2sfrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvm1sfrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvmf2sfrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadv1qiv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_mask_len_gather_loadv2qiv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_mask_len_gather_loadv4qiv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_mask_len_gather_loadv8qiv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_mask_len_gather_loadv16qiv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_mask_len_gather_loadv32qiv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv64qiv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv128qiv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv256qiv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv512qiv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv1024qiv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv2048qiv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv1hiv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_mask_len_gather_loadv2hiv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_mask_len_gather_loadv4hiv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_mask_len_gather_loadv8hiv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_mask_len_gather_loadv16hiv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_mask_len_gather_loadv32hiv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv64hiv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv128hiv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv256hiv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv512hiv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv1024hiv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv1siv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_mask_len_gather_loadv2siv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_mask_len_gather_loadv4siv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_mask_len_gather_loadv8siv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_mask_len_gather_loadv16siv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv32siv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv64siv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv128siv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv256siv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv512siv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv1hfv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_gather_loadv2hfv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_gather_loadv4hfv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_gather_loadv8hfv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_gather_loadv16hfv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_gather_loadv32hfv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv64hfv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv128hfv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv256hfv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv512hfv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv1024hfv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv1bfv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadv2bfv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadv4bfv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadv8bfv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadv16bfv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadv32bfv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv64bfv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv128bfv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv256bfv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv512bfv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv1024bfv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv1sfv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadv2sfv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadv4sfv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadv8sfv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_gather_loadv16sfv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv32sfv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv64sfv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv128sfv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv256sfv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv512sfv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadrvvm2qirvvm8si (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvm1qirvvm4si (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvmf2qirvvm2si (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvmf4qirvvm1si (TARGET_VECTOR)
#define HAVE_mask_len_gather_loadrvvmf8qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_gather_loadrvvm2hirvvm8di ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvm1hirvvm4di ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvmf2hirvvm2di ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvmf4hirvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvm2bfrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadrvvm1bfrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadrvvmf2bfrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadrvvmf4bfrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvm2hfrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvm1hfrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvmf2hfrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvmf4hfrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadv1qiv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_mask_len_gather_loadv2qiv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_mask_len_gather_loadv4qiv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_mask_len_gather_loadv8qiv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_mask_len_gather_loadv16qiv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_mask_len_gather_loadv32qiv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv64qiv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv128qiv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv256qiv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv512qiv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv1024qiv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_gather_loadv1hiv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_mask_len_gather_loadv2hiv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_mask_len_gather_loadv4hiv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_mask_len_gather_loadv8hiv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_mask_len_gather_loadv16hiv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_mask_len_gather_loadv32hiv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv64hiv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv128hiv1d8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv256hiv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv512hiv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv1hfv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_gather_loadv2hfv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_gather_loadv4hfv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_gather_loadv8hfv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_gather_loadv16hfv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_gather_loadv32hfv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv64hfv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv128hfv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv256hfv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv512hfv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadv1bfv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadv2bfv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadv4bfv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadv8bfv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadv16bfv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_gather_loadv32bfv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv64bfv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv128bfv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv256bfv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv512bfv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_gather_loadrvvm1qirvvm8di ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvmf2qirvvm4di ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvmf4qirvvm2di ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_mask_len_gather_loadrvvmf8qirvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_gather_loadv1qiv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_mask_len_gather_loadv2qiv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_mask_len_gather_loadv4qiv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_mask_len_gather_loadv8qiv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_mask_len_gather_loadv16qiv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_mask_len_gather_loadv32qiv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_gather_loadv64qiv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_gather_loadv128qiv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_gather_loadv256qiv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_gather_loadv512qiv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storervvm8qirvvm8qi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvm4qirvvm4qi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvm2qirvvm2qi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvm1qirvvm1qi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvmf2qirvvmf2qi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvmf4qirvvmf4qi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvmf8qirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm8hirvvm8hi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvm4hirvvm4hi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvm2hirvvm2hi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvm1hirvvm1hi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvmf2hirvvmf2hi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvmf4hirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm8sirvvm8si (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvm4sirvvm4si (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvm2sirvvm2si (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvm1sirvvm1si (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvmf2sirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm8dirvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvm4dirvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvm2dirvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvm1dirvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvm8bfrvvm8hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storervvm4bfrvvm4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storervvm2bfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storervvm1bfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storervvmf2bfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storervvmf4bfrvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm8hfrvvm8hi ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_mask_len_scatter_storervvm4hfrvvm4hi ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_mask_len_scatter_storervvm2hfrvvm2hi ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_mask_len_scatter_storervvm1hfrvvm1hi ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_mask_len_scatter_storervvmf2hfrvvmf2hi ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_mask_len_scatter_storervvmf4hfrvvmf4hi ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm8sfrvvm8si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storervvm4sfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storervvm2sfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storervvm1sfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storervvmf2sfrvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm8dfrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvm4dfrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvm2dfrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvm1dfrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storev1qiv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_mask_len_scatter_storev2qiv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_mask_len_scatter_storev4qiv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_mask_len_scatter_storev8qiv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_mask_len_scatter_storev16qiv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_mask_len_scatter_storev32qiv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_mask_len_scatter_storev64qiv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev128qiv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev256qiv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev512qiv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev1024qiv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev2048qiv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev4096qiv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_scatter_storev1hiv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_mask_len_scatter_storev2hiv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_mask_len_scatter_storev4hiv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_mask_len_scatter_storev8hiv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_mask_len_scatter_storev16hiv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_mask_len_scatter_storev32hiv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev64hiv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev128hiv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev256hiv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev512hiv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev1024hiv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev2048hiv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_scatter_storev1siv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_mask_len_scatter_storev2siv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_mask_len_scatter_storev4siv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_mask_len_scatter_storev8siV8SI ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_mask_len_scatter_storev16siv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev32siv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev64siv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev128siv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev256siv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev512siv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev1024siv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_scatter_storev1div1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storev2div2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storev4div4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storev8div8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storev16div16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storev32div32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storev64div64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storev128div128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storev256div256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storev512div512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storev1hfv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_mask_len_scatter_storev2hfv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_mask_len_scatter_storev4hfv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_mask_len_scatter_storev8hfv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_mask_len_scatter_storev16hfv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_mask_len_scatter_storev32hfv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev64hfv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev128hfv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev256hfv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev512hfv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev1024hfv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev2048hfv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_scatter_storev1bfv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storev2bfv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storev4bfv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storev8bfv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storev16bfv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storev32bfv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev64bfv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev128bfv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev256bfv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev512bfv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev1024bfv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev2048bfv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_scatter_storev1sfv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storev2sfv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storev4sfv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storev8sfv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storev16sfv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev32sfv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev64sfv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev128sfv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev256sfv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev512sfv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev1024sfv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_scatter_storev1dfv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storev2dfv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storev4dfv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storev8dfv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storev16dfv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storev32dfv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storev64dfv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storev128dfv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storev256dfv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storev512dfv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvm8hirvvm4qi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvm4hirvvm2qi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvm2hirvvm1qi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvm1hirvvmf2qi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvmf2hirvvmf4qi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvmf4hirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm8bfrvvm4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storervvm4bfrvvm2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storervvm2bfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storervvm1bfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storervvmf2bfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storervvmf4bfrvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm8hfrvvm4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_scatter_storervvm4hfrvvm2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_scatter_storervvm2hfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_scatter_storervvm1hfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_scatter_storervvmf2hfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_scatter_storervvmf4hfrvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm8sirvvm4hi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvm4sirvvm2hi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvm2sirvvm1hi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvm1sirvvmf2hi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvmf2sirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm8sfrvvm4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storervvm4sfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storervvm2sfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storervvm1sfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storervvmf2sfrvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm8dirvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm4dirvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm2dirvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm1dirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm8dfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_scatter_storervvm4dfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_scatter_storervvm2dfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_scatter_storervvm1dfrvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_scatter_storev1hiv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_mask_len_scatter_storev2hiv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_mask_len_scatter_storev4hiv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_mask_len_scatter_storev8hiv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_mask_len_scatter_storev16hiv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_mask_len_scatter_storev32hiv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev64hiv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev128hiv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev256hiv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev512hiv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev1024hiv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev1siv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_mask_len_scatter_storev2siv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_mask_len_scatter_storev4siv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_mask_len_scatter_storev8siv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_mask_len_scatter_storev16siv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev32siv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev64siv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev128siv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev256siv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev512siv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev1024siv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_scatter_storev1div1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storev2div2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storev4div4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storev8div8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev16div16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev32div32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev64div64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev128div128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev256div256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev512div512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_scatter_storev1hfv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_scatter_storev2hfv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_scatter_storev4hfv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_scatter_storev8hfv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_scatter_storev16hfv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_scatter_storev32hfv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev64hfv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev128hfv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev256hfv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev512hfv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev1024hfv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev2048hfv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_scatter_storev1bfv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storev2bfv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storev4bfv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storev8bfv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storev16bfv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storev32bfv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev64bfv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev128bfv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev256bfv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev512bfv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev1024bfv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev2048bfv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_scatter_storev1sfv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storev2sfv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storev4sfv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storev8sfv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storev16sfv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev32sfv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev64sfv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev128sfv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev256sfv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev512sfv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev1024sfv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_scatter_storev1dfv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_scatter_storev2dfv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_scatter_storev4dfv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_scatter_storev8dfv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev16dfv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev32dfv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev64dfv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev128dfv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev256dfv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev512dfv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_scatter_storervvm8sirvvm2qi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvm4sirvvm1qi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvm2sirvvmf2qi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvm1sirvvmf4qi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvmf2sirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm8sfrvvm2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storervvm4sfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storervvm2sfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storervvm1sfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storervvmf2sfrvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm8dirvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm4dirvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm2dirvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm1dirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm8dfrvvm2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_scatter_storervvm4dfrvvm1hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_scatter_storervvm2dfrvvmf2hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_scatter_storervvm1dfrvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_scatter_storev1siv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_mask_len_scatter_storev2siv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_mask_len_scatter_storev4siv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_mask_len_scatter_storev8siv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_mask_len_scatter_storev16siv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev32siv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev64siv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev128siv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev256siv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev512siv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev1024siv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_scatter_storev1div1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storev2div2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storev4div4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storev8div8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev16div16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev32div32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev64div64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev128div128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev256div256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev512div512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_scatter_storev1sfv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storev2sfv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storev4sfv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storev8sfv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storev16sfv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev32sfv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev64sfv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev128sfv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev256sfv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev512sfv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev1024sfv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_scatter_storev1dfv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_scatter_storev2dfv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_scatter_storev4dfv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_scatter_storev8dfv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev16dfv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev32dfv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev64dfv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev128dfv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev256dfv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev512dfv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_scatter_storervvm8dirvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm4dirvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm2dirvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm1dirvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm8dfrvvm1qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_scatter_storervvm4dfrvvmf2qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_scatter_storervvm2dfrvvmf4qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_scatter_storervvm1dfrvvmf8qi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_scatter_storev1div1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storev2div2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storev4div4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storev8div8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev16div16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev32div32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev64div64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev128div128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev256div256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev512div512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_scatter_storev1dfv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_scatter_storev2dfv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_scatter_storev4dfv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_scatter_storev8dfv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev16dfv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev32dfv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev64dfv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev128dfv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev256dfv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev512dfv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_scatter_storervvm4qirvvm8hi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvm2qirvvm4hi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvm1qirvvm2hi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvmf2qirvvm1hi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvmf4qirvvmf2hi (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvmf8qirvvmf4hi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm4hirvvm8si (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvm2hirvvm4si (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvm1hirvvm2si (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvmf2hirvvm1si (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvmf4hirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm4bfrvvm8si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storervvm2bfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storervvm1bfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storervvmf2bfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storervvmf4bfrvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm4hfrvvm8si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_scatter_storervvm2hfrvvm4si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_scatter_storervvm1hfrvvm2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_scatter_storervvmf2hfrvvm1si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_scatter_storervvmf4hfrvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm4sirvvm8di ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvm2sirvvm4di ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvm1sirvvm2di ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvmf2sirvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvm4sfrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvm2sfrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvm1sfrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvmf2sfrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storev1qiv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_mask_len_scatter_storev2qiv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_mask_len_scatter_storev4qiv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_mask_len_scatter_storev8qiv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_mask_len_scatter_storev16qiv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_mask_len_scatter_storev32qiv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev64qiv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev128qiv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev256qiv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev512qiv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev1024qiv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev2048qiv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev1hiv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_mask_len_scatter_storev2hiv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_mask_len_scatter_storev4hiv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_mask_len_scatter_storev8hiv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_mask_len_scatter_storev16hiv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_mask_len_scatter_storev32hiv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev64hiv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev128hiv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev256hiv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev512hiv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev1024hiv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev1siv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_mask_len_scatter_storev2siv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_mask_len_scatter_storev4siv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_mask_len_scatter_storev8siv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_mask_len_scatter_storev16siv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev32siv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev64siv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev128siv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev256siv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev512siv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev1hfv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_scatter_storev2hfv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_scatter_storev4hfv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_scatter_storev8hfv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_scatter_storev16hfv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_scatter_storev32hfv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev64hfv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev128hfv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev256hfv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev512hfv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev1024hfv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev1bfv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storev2bfv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storev4bfv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storev8bfv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storev16bfv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storev32bfv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev64bfv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev128bfv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev256bfv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev512bfv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev1024bfv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev1sfv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storev2sfv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storev4sfv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storev8sfv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_scatter_storev16sfv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev32sfv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev64sfv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev128sfv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev256sfv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev512sfv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storervvm2qirvvm8si (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvm1qirvvm4si (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvmf2qirvvm2si (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvmf4qirvvm1si (TARGET_VECTOR)
#define HAVE_mask_len_scatter_storervvmf8qirvvmf2si ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_scatter_storervvm2hirvvm8di ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvm1hirvvm4di ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvmf2hirvvm2di ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvmf4hirvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvm2bfrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storervvm1bfrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storervvmf2bfrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storervvmf4bfrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvm2hfrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvm1hfrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvmf2hfrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvmf4hfrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storev1qiv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_mask_len_scatter_storev2qiv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_mask_len_scatter_storev4qiv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_mask_len_scatter_storev8qiv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_mask_len_scatter_storev16qiv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_mask_len_scatter_storev32qiv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev64qiv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev128qiv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev256qiv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev512qiv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev1024qiv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_scatter_storev1hiv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_mask_len_scatter_storev2hiv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_mask_len_scatter_storev4hiv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_mask_len_scatter_storev8hiv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_mask_len_scatter_storev16hiv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_mask_len_scatter_storev32hiv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev64hiv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev128hiv1d8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev256hiv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev512hiv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev1hfv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_scatter_storev2hfv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_scatter_storev4hfv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_scatter_storev8hfv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_scatter_storev16hfv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_scatter_storev32hfv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev64hfv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev128hfv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev256hfv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev512hfv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storev1bfv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storev2bfv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storev4bfv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storev8bfv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storev16bfv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_scatter_storev32bfv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev64bfv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev128bfv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev256bfv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev512bfv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_scatter_storervvm1qirvvm8di ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvmf2qirvvm4di ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvmf4qirvvm2di ((TARGET_VECTOR) && (TARGET_64BIT))
#define HAVE_mask_len_scatter_storervvmf8qirvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64 && TARGET_64BIT))
#define HAVE_mask_len_scatter_storev1qiv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_mask_len_scatter_storev2qiv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_mask_len_scatter_storev4qiv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_mask_len_scatter_storev8qiv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_mask_len_scatter_storev16qiv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_mask_len_scatter_storev32qiv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_scatter_storev64qiv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_scatter_storev128qiv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_scatter_storev256qiv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_scatter_storev512qiv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_mask_len_load_lanesrvvmf8x2qirvvmf8qi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvmf8x3qirvvmf8qi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvmf8x4qirvvmf8qi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvmf8x5qirvvmf8qi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvmf8x6qirvvmf8qi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvmf8x7qirvvmf8qi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvmf8x8qirvvmf8qi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvmf4x2hirvvmf4hi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvmf4x3hirvvmf4hi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvmf4x4hirvvmf4hi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvmf4x5hirvvmf4hi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvmf4x6hirvvmf4hi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvmf4x7hirvvmf4hi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvmf4x8hirvvmf4hi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvmf2x2sirvvmf2si ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvmf2x3sirvvmf2si ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvmf2x4sirvvmf2si ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvmf2x5sirvvmf2si ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvmf2x6sirvvmf2si ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvmf2x7sirvvmf2si ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvmf2x8sirvvmf2si ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvm1x2dirvvm1di ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvm1x3dirvvm1di ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvm1x4dirvvm1di ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvm1x5dirvvm1di ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvm1x6dirvvm1di ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvm1x7dirvvm1di ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvm1x8dirvvm1di ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvmf4x2bfrvvmf4bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvmf4x3bfrvvmf4bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvmf4x4bfrvvmf4bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvmf4x5bfrvvmf4bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvmf4x6bfrvvmf4bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvmf4x7bfrvvmf4bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvmf4x8bfrvvmf4bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvmf4x2hfrvvmf4hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvmf4x3hfrvvmf4hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvmf4x4hfrvvmf4hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvmf4x5hfrvvmf4hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvmf4x6hfrvvmf4hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvmf4x7hfrvvmf4hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvmf4x8hfrvvmf4hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvmf2x2sfrvvmf2sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_load_lanesrvvmf2x3sfrvvmf2sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_load_lanesrvvmf2x4sfrvvmf2sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_load_lanesrvvmf2x5sfrvvmf2sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_load_lanesrvvmf2x6sfrvvmf2sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_load_lanesrvvmf2x7sfrvvmf2sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_load_lanesrvvmf2x8sfrvvmf2sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_load_lanesrvvm1x2dfrvvm1df ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_mask_len_load_lanesrvvm1x3dfrvvm1df ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_mask_len_load_lanesrvvm1x4dfrvvm1df ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_mask_len_load_lanesrvvm1x5dfrvvm1df ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_mask_len_load_lanesrvvm1x6dfrvvm1df ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_mask_len_load_lanesrvvm1x7dfrvvm1df ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_mask_len_load_lanesrvvm1x8dfrvvm1df ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_mask_len_load_lanesrvvmf4x2qirvvmf4qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvmf4x3qirvvmf4qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvmf4x4qirvvmf4qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvmf4x5qirvvmf4qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvmf4x6qirvvmf4qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvmf4x7qirvvmf4qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvmf4x8qirvvmf4qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvmf2x2hirvvmf2hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvmf2x3hirvvmf2hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvmf2x4hirvvmf2hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvmf2x5hirvvmf2hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvmf2x6hirvvmf2hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvmf2x7hirvvmf2hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvmf2x8hirvvmf2hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm1x2sirvvm1si (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm1x3sirvvm1si (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm1x4sirvvm1si (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm1x5sirvvm1si (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm1x6sirvvm1si (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm1x7sirvvm1si (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm1x8sirvvm1si (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm2x2dirvvm2di ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvm2x3dirvvm2di ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvm2x4dirvvm2di ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvmf2x2bfrvvmf2bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvmf2x3bfrvvmf2bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvmf2x4bfrvvmf2bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvmf2x5bfrvvmf2bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvmf2x6bfrvvmf2bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvmf2x7bfrvvmf2bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvmf2x8bfrvvmf2bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvmf2x2hfrvvmf2hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvmf2x3hfrvvmf2hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvmf2x4hfrvvmf2hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvmf2x5hfrvvmf2hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvmf2x6hfrvvmf2hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvmf2x7hfrvvmf2hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvmf2x8hfrvvmf2hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvm1x2sfrvvm1sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_load_lanesrvvm1x3sfrvvm1sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_load_lanesrvvm1x4sfrvvm1sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_load_lanesrvvm1x5sfrvvm1sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_load_lanesrvvm1x6sfrvvm1sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_load_lanesrvvm1x7sfrvvm1sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_load_lanesrvvm1x8sfrvvm1sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_load_lanesrvvm2x2dfrvvm2df ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_mask_len_load_lanesrvvm2x3dfrvvm2df ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_mask_len_load_lanesrvvm2x4dfrvvm2df ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_mask_len_load_lanesrvvmf2x2qirvvmf2qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvmf2x3qirvvmf2qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvmf2x4qirvvmf2qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvmf2x5qirvvmf2qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvmf2x6qirvvmf2qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvmf2x7qirvvmf2qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvmf2x8qirvvmf2qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm1x2hirvvm1hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm1x3hirvvm1hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm1x4hirvvm1hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm1x5hirvvm1hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm1x6hirvvm1hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm1x7hirvvm1hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm1x8hirvvm1hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm2x2sirvvm2si (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm2x3sirvvm2si (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm2x4sirvvm2si (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm4x2dirvvm4di ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_load_lanesrvvm1x2bfrvvm1bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvm1x3bfrvvm1bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvm1x4bfrvvm1bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvm1x5bfrvvm1bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvm1x6bfrvvm1bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvm1x7bfrvvm1bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvm1x8bfrvvm1bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvm1x2hfrvvm1hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvm1x3hfrvvm1hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvm1x4hfrvvm1hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvm1x5hfrvvm1hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvm1x6hfrvvm1hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvm1x7hfrvvm1hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvm1x8hfrvvm1hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvm2x2sfrvvm2sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_load_lanesrvvm2x3sfrvvm2sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_load_lanesrvvm2x4sfrvvm2sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_load_lanesrvvm4x2dfrvvm4df ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_mask_len_load_lanesrvvm1x2qirvvm1qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm1x3qirvvm1qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm1x4qirvvm1qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm1x5qirvvm1qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm1x6qirvvm1qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm1x7qirvvm1qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm1x8qirvvm1qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm2x2hirvvm2hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm2x3hirvvm2hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm2x4hirvvm2hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm4x2sirvvm4si (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm2x2bfrvvm2bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvm2x3bfrvvm2bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvm2x4bfrvvm2bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvm2x2hfrvvm2hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvm2x3hfrvvm2hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvm2x4hfrvvm2hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvm4x2sfrvvm4sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_load_lanesrvvm2x2qirvvm2qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm2x3qirvvm2qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm2x4qirvvm2qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm4x2hirvvm4hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_load_lanesrvvm4x2bfrvvm4bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_load_lanesrvvm4x2hfrvvm4hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_load_lanesrvvm4x2qirvvm4qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvmf8x2qirvvmf8qi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvmf8x3qirvvmf8qi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvmf8x4qirvvmf8qi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvmf8x5qirvvmf8qi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvmf8x6qirvvmf8qi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvmf8x7qirvvmf8qi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvmf8x8qirvvmf8qi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvmf4x2hirvvmf4hi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvmf4x3hirvvmf4hi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvmf4x4hirvvmf4hi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvmf4x5hirvvmf4hi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvmf4x6hirvvmf4hi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvmf4x7hirvvmf4hi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvmf4x8hirvvmf4hi ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvmf2x2sirvvmf2si ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvmf2x3sirvvmf2si ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvmf2x4sirvvmf2si ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvmf2x5sirvvmf2si ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvmf2x6sirvvmf2si ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvmf2x7sirvvmf2si ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvmf2x8sirvvmf2si ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvm1x2dirvvm1di ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvm1x3dirvvm1di ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvm1x4dirvvm1di ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvm1x5dirvvm1di ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvm1x6dirvvm1di ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvm1x7dirvvm1di ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvm1x8dirvvm1di ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvmf4x2bfrvvmf4bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvmf4x3bfrvvmf4bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvmf4x4bfrvvmf4bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvmf4x5bfrvvmf4bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvmf4x6bfrvvmf4bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvmf4x7bfrvvmf4bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvmf4x8bfrvvmf4bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvmf4x2hfrvvmf4hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvmf4x3hfrvvmf4hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvmf4x4hfrvvmf4hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvmf4x5hfrvvmf4hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvmf4x6hfrvvmf4hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvmf4x7hfrvvmf4hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvmf4x8hfrvvmf4hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvmf2x2sfrvvmf2sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_store_lanesrvvmf2x3sfrvvmf2sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_store_lanesrvvmf2x4sfrvvmf2sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_store_lanesrvvmf2x5sfrvvmf2sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_store_lanesrvvmf2x6sfrvvmf2sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_store_lanesrvvmf2x7sfrvvmf2sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_store_lanesrvvmf2x8sfrvvmf2sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64 && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_store_lanesrvvm1x2dfrvvm1df ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_mask_len_store_lanesrvvm1x3dfrvvm1df ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_mask_len_store_lanesrvvm1x4dfrvvm1df ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_mask_len_store_lanesrvvm1x5dfrvvm1df ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_mask_len_store_lanesrvvm1x6dfrvvm1df ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_mask_len_store_lanesrvvm1x7dfrvvm1df ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_mask_len_store_lanesrvvm1x8dfrvvm1df ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_mask_len_store_lanesrvvmf4x2qirvvmf4qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvmf4x3qirvvmf4qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvmf4x4qirvvmf4qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvmf4x5qirvvmf4qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvmf4x6qirvvmf4qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvmf4x7qirvvmf4qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvmf4x8qirvvmf4qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvmf2x2hirvvmf2hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvmf2x3hirvvmf2hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvmf2x4hirvvmf2hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvmf2x5hirvvmf2hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvmf2x6hirvvmf2hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvmf2x7hirvvmf2hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvmf2x8hirvvmf2hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm1x2sirvvm1si (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm1x3sirvvm1si (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm1x4sirvvm1si (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm1x5sirvvm1si (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm1x6sirvvm1si (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm1x7sirvvm1si (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm1x8sirvvm1si (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm2x2dirvvm2di ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvm2x3dirvvm2di ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvm2x4dirvvm2di ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvmf2x2bfrvvmf2bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvmf2x3bfrvvmf2bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvmf2x4bfrvvmf2bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvmf2x5bfrvvmf2bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvmf2x6bfrvvmf2bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvmf2x7bfrvvmf2bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvmf2x8bfrvvmf2bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvmf2x2hfrvvmf2hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvmf2x3hfrvvmf2hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvmf2x4hfrvvmf2hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvmf2x5hfrvvmf2hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvmf2x6hfrvvmf2hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvmf2x7hfrvvmf2hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvmf2x8hfrvvmf2hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvm1x2sfrvvm1sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_store_lanesrvvm1x3sfrvvm1sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_store_lanesrvvm1x4sfrvvm1sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_store_lanesrvvm1x5sfrvvm1sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_store_lanesrvvm1x6sfrvvm1sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_store_lanesrvvm1x7sfrvvm1sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_store_lanesrvvm1x8sfrvvm1sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_store_lanesrvvm2x2dfrvvm2df ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_mask_len_store_lanesrvvm2x3dfrvvm2df ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_mask_len_store_lanesrvvm2x4dfrvvm2df ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_mask_len_store_lanesrvvmf2x2qirvvmf2qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvmf2x3qirvvmf2qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvmf2x4qirvvmf2qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvmf2x5qirvvmf2qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvmf2x6qirvvmf2qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvmf2x7qirvvmf2qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvmf2x8qirvvmf2qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm1x2hirvvm1hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm1x3hirvvm1hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm1x4hirvvm1hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm1x5hirvvm1hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm1x6hirvvm1hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm1x7hirvvm1hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm1x8hirvvm1hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm2x2sirvvm2si (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm2x3sirvvm2si (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm2x4sirvvm2si (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm4x2dirvvm4di ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_mask_len_store_lanesrvvm1x2bfrvvm1bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvm1x3bfrvvm1bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvm1x4bfrvvm1bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvm1x5bfrvvm1bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvm1x6bfrvvm1bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvm1x7bfrvvm1bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvm1x8bfrvvm1bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvm1x2hfrvvm1hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvm1x3hfrvvm1hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvm1x4hfrvvm1hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvm1x5hfrvvm1hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvm1x6hfrvvm1hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvm1x7hfrvvm1hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvm1x8hfrvvm1hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvm2x2sfrvvm2sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_store_lanesrvvm2x3sfrvvm2sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_store_lanesrvvm2x4sfrvvm2sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_store_lanesrvvm4x2dfrvvm4df ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_mask_len_store_lanesrvvm1x2qirvvm1qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm1x3qirvvm1qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm1x4qirvvm1qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm1x5qirvvm1qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm1x6qirvvm1qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm1x7qirvvm1qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm1x8qirvvm1qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm2x2hirvvm2hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm2x3hirvvm2hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm2x4hirvvm2hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm4x2sirvvm4si (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm2x2bfrvvm2bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvm2x3bfrvvm2bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvm2x4bfrvvm2bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvm2x2hfrvvm2hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvm2x3hfrvvm2hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvm2x4hfrvvm2hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvm4x2sfrvvm4sf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_mask_len_store_lanesrvvm2x2qirvvm2qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm2x3qirvvm2qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm2x4qirvvm2qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm4x2hirvvm4hi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_mask_len_store_lanesrvvm4x2bfrvvm4bf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_mask_len_store_lanesrvvm4x2hfrvvm4hf ((TARGET_VECTOR_AUTOVEC_SEGMENT) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_mask_len_store_lanesrvvm4x2qirvvm4qi (TARGET_VECTOR_AUTOVEC_SEGMENT)
#define HAVE_vec_duplicatervvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_duplicatervvmf32bi (TARGET_VECTOR)
#define HAVE_vec_duplicatervvmf16bi (TARGET_VECTOR)
#define HAVE_vec_duplicatervvmf8bi (TARGET_VECTOR)
#define HAVE_vec_duplicatervvmf4bi (TARGET_VECTOR)
#define HAVE_vec_duplicatervvmf2bi (TARGET_VECTOR)
#define HAVE_vec_duplicatervvm1bi (TARGET_VECTOR)
#define HAVE_vec_seriesrvvm8qi (TARGET_VECTOR)
#define HAVE_vec_seriesrvvm4qi (TARGET_VECTOR)
#define HAVE_vec_seriesrvvm2qi (TARGET_VECTOR)
#define HAVE_vec_seriesrvvm1qi (TARGET_VECTOR)
#define HAVE_vec_seriesrvvm8hi (TARGET_VECTOR)
#define HAVE_vec_seriesrvvm4hi (TARGET_VECTOR)
#define HAVE_vec_seriesrvvm2hi (TARGET_VECTOR)
#define HAVE_vec_seriesrvvm1hi (TARGET_VECTOR)
#define HAVE_vec_seriesrvvm8si (TARGET_VECTOR)
#define HAVE_vec_seriesrvvm4si (TARGET_VECTOR)
#define HAVE_vec_seriesrvvm2si (TARGET_VECTOR)
#define HAVE_vec_seriesrvvm1si (TARGET_VECTOR)
#define HAVE_vec_seriesrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_seriesrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_seriesrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_seriesrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_seriesrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_seriesrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_seriesrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_seriesrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_seriesrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_seriesrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_seriesv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_vec_seriesv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_vec_seriesv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_vec_seriesv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_vec_seriesv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_vec_seriesv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_vec_seriesv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_seriesv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_seriesv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_seriesv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_seriesv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_seriesv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_seriesv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_seriesv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_vec_seriesv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_vec_seriesv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_vec_seriesv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_vec_seriesv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_vec_seriesv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_seriesv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_seriesv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_seriesv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_seriesv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_seriesv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_seriesv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_seriesv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_vec_seriesv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_vec_seriesv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_vec_seriesv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_vec_seriesv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_seriesv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_seriesv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_seriesv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_seriesv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_seriesv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_seriesv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_seriesv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_seriesv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_seriesv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_seriesv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_seriesv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_seriesv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_seriesv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_seriesv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_seriesv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_seriesv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_permrvvm8qi (TARGET_VECTOR && GET_MODE_NUNITS (RVVM8QImode).is_constant ())
#define HAVE_vec_permrvvm4qi (TARGET_VECTOR && GET_MODE_NUNITS (RVVM4QImode).is_constant ())
#define HAVE_vec_permrvvm2qi (TARGET_VECTOR && GET_MODE_NUNITS (RVVM2QImode).is_constant ())
#define HAVE_vec_permrvvm1qi (TARGET_VECTOR && GET_MODE_NUNITS (RVVM1QImode).is_constant ())
#define HAVE_vec_permrvvm8hi (TARGET_VECTOR && GET_MODE_NUNITS (RVVM8HImode).is_constant ())
#define HAVE_vec_permrvvm4hi (TARGET_VECTOR && GET_MODE_NUNITS (RVVM4HImode).is_constant ())
#define HAVE_vec_permrvvm2hi (TARGET_VECTOR && GET_MODE_NUNITS (RVVM2HImode).is_constant ())
#define HAVE_vec_permrvvm1hi (TARGET_VECTOR && GET_MODE_NUNITS (RVVM1HImode).is_constant ())
#define HAVE_vec_permrvvm8si (TARGET_VECTOR && GET_MODE_NUNITS (RVVM8SImode).is_constant ())
#define HAVE_vec_permrvvm4si (TARGET_VECTOR && GET_MODE_NUNITS (RVVM4SImode).is_constant ())
#define HAVE_vec_permrvvm2si (TARGET_VECTOR && GET_MODE_NUNITS (RVVM2SImode).is_constant ())
#define HAVE_vec_permrvvm1si (TARGET_VECTOR && GET_MODE_NUNITS (RVVM1SImode).is_constant ())
#define HAVE_vec_permrvvm8di ((TARGET_VECTOR && GET_MODE_NUNITS (RVVM8DImode).is_constant ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_permrvvm4di ((TARGET_VECTOR && GET_MODE_NUNITS (RVVM4DImode).is_constant ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_permrvvm2di ((TARGET_VECTOR && GET_MODE_NUNITS (RVVM2DImode).is_constant ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_permrvvm1di ((TARGET_VECTOR && GET_MODE_NUNITS (RVVM1DImode).is_constant ()) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_permrvvmf2qi ((TARGET_VECTOR && GET_MODE_NUNITS (RVVMF2QImode).is_constant ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_permrvvmf4qi ((TARGET_VECTOR && GET_MODE_NUNITS (RVVMF4QImode).is_constant ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_permrvvmf8qi ((TARGET_VECTOR && GET_MODE_NUNITS (RVVMF8QImode).is_constant ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_permrvvmf2hi ((TARGET_VECTOR && GET_MODE_NUNITS (RVVMF2HImode).is_constant ()) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_permrvvmf4hi ((TARGET_VECTOR && GET_MODE_NUNITS (RVVMF4HImode).is_constant ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_permrvvmf2si ((TARGET_VECTOR && GET_MODE_NUNITS (RVVMF2SImode).is_constant ()) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_permrvvm8hf ((TARGET_VECTOR && GET_MODE_NUNITS (RVVM8HFmode).is_constant ()) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_permrvvm4hf ((TARGET_VECTOR && GET_MODE_NUNITS (RVVM4HFmode).is_constant ()) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_permrvvm2hf ((TARGET_VECTOR && GET_MODE_NUNITS (RVVM2HFmode).is_constant ()) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_permrvvm1hf ((TARGET_VECTOR && GET_MODE_NUNITS (RVVM1HFmode).is_constant ()) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_permrvvmf2hf ((TARGET_VECTOR && GET_MODE_NUNITS (RVVMF2HFmode).is_constant ()) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_permrvvmf4hf ((TARGET_VECTOR && GET_MODE_NUNITS (RVVMF4HFmode).is_constant ()) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_permrvvm8sf ((TARGET_VECTOR && GET_MODE_NUNITS (RVVM8SFmode).is_constant ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_permrvvm4sf ((TARGET_VECTOR && GET_MODE_NUNITS (RVVM4SFmode).is_constant ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_permrvvm2sf ((TARGET_VECTOR && GET_MODE_NUNITS (RVVM2SFmode).is_constant ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_permrvvm1sf ((TARGET_VECTOR && GET_MODE_NUNITS (RVVM1SFmode).is_constant ()) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_permrvvmf2sf ((TARGET_VECTOR && GET_MODE_NUNITS (RVVMF2SFmode).is_constant ()) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_permrvvm8df ((TARGET_VECTOR && GET_MODE_NUNITS (RVVM8DFmode).is_constant ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_permrvvm4df ((TARGET_VECTOR && GET_MODE_NUNITS (RVVM4DFmode).is_constant ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_permrvvm2df ((TARGET_VECTOR && GET_MODE_NUNITS (RVVM2DFmode).is_constant ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_permrvvm1df ((TARGET_VECTOR && GET_MODE_NUNITS (RVVM1DFmode).is_constant ()) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_permrvvm8bf ((TARGET_VECTOR && GET_MODE_NUNITS (RVVM8BFmode).is_constant ()) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_permrvvm4bf ((TARGET_VECTOR && GET_MODE_NUNITS (RVVM4BFmode).is_constant ()) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_permrvvm2bf ((TARGET_VECTOR && GET_MODE_NUNITS (RVVM2BFmode).is_constant ()) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_permrvvm1bf ((TARGET_VECTOR && GET_MODE_NUNITS (RVVM1BFmode).is_constant ()) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_permrvvmf2bf ((TARGET_VECTOR && GET_MODE_NUNITS (RVVMF2BFmode).is_constant ()) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_permrvvmf4bf ((TARGET_VECTOR && GET_MODE_NUNITS (RVVMF4BFmode).is_constant ()) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_permv1qi ((TARGET_VECTOR && GET_MODE_NUNITS (V1QImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_vec_permv2qi ((TARGET_VECTOR && GET_MODE_NUNITS (V2QImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_vec_permv4qi ((TARGET_VECTOR && GET_MODE_NUNITS (V4QImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_vec_permv8qi ((TARGET_VECTOR && GET_MODE_NUNITS (V8QImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_vec_permv16qi ((TARGET_VECTOR && GET_MODE_NUNITS (V16QImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_vec_permv32qi ((TARGET_VECTOR && GET_MODE_NUNITS (V32QImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_vec_permv64qi ((TARGET_VECTOR && GET_MODE_NUNITS (V64QImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_permv128qi ((TARGET_VECTOR && GET_MODE_NUNITS (V128QImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_permv256qi ((TARGET_VECTOR && GET_MODE_NUNITS (V256QImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_permv512qi ((TARGET_VECTOR && GET_MODE_NUNITS (V512QImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_permv1024qi ((TARGET_VECTOR && GET_MODE_NUNITS (V1024QImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_permv2048qi ((TARGET_VECTOR && GET_MODE_NUNITS (V2048QImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_permv4096qi ((TARGET_VECTOR && GET_MODE_NUNITS (V4096QImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_permv1hi ((TARGET_VECTOR && GET_MODE_NUNITS (V1HImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_vec_permv2hi ((TARGET_VECTOR && GET_MODE_NUNITS (V2HImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_vec_permv4hi ((TARGET_VECTOR && GET_MODE_NUNITS (V4HImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_vec_permv8hi ((TARGET_VECTOR && GET_MODE_NUNITS (V8HImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_vec_permv16hi ((TARGET_VECTOR && GET_MODE_NUNITS (V16HImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_vec_permv32hi ((TARGET_VECTOR && GET_MODE_NUNITS (V32HImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_permv64hi ((TARGET_VECTOR && GET_MODE_NUNITS (V64HImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_permv128hi ((TARGET_VECTOR && GET_MODE_NUNITS (V128HImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_permv256hi ((TARGET_VECTOR && GET_MODE_NUNITS (V256HImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_permv512hi ((TARGET_VECTOR && GET_MODE_NUNITS (V512HImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_permv1024hi ((TARGET_VECTOR && GET_MODE_NUNITS (V1024HImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_permv2048hi ((TARGET_VECTOR && GET_MODE_NUNITS (V2048HImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_permv1si ((TARGET_VECTOR && GET_MODE_NUNITS (V1SImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_vec_permv2si ((TARGET_VECTOR && GET_MODE_NUNITS (V2SImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_vec_permv4si ((TARGET_VECTOR && GET_MODE_NUNITS (V4SImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_vec_permv8si ((TARGET_VECTOR && GET_MODE_NUNITS (V8SImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_vec_permv16si ((TARGET_VECTOR && GET_MODE_NUNITS (V16SImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_permv32si ((TARGET_VECTOR && GET_MODE_NUNITS (V32SImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_permv64si ((TARGET_VECTOR && GET_MODE_NUNITS (V64SImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_permv128si ((TARGET_VECTOR && GET_MODE_NUNITS (V128SImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_permv256si ((TARGET_VECTOR && GET_MODE_NUNITS (V256SImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_permv512si ((TARGET_VECTOR && GET_MODE_NUNITS (V512SImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_permv1024si ((TARGET_VECTOR && GET_MODE_NUNITS (V1024SImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_permv1di ((TARGET_VECTOR && GET_MODE_NUNITS (V1DImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_permv2di ((TARGET_VECTOR && GET_MODE_NUNITS (V2DImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_permv4di ((TARGET_VECTOR && GET_MODE_NUNITS (V4DImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_permv8di ((TARGET_VECTOR && GET_MODE_NUNITS (V8DImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_permv16di ((TARGET_VECTOR && GET_MODE_NUNITS (V16DImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_permv32di ((TARGET_VECTOR && GET_MODE_NUNITS (V32DImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_permv64di ((TARGET_VECTOR && GET_MODE_NUNITS (V64DImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_permv128di ((TARGET_VECTOR && GET_MODE_NUNITS (V128DImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_permv256di ((TARGET_VECTOR && GET_MODE_NUNITS (V256DImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_permv512di ((TARGET_VECTOR && GET_MODE_NUNITS (V512DImode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_permv1hf ((TARGET_VECTOR && GET_MODE_NUNITS (V1HFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_permv2hf ((TARGET_VECTOR && GET_MODE_NUNITS (V2HFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_permv4hf ((TARGET_VECTOR && GET_MODE_NUNITS (V4HFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_permv8hf ((TARGET_VECTOR && GET_MODE_NUNITS (V8HFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_permv16hf ((TARGET_VECTOR && GET_MODE_NUNITS (V16HFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vec_permv32hf ((TARGET_VECTOR && GET_MODE_NUNITS (V32HFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_permv64hf ((TARGET_VECTOR && GET_MODE_NUNITS (V64HFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_permv128hf ((TARGET_VECTOR && GET_MODE_NUNITS (V128HFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_permv256hf ((TARGET_VECTOR && GET_MODE_NUNITS (V256HFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_permv512hf ((TARGET_VECTOR && GET_MODE_NUNITS (V512HFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_permv1024hf ((TARGET_VECTOR && GET_MODE_NUNITS (V1024HFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_permv2048hf ((TARGET_VECTOR && GET_MODE_NUNITS (V2048HFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_permv1sf ((TARGET_VECTOR && GET_MODE_NUNITS (V1SFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_permv2sf ((TARGET_VECTOR && GET_MODE_NUNITS (V2SFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_permv4sf ((TARGET_VECTOR && GET_MODE_NUNITS (V4SFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_permv8sf ((TARGET_VECTOR && GET_MODE_NUNITS (V8SFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_permv16sf ((TARGET_VECTOR && GET_MODE_NUNITS (V16SFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_permv32sf ((TARGET_VECTOR && GET_MODE_NUNITS (V32SFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_permv64sf ((TARGET_VECTOR && GET_MODE_NUNITS (V64SFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_permv128sf ((TARGET_VECTOR && GET_MODE_NUNITS (V128SFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_permv256sf ((TARGET_VECTOR && GET_MODE_NUNITS (V256SFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_permv512sf ((TARGET_VECTOR && GET_MODE_NUNITS (V512SFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_permv1024sf ((TARGET_VECTOR && GET_MODE_NUNITS (V1024SFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_permv1df ((TARGET_VECTOR && GET_MODE_NUNITS (V1DFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_permv2df ((TARGET_VECTOR && GET_MODE_NUNITS (V2DFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_permv4df ((TARGET_VECTOR && GET_MODE_NUNITS (V4DFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_permv8df ((TARGET_VECTOR && GET_MODE_NUNITS (V8DFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_permv16df ((TARGET_VECTOR && GET_MODE_NUNITS (V16DFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_permv32df ((TARGET_VECTOR && GET_MODE_NUNITS (V32DFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_permv64df ((TARGET_VECTOR && GET_MODE_NUNITS (V64DFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_permv128df ((TARGET_VECTOR && GET_MODE_NUNITS (V128DFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_permv256df ((TARGET_VECTOR && GET_MODE_NUNITS (V256DFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_permv512df ((TARGET_VECTOR && GET_MODE_NUNITS (V512DFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_permv1bf ((TARGET_VECTOR && GET_MODE_NUNITS (V1BFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_permv2bf ((TARGET_VECTOR && GET_MODE_NUNITS (V2BFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_permv4bf ((TARGET_VECTOR && GET_MODE_NUNITS (V4BFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_permv8bf ((TARGET_VECTOR && GET_MODE_NUNITS (V8BFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_permv16bf ((TARGET_VECTOR && GET_MODE_NUNITS (V16BFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vec_permv32bf ((TARGET_VECTOR && GET_MODE_NUNITS (V32BFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_permv64bf ((TARGET_VECTOR && GET_MODE_NUNITS (V64BFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_permv128bf ((TARGET_VECTOR && GET_MODE_NUNITS (V128BFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_permv256bf ((TARGET_VECTOR && GET_MODE_NUNITS (V256BFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_permv512bf ((TARGET_VECTOR && GET_MODE_NUNITS (V512BFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_permv1024bf ((TARGET_VECTOR && GET_MODE_NUNITS (V1024BFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_permv2048bf ((TARGET_VECTOR && GET_MODE_NUNITS (V2048BFmode).is_constant ()) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_initrvvm8qiqi (TARGET_VECTOR)
#define HAVE_vec_initrvvm4qiqi (TARGET_VECTOR)
#define HAVE_vec_initrvvm2qiqi (TARGET_VECTOR)
#define HAVE_vec_initrvvm1qiqi (TARGET_VECTOR)
#define HAVE_vec_initrvvm8hihi (TARGET_VECTOR)
#define HAVE_vec_initrvvm4hihi (TARGET_VECTOR)
#define HAVE_vec_initrvvm2hihi (TARGET_VECTOR)
#define HAVE_vec_initrvvm1hihi (TARGET_VECTOR)
#define HAVE_vec_initrvvm8sisi (TARGET_VECTOR)
#define HAVE_vec_initrvvm4sisi (TARGET_VECTOR)
#define HAVE_vec_initrvvm2sisi (TARGET_VECTOR)
#define HAVE_vec_initrvvm1sisi (TARGET_VECTOR)
#define HAVE_vec_initrvvm8didi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_initrvvm4didi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_initrvvm2didi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_initrvvm1didi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_initrvvmf2qiqi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_initrvvmf4qiqi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_initrvvmf8qiqi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_initrvvmf2hihi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_initrvvmf4hihi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_initrvvmf2sisi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_initv1qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_vec_initv2qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_vec_initv4qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_vec_initv8qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_vec_initv16qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_vec_initv32qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_vec_initv64qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_initv128qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_initv256qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_initv512qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_initv1024qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_initv2048qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_initv4096qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_initv1hihi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_vec_initv2hihi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_vec_initv4hihi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_vec_initv8hihi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_vec_initv16hihi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_vec_initv32hihi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_initv64hihi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_initv128hihi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_initv256hihi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_initv512hihi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_initv1024hihi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_initv2048hihi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_initv1sisi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_vec_initv2sisi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_vec_initv4sisi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_vec_initv8sisi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_vec_initv16sisi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_initv32sisi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_initv64sisi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_initv128sisi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_initv256sisi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_initv512sisi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_initv1024sisi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_initv1didi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_initv2didi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_initv4didi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_initv8didi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_initv16didi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_initv32didi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_initv64didi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_initv128didi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_initv256didi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_initv512didi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_initrvvm8hfhf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_initrvvm4hfhf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_initrvvm2hfhf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_initrvvm1hfhf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_initrvvmf2hfhf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_initrvvmf4hfhf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_initrvvm8sfsf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_initrvvm4sfsf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_initrvvm2sfsf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_initrvvm1sfsf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_initrvvmf2sfsf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_initrvvm8dfdf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_initrvvm4dfdf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_initrvvm2dfdf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_initrvvm1dfdf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_initv1hfhf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_vec_initv2hfhf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_vec_initv4hfhf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_vec_initv8hfhf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_vec_initv16hfhf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_vec_initv32hfhf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_initv64hfhf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_initv128hfhf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_initv256hfhf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_initv512hfhf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_initv1024hfhf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_initv2048hfhf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_initv1sfsf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_initv2sfsf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_initv4sfsf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_initv8sfsf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_initv16sfsf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_initv32sfsf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_initv64sfsf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_initv128sfsf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_initv256sfsf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_initv512sfsf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_initv1024sfsf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_initv1dfdf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_initv2dfdf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_initv4dfdf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_initv8dfdf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_initv16dfdf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_initv32dfdf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_initv64dfdf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_initv128dfdf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_initv256dfdf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_initv512dfdf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_initrvvmf64biqi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_initrvvmf32biqi (TARGET_VECTOR)
#define HAVE_vec_initrvvmf16biqi (TARGET_VECTOR)
#define HAVE_vec_initrvvmf8biqi (TARGET_VECTOR)
#define HAVE_vec_initrvvmf4biqi (TARGET_VECTOR)
#define HAVE_vec_initrvvmf2biqi (TARGET_VECTOR)
#define HAVE_vec_initrvvm1biqi (TARGET_VECTOR)
#define HAVE_vec_shl_insert_rvvm8qi (TARGET_VECTOR)
#define HAVE_vec_shl_insert_rvvm4qi (TARGET_VECTOR)
#define HAVE_vec_shl_insert_rvvm2qi (TARGET_VECTOR)
#define HAVE_vec_shl_insert_rvvm1qi (TARGET_VECTOR)
#define HAVE_vec_shl_insert_rvvm8hi (TARGET_VECTOR)
#define HAVE_vec_shl_insert_rvvm4hi (TARGET_VECTOR)
#define HAVE_vec_shl_insert_rvvm2hi (TARGET_VECTOR)
#define HAVE_vec_shl_insert_rvvm1hi (TARGET_VECTOR)
#define HAVE_vec_shl_insert_rvvm8si (TARGET_VECTOR)
#define HAVE_vec_shl_insert_rvvm4si (TARGET_VECTOR)
#define HAVE_vec_shl_insert_rvvm2si (TARGET_VECTOR)
#define HAVE_vec_shl_insert_rvvm1si (TARGET_VECTOR)
#define HAVE_vec_shl_insert_rvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_shl_insert_rvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_shl_insert_rvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_shl_insert_rvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_shl_insert_rvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_shl_insert_rvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_shl_insert_rvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_shl_insert_rvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_shl_insert_rvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_shl_insert_rvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_shl_insert_v1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_vec_shl_insert_v2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_vec_shl_insert_v4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_vec_shl_insert_v8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_vec_shl_insert_v16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_vec_shl_insert_v32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_vec_shl_insert_v64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_shl_insert_v128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_shl_insert_v256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_shl_insert_v512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_shl_insert_v1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_shl_insert_v2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_shl_insert_v4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_shl_insert_v1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_vec_shl_insert_v2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_vec_shl_insert_v4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_vec_shl_insert_v8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_vec_shl_insert_v16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_vec_shl_insert_v32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_shl_insert_v64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_shl_insert_v128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_shl_insert_v256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_shl_insert_v512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_shl_insert_v1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_shl_insert_v2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_shl_insert_v1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_vec_shl_insert_v2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_vec_shl_insert_v4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_vec_shl_insert_v8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_vec_shl_insert_v16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_shl_insert_v32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_shl_insert_v64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_shl_insert_v128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_shl_insert_v256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_shl_insert_v512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_shl_insert_v1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_shl_insert_v1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_shl_insert_v2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_shl_insert_v4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_shl_insert_v8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_shl_insert_v16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_shl_insert_v32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_shl_insert_v64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_shl_insert_v128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_shl_insert_v256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_shl_insert_v512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_shl_insert_rvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_shl_insert_rvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_shl_insert_rvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_shl_insert_rvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_shl_insert_rvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_shl_insert_rvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_shl_insert_rvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_shl_insert_rvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_shl_insert_rvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_shl_insert_rvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_shl_insert_rvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_shl_insert_rvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_shl_insert_rvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_shl_insert_rvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_shl_insert_rvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_shl_insert_v1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_vec_shl_insert_v2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_vec_shl_insert_v4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_vec_shl_insert_v8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_vec_shl_insert_v16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_vec_shl_insert_v32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_shl_insert_v64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_shl_insert_v128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_shl_insert_v256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_shl_insert_v512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_shl_insert_v1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_shl_insert_v2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_shl_insert_v1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_shl_insert_v2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_shl_insert_v4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_shl_insert_v8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_shl_insert_v16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_shl_insert_v32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_shl_insert_v64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_shl_insert_v128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_shl_insert_v256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_shl_insert_v512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_shl_insert_v1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_shl_insert_v1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_shl_insert_v2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_shl_insert_v4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_shl_insert_v8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_shl_insert_v16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_shl_insert_v32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_shl_insert_v64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_shl_insert_v128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_shl_insert_v256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_shl_insert_v512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vcond_mask_len_rvvm8qi (TARGET_VECTOR)
#define HAVE_vcond_mask_len_rvvm4qi (TARGET_VECTOR)
#define HAVE_vcond_mask_len_rvvm2qi (TARGET_VECTOR)
#define HAVE_vcond_mask_len_rvvm1qi (TARGET_VECTOR)
#define HAVE_vcond_mask_len_rvvm8hi (TARGET_VECTOR)
#define HAVE_vcond_mask_len_rvvm4hi (TARGET_VECTOR)
#define HAVE_vcond_mask_len_rvvm2hi (TARGET_VECTOR)
#define HAVE_vcond_mask_len_rvvm1hi (TARGET_VECTOR)
#define HAVE_vcond_mask_len_rvvm8si (TARGET_VECTOR)
#define HAVE_vcond_mask_len_rvvm4si (TARGET_VECTOR)
#define HAVE_vcond_mask_len_rvvm2si (TARGET_VECTOR)
#define HAVE_vcond_mask_len_rvvm1si (TARGET_VECTOR)
#define HAVE_vcond_mask_len_rvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vcond_mask_len_rvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vcond_mask_len_rvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vcond_mask_len_rvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vcond_mask_len_rvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vcond_mask_len_rvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vcond_mask_len_rvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vcond_mask_len_rvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vcond_mask_len_rvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vcond_mask_len_rvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vcond_mask_len_rvvm8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vcond_mask_len_rvvm4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vcond_mask_len_rvvm2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vcond_mask_len_rvvm1hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vcond_mask_len_rvvmf2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vcond_mask_len_rvvmf4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_vcond_mask_len_rvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vcond_mask_len_rvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vcond_mask_len_rvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vcond_mask_len_rvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vcond_mask_len_rvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_vcond_mask_len_rvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vcond_mask_len_rvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vcond_mask_len_rvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vcond_mask_len_rvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vcond_mask_len_rvvm8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vcond_mask_len_rvvm4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vcond_mask_len_rvvm2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vcond_mask_len_rvvm1bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vcond_mask_len_rvvmf2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vcond_mask_len_rvvmf4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_vcond_mask_len_v1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_vcond_mask_len_v2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_vcond_mask_len_v4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_vcond_mask_len_v8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_vcond_mask_len_v16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_vcond_mask_len_v32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_vcond_mask_len_v64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vcond_mask_len_v128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vcond_mask_len_v256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vcond_mask_len_v512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vcond_mask_len_v1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vcond_mask_len_v2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vcond_mask_len_v4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vcond_mask_len_v1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_vcond_mask_len_v2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_vcond_mask_len_v4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_vcond_mask_len_v8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_vcond_mask_len_v16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_vcond_mask_len_v32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vcond_mask_len_v64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vcond_mask_len_v128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vcond_mask_len_v256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vcond_mask_len_v512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vcond_mask_len_v1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vcond_mask_len_v2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vcond_mask_len_v1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_vcond_mask_len_v2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_vcond_mask_len_v4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_vcond_mask_len_v8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_vcond_mask_len_v16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vcond_mask_len_v32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vcond_mask_len_v64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vcond_mask_len_v128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vcond_mask_len_v256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vcond_mask_len_v512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vcond_mask_len_v1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vcond_mask_len_v1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vcond_mask_len_v2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vcond_mask_len_v4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vcond_mask_len_v8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vcond_mask_len_v16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vcond_mask_len_v32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vcond_mask_len_v64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vcond_mask_len_v128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vcond_mask_len_v256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vcond_mask_len_v512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vcond_mask_len_v1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vcond_mask_len_v2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vcond_mask_len_v4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vcond_mask_len_v8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vcond_mask_len_v16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_vcond_mask_len_v32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_vcond_mask_len_v64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_vcond_mask_len_v128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_vcond_mask_len_v256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_vcond_mask_len_v512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vcond_mask_len_v1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vcond_mask_len_v2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vcond_mask_len_v1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vcond_mask_len_v2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vcond_mask_len_v4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vcond_mask_len_v8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vcond_mask_len_v16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_vcond_mask_len_v32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_vcond_mask_len_v64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_vcond_mask_len_v128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_vcond_mask_len_v256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vcond_mask_len_v512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vcond_mask_len_v1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vcond_mask_len_v1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vcond_mask_len_v2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vcond_mask_len_v4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vcond_mask_len_v8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vcond_mask_len_v16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vcond_mask_len_v32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vcond_mask_len_v64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vcond_mask_len_v128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vcond_mask_len_v256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vcond_mask_len_v512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vcond_mask_len_v1bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vcond_mask_len_v2bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vcond_mask_len_v4bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vcond_mask_len_v8bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vcond_mask_len_v16bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_vcond_mask_len_v32bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_vcond_mask_len_v64bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_vcond_mask_len_v128bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_vcond_mask_len_v256bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_vcond_mask_len_v512bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vcond_mask_len_v1024bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vcond_mask_len_v2048bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vcond_mask_rvvmf64birvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vcond_mask_rvvmf32birvvmf32bi (TARGET_VECTOR)
#define HAVE_vcond_mask_rvvmf16birvvmf16bi (TARGET_VECTOR)
#define HAVE_vcond_mask_rvvmf8birvvmf8bi (TARGET_VECTOR)
#define HAVE_vcond_mask_rvvmf4birvvmf4bi (TARGET_VECTOR)
#define HAVE_vcond_mask_rvvmf2birvvmf2bi (TARGET_VECTOR)
#define HAVE_vcond_mask_rvvm1birvvm1bi (TARGET_VECTOR)
#define HAVE_vcond_mask_v1biv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_vcond_mask_v2biv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_vcond_mask_v4biv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_vcond_mask_v8biv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_vcond_mask_v16biv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_vcond_mask_v32biv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_vcond_mask_v64biv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vcond_mask_v128biv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vcond_mask_v256biv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vcond_mask_v512biv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vcond_mask_v1024biv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vcond_mask_v2048biv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vcond_mask_v4096biv4096bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_cmprvvm8qirvvm1bi (TARGET_VECTOR)
#define HAVE_vec_cmprvvm4qirvvmf2bi (TARGET_VECTOR)
#define HAVE_vec_cmprvvm2qirvvmf4bi (TARGET_VECTOR)
#define HAVE_vec_cmprvvm1qirvvmf8bi (TARGET_VECTOR)
#define HAVE_vec_cmprvvm8hirvvmf2bi (TARGET_VECTOR)
#define HAVE_vec_cmprvvm4hirvvmf4bi (TARGET_VECTOR)
#define HAVE_vec_cmprvvm2hirvvmf8bi (TARGET_VECTOR)
#define HAVE_vec_cmprvvm1hirvvmf16bi (TARGET_VECTOR)
#define HAVE_vec_cmprvvm8sirvvmf4bi (TARGET_VECTOR)
#define HAVE_vec_cmprvvm4sirvvmf8bi (TARGET_VECTOR)
#define HAVE_vec_cmprvvm2sirvvmf16bi (TARGET_VECTOR)
#define HAVE_vec_cmprvvm1sirvvmf32bi (TARGET_VECTOR)
#define HAVE_vec_cmprvvm8dirvvmf8bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_cmprvvm4dirvvmf16bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_cmprvvm2dirvvmf32bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_cmprvvm1dirvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_cmprvvmf2qirvvmf16bi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_cmprvvmf4qirvvmf32bi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_cmprvvmf8qirvvmf64bi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_cmprvvmf2hirvvmf32bi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_cmprvvmf4hirvvmf64bi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_cmprvvmf2sirvvmf64bi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_cmpv1qiv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_vec_cmpv2qiv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_vec_cmpv4qiv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_vec_cmpv8qiv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_vec_cmpv16qiv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_vec_cmpv32qiv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_vec_cmpv64qiv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_cmpv128qiv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_cmpv256qiv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_cmpv512qiv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_cmpv1024qiv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_cmpv2048qiv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_cmpv4096qiv4096bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_cmpv1hiv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_vec_cmpv2hiv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_vec_cmpv4hiv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_vec_cmpv8hiv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_vec_cmpv16hiv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_vec_cmpv32hiv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_cmpv64hiv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_cmpv128hiv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_cmpv256hiv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_cmpv512hiv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_cmpv1024hiv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_cmpv2048hiv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_cmpv1siv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_vec_cmpv2siv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_vec_cmpv4siv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_vec_cmpv8siv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_vec_cmpv16siv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_cmpv32siv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_cmpv64siv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_cmpv128siv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_cmpv256siv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_cmpv512siv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_cmpv1024siv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_cmpv1div1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_cmpv2div2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_cmpv4div4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_cmpv8div8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_cmpv16div16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_cmpv32div32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_cmpv64div64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_cmpv128div128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_cmpv256div256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_cmpv512div512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_cmpurvvm8qirvvm1bi (TARGET_VECTOR)
#define HAVE_vec_cmpurvvm4qirvvmf2bi (TARGET_VECTOR)
#define HAVE_vec_cmpurvvm2qirvvmf4bi (TARGET_VECTOR)
#define HAVE_vec_cmpurvvm1qirvvmf8bi (TARGET_VECTOR)
#define HAVE_vec_cmpurvvm8hirvvmf2bi (TARGET_VECTOR)
#define HAVE_vec_cmpurvvm4hirvvmf4bi (TARGET_VECTOR)
#define HAVE_vec_cmpurvvm2hirvvmf8bi (TARGET_VECTOR)
#define HAVE_vec_cmpurvvm1hirvvmf16bi (TARGET_VECTOR)
#define HAVE_vec_cmpurvvm8sirvvmf4bi (TARGET_VECTOR)
#define HAVE_vec_cmpurvvm4sirvvmf8bi (TARGET_VECTOR)
#define HAVE_vec_cmpurvvm2sirvvmf16bi (TARGET_VECTOR)
#define HAVE_vec_cmpurvvm1sirvvmf32bi (TARGET_VECTOR)
#define HAVE_vec_cmpurvvm8dirvvmf8bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_cmpurvvm4dirvvmf16bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_cmpurvvm2dirvvmf32bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_cmpurvvm1dirvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_cmpurvvmf2qirvvmf16bi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_cmpurvvmf4qirvvmf32bi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_cmpurvvmf8qirvvmf64bi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_cmpurvvmf2hirvvmf32bi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_cmpurvvmf4hirvvmf64bi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_cmpurvvmf2sirvvmf64bi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_cmpuv1qiv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_vec_cmpuv2qiv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_vec_cmpuv4qiv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_vec_cmpuv8qiv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_vec_cmpuv16qiv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_vec_cmpuv32qiv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_vec_cmpuv64qiv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_cmpuv128qiv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_cmpuv256qiv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_cmpuv512qiv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_cmpuv1024qiv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_cmpuv2048qiv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_cmpuv4096qiv4096bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_cmpuv1hiv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_vec_cmpuv2hiv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_vec_cmpuv4hiv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_vec_cmpuv8hiv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_vec_cmpuv16hiv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_vec_cmpuv32hiv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_cmpuv64hiv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_cmpuv128hiv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_cmpuv256hiv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_cmpuv512hiv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_cmpuv1024hiv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_cmpuv2048hiv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_cmpuv1siv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_vec_cmpuv2siv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_vec_cmpuv4siv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_vec_cmpuv8siv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_vec_cmpuv16siv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_cmpuv32siv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_cmpuv64siv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_cmpuv128siv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_cmpuv256siv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_cmpuv512siv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_cmpuv1024siv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_cmpuv1div1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_cmpuv2div2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_cmpuv4div4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_cmpuv8div8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_cmpuv16div16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_cmpuv32div32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_cmpuv64div64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_cmpuv128div128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_cmpuv256div256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_cmpuv512div512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_cmprvvm8hfrvvmf2bi ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_cmprvvm4hfrvvmf4bi ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_cmprvvm2hfrvvmf8bi ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_cmprvvm1hfrvvmf16bi ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_cmprvvmf2hfrvvmf32bi ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_cmprvvmf4hfrvvmf64bi ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_cmprvvm8sfrvvmf4bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_cmprvvm4sfrvvmf8bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_cmprvvm2sfrvvmf16bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_cmprvvm1sfrvvmf32bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_cmprvvmf2sfrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_cmprvvm8dfrvvmf8bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_cmprvvm4dfrvvmf16bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_cmprvvm2dfrvvmf32bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_cmprvvm1dfrvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_cmpv1hfv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_vec_cmpv2hfv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_vec_cmpv4hfv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_vec_cmpv8hfv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_vec_cmpv16hfv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_vec_cmpv32hfv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_cmpv64hfv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_cmpv128hfv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_cmpv256hfv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_cmpv512hfv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_cmpv1024hfv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_cmpv2048hfv2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_cmpv1sfv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_cmpv2sfv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_cmpv4sfv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_cmpv8sfv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_cmpv16sfv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_cmpv32sfv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_cmpv64sfv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_cmpv128sfv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_cmpv256sfv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_cmpv512sfv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_cmpv1024sfv1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_cmpv1dfv1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_cmpv2dfv2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_cmpv4dfv4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_cmpv8dfv8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_cmpv16dfv16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_cmpv32dfv32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_cmpv64dfv64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_cmpv128dfv128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_cmpv256dfv256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_cmpv512dfv512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_truncrvvm8sirvvm2qi2 (TARGET_VECTOR)
#define HAVE_truncrvvm4sirvvm1qi2 (TARGET_VECTOR)
#define HAVE_truncrvvm2sirvvmf2qi2 (TARGET_VECTOR)
#define HAVE_truncrvvm1sirvvmf4qi2 (TARGET_VECTOR)
#define HAVE_truncrvvmf2sirvvmf8qi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_truncrvvm8dirvvm2hi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_truncrvvm4dirvvm1hi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_truncrvvm2dirvvmf2hi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_truncrvvm1dirvvmf4hi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_truncv1siv1qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_truncv2siv2qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_truncv4siv4qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_truncv8siv8qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_truncv16siv16qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_truncv32siv32qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_truncv64siv64qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_truncv128siv128qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_truncv256siv256qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_truncv512siv512qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_truncv1024siv1024qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_truncv1div1hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_truncv2div2hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_truncv4div4hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_truncv8div8hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_truncv16div16hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_truncv32div32hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_truncv64div64hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_truncv128div128hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_truncv256div256hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_truncv512div512hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_truncrvvm8dirvvm1qi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_truncrvvm4dirvvmf2qi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_truncrvvm2dirvvmf4qi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_truncrvvm1dirvvmf8qi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_truncv1div1qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_truncv2div2qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_truncv4div4qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_truncv8div8qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_truncv16div16qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_truncv32div32qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_truncv64div64qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_truncv128div128qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_truncv256div256qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_truncv512div512qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_extendrvvm2hfrvvm8df2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_extendrvvm1hfrvvm4df2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_extendrvvmf2hfrvvm2df2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_extendrvvmf4hfrvvm1df2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_extendv1hfv1df2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_extendv2hfv2df2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_extendv4hfv4df2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_extendv8hfv8df2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_extendv16hfv16df2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_extendv32hfv32df2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_extendv64hfv64df2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_extendv128hfv128df2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_extendv256hfv256df2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_extendv512hfv512df2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_truncrvvm8dfrvvm2hf2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_truncrvvm4dfrvvm1hf2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_truncrvvm2dfrvvmf2hf2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_truncrvvm1dfrvvmf4hf2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_truncv1dfv1hf2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_truncv2dfv2hf2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_truncv4dfv4hf2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_truncv8dfv8hf2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_truncv16dfv16hf2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_truncv32dfv32hf2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_truncv64dfv64hf2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_truncv128dfv128hf2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_truncv256dfv256hf2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_truncv512dfv512hf2 ((TARGET_VECTOR && (TARGET_ZVFHMIN || TARGET_ZVFH)) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_floatrvvm8dirvvm2hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (TARGET_VECTOR_ELEN_64 && TARGET_ZVFH))
#define HAVE_floatunsrvvm8dirvvm2hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (TARGET_VECTOR_ELEN_64 && TARGET_ZVFH))
#define HAVE_floatrvvm4dirvvm1hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (TARGET_VECTOR_ELEN_64 && TARGET_ZVFH))
#define HAVE_floatunsrvvm4dirvvm1hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (TARGET_VECTOR_ELEN_64 && TARGET_ZVFH))
#define HAVE_floatrvvm2dirvvmf2hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (TARGET_VECTOR_ELEN_64 && TARGET_ZVFH))
#define HAVE_floatunsrvvm2dirvvmf2hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (TARGET_VECTOR_ELEN_64 && TARGET_ZVFH))
#define HAVE_floatrvvm1dirvvmf4hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (TARGET_VECTOR_ELEN_64 && TARGET_ZVFH))
#define HAVE_floatunsrvvm1dirvvmf4hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (TARGET_VECTOR_ELEN_64 && TARGET_ZVFH))
#define HAVE_floatv1div1hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64 && TARGET_ZVFH))
#define HAVE_floatunsv1div1hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64 && TARGET_ZVFH))
#define HAVE_floatv2div2hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64 && TARGET_ZVFH))
#define HAVE_floatunsv2div2hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64 && TARGET_ZVFH))
#define HAVE_floatv4div4hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64 && TARGET_ZVFH))
#define HAVE_floatunsv4div4hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64 && TARGET_ZVFH))
#define HAVE_floatv8div8hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_floatunsv8div8hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_floatv16div16hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_floatunsv16div16hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_floatv32div32hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_floatunsv32div32hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_floatv64div64hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_floatunsv64div64hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_floatv128div128hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_floatunsv128div128hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_floatv256div256hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_floatunsv256div256hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_floatv512div512hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_floatunsv512div512hf2 ((TARGET_VECTOR && TARGET_ZVFH && can_create_pseudo_p () && !flag_trapping_math) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_absrvvm8qi2 (TARGET_VECTOR)
#define HAVE_absrvvm4qi2 (TARGET_VECTOR)
#define HAVE_absrvvm2qi2 (TARGET_VECTOR)
#define HAVE_absrvvm1qi2 (TARGET_VECTOR)
#define HAVE_absrvvm8hi2 (TARGET_VECTOR)
#define HAVE_absrvvm4hi2 (TARGET_VECTOR)
#define HAVE_absrvvm2hi2 (TARGET_VECTOR)
#define HAVE_absrvvm1hi2 (TARGET_VECTOR)
#define HAVE_absrvvm8si2 (TARGET_VECTOR)
#define HAVE_absrvvm4si2 (TARGET_VECTOR)
#define HAVE_absrvvm2si2 (TARGET_VECTOR)
#define HAVE_absrvvm1si2 (TARGET_VECTOR)
#define HAVE_absrvvm8di2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_absrvvm4di2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_absrvvm2di2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_absrvvm1di2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_absrvvmf2qi2 ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_absrvvmf4qi2 ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_absrvvmf8qi2 ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_absrvvmf2hi2 ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_absrvvmf4hi2 ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_absrvvmf2si2 ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_absv1qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_absv2qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_absv4qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_absv8qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_absv16qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_absv32qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_absv64qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_absv128qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_absv256qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_absv512qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_absv1024qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_absv2048qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_absv4096qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_absv1hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_absv2hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_absv4hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_absv8hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_absv16hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_absv32hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_absv64hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_absv128hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_absv256hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_absv512hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_absv1024hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_absv2048hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_absv1si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_absv2si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_absv4si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_absv8si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_absv16si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_absv32si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_absv64si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_absv128si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_absv256si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_absv512si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_absv1024si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_absv1di2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_absv2di2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_absv4di2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_absv8di2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_absv16di2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_absv32di2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_absv64di2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_absv128di2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_absv256di2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_absv512di2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_select_vlrvvm8qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_select_vlrvvm4qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_select_vlrvvm2qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_select_vlrvvm1qisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_select_vlrvvm8hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_select_vlrvvm4hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_select_vlrvvm2hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_select_vlrvvm1hisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_select_vlrvvm8sisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_select_vlrvvm4sisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_select_vlrvvm2sisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_select_vlrvvm1sisi ((TARGET_VECTOR) && (Pmode == SImode))
#define HAVE_select_vlrvvm8disi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_select_vlrvvm4disi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_select_vlrvvm2disi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_select_vlrvvm1disi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_select_vlrvvmf2qisi ((TARGET_VECTOR) && ((Pmode == SImode) && (!TARGET_XTHEADVECTOR)))
#define HAVE_select_vlrvvmf4qisi ((TARGET_VECTOR) && ((Pmode == SImode) && (!TARGET_XTHEADVECTOR)))
#define HAVE_select_vlrvvmf8qisi ((TARGET_VECTOR) && ((Pmode == SImode) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR))))
#define HAVE_select_vlrvvmf2hisi ((TARGET_VECTOR) && ((Pmode == SImode) && (!TARGET_XTHEADVECTOR)))
#define HAVE_select_vlrvvmf4hisi ((TARGET_VECTOR) && ((Pmode == SImode) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR))))
#define HAVE_select_vlrvvmf2sisi ((TARGET_VECTOR) && ((Pmode == SImode) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR))))
#define HAVE_select_vlrvvm8hfsi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_select_vlrvvm4hfsi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_select_vlrvvm2hfsi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_select_vlrvvm1hfsi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_select_vlrvvmf2hfsi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_select_vlrvvmf4hfsi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64)))
#define HAVE_select_vlrvvm8sfsi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_select_vlrvvm4sfsi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_select_vlrvvm2sfsi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_select_vlrvvm1sfsi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_select_vlrvvmf2sfsi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64)))
#define HAVE_select_vlrvvm8dfsi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_select_vlrvvm4dfsi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_select_vlrvvm2dfsi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_select_vlrvvm1dfsi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_select_vlrvvm8bfsi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_select_vlrvvm4bfsi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_select_vlrvvm2bfsi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_select_vlrvvm1bfsi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_select_vlrvvmf2bfsi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_select_vlrvvmf4bfsi ((TARGET_VECTOR) && ((Pmode == SImode) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64)))
#define HAVE_select_vlrvvm8qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_select_vlrvvm4qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_select_vlrvvm2qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_select_vlrvvm1qidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_select_vlrvvm8hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_select_vlrvvm4hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_select_vlrvvm2hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_select_vlrvvm1hidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_select_vlrvvm8sidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_select_vlrvvm4sidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_select_vlrvvm2sidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_select_vlrvvm1sidi ((TARGET_VECTOR) && (Pmode == DImode))
#define HAVE_select_vlrvvm8didi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_select_vlrvvm4didi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_select_vlrvvm2didi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_select_vlrvvm1didi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_64)))
#define HAVE_select_vlrvvmf2qidi ((TARGET_VECTOR) && ((Pmode == DImode) && (!TARGET_XTHEADVECTOR)))
#define HAVE_select_vlrvvmf4qidi ((TARGET_VECTOR) && ((Pmode == DImode) && (!TARGET_XTHEADVECTOR)))
#define HAVE_select_vlrvvmf8qidi ((TARGET_VECTOR) && ((Pmode == DImode) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR))))
#define HAVE_select_vlrvvmf2hidi ((TARGET_VECTOR) && ((Pmode == DImode) && (!TARGET_XTHEADVECTOR)))
#define HAVE_select_vlrvvmf4hidi ((TARGET_VECTOR) && ((Pmode == DImode) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR))))
#define HAVE_select_vlrvvmf2sidi ((TARGET_VECTOR) && ((Pmode == DImode) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR))))
#define HAVE_select_vlrvvm8hfdi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_select_vlrvvm4hfdi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_select_vlrvvm2hfdi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_select_vlrvvm1hfdi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_select_vlrvvmf2hfdi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_FP_16)))
#define HAVE_select_vlrvvmf4hfdi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64)))
#define HAVE_select_vlrvvm8sfdi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_select_vlrvvm4sfdi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_select_vlrvvm2sfdi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_select_vlrvvm1sfdi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_FP_32)))
#define HAVE_select_vlrvvmf2sfdi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64)))
#define HAVE_select_vlrvvm8dfdi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_select_vlrvvm4dfdi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_select_vlrvvm2dfdi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_select_vlrvvm1dfdi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_FP_64)))
#define HAVE_select_vlrvvm8bfdi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_select_vlrvvm4bfdi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_select_vlrvvm2bfdi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_select_vlrvvm1bfdi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_select_vlrvvmf2bfdi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_BF_16)))
#define HAVE_select_vlrvvmf4bfdi ((TARGET_VECTOR) && ((Pmode == DImode) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64)))
#define HAVE_vec_setrvvm8qi (TARGET_VECTOR)
#define HAVE_vec_setrvvm4qi (TARGET_VECTOR)
#define HAVE_vec_setrvvm2qi (TARGET_VECTOR)
#define HAVE_vec_setrvvm1qi (TARGET_VECTOR)
#define HAVE_vec_setrvvm8hi (TARGET_VECTOR)
#define HAVE_vec_setrvvm4hi (TARGET_VECTOR)
#define HAVE_vec_setrvvm2hi (TARGET_VECTOR)
#define HAVE_vec_setrvvm1hi (TARGET_VECTOR)
#define HAVE_vec_setrvvm8si (TARGET_VECTOR)
#define HAVE_vec_setrvvm4si (TARGET_VECTOR)
#define HAVE_vec_setrvvm2si (TARGET_VECTOR)
#define HAVE_vec_setrvvm1si (TARGET_VECTOR)
#define HAVE_vec_setrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_setrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_setrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_setrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_setrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_setrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_setrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_setrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_setrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_setrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_setrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_setrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_setrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_setrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_setrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_setrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_setrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_setrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_setrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_setrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_setrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_setrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_setrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_setrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_setrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_setv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_vec_setv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_vec_setv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_vec_setv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_vec_setv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_vec_setv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_vec_setv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_setv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_setv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_setv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_setv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_setv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_setv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_setv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_vec_setv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_vec_setv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_vec_setv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_vec_setv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_vec_setv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_setv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_setv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_setv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_setv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_setv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_setv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_setv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_vec_setv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_vec_setv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_vec_setv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_vec_setv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_setv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_setv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_setv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_setv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_setv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_setv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_setv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_setv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_setv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_setv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_setv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_setv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_setv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_setv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_setv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_setv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_setv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_vec_setv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_vec_setv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_vec_setv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_vec_setv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_vec_setv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_setv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_setv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_setv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_setv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_setv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_setv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_setv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_setv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_setv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_setv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_setv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_setv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_setv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_setv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_setv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_setv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_setv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_setv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_setv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_setv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_setv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_setv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_setv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_setv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_setv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_setv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_setv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_extractrvvm8qiqi (TARGET_VECTOR)
#define HAVE_vec_extractrvvm4qiqi (TARGET_VECTOR)
#define HAVE_vec_extractrvvm2qiqi (TARGET_VECTOR)
#define HAVE_vec_extractrvvm1qiqi (TARGET_VECTOR)
#define HAVE_vec_extractrvvm8hihi (TARGET_VECTOR)
#define HAVE_vec_extractrvvm4hihi (TARGET_VECTOR)
#define HAVE_vec_extractrvvm2hihi (TARGET_VECTOR)
#define HAVE_vec_extractrvvm1hihi (TARGET_VECTOR)
#define HAVE_vec_extractrvvm8sisi (TARGET_VECTOR)
#define HAVE_vec_extractrvvm4sisi (TARGET_VECTOR)
#define HAVE_vec_extractrvvm2sisi (TARGET_VECTOR)
#define HAVE_vec_extractrvvm1sisi (TARGET_VECTOR)
#define HAVE_vec_extractrvvm8didi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_extractrvvm4didi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_extractrvvm2didi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_extractrvvm1didi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_extractrvvmf2qiqi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_extractrvvmf4qiqi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_extractrvvmf8qiqi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_extractrvvmf2hihi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_vec_extractrvvmf4hihi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_extractrvvmf2sisi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vec_extractrvvm8hfhf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_extractrvvm4hfhf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_extractrvvm2hfhf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_extractrvvm1hfhf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_extractrvvmf2hfhf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_vec_extractrvvmf4hfhf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_extractrvvm8sfsf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_extractrvvm4sfsf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_extractrvvm2sfsf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_extractrvvm1sfsf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_extractrvvmf2sfsf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_extractrvvm8dfdf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_extractrvvm4dfdf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_extractrvvm2dfdf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_extractrvvm1dfdf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_extractv1qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_vec_extractv2qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_vec_extractv4qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_vec_extractv8qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_vec_extractv16qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_vec_extractv32qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_vec_extractv64qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_extractv128qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_extractv256qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_extractv512qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_extractv1024qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_extractv2048qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_extractv4096qiqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_extractv1hihi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_vec_extractv2hihi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_vec_extractv4hihi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_vec_extractv8hihi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_vec_extractv16hihi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_vec_extractv32hihi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_extractv64hihi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_extractv128hihi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_extractv256hihi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_extractv512hihi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_extractv1024hihi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_extractv2048hihi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_extractv1sisi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_vec_extractv2sisi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_vec_extractv4sisi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_vec_extractv8sisi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_vec_extractv16sisi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_extractv32sisi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_extractv64sisi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_extractv128sisi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_extractv256sisi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_extractv512sisi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_extractv1024sisi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_extractv1didi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_extractv2didi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_extractv4didi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_extractv8didi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_extractv16didi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_extractv32didi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_extractv64didi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_extractv128didi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_extractv256didi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_extractv512didi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_extractv1hfhf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_vec_extractv2hfhf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_vec_extractv4hfhf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_vec_extractv8hfhf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_vec_extractv16hfhf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_vec_extractv32hfhf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_extractv64hfhf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_extractv128hfhf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_extractv256hfhf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_extractv512hfhf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_extractv1024hfhf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_extractv2048hfhf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_extractv1sfsf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_extractv2sfsf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_extractv4sfsf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_extractv8sfsf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_extractv16sfsf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_extractv32sfsf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_extractv64sfsf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_extractv128sfsf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_extractv256sfsf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_extractv512sfsf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_extractv1024sfsf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_extractv1dfdf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_extractv2dfdf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_extractv4dfdf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_extractv8dfdf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_extractv16dfdf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_extractv32dfdf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_extractv64dfdf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_extractv128dfdf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_extractv256dfdf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_extractv512dfdf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_extractrvvmf64biqi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_extractrvvmf32biqi (TARGET_VECTOR)
#define HAVE_vec_extractrvvmf16biqi (TARGET_VECTOR)
#define HAVE_vec_extractrvvmf8biqi (TARGET_VECTOR)
#define HAVE_vec_extractrvvmf4biqi (TARGET_VECTOR)
#define HAVE_vec_extractrvvmf2biqi (TARGET_VECTOR)
#define HAVE_vec_extractrvvm1biqi (TARGET_VECTOR)
#define HAVE_vec_extractv1biqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_vec_extractv2biqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_vec_extractv4biqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_vec_extractv8biqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_vec_extractv16biqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_vec_extractv32biqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_vec_extractv64biqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_extractv128biqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_extractv256biqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_extractv512biqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_extractv1024biqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_extractv2048biqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_extractv4096biqi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_extractrvvmf64bibi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vec_extractrvvmf32bibi (TARGET_VECTOR)
#define HAVE_vec_extractrvvmf16bibi (TARGET_VECTOR)
#define HAVE_vec_extractrvvmf8bibi (TARGET_VECTOR)
#define HAVE_vec_extractrvvmf4bibi (TARGET_VECTOR)
#define HAVE_vec_extractrvvmf2bibi (TARGET_VECTOR)
#define HAVE_vec_extractrvvm1bibi (TARGET_VECTOR)
#define HAVE_vec_extractv1bibi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_vec_extractv2bibi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_vec_extractv4bibi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_vec_extractv8bibi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_vec_extractv16bibi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_vec_extractv32bibi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_vec_extractv64bibi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_extractv128bibi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_extractv256bibi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_extractv512bibi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_extractv1024bibi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_extractv2048bibi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_extractv4096bibi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_extractv2qiv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_vec_extractv4qiv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_vec_extractv8qiv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_vec_extractv16qiv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_vec_extractv2hiv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_vec_extractv4hiv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_vec_extractv8hiv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_vec_extractv16hiv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_vec_extractv2siv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_vec_extractv4siv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_vec_extractv8siv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_vec_extractv16siv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_extractv2div1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_extractv4div2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_extractv8div4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_extractv16div8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_extractv2sfv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_extractv4sfv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_extractv8sfv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_extractv16sfv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_extractv2dfv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_extractv4dfv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_extractv8dfv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_extractv16dfv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_extractv32qiv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_vec_extractv64qiv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_extractv128qiv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_extractv256qiv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_extractv512qiv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_extractv1024qiv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_extractv2048qiv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_extractv4096qiv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_extractv32hiv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_extractv64hiv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_extractv128hiv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_extractv256hiv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_extractv512hiv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_extractv1024hiv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_extractv2048hiv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_extractv32siv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_extractv64siv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_extractv128siv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_extractv256siv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_extractv512siv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_extractv1024siv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_extractv32div16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_extractv64div32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_extractv128div64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_extractv256div128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_extractv512div256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_extractv32sfv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_extractv64sfv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_extractv128sfv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_extractv256sfv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_extractv512sfv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_extractv1024sfv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_extractv32dfv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_extractv64dfv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_extractv128dfv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_extractv256dfv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_extractv512dfv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_extractv4qiv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_vec_extractv8qiv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_vec_extractv16qiv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_vec_extractv4hiv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_vec_extractv8hiv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_vec_extractv16hiv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_vec_extractv4siv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_vec_extractv8siv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_vec_extractv16siv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_extractv4div1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vec_extractv8div2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_extractv16div4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_extractv4sfv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_extractv8sfv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_vec_extractv16sfv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_extractv4dfv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_vec_extractv8dfv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_extractv16dfv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_extractv32qiv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_vec_extractv64qiv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_extractv128qiv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_extractv256qiv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_extractv512qiv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_extractv1024qiv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_extractv2048qiv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_extractv4096qiv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_extractv32hiv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vec_extractv64hiv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_extractv128hiv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_extractv256hiv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_extractv512hiv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_extractv1024hiv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_extractv2048hiv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_extractv32siv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_extractv64siv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_extractv128siv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_extractv256siv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_extractv512siv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_extractv1024siv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_extractv32div8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_extractv64div16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_extractv128div32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_extractv256div64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_extractv512div128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_extractv32sfv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_vec_extractv64sfv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_extractv128sfv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_extractv256sfv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_extractv512sfv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_extractv1024sfv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vec_extractv32dfv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vec_extractv64dfv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vec_extractv128dfv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vec_extractv256dfv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vec_extractv512dfv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_xorsignrvvm8hf3 ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_xorsignrvvm4hf3 ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_xorsignrvvm2hf3 ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_xorsignrvvm1hf3 ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_xorsignrvvmf2hf3 ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_xorsignrvvmf4hf3 ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_xorsignrvvm8sf3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_xorsignrvvm4sf3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_xorsignrvvm2sf3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_xorsignrvvm1sf3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_xorsignrvvmf2sf3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_xorsignrvvm8df3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_xorsignrvvm4df3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_xorsignrvvm2df3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_xorsignrvvm1df3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_xorsignv1hf3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_xorsignv2hf3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_xorsignv4hf3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_xorsignv8hf3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_xorsignv16hf3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_xorsignv32hf3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_xorsignv64hf3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_xorsignv128hf3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_xorsignv256hf3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_xorsignv512hf3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_xorsignv1024hf3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_xorsignv2048hf3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_xorsignv1sf3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_xorsignv2sf3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_xorsignv4sf3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_xorsignv8sf3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_xorsignv16sf3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_xorsignv32sf3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_xorsignv64sf3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_xorsignv128sf3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_xorsignv256sf3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_xorsignv512sf3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_xorsignv1024sf3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_xorsignv1df3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_xorsignv2df3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_xorsignv4df3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_xorsignv8df3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_xorsignv16df3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_xorsignv32df3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_xorsignv64df3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_xorsignv128df3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_xorsignv256df3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_xorsignv512df3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_popcountrvvm8qi2 (TARGET_VECTOR)
#define HAVE_popcountrvvm4qi2 (TARGET_VECTOR)
#define HAVE_popcountrvvm2qi2 (TARGET_VECTOR)
#define HAVE_popcountrvvm1qi2 (TARGET_VECTOR)
#define HAVE_popcountrvvm8hi2 (TARGET_VECTOR)
#define HAVE_popcountrvvm4hi2 (TARGET_VECTOR)
#define HAVE_popcountrvvm2hi2 (TARGET_VECTOR)
#define HAVE_popcountrvvm1hi2 (TARGET_VECTOR)
#define HAVE_popcountrvvm8si2 (TARGET_VECTOR)
#define HAVE_popcountrvvm4si2 (TARGET_VECTOR)
#define HAVE_popcountrvvm2si2 (TARGET_VECTOR)
#define HAVE_popcountrvvm1si2 (TARGET_VECTOR)
#define HAVE_popcountrvvm8di2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_popcountrvvm4di2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_popcountrvvm2di2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_popcountrvvm1di2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_popcountrvvmf2qi2 ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_popcountrvvmf4qi2 ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_popcountrvvmf8qi2 ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_popcountrvvmf2hi2 ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_popcountrvvmf4hi2 ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_popcountrvvmf2si2 ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_popcountv1qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_popcountv2qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_popcountv4qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_popcountv8qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_popcountv16qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_popcountv32qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_popcountv64qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_popcountv128qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_popcountv256qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_popcountv512qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_popcountv1024qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_popcountv2048qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_popcountv4096qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_popcountv1hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_popcountv2hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_popcountv4hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_popcountv8hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_popcountv16hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_popcountv32hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_popcountv64hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_popcountv128hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_popcountv256hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_popcountv512hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_popcountv1024hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_popcountv2048hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_popcountv1si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_popcountv2si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_popcountv4si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_popcountv8si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_popcountv16si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_popcountv32si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_popcountv64si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_popcountv128si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_popcountv256si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_popcountv512si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_popcountv1024si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_popcountv1di2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_popcountv2di2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_popcountv4di2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_popcountv8di2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_popcountv16di2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_popcountv32di2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_popcountv64di2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_popcountv128di2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_popcountv256di2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_popcountv512di2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_ctzrvvm8qi2 (TARGET_ZVBB)
#define HAVE_ctzrvvm4qi2 (TARGET_ZVBB)
#define HAVE_ctzrvvm2qi2 (TARGET_ZVBB)
#define HAVE_ctzrvvm1qi2 (TARGET_ZVBB)
#define HAVE_ctzrvvm8hi2 (TARGET_ZVBB)
#define HAVE_ctzrvvm4hi2 (TARGET_ZVBB)
#define HAVE_ctzrvvm2hi2 (TARGET_ZVBB)
#define HAVE_ctzrvvm1hi2 (TARGET_ZVBB)
#define HAVE_ctzrvvm8si2 (TARGET_ZVBB)
#define HAVE_ctzrvvm4si2 (TARGET_ZVBB)
#define HAVE_ctzrvvm2si2 (TARGET_ZVBB)
#define HAVE_ctzrvvm1si2 (TARGET_ZVBB)
#define HAVE_ctzrvvm8di2 ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ctzrvvm4di2 ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ctzrvvm2di2 ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ctzrvvm1di2 ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ctzrvvmf2qi2 ((TARGET_ZVBB) && (!TARGET_XTHEADVECTOR))
#define HAVE_ctzrvvmf4qi2 ((TARGET_ZVBB) && (!TARGET_XTHEADVECTOR))
#define HAVE_ctzrvvmf8qi2 ((TARGET_ZVBB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_ctzrvvmf2hi2 ((TARGET_ZVBB) && (!TARGET_XTHEADVECTOR))
#define HAVE_ctzrvvmf4hi2 ((TARGET_ZVBB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_ctzrvvmf2si2 ((TARGET_ZVBB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_ctzv1qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_ctzv2qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_ctzv4qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_ctzv8qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_ctzv16qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_ctzv32qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_ctzv64qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_ctzv128qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_ctzv256qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_ctzv512qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_ctzv1024qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_ctzv2048qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_ctzv4096qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_ctzv1hi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_ctzv2hi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_ctzv4hi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_ctzv8hi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_ctzv16hi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_ctzv32hi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_ctzv64hi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_ctzv128hi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_ctzv256hi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_ctzv512hi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_ctzv1024hi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_ctzv2048hi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_ctzv1si2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_ctzv2si2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_ctzv4si2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_ctzv8si2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_ctzv16si2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_ctzv32si2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_ctzv64si2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_ctzv128si2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_ctzv256si2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_ctzv512si2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_ctzv1024si2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_ctzv1di2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_ctzv2di2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_ctzv4di2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_ctzv8di2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_ctzv16di2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_ctzv32di2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_ctzv64di2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_ctzv128di2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_ctzv256di2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_ctzv512di2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_clzrvvm8qi2 (TARGET_ZVBB)
#define HAVE_clzrvvm4qi2 (TARGET_ZVBB)
#define HAVE_clzrvvm2qi2 (TARGET_ZVBB)
#define HAVE_clzrvvm1qi2 (TARGET_ZVBB)
#define HAVE_clzrvvm8hi2 (TARGET_ZVBB)
#define HAVE_clzrvvm4hi2 (TARGET_ZVBB)
#define HAVE_clzrvvm2hi2 (TARGET_ZVBB)
#define HAVE_clzrvvm1hi2 (TARGET_ZVBB)
#define HAVE_clzrvvm8si2 (TARGET_ZVBB)
#define HAVE_clzrvvm4si2 (TARGET_ZVBB)
#define HAVE_clzrvvm2si2 (TARGET_ZVBB)
#define HAVE_clzrvvm1si2 (TARGET_ZVBB)
#define HAVE_clzrvvm8di2 ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_clzrvvm4di2 ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_clzrvvm2di2 ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_clzrvvm1di2 ((TARGET_ZVBB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_clzrvvmf2qi2 ((TARGET_ZVBB) && (!TARGET_XTHEADVECTOR))
#define HAVE_clzrvvmf4qi2 ((TARGET_ZVBB) && (!TARGET_XTHEADVECTOR))
#define HAVE_clzrvvmf8qi2 ((TARGET_ZVBB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_clzrvvmf2hi2 ((TARGET_ZVBB) && (!TARGET_XTHEADVECTOR))
#define HAVE_clzrvvmf4hi2 ((TARGET_ZVBB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_clzrvvmf2si2 ((TARGET_ZVBB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_clzv1qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_clzv2qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_clzv4qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_clzv8qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_clzv16qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_clzv32qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_clzv64qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_clzv128qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_clzv256qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_clzv512qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_clzv1024qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_clzv2048qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_clzv4096qi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_clzv1hi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_clzv2hi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_clzv4hi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_clzv8hi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_clzv16hi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_clzv32hi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_clzv64hi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_clzv128hi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_clzv256hi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_clzv512hi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_clzv1024hi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_clzv2048hi2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_clzv1si2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_clzv2si2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_clzv4si2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_clzv8si2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_clzv16si2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_clzv32si2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_clzv64si2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_clzv128si2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_clzv256si2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_clzv512si2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_clzv1024si2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_clzv1di2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_clzv2di2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_clzv4di2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_clzv8di2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_clzv16di2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_clzv32di2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_clzv64di2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_clzv128di2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_clzv256di2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_clzv512di2 ((TARGET_ZVBB) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_negrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_one_cmplrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_negrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_one_cmplrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_negrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_one_cmplrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_negrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_one_cmplrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_negrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_one_cmplrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_negrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_one_cmplrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_negrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_one_cmplrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_negrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_one_cmplrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_negrvvm8si (TARGET_VECTOR)
#define HAVE_cond_one_cmplrvvm8si (TARGET_VECTOR)
#define HAVE_cond_negrvvm4si (TARGET_VECTOR)
#define HAVE_cond_one_cmplrvvm4si (TARGET_VECTOR)
#define HAVE_cond_negrvvm2si (TARGET_VECTOR)
#define HAVE_cond_one_cmplrvvm2si (TARGET_VECTOR)
#define HAVE_cond_negrvvm1si (TARGET_VECTOR)
#define HAVE_cond_one_cmplrvvm1si (TARGET_VECTOR)
#define HAVE_cond_negrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_one_cmplrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_negrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_one_cmplrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_negrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_one_cmplrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_negrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_one_cmplrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_negrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_one_cmplrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_negrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_one_cmplrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_negrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_one_cmplrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_negrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_one_cmplrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_negrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_one_cmplrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_negrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_one_cmplrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_negv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_one_cmplv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_negv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_one_cmplv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_negv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_one_cmplv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_negv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_one_cmplv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_negv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_one_cmplv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_negv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_one_cmplv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_negv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_one_cmplv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_negv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_one_cmplv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_negv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_one_cmplv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_negv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_one_cmplv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_negv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_one_cmplv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_negv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_one_cmplv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_negv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_one_cmplv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_negv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_one_cmplv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_negv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_one_cmplv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_negv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_one_cmplv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_negv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_one_cmplv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_negv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_one_cmplv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_negv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_one_cmplv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_negv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_one_cmplv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_negv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_one_cmplv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_negv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_one_cmplv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_negv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_one_cmplv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_negv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_one_cmplv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_negv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_one_cmplv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_negv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_one_cmplv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_negv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_one_cmplv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_negv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_one_cmplv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_negv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_one_cmplv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_negv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_one_cmplv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_negv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_one_cmplv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_negv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_one_cmplv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_negv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_one_cmplv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_negv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_one_cmplv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_negv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_one_cmplv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_negv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_one_cmplv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_negv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_one_cmplv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_negv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_one_cmplv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_negv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_one_cmplv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_negv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_one_cmplv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_negv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_one_cmplv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_negv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_one_cmplv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_negv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_one_cmplv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_negv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_one_cmplv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_negv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_one_cmplv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_negv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_one_cmplv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_negrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_len_one_cmplrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_len_negrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_len_one_cmplrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_len_negrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_len_one_cmplrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_len_negrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_len_one_cmplrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_len_negrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_len_one_cmplrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_len_negrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_len_one_cmplrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_len_negrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_len_one_cmplrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_len_negrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_len_one_cmplrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_len_negrvvm8si (TARGET_VECTOR)
#define HAVE_cond_len_one_cmplrvvm8si (TARGET_VECTOR)
#define HAVE_cond_len_negrvvm4si (TARGET_VECTOR)
#define HAVE_cond_len_one_cmplrvvm4si (TARGET_VECTOR)
#define HAVE_cond_len_negrvvm2si (TARGET_VECTOR)
#define HAVE_cond_len_one_cmplrvvm2si (TARGET_VECTOR)
#define HAVE_cond_len_negrvvm1si (TARGET_VECTOR)
#define HAVE_cond_len_one_cmplrvvm1si (TARGET_VECTOR)
#define HAVE_cond_len_negrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_one_cmplrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_negrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_one_cmplrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_negrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_one_cmplrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_negrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_one_cmplrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_negrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_one_cmplrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_negrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_one_cmplrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_negrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_one_cmplrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_negrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_one_cmplrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_negrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_one_cmplrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_negrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_one_cmplrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_negv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_len_one_cmplv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_len_negv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_len_one_cmplv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_len_negv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_len_one_cmplv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_len_negv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_len_one_cmplv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_len_negv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_len_one_cmplv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_len_negv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_len_one_cmplv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_len_negv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_one_cmplv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_negv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_one_cmplv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_negv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_one_cmplv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_negv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_one_cmplv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_negv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_one_cmplv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_negv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_one_cmplv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_negv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_one_cmplv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_negv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_len_one_cmplv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_len_negv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_len_one_cmplv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_len_negv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_len_one_cmplv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_len_negv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_len_one_cmplv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_len_negv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_len_one_cmplv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_len_negv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_one_cmplv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_negv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_one_cmplv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_negv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_one_cmplv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_negv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_one_cmplv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_negv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_one_cmplv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_negv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_one_cmplv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_negv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_one_cmplv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_negv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_len_one_cmplv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_len_negv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_len_one_cmplv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_len_negv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_len_one_cmplv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_len_negv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_len_one_cmplv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_len_negv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_one_cmplv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_negv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_one_cmplv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_negv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_one_cmplv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_negv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_one_cmplv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_negv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_one_cmplv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_negv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_one_cmplv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_negv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_one_cmplv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_negv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_one_cmplv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_negv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_one_cmplv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_negv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_one_cmplv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_negv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_one_cmplv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_negv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_one_cmplv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_negv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_one_cmplv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_negv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_one_cmplv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_negv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_one_cmplv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_negv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_one_cmplv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_negv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_one_cmplv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_negrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_absrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_negrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_absrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_negrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_absrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_negrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_absrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_negrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_absrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_negrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_absrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_negrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_absrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_negrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_absrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_negrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_absrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_negrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_absrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_negrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_absrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_negrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_absrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_negrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_absrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_negrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_absrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_negrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_absrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_negv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_absv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_negv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_absv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_negv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_absv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_negv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_absv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_negv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_absv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_negv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_absv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_negv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_absv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_negv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_absv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_negv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_absv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_negv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_absv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_negv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_absv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_negv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_absv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_negv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_absv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_negv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_absv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_negv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_absv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_negv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_absv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_negv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_absv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_negv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_absv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_negv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_absv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_negv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_absv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_negv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_absv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_negv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_absv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_negv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_absv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_negv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_absv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_negv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_absv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_negv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_absv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_negv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_absv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_negv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_absv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_negv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_absv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_negv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_absv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_negv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_absv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_negv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_absv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_negv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_absv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_negrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_absrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_negrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_absrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_negrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_absrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_negrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_absrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_negrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_absrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_negrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_absrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_negrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_absrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_negrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_absrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_negrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_absrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_negrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_absrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_negrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_absrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_negrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_absrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_negrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_absrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_negrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_absrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_negrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_absrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_negv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_absv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_negv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_absv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_negv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_absv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_negv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_absv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_negv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_absv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_negv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_absv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_negv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_absv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_negv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_absv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_negv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_absv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_negv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_absv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_negv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_absv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_negv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_absv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_negv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_absv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_negv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_absv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_negv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_absv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_negv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_absv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_negv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_absv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_negv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_absv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_negv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_absv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_negv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_absv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_negv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_absv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_negv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_absv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_negv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_absv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_negv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_absv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_negv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_absv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_negv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_absv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_negv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_absv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_negv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_absv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_negv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_absv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_negv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_absv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_negv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_absv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_negv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_absv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_negv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_absv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_ashlrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_ashrrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_lshrrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_ashlrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_ashrrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_lshrrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_ashlrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_ashrrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_lshrrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_ashlrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_ashrrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_lshrrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_ashlrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_ashrrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_lshrrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_ashlrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_ashrrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_lshrrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_ashlrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_ashrrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_lshrrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_ashlrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_ashrrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_lshrrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_ashlrvvm8si (TARGET_VECTOR)
#define HAVE_cond_ashrrvvm8si (TARGET_VECTOR)
#define HAVE_cond_lshrrvvm8si (TARGET_VECTOR)
#define HAVE_cond_ashlrvvm4si (TARGET_VECTOR)
#define HAVE_cond_ashrrvvm4si (TARGET_VECTOR)
#define HAVE_cond_lshrrvvm4si (TARGET_VECTOR)
#define HAVE_cond_ashlrvvm2si (TARGET_VECTOR)
#define HAVE_cond_ashrrvvm2si (TARGET_VECTOR)
#define HAVE_cond_lshrrvvm2si (TARGET_VECTOR)
#define HAVE_cond_ashlrvvm1si (TARGET_VECTOR)
#define HAVE_cond_ashrrvvm1si (TARGET_VECTOR)
#define HAVE_cond_lshrrvvm1si (TARGET_VECTOR)
#define HAVE_cond_ashlrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_ashrrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_lshrrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_ashlrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_ashrrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_lshrrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_ashlrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_ashrrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_lshrrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_ashlrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_ashrrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_lshrrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_ashlrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_ashrrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_lshrrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_ashlrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_ashrrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_lshrrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_ashlrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_ashrrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_lshrrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_ashlrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_ashrrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_lshrrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_ashlrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_ashrrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_lshrrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_ashlrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_ashrrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_lshrrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_ashlv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_ashrv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_lshrv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_ashlv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_ashrv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_lshrv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_ashlv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_ashrv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_lshrv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_ashlv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_ashrv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_lshrv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_ashlv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_ashrv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_lshrv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_ashlv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_ashrv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_lshrv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_ashlv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_ashrv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_lshrv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_ashlv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_ashrv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_lshrv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_ashlv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_ashrv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_lshrv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_ashlv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_ashrv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_lshrv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_ashlv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_ashrv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_lshrv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_ashlv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_ashrv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_lshrv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_ashlv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_ashrv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_lshrv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_ashlv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_ashrv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_lshrv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_ashlv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_ashrv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_lshrv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_ashlv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_ashrv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_lshrv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_ashlv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_ashrv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_lshrv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_ashlv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_ashrv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_lshrv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_ashlv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_ashrv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_lshrv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_ashlv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_ashrv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_lshrv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_ashlv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_ashrv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_lshrv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_ashlv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_ashrv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_lshrv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_ashlv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_ashrv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_lshrv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_ashlv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_ashrv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_lshrv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_ashlv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_ashrv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_lshrv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_ashlv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_ashrv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_lshrv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_ashlv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_ashrv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_lshrv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_ashlv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_ashrv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_lshrv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_ashlv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_ashrv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_lshrv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_ashlv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_ashrv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_lshrv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_ashlv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_ashrv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_lshrv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_ashlv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_ashrv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_lshrv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_ashlv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_ashrv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_lshrv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_ashlv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_ashrv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_lshrv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_ashlv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_ashrv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_lshrv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_ashlv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_ashrv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_lshrv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_ashlv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_ashrv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_lshrv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_ashlv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_ashrv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_lshrv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_ashlv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_ashrv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_lshrv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_ashlv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_ashrv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_lshrv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_ashlv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_ashrv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_lshrv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_ashlv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_ashrv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_lshrv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_ashlv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_ashrv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_lshrv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_ashlv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_ashrv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_lshrv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_ashlv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_ashrv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_lshrv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_ashlv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_ashrv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_lshrv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_ashlrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_len_ashrrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_len_lshrrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_len_ashlrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_len_ashrrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_len_lshrrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_len_ashlrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_len_ashrrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_len_lshrrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_len_ashlrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_len_ashrrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_len_lshrrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_len_ashlrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_len_ashrrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_len_lshrrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_len_ashlrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_len_ashrrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_len_lshrrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_len_ashlrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_len_ashrrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_len_lshrrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_len_ashlrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_len_ashrrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_len_lshrrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_len_ashlrvvm8si (TARGET_VECTOR)
#define HAVE_cond_len_ashrrvvm8si (TARGET_VECTOR)
#define HAVE_cond_len_lshrrvvm8si (TARGET_VECTOR)
#define HAVE_cond_len_ashlrvvm4si (TARGET_VECTOR)
#define HAVE_cond_len_ashrrvvm4si (TARGET_VECTOR)
#define HAVE_cond_len_lshrrvvm4si (TARGET_VECTOR)
#define HAVE_cond_len_ashlrvvm2si (TARGET_VECTOR)
#define HAVE_cond_len_ashrrvvm2si (TARGET_VECTOR)
#define HAVE_cond_len_lshrrvvm2si (TARGET_VECTOR)
#define HAVE_cond_len_ashlrvvm1si (TARGET_VECTOR)
#define HAVE_cond_len_ashrrvvm1si (TARGET_VECTOR)
#define HAVE_cond_len_lshrrvvm1si (TARGET_VECTOR)
#define HAVE_cond_len_ashlrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_ashrrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_lshrrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_ashlrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_ashrrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_lshrrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_ashlrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_ashrrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_lshrrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_ashlrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_ashrrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_lshrrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_ashlrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_ashrrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_lshrrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_ashlrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_ashrrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_lshrrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_ashlrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_ashrrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_lshrrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_ashlrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_ashrrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_lshrrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_ashlrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_ashrrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_lshrrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_ashlrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_ashrrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_lshrrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_ashlv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_len_ashrv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_len_lshrv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_len_ashlv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_len_ashrv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_len_lshrv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_len_ashlv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_len_ashrv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_len_lshrv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_len_ashlv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_len_ashrv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_len_lshrv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_len_ashlv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_len_ashrv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_len_lshrv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_len_ashlv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_len_ashrv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_len_lshrv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_len_ashlv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_ashrv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_lshrv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_ashlv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_ashrv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_lshrv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_ashlv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_ashrv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_lshrv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_ashlv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_ashrv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_lshrv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_ashlv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_ashrv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_lshrv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_ashlv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_ashrv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_lshrv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_ashlv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_ashrv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_lshrv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_ashlv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_len_ashrv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_len_lshrv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_len_ashlv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_len_ashrv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_len_lshrv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_len_ashlv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_len_ashrv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_len_lshrv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_len_ashlv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_len_ashrv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_len_lshrv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_len_ashlv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_len_ashrv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_len_lshrv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_len_ashlv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_ashrv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_lshrv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_ashlv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_ashrv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_lshrv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_ashlv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_ashrv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_lshrv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_ashlv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_ashrv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_lshrv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_ashlv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_ashrv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_lshrv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_ashlv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_ashrv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_lshrv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_ashlv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_ashrv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_lshrv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_ashlv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_len_ashrv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_len_lshrv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_len_ashlv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_len_ashrv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_len_lshrv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_len_ashlv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_len_ashrv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_len_lshrv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_len_ashlv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_len_ashrv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_len_lshrv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_len_ashlv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_ashrv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_lshrv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_ashlv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_ashrv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_lshrv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_ashlv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_ashrv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_lshrv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_ashlv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_ashrv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_lshrv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_ashlv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_ashrv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_lshrv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_ashlv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_ashrv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_lshrv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_ashlv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_ashrv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_lshrv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_ashlv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_ashrv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_lshrv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_ashlv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_ashrv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_lshrv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_ashlv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_ashrv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_lshrv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_ashlv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_ashrv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_lshrv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_ashlv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_ashrv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_lshrv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_ashlv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_ashrv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_lshrv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_ashlv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_ashrv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_lshrv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_ashlv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_ashrv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_lshrv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_ashlv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_ashrv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_lshrv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_ashlv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_ashrv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_lshrv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_addrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_subrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_andrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_iorrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_xorrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_smaxrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_umaxrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_sminrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_uminrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_mulrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_divrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_udivrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_modrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_umodrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_addrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_subrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_andrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_iorrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_xorrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_smaxrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_umaxrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_sminrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_uminrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_mulrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_divrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_udivrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_modrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_umodrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_addrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_subrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_andrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_iorrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_xorrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_smaxrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_umaxrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_sminrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_uminrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_mulrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_divrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_udivrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_modrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_umodrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_addrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_subrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_andrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_iorrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_xorrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_smaxrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_umaxrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_sminrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_uminrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_mulrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_divrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_udivrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_modrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_umodrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_addrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_subrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_andrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_iorrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_xorrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_smaxrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_umaxrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_sminrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_uminrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_mulrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_divrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_udivrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_modrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_umodrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_addrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_subrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_andrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_iorrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_xorrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_smaxrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_umaxrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_sminrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_uminrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_mulrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_divrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_udivrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_modrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_umodrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_addrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_subrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_andrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_iorrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_xorrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_smaxrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_umaxrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_sminrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_uminrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_mulrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_divrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_udivrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_modrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_umodrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_addrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_subrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_andrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_iorrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_xorrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_smaxrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_umaxrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_sminrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_uminrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_mulrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_divrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_udivrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_modrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_umodrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_addrvvm8si (TARGET_VECTOR)
#define HAVE_cond_subrvvm8si (TARGET_VECTOR)
#define HAVE_cond_andrvvm8si (TARGET_VECTOR)
#define HAVE_cond_iorrvvm8si (TARGET_VECTOR)
#define HAVE_cond_xorrvvm8si (TARGET_VECTOR)
#define HAVE_cond_smaxrvvm8si (TARGET_VECTOR)
#define HAVE_cond_umaxrvvm8si (TARGET_VECTOR)
#define HAVE_cond_sminrvvm8si (TARGET_VECTOR)
#define HAVE_cond_uminrvvm8si (TARGET_VECTOR)
#define HAVE_cond_mulrvvm8si (TARGET_VECTOR)
#define HAVE_cond_divrvvm8si (TARGET_VECTOR)
#define HAVE_cond_udivrvvm8si (TARGET_VECTOR)
#define HAVE_cond_modrvvm8si (TARGET_VECTOR)
#define HAVE_cond_umodrvvm8si (TARGET_VECTOR)
#define HAVE_cond_addrvvm4si (TARGET_VECTOR)
#define HAVE_cond_subrvvm4si (TARGET_VECTOR)
#define HAVE_cond_andrvvm4si (TARGET_VECTOR)
#define HAVE_cond_iorrvvm4si (TARGET_VECTOR)
#define HAVE_cond_xorrvvm4si (TARGET_VECTOR)
#define HAVE_cond_smaxrvvm4si (TARGET_VECTOR)
#define HAVE_cond_umaxrvvm4si (TARGET_VECTOR)
#define HAVE_cond_sminrvvm4si (TARGET_VECTOR)
#define HAVE_cond_uminrvvm4si (TARGET_VECTOR)
#define HAVE_cond_mulrvvm4si (TARGET_VECTOR)
#define HAVE_cond_divrvvm4si (TARGET_VECTOR)
#define HAVE_cond_udivrvvm4si (TARGET_VECTOR)
#define HAVE_cond_modrvvm4si (TARGET_VECTOR)
#define HAVE_cond_umodrvvm4si (TARGET_VECTOR)
#define HAVE_cond_addrvvm2si (TARGET_VECTOR)
#define HAVE_cond_subrvvm2si (TARGET_VECTOR)
#define HAVE_cond_andrvvm2si (TARGET_VECTOR)
#define HAVE_cond_iorrvvm2si (TARGET_VECTOR)
#define HAVE_cond_xorrvvm2si (TARGET_VECTOR)
#define HAVE_cond_smaxrvvm2si (TARGET_VECTOR)
#define HAVE_cond_umaxrvvm2si (TARGET_VECTOR)
#define HAVE_cond_sminrvvm2si (TARGET_VECTOR)
#define HAVE_cond_uminrvvm2si (TARGET_VECTOR)
#define HAVE_cond_mulrvvm2si (TARGET_VECTOR)
#define HAVE_cond_divrvvm2si (TARGET_VECTOR)
#define HAVE_cond_udivrvvm2si (TARGET_VECTOR)
#define HAVE_cond_modrvvm2si (TARGET_VECTOR)
#define HAVE_cond_umodrvvm2si (TARGET_VECTOR)
#define HAVE_cond_addrvvm1si (TARGET_VECTOR)
#define HAVE_cond_subrvvm1si (TARGET_VECTOR)
#define HAVE_cond_andrvvm1si (TARGET_VECTOR)
#define HAVE_cond_iorrvvm1si (TARGET_VECTOR)
#define HAVE_cond_xorrvvm1si (TARGET_VECTOR)
#define HAVE_cond_smaxrvvm1si (TARGET_VECTOR)
#define HAVE_cond_umaxrvvm1si (TARGET_VECTOR)
#define HAVE_cond_sminrvvm1si (TARGET_VECTOR)
#define HAVE_cond_uminrvvm1si (TARGET_VECTOR)
#define HAVE_cond_mulrvvm1si (TARGET_VECTOR)
#define HAVE_cond_divrvvm1si (TARGET_VECTOR)
#define HAVE_cond_udivrvvm1si (TARGET_VECTOR)
#define HAVE_cond_modrvvm1si (TARGET_VECTOR)
#define HAVE_cond_umodrvvm1si (TARGET_VECTOR)
#define HAVE_cond_addrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_subrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_andrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_iorrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_xorrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_smaxrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_umaxrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_sminrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_uminrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_mulrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_divrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_udivrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_modrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_umodrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_addrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_subrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_andrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_iorrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_xorrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_smaxrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_umaxrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_sminrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_uminrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_mulrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_divrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_udivrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_modrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_umodrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_addrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_subrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_andrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_iorrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_xorrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_smaxrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_umaxrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_sminrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_uminrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_mulrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_divrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_udivrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_modrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_umodrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_addrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_subrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_andrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_iorrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_xorrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_smaxrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_umaxrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_sminrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_uminrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_mulrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_divrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_udivrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_modrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_umodrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_addrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_subrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_andrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_iorrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_xorrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_smaxrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_umaxrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_sminrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_uminrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_mulrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_divrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_udivrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_modrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_umodrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_addrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_subrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_andrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_iorrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_xorrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_smaxrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_umaxrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_sminrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_uminrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_mulrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_divrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_udivrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_modrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_umodrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_addrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_subrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_andrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_iorrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_xorrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_smaxrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_umaxrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_sminrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_uminrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_mulrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_divrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_udivrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_modrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_umodrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_addrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_subrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_andrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_iorrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_xorrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_smaxrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_umaxrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_sminrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_uminrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_mulrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_divrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_udivrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_modrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_umodrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_addrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_subrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_andrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_iorrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_xorrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_smaxrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_umaxrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_sminrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_uminrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_mulrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_divrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_udivrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_modrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_umodrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_addrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_subrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_andrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_iorrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_xorrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_smaxrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_umaxrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_sminrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_uminrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_mulrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_divrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_udivrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_modrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_umodrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_addv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_subv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_andv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_iorv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_xorv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_smaxv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_umaxv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_sminv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_uminv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_mulv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_divv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_udivv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_modv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_umodv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_addv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_subv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_andv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_iorv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_xorv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_smaxv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_umaxv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_sminv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_uminv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_mulv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_divv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_udivv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_modv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_umodv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_addv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_subv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_andv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_iorv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_xorv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_smaxv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_umaxv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_sminv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_uminv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_mulv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_divv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_udivv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_modv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_umodv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_addv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_subv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_andv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_iorv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_xorv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_smaxv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_umaxv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_sminv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_uminv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_mulv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_divv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_udivv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_modv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_umodv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_addv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_subv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_andv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_iorv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_xorv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_smaxv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_umaxv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_sminv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_uminv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_mulv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_divv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_udivv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_modv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_umodv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_addv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_subv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_andv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_iorv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_xorv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_smaxv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_umaxv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_sminv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_uminv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_mulv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_divv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_udivv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_modv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_umodv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_addv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_subv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_andv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_iorv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_xorv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_smaxv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_umaxv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_sminv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_uminv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_mulv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_divv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_udivv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_modv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_umodv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_addv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_subv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_andv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_iorv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_xorv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_smaxv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_umaxv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_sminv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_uminv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_mulv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_divv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_udivv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_modv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_umodv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_addv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_subv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_andv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_iorv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_xorv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_smaxv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_umaxv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_sminv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_uminv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_mulv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_divv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_udivv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_modv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_umodv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_addv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_subv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_andv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_iorv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_xorv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_smaxv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_umaxv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_sminv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_uminv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_mulv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_divv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_udivv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_modv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_umodv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_addv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_subv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_andv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_iorv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_xorv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_smaxv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_umaxv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_sminv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_uminv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_mulv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_divv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_udivv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_modv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_umodv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_addv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_subv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_andv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_iorv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_xorv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_smaxv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_umaxv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_sminv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_uminv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_mulv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_divv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_udivv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_modv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_umodv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_addv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_subv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_andv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_iorv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_xorv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_smaxv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_umaxv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_sminv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_uminv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_mulv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_divv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_udivv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_modv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_umodv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_addv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_subv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_andv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_iorv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_xorv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_smaxv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_umaxv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_sminv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_uminv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_mulv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_divv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_udivv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_modv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_umodv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_addv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_subv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_andv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_iorv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_xorv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_smaxv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_umaxv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_sminv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_uminv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_mulv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_divv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_udivv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_modv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_umodv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_addv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_subv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_andv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_iorv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_xorv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_smaxv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_umaxv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_sminv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_uminv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_mulv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_divv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_udivv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_modv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_umodv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_addv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_subv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_andv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_iorv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_xorv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_smaxv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_umaxv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_sminv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_uminv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_mulv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_divv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_udivv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_modv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_umodv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_addv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_subv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_andv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_iorv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_xorv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_smaxv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_umaxv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_sminv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_uminv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_mulv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_divv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_udivv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_modv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_umodv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_addv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_subv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_andv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_iorv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_xorv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_smaxv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_umaxv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_sminv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_uminv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_mulv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_divv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_udivv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_modv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_umodv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_addv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_subv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_andv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_iorv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_xorv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_smaxv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_umaxv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_sminv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_uminv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_mulv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_divv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_udivv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_modv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_umodv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_addv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_subv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_andv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_iorv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_xorv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_smaxv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_umaxv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_sminv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_uminv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_mulv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_divv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_udivv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_modv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_umodv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_addv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_subv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_andv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_iorv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_xorv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_smaxv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_umaxv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_sminv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_uminv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_mulv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_divv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_udivv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_modv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_umodv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_addv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_subv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_andv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_iorv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_xorv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_smaxv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_umaxv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_sminv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_uminv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_mulv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_divv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_udivv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_modv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_umodv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_addv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_subv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_andv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_iorv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_xorv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_smaxv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_umaxv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_sminv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_uminv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_mulv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_divv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_udivv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_modv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_umodv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_addv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_subv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_andv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_iorv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_xorv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_smaxv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_umaxv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_sminv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_uminv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_mulv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_divv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_udivv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_modv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_umodv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_addv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_subv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_andv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_iorv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_xorv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_smaxv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_umaxv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_sminv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_uminv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_mulv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_divv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_udivv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_modv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_umodv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_addv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_subv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_andv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_iorv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_xorv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_smaxv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_umaxv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_sminv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_uminv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_mulv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_divv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_udivv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_modv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_umodv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_addv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_subv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_andv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_iorv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_xorv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_smaxv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_umaxv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_sminv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_uminv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_mulv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_divv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_udivv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_modv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_umodv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_addv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_subv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_andv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_iorv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_xorv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_smaxv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_umaxv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_sminv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_uminv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_mulv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_divv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_udivv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_modv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_umodv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_addv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_subv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_andv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_iorv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_xorv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_smaxv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_umaxv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_sminv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_uminv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_mulv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_divv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_udivv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_modv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_umodv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_addv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_subv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_andv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_iorv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_xorv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_smaxv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_umaxv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_sminv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_uminv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_mulv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_divv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_udivv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_modv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_umodv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_addv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_subv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_andv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_iorv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_xorv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_smaxv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_umaxv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_sminv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_uminv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_mulv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_divv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_udivv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_modv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_umodv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_addv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_subv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_andv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_iorv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_xorv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_smaxv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_umaxv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_sminv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_uminv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_mulv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_divv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_udivv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_modv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_umodv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_addv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_subv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_andv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_iorv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_xorv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_smaxv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_umaxv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_sminv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_uminv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_mulv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_divv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_udivv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_modv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_umodv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_addv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_subv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_andv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_iorv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_xorv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_smaxv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_umaxv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_sminv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_uminv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_mulv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_divv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_udivv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_modv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_umodv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_addv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_subv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_andv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_iorv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_xorv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_smaxv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_umaxv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_sminv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_uminv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_mulv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_divv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_udivv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_modv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_umodv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_addv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_subv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_andv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_iorv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_xorv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_smaxv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_umaxv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_sminv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_uminv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_mulv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_divv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_udivv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_modv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_umodv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_addv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_subv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_andv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_iorv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_xorv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_smaxv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_umaxv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_sminv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_uminv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_mulv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_divv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_udivv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_modv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_umodv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_addv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_subv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_andv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_iorv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_xorv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_smaxv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_umaxv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_sminv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_uminv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_mulv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_divv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_udivv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_modv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_umodv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_addv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_subv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_andv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_iorv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_xorv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_smaxv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_umaxv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_sminv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_uminv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_mulv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_divv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_udivv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_modv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_umodv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_addv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_subv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_andv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_iorv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_xorv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_smaxv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_umaxv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_sminv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_uminv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_mulv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_divv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_udivv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_modv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_umodv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_addv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_subv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_andv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_iorv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_xorv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_smaxv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_umaxv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_sminv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_uminv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_mulv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_divv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_udivv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_modv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_umodv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_addv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_subv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_andv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_iorv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_xorv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_smaxv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_umaxv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_sminv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_uminv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_mulv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_divv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_udivv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_modv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_umodv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_addv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_subv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_andv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_iorv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_xorv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_smaxv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_umaxv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_sminv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_uminv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_mulv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_divv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_udivv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_modv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_umodv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_addv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_subv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_andv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_iorv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_xorv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_smaxv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_umaxv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_sminv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_uminv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_mulv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_divv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_udivv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_modv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_umodv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_addv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_subv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_andv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_iorv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_xorv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_smaxv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_umaxv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_sminv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_uminv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_mulv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_divv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_udivv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_modv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_umodv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_addrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_len_subrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_len_andrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_len_iorrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_len_xorrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_len_smaxrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_len_umaxrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_len_sminrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_len_uminrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_len_mulrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_len_divrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_len_udivrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_len_modrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_len_umodrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_len_addrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_len_subrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_len_andrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_len_iorrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_len_xorrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_len_smaxrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_len_umaxrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_len_sminrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_len_uminrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_len_mulrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_len_divrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_len_udivrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_len_modrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_len_umodrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_len_addrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_len_subrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_len_andrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_len_iorrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_len_xorrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_len_smaxrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_len_umaxrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_len_sminrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_len_uminrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_len_mulrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_len_divrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_len_udivrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_len_modrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_len_umodrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_len_addrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_len_subrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_len_andrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_len_iorrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_len_xorrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_len_smaxrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_len_umaxrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_len_sminrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_len_uminrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_len_mulrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_len_divrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_len_udivrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_len_modrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_len_umodrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_len_addrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_len_subrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_len_andrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_len_iorrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_len_xorrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_len_smaxrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_len_umaxrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_len_sminrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_len_uminrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_len_mulrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_len_divrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_len_udivrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_len_modrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_len_umodrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_len_addrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_len_subrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_len_andrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_len_iorrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_len_xorrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_len_smaxrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_len_umaxrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_len_sminrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_len_uminrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_len_mulrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_len_divrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_len_udivrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_len_modrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_len_umodrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_len_addrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_len_subrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_len_andrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_len_iorrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_len_xorrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_len_smaxrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_len_umaxrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_len_sminrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_len_uminrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_len_mulrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_len_divrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_len_udivrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_len_modrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_len_umodrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_len_addrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_len_subrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_len_andrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_len_iorrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_len_xorrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_len_smaxrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_len_umaxrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_len_sminrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_len_uminrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_len_mulrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_len_divrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_len_udivrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_len_modrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_len_umodrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_len_addrvvm8si (TARGET_VECTOR)
#define HAVE_cond_len_subrvvm8si (TARGET_VECTOR)
#define HAVE_cond_len_andrvvm8si (TARGET_VECTOR)
#define HAVE_cond_len_iorrvvm8si (TARGET_VECTOR)
#define HAVE_cond_len_xorrvvm8si (TARGET_VECTOR)
#define HAVE_cond_len_smaxrvvm8si (TARGET_VECTOR)
#define HAVE_cond_len_umaxrvvm8si (TARGET_VECTOR)
#define HAVE_cond_len_sminrvvm8si (TARGET_VECTOR)
#define HAVE_cond_len_uminrvvm8si (TARGET_VECTOR)
#define HAVE_cond_len_mulrvvm8si (TARGET_VECTOR)
#define HAVE_cond_len_divrvvm8si (TARGET_VECTOR)
#define HAVE_cond_len_udivrvvm8si (TARGET_VECTOR)
#define HAVE_cond_len_modrvvm8si (TARGET_VECTOR)
#define HAVE_cond_len_umodrvvm8si (TARGET_VECTOR)
#define HAVE_cond_len_addrvvm4si (TARGET_VECTOR)
#define HAVE_cond_len_subrvvm4si (TARGET_VECTOR)
#define HAVE_cond_len_andrvvm4si (TARGET_VECTOR)
#define HAVE_cond_len_iorrvvm4si (TARGET_VECTOR)
#define HAVE_cond_len_xorrvvm4si (TARGET_VECTOR)
#define HAVE_cond_len_smaxrvvm4si (TARGET_VECTOR)
#define HAVE_cond_len_umaxrvvm4si (TARGET_VECTOR)
#define HAVE_cond_len_sminrvvm4si (TARGET_VECTOR)
#define HAVE_cond_len_uminrvvm4si (TARGET_VECTOR)
#define HAVE_cond_len_mulrvvm4si (TARGET_VECTOR)
#define HAVE_cond_len_divrvvm4si (TARGET_VECTOR)
#define HAVE_cond_len_udivrvvm4si (TARGET_VECTOR)
#define HAVE_cond_len_modrvvm4si (TARGET_VECTOR)
#define HAVE_cond_len_umodrvvm4si (TARGET_VECTOR)
#define HAVE_cond_len_addrvvm2si (TARGET_VECTOR)
#define HAVE_cond_len_subrvvm2si (TARGET_VECTOR)
#define HAVE_cond_len_andrvvm2si (TARGET_VECTOR)
#define HAVE_cond_len_iorrvvm2si (TARGET_VECTOR)
#define HAVE_cond_len_xorrvvm2si (TARGET_VECTOR)
#define HAVE_cond_len_smaxrvvm2si (TARGET_VECTOR)
#define HAVE_cond_len_umaxrvvm2si (TARGET_VECTOR)
#define HAVE_cond_len_sminrvvm2si (TARGET_VECTOR)
#define HAVE_cond_len_uminrvvm2si (TARGET_VECTOR)
#define HAVE_cond_len_mulrvvm2si (TARGET_VECTOR)
#define HAVE_cond_len_divrvvm2si (TARGET_VECTOR)
#define HAVE_cond_len_udivrvvm2si (TARGET_VECTOR)
#define HAVE_cond_len_modrvvm2si (TARGET_VECTOR)
#define HAVE_cond_len_umodrvvm2si (TARGET_VECTOR)
#define HAVE_cond_len_addrvvm1si (TARGET_VECTOR)
#define HAVE_cond_len_subrvvm1si (TARGET_VECTOR)
#define HAVE_cond_len_andrvvm1si (TARGET_VECTOR)
#define HAVE_cond_len_iorrvvm1si (TARGET_VECTOR)
#define HAVE_cond_len_xorrvvm1si (TARGET_VECTOR)
#define HAVE_cond_len_smaxrvvm1si (TARGET_VECTOR)
#define HAVE_cond_len_umaxrvvm1si (TARGET_VECTOR)
#define HAVE_cond_len_sminrvvm1si (TARGET_VECTOR)
#define HAVE_cond_len_uminrvvm1si (TARGET_VECTOR)
#define HAVE_cond_len_mulrvvm1si (TARGET_VECTOR)
#define HAVE_cond_len_divrvvm1si (TARGET_VECTOR)
#define HAVE_cond_len_udivrvvm1si (TARGET_VECTOR)
#define HAVE_cond_len_modrvvm1si (TARGET_VECTOR)
#define HAVE_cond_len_umodrvvm1si (TARGET_VECTOR)
#define HAVE_cond_len_addrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_subrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_andrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_iorrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_xorrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_smaxrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_umaxrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_sminrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_uminrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_mulrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_divrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_udivrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_modrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_umodrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_addrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_subrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_andrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_iorrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_xorrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_smaxrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_umaxrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_sminrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_uminrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_mulrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_divrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_udivrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_modrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_umodrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_addrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_subrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_andrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_iorrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_xorrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_smaxrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_umaxrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_sminrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_uminrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_mulrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_divrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_udivrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_modrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_umodrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_addrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_subrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_andrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_iorrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_xorrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_smaxrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_umaxrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_sminrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_uminrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_mulrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_divrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_udivrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_modrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_umodrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_addrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_subrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_andrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_iorrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_xorrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_smaxrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_umaxrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_sminrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_uminrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_mulrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_divrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_udivrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_modrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_umodrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_addrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_subrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_andrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_iorrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_xorrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_smaxrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_umaxrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_sminrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_uminrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_mulrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_divrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_udivrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_modrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_umodrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_addrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_subrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_andrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_iorrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_xorrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_smaxrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_umaxrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_sminrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_uminrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_mulrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_divrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_udivrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_modrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_umodrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_addrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_subrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_andrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_iorrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_xorrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_smaxrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_umaxrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_sminrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_uminrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_mulrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_divrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_udivrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_modrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_umodrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_addrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_subrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_andrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_iorrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_xorrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_smaxrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_umaxrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_sminrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_uminrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_mulrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_divrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_udivrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_modrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_umodrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_addrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_subrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_andrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_iorrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_xorrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_smaxrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_umaxrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_sminrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_uminrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_mulrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_divrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_udivrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_modrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_umodrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_addv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_len_subv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_len_andv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_len_iorv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_len_xorv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_len_smaxv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_len_umaxv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_len_sminv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_len_uminv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_len_mulv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_len_divv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_len_udivv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_len_modv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_len_umodv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_len_addv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_len_subv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_len_andv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_len_iorv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_len_xorv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_len_smaxv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_len_umaxv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_len_sminv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_len_uminv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_len_mulv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_len_divv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_len_udivv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_len_modv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_len_umodv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_len_addv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_len_subv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_len_andv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_len_iorv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_len_xorv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_len_smaxv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_len_umaxv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_len_sminv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_len_uminv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_len_mulv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_len_divv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_len_udivv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_len_modv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_len_umodv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_len_addv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_len_subv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_len_andv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_len_iorv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_len_xorv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_len_smaxv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_len_umaxv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_len_sminv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_len_uminv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_len_mulv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_len_divv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_len_udivv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_len_modv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_len_umodv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_len_addv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_len_subv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_len_andv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_len_iorv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_len_xorv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_len_smaxv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_len_umaxv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_len_sminv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_len_uminv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_len_mulv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_len_divv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_len_udivv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_len_modv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_len_umodv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_len_addv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_len_subv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_len_andv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_len_iorv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_len_xorv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_len_smaxv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_len_umaxv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_len_sminv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_len_uminv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_len_mulv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_len_divv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_len_udivv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_len_modv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_len_umodv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_len_addv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_subv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_andv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_iorv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_xorv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_smaxv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_umaxv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_sminv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_uminv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_mulv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_divv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_udivv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_modv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_umodv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_addv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_subv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_andv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_iorv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_xorv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_smaxv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_umaxv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_sminv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_uminv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_mulv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_divv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_udivv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_modv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_umodv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_addv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_subv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_andv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_iorv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_xorv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_smaxv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_umaxv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_sminv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_uminv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_mulv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_divv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_udivv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_modv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_umodv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_addv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_subv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_andv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_iorv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_xorv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_smaxv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_umaxv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_sminv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_uminv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_mulv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_divv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_udivv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_modv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_umodv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_addv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_subv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_andv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_iorv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_xorv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_smaxv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_umaxv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_sminv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_uminv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_mulv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_divv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_udivv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_modv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_umodv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_addv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_subv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_andv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_iorv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_xorv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_smaxv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_umaxv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_sminv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_uminv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_mulv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_divv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_udivv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_modv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_umodv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_addv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_subv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_andv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_iorv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_xorv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_smaxv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_umaxv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_sminv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_uminv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_mulv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_divv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_udivv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_modv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_umodv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_addv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_len_subv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_len_andv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_len_iorv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_len_xorv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_len_smaxv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_len_umaxv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_len_sminv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_len_uminv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_len_mulv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_len_divv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_len_udivv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_len_modv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_len_umodv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_len_addv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_len_subv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_len_andv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_len_iorv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_len_xorv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_len_smaxv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_len_umaxv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_len_sminv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_len_uminv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_len_mulv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_len_divv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_len_udivv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_len_modv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_len_umodv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_len_addv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_len_subv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_len_andv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_len_iorv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_len_xorv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_len_smaxv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_len_umaxv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_len_sminv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_len_uminv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_len_mulv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_len_divv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_len_udivv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_len_modv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_len_umodv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_len_addv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_len_subv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_len_andv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_len_iorv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_len_xorv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_len_smaxv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_len_umaxv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_len_sminv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_len_uminv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_len_mulv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_len_divv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_len_udivv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_len_modv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_len_umodv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_len_addv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_len_subv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_len_andv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_len_iorv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_len_xorv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_len_smaxv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_len_umaxv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_len_sminv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_len_uminv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_len_mulv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_len_divv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_len_udivv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_len_modv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_len_umodv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_len_addv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_subv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_andv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_iorv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_xorv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_smaxv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_umaxv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_sminv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_uminv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_mulv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_divv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_udivv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_modv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_umodv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_addv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_subv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_andv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_iorv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_xorv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_smaxv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_umaxv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_sminv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_uminv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_mulv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_divv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_udivv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_modv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_umodv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_addv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_subv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_andv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_iorv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_xorv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_smaxv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_umaxv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_sminv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_uminv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_mulv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_divv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_udivv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_modv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_umodv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_addv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_subv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_andv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_iorv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_xorv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_smaxv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_umaxv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_sminv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_uminv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_mulv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_divv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_udivv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_modv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_umodv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_addv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_subv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_andv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_iorv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_xorv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_smaxv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_umaxv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_sminv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_uminv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_mulv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_divv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_udivv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_modv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_umodv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_addv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_subv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_andv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_iorv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_xorv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_smaxv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_umaxv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_sminv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_uminv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_mulv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_divv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_udivv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_modv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_umodv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_addv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_subv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_andv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_iorv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_xorv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_smaxv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_umaxv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_sminv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_uminv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_mulv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_divv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_udivv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_modv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_umodv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_addv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_len_subv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_len_andv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_len_iorv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_len_xorv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_len_smaxv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_len_umaxv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_len_sminv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_len_uminv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_len_mulv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_len_divv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_len_udivv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_len_modv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_len_umodv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_len_addv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_len_subv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_len_andv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_len_iorv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_len_xorv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_len_smaxv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_len_umaxv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_len_sminv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_len_uminv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_len_mulv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_len_divv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_len_udivv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_len_modv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_len_umodv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_len_addv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_len_subv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_len_andv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_len_iorv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_len_xorv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_len_smaxv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_len_umaxv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_len_sminv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_len_uminv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_len_mulv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_len_divv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_len_udivv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_len_modv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_len_umodv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_len_addv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_len_subv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_len_andv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_len_iorv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_len_xorv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_len_smaxv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_len_umaxv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_len_sminv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_len_uminv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_len_mulv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_len_divv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_len_udivv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_len_modv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_len_umodv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_len_addv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_subv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_andv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_iorv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_xorv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_smaxv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_umaxv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_sminv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_uminv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_mulv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_divv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_udivv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_modv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_umodv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_addv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_subv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_andv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_iorv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_xorv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_smaxv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_umaxv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_sminv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_uminv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_mulv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_divv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_udivv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_modv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_umodv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_addv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_subv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_andv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_iorv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_xorv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_smaxv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_umaxv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_sminv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_uminv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_mulv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_divv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_udivv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_modv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_umodv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_addv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_subv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_andv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_iorv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_xorv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_smaxv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_umaxv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_sminv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_uminv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_mulv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_divv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_udivv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_modv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_umodv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_addv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_subv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_andv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_iorv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_xorv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_smaxv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_umaxv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_sminv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_uminv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_mulv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_divv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_udivv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_modv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_umodv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_addv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_subv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_andv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_iorv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_xorv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_smaxv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_umaxv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_sminv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_uminv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_mulv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_divv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_udivv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_modv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_umodv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_addv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_subv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_andv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_iorv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_xorv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_smaxv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_umaxv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_sminv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_uminv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_mulv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_divv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_udivv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_modv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_umodv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_addv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_subv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_andv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_iorv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_xorv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_smaxv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_umaxv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_sminv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_uminv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_mulv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_divv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_udivv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_modv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_umodv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_addv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_subv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_andv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_iorv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_xorv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_smaxv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_umaxv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_sminv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_uminv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_mulv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_divv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_udivv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_modv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_umodv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_addv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_subv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_andv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_iorv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_xorv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_smaxv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_umaxv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_sminv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_uminv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_mulv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_divv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_udivv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_modv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_umodv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_addv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_subv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_andv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_iorv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_xorv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_smaxv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_umaxv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_sminv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_uminv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_mulv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_divv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_udivv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_modv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_umodv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_addv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_subv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_andv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_iorv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_xorv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_smaxv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_umaxv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_sminv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_uminv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_mulv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_divv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_udivv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_modv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_umodv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_addv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_subv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_andv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_iorv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_xorv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_smaxv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_umaxv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_sminv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_uminv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_mulv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_divv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_udivv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_modv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_umodv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_addv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_subv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_andv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_iorv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_xorv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_smaxv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_umaxv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_sminv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_uminv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_mulv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_divv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_udivv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_modv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_umodv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_addv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_subv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_andv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_iorv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_xorv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_smaxv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_umaxv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_sminv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_uminv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_mulv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_divv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_udivv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_modv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_umodv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_addv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_subv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_andv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_iorv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_xorv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_smaxv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_umaxv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_sminv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_uminv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_mulv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_divv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_udivv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_modv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_umodv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_addv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_subv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_andv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_iorv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_xorv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_smaxv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_umaxv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_sminv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_uminv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_mulv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_divv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_udivv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_modv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_umodv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_addrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_mulrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_subrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_divrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_addrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_mulrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_subrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_divrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_addrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_mulrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_subrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_divrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_addrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_mulrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_subrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_divrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_addrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_mulrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_subrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_divrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_addrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_mulrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_subrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_divrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_addrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_mulrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_subrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_divrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_addrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_mulrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_subrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_divrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_addrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_mulrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_subrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_divrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_addrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_mulrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_subrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_divrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_addrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_mulrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_subrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_divrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_addrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_mulrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_subrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_divrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_addrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_mulrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_subrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_divrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_addrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_mulrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_subrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_divrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_addrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_mulrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_subrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_divrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_addv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_mulv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_subv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_divv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_addv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_mulv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_subv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_divv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_addv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_mulv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_subv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_divv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_addv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_mulv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_subv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_divv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_addv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_mulv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_subv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_divv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_addv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_mulv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_subv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_divv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_addv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_mulv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_subv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_divv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_addv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_mulv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_subv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_divv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_addv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_mulv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_subv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_divv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_addv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_mulv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_subv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_divv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_addv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_mulv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_subv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_divv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_addv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_mulv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_subv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_divv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_addv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_mulv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_subv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_divv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_addv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_mulv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_subv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_divv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_addv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_mulv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_subv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_divv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_addv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_mulv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_subv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_divv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_addv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_mulv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_subv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_divv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_addv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_mulv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_subv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_divv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_addv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_mulv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_subv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_divv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_addv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_mulv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_subv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_divv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_addv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_mulv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_subv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_divv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_addv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_mulv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_subv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_divv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_addv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_mulv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_subv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_divv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_addv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_mulv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_subv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_divv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_addv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_mulv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_subv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_divv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_addv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_mulv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_subv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_divv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_addv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_mulv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_subv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_divv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_addv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_mulv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_subv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_divv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_addv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_mulv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_subv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_divv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_addv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_mulv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_subv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_divv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_addv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_mulv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_subv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_divv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_addv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_mulv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_subv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_divv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_addv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_mulv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_subv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_divv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_addrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_mulrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_subrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_divrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_addrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_mulrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_subrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_divrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_addrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_mulrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_subrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_divrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_addrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_mulrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_subrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_divrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_addrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_mulrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_subrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_divrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_addrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_mulrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_subrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_divrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_addrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_mulrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_subrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_divrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_addrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_mulrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_subrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_divrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_addrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_mulrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_subrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_divrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_addrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_mulrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_subrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_divrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_addrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_mulrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_subrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_divrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_addrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_mulrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_subrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_divrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_addrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_mulrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_subrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_divrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_addrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_mulrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_subrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_divrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_addrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_mulrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_subrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_divrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_addv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_mulv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_subv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_divv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_addv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_mulv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_subv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_divv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_addv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_mulv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_subv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_divv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_addv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_mulv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_subv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_divv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_addv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_mulv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_subv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_divv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_addv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_mulv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_subv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_divv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_addv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_mulv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_subv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_divv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_addv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_mulv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_subv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_divv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_addv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_mulv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_subv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_divv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_addv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_mulv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_subv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_divv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_addv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_mulv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_subv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_divv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_addv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_mulv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_subv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_divv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_addv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_mulv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_subv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_divv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_addv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_mulv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_subv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_divv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_addv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_mulv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_subv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_divv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_addv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_mulv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_subv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_divv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_addv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_mulv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_subv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_divv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_addv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_mulv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_subv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_divv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_addv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_mulv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_subv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_divv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_addv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_mulv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_subv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_divv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_addv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_mulv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_subv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_divv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_addv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_mulv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_subv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_divv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_addv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_mulv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_subv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_divv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_addv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_mulv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_subv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_divv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_addv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_mulv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_subv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_divv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_addv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_mulv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_subv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_divv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_addv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_mulv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_subv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_divv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_addv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_mulv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_subv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_divv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_addv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_mulv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_subv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_divv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_addv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_mulv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_subv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_divv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_addv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_mulv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_subv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_divv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_addv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_mulv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_subv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_divv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_addv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_mulv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_subv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_divv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_smaxrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_sminrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_smaxrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_sminrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_smaxrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_sminrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_smaxrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_sminrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_smaxrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_sminrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_smaxrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_sminrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_smaxrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_sminrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_smaxrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_sminrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_smaxrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_sminrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_smaxrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_sminrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_smaxrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_sminrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_smaxrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_sminrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_smaxrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_sminrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_smaxrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_sminrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_smaxrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_sminrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_smaxv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_sminv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_smaxv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_sminv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_smaxv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_sminv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_smaxv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_sminv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_smaxv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_sminv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_smaxv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_sminv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_smaxv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_sminv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_smaxv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_sminv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_smaxv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_sminv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_smaxv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_sminv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_smaxv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_sminv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_smaxv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_sminv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_smaxv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_sminv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_smaxv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_sminv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_smaxv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_sminv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_smaxv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_sminv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_smaxv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_sminv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_smaxv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_sminv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_smaxv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_sminv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_smaxv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_sminv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_smaxv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_sminv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_smaxv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_sminv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_smaxv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_sminv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_smaxv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_sminv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_smaxv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_sminv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_smaxv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_sminv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_smaxv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_sminv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_smaxv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_sminv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_smaxv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_sminv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_smaxv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_sminv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_smaxv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_sminv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_smaxv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_sminv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_smaxv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_sminv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_smaxrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_sminrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_smaxrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_sminrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_smaxrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_sminrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_smaxrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_sminrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_smaxrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_sminrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_smaxrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_sminrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_smaxrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_sminrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_smaxrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_sminrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_smaxrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_sminrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_smaxrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_sminrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_smaxrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_sminrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_smaxrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_sminrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_smaxrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_sminrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_smaxrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_sminrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_smaxrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_sminrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_smaxv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_sminv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_smaxv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_sminv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_smaxv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_sminv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_smaxv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_sminv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_smaxv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_sminv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_smaxv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_sminv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_smaxv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_sminv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_smaxv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_sminv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_smaxv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_sminv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_smaxv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_sminv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_smaxv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_sminv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_smaxv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_sminv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_smaxv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_sminv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_smaxv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_sminv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_smaxv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_sminv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_smaxv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_sminv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_smaxv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_sminv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_smaxv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_sminv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_smaxv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_sminv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_smaxv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_sminv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_smaxv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_sminv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_smaxv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_sminv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_smaxv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_sminv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_smaxv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_sminv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_smaxv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_sminv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_smaxv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_sminv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_smaxv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_sminv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_smaxv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_sminv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_smaxv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_sminv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_smaxv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_sminv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_smaxv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_sminv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_smaxv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_sminv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_smaxv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_sminv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fmaxrvvm8hf ((TARGET_VECTOR && !HONOR_SNANS (RVVM8HFmode)) && (TARGET_ZVFH))
#define HAVE_cond_fminrvvm8hf ((TARGET_VECTOR && !HONOR_SNANS (RVVM8HFmode)) && (TARGET_ZVFH))
#define HAVE_cond_fmaxrvvm4hf ((TARGET_VECTOR && !HONOR_SNANS (RVVM4HFmode)) && (TARGET_ZVFH))
#define HAVE_cond_fminrvvm4hf ((TARGET_VECTOR && !HONOR_SNANS (RVVM4HFmode)) && (TARGET_ZVFH))
#define HAVE_cond_fmaxrvvm2hf ((TARGET_VECTOR && !HONOR_SNANS (RVVM2HFmode)) && (TARGET_ZVFH))
#define HAVE_cond_fminrvvm2hf ((TARGET_VECTOR && !HONOR_SNANS (RVVM2HFmode)) && (TARGET_ZVFH))
#define HAVE_cond_fmaxrvvm1hf ((TARGET_VECTOR && !HONOR_SNANS (RVVM1HFmode)) && (TARGET_ZVFH))
#define HAVE_cond_fminrvvm1hf ((TARGET_VECTOR && !HONOR_SNANS (RVVM1HFmode)) && (TARGET_ZVFH))
#define HAVE_cond_fmaxrvvmf2hf ((TARGET_VECTOR && !HONOR_SNANS (RVVMF2HFmode)) && (TARGET_ZVFH))
#define HAVE_cond_fminrvvmf2hf ((TARGET_VECTOR && !HONOR_SNANS (RVVMF2HFmode)) && (TARGET_ZVFH))
#define HAVE_cond_fmaxrvvmf4hf ((TARGET_VECTOR && !HONOR_SNANS (RVVMF4HFmode)) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fminrvvmf4hf ((TARGET_VECTOR && !HONOR_SNANS (RVVMF4HFmode)) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fmaxrvvm8sf ((TARGET_VECTOR && !HONOR_SNANS (RVVM8SFmode)) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fminrvvm8sf ((TARGET_VECTOR && !HONOR_SNANS (RVVM8SFmode)) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fmaxrvvm4sf ((TARGET_VECTOR && !HONOR_SNANS (RVVM4SFmode)) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fminrvvm4sf ((TARGET_VECTOR && !HONOR_SNANS (RVVM4SFmode)) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fmaxrvvm2sf ((TARGET_VECTOR && !HONOR_SNANS (RVVM2SFmode)) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fminrvvm2sf ((TARGET_VECTOR && !HONOR_SNANS (RVVM2SFmode)) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fmaxrvvm1sf ((TARGET_VECTOR && !HONOR_SNANS (RVVM1SFmode)) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fminrvvm1sf ((TARGET_VECTOR && !HONOR_SNANS (RVVM1SFmode)) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fmaxrvvmf2sf ((TARGET_VECTOR && !HONOR_SNANS (RVVMF2SFmode)) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fminrvvmf2sf ((TARGET_VECTOR && !HONOR_SNANS (RVVMF2SFmode)) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fmaxrvvm8df ((TARGET_VECTOR && !HONOR_SNANS (RVVM8DFmode)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fminrvvm8df ((TARGET_VECTOR && !HONOR_SNANS (RVVM8DFmode)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fmaxrvvm4df ((TARGET_VECTOR && !HONOR_SNANS (RVVM4DFmode)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fminrvvm4df ((TARGET_VECTOR && !HONOR_SNANS (RVVM4DFmode)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fmaxrvvm2df ((TARGET_VECTOR && !HONOR_SNANS (RVVM2DFmode)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fminrvvm2df ((TARGET_VECTOR && !HONOR_SNANS (RVVM2DFmode)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fmaxrvvm1df ((TARGET_VECTOR && !HONOR_SNANS (RVVM1DFmode)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fminrvvm1df ((TARGET_VECTOR && !HONOR_SNANS (RVVM1DFmode)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fmaxv1hf ((TARGET_VECTOR && !HONOR_SNANS (V1HFmode)) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_fminv1hf ((TARGET_VECTOR && !HONOR_SNANS (V1HFmode)) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_fmaxv2hf ((TARGET_VECTOR && !HONOR_SNANS (V2HFmode)) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_fminv2hf ((TARGET_VECTOR && !HONOR_SNANS (V2HFmode)) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_fmaxv4hf ((TARGET_VECTOR && !HONOR_SNANS (V4HFmode)) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_fminv4hf ((TARGET_VECTOR && !HONOR_SNANS (V4HFmode)) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_fmaxv8hf ((TARGET_VECTOR && !HONOR_SNANS (V8HFmode)) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_fminv8hf ((TARGET_VECTOR && !HONOR_SNANS (V8HFmode)) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_fmaxv16hf ((TARGET_VECTOR && !HONOR_SNANS (V16HFmode)) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_fminv16hf ((TARGET_VECTOR && !HONOR_SNANS (V16HFmode)) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_fmaxv32hf ((TARGET_VECTOR && !HONOR_SNANS (V32HFmode)) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fminv32hf ((TARGET_VECTOR && !HONOR_SNANS (V32HFmode)) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fmaxv64hf ((TARGET_VECTOR && !HONOR_SNANS (V64HFmode)) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fminv64hf ((TARGET_VECTOR && !HONOR_SNANS (V64HFmode)) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fmaxv128hf ((TARGET_VECTOR && !HONOR_SNANS (V128HFmode)) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fminv128hf ((TARGET_VECTOR && !HONOR_SNANS (V128HFmode)) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fmaxv256hf ((TARGET_VECTOR && !HONOR_SNANS (V256HFmode)) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fminv256hf ((TARGET_VECTOR && !HONOR_SNANS (V256HFmode)) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fmaxv512hf ((TARGET_VECTOR && !HONOR_SNANS (V512HFmode)) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fminv512hf ((TARGET_VECTOR && !HONOR_SNANS (V512HFmode)) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fmaxv1024hf ((TARGET_VECTOR && !HONOR_SNANS (V1024HFmode)) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fminv1024hf ((TARGET_VECTOR && !HONOR_SNANS (V1024HFmode)) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fmaxv2048hf ((TARGET_VECTOR && !HONOR_SNANS (V2048HFmode)) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fminv2048hf ((TARGET_VECTOR && !HONOR_SNANS (V2048HFmode)) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fmaxv1sf ((TARGET_VECTOR && !HONOR_SNANS (V1SFmode)) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fminv1sf ((TARGET_VECTOR && !HONOR_SNANS (V1SFmode)) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fmaxv2sf ((TARGET_VECTOR && !HONOR_SNANS (V2SFmode)) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fminv2sf ((TARGET_VECTOR && !HONOR_SNANS (V2SFmode)) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fmaxv4sf ((TARGET_VECTOR && !HONOR_SNANS (V4SFmode)) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fminv4sf ((TARGET_VECTOR && !HONOR_SNANS (V4SFmode)) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fmaxv8sf ((TARGET_VECTOR && !HONOR_SNANS (V8SFmode)) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fminv8sf ((TARGET_VECTOR && !HONOR_SNANS (V8SFmode)) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fmaxv16sf ((TARGET_VECTOR && !HONOR_SNANS (V16SFmode)) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fminv16sf ((TARGET_VECTOR && !HONOR_SNANS (V16SFmode)) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fmaxv32sf ((TARGET_VECTOR && !HONOR_SNANS (V32SFmode)) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fminv32sf ((TARGET_VECTOR && !HONOR_SNANS (V32SFmode)) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fmaxv64sf ((TARGET_VECTOR && !HONOR_SNANS (V64SFmode)) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fminv64sf ((TARGET_VECTOR && !HONOR_SNANS (V64SFmode)) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fmaxv128sf ((TARGET_VECTOR && !HONOR_SNANS (V128SFmode)) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fminv128sf ((TARGET_VECTOR && !HONOR_SNANS (V128SFmode)) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fmaxv256sf ((TARGET_VECTOR && !HONOR_SNANS (V256SFmode)) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fminv256sf ((TARGET_VECTOR && !HONOR_SNANS (V256SFmode)) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fmaxv512sf ((TARGET_VECTOR && !HONOR_SNANS (V512SFmode)) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fminv512sf ((TARGET_VECTOR && !HONOR_SNANS (V512SFmode)) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fmaxv1024sf ((TARGET_VECTOR && !HONOR_SNANS (V1024SFmode)) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fminv1024sf ((TARGET_VECTOR && !HONOR_SNANS (V1024SFmode)) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fmaxv1df ((TARGET_VECTOR && !HONOR_SNANS (V1DFmode)) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fminv1df ((TARGET_VECTOR && !HONOR_SNANS (V1DFmode)) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fmaxv2df ((TARGET_VECTOR && !HONOR_SNANS (V2DFmode)) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fminv2df ((TARGET_VECTOR && !HONOR_SNANS (V2DFmode)) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fmaxv4df ((TARGET_VECTOR && !HONOR_SNANS (V4DFmode)) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fminv4df ((TARGET_VECTOR && !HONOR_SNANS (V4DFmode)) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fmaxv8df ((TARGET_VECTOR && !HONOR_SNANS (V8DFmode)) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fminv8df ((TARGET_VECTOR && !HONOR_SNANS (V8DFmode)) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fmaxv16df ((TARGET_VECTOR && !HONOR_SNANS (V16DFmode)) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fminv16df ((TARGET_VECTOR && !HONOR_SNANS (V16DFmode)) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fmaxv32df ((TARGET_VECTOR && !HONOR_SNANS (V32DFmode)) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fminv32df ((TARGET_VECTOR && !HONOR_SNANS (V32DFmode)) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fmaxv64df ((TARGET_VECTOR && !HONOR_SNANS (V64DFmode)) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fminv64df ((TARGET_VECTOR && !HONOR_SNANS (V64DFmode)) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fmaxv128df ((TARGET_VECTOR && !HONOR_SNANS (V128DFmode)) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fminv128df ((TARGET_VECTOR && !HONOR_SNANS (V128DFmode)) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fmaxv256df ((TARGET_VECTOR && !HONOR_SNANS (V256DFmode)) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fminv256df ((TARGET_VECTOR && !HONOR_SNANS (V256DFmode)) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fmaxv512df ((TARGET_VECTOR && !HONOR_SNANS (V512DFmode)) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fminv512df ((TARGET_VECTOR && !HONOR_SNANS (V512DFmode)) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fmaxrvvm8hf ((TARGET_VECTOR && !HONOR_SNANS (RVVM8HFmode)) && (TARGET_ZVFH))
#define HAVE_cond_len_fminrvvm8hf ((TARGET_VECTOR && !HONOR_SNANS (RVVM8HFmode)) && (TARGET_ZVFH))
#define HAVE_cond_len_fmaxrvvm4hf ((TARGET_VECTOR && !HONOR_SNANS (RVVM4HFmode)) && (TARGET_ZVFH))
#define HAVE_cond_len_fminrvvm4hf ((TARGET_VECTOR && !HONOR_SNANS (RVVM4HFmode)) && (TARGET_ZVFH))
#define HAVE_cond_len_fmaxrvvm2hf ((TARGET_VECTOR && !HONOR_SNANS (RVVM2HFmode)) && (TARGET_ZVFH))
#define HAVE_cond_len_fminrvvm2hf ((TARGET_VECTOR && !HONOR_SNANS (RVVM2HFmode)) && (TARGET_ZVFH))
#define HAVE_cond_len_fmaxrvvm1hf ((TARGET_VECTOR && !HONOR_SNANS (RVVM1HFmode)) && (TARGET_ZVFH))
#define HAVE_cond_len_fminrvvm1hf ((TARGET_VECTOR && !HONOR_SNANS (RVVM1HFmode)) && (TARGET_ZVFH))
#define HAVE_cond_len_fmaxrvvmf2hf ((TARGET_VECTOR && !HONOR_SNANS (RVVMF2HFmode)) && (TARGET_ZVFH))
#define HAVE_cond_len_fminrvvmf2hf ((TARGET_VECTOR && !HONOR_SNANS (RVVMF2HFmode)) && (TARGET_ZVFH))
#define HAVE_cond_len_fmaxrvvmf4hf ((TARGET_VECTOR && !HONOR_SNANS (RVVMF4HFmode)) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fminrvvmf4hf ((TARGET_VECTOR && !HONOR_SNANS (RVVMF4HFmode)) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fmaxrvvm8sf ((TARGET_VECTOR && !HONOR_SNANS (RVVM8SFmode)) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fminrvvm8sf ((TARGET_VECTOR && !HONOR_SNANS (RVVM8SFmode)) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fmaxrvvm4sf ((TARGET_VECTOR && !HONOR_SNANS (RVVM4SFmode)) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fminrvvm4sf ((TARGET_VECTOR && !HONOR_SNANS (RVVM4SFmode)) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fmaxrvvm2sf ((TARGET_VECTOR && !HONOR_SNANS (RVVM2SFmode)) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fminrvvm2sf ((TARGET_VECTOR && !HONOR_SNANS (RVVM2SFmode)) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fmaxrvvm1sf ((TARGET_VECTOR && !HONOR_SNANS (RVVM1SFmode)) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fminrvvm1sf ((TARGET_VECTOR && !HONOR_SNANS (RVVM1SFmode)) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fmaxrvvmf2sf ((TARGET_VECTOR && !HONOR_SNANS (RVVMF2SFmode)) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fminrvvmf2sf ((TARGET_VECTOR && !HONOR_SNANS (RVVMF2SFmode)) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fmaxrvvm8df ((TARGET_VECTOR && !HONOR_SNANS (RVVM8DFmode)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fminrvvm8df ((TARGET_VECTOR && !HONOR_SNANS (RVVM8DFmode)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fmaxrvvm4df ((TARGET_VECTOR && !HONOR_SNANS (RVVM4DFmode)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fminrvvm4df ((TARGET_VECTOR && !HONOR_SNANS (RVVM4DFmode)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fmaxrvvm2df ((TARGET_VECTOR && !HONOR_SNANS (RVVM2DFmode)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fminrvvm2df ((TARGET_VECTOR && !HONOR_SNANS (RVVM2DFmode)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fmaxrvvm1df ((TARGET_VECTOR && !HONOR_SNANS (RVVM1DFmode)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fminrvvm1df ((TARGET_VECTOR && !HONOR_SNANS (RVVM1DFmode)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fmaxv1hf ((TARGET_VECTOR && !HONOR_SNANS (V1HFmode)) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fminv1hf ((TARGET_VECTOR && !HONOR_SNANS (V1HFmode)) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fmaxv2hf ((TARGET_VECTOR && !HONOR_SNANS (V2HFmode)) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fminv2hf ((TARGET_VECTOR && !HONOR_SNANS (V2HFmode)) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fmaxv4hf ((TARGET_VECTOR && !HONOR_SNANS (V4HFmode)) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fminv4hf ((TARGET_VECTOR && !HONOR_SNANS (V4HFmode)) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fmaxv8hf ((TARGET_VECTOR && !HONOR_SNANS (V8HFmode)) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fminv8hf ((TARGET_VECTOR && !HONOR_SNANS (V8HFmode)) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fmaxv16hf ((TARGET_VECTOR && !HONOR_SNANS (V16HFmode)) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fminv16hf ((TARGET_VECTOR && !HONOR_SNANS (V16HFmode)) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fmaxv32hf ((TARGET_VECTOR && !HONOR_SNANS (V32HFmode)) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fminv32hf ((TARGET_VECTOR && !HONOR_SNANS (V32HFmode)) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fmaxv64hf ((TARGET_VECTOR && !HONOR_SNANS (V64HFmode)) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fminv64hf ((TARGET_VECTOR && !HONOR_SNANS (V64HFmode)) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fmaxv128hf ((TARGET_VECTOR && !HONOR_SNANS (V128HFmode)) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fminv128hf ((TARGET_VECTOR && !HONOR_SNANS (V128HFmode)) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fmaxv256hf ((TARGET_VECTOR && !HONOR_SNANS (V256HFmode)) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fminv256hf ((TARGET_VECTOR && !HONOR_SNANS (V256HFmode)) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fmaxv512hf ((TARGET_VECTOR && !HONOR_SNANS (V512HFmode)) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fminv512hf ((TARGET_VECTOR && !HONOR_SNANS (V512HFmode)) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fmaxv1024hf ((TARGET_VECTOR && !HONOR_SNANS (V1024HFmode)) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fminv1024hf ((TARGET_VECTOR && !HONOR_SNANS (V1024HFmode)) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fmaxv2048hf ((TARGET_VECTOR && !HONOR_SNANS (V2048HFmode)) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fminv2048hf ((TARGET_VECTOR && !HONOR_SNANS (V2048HFmode)) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fmaxv1sf ((TARGET_VECTOR && !HONOR_SNANS (V1SFmode)) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fminv1sf ((TARGET_VECTOR && !HONOR_SNANS (V1SFmode)) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fmaxv2sf ((TARGET_VECTOR && !HONOR_SNANS (V2SFmode)) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fminv2sf ((TARGET_VECTOR && !HONOR_SNANS (V2SFmode)) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fmaxv4sf ((TARGET_VECTOR && !HONOR_SNANS (V4SFmode)) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fminv4sf ((TARGET_VECTOR && !HONOR_SNANS (V4SFmode)) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fmaxv8sf ((TARGET_VECTOR && !HONOR_SNANS (V8SFmode)) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fminv8sf ((TARGET_VECTOR && !HONOR_SNANS (V8SFmode)) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fmaxv16sf ((TARGET_VECTOR && !HONOR_SNANS (V16SFmode)) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fminv16sf ((TARGET_VECTOR && !HONOR_SNANS (V16SFmode)) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fmaxv32sf ((TARGET_VECTOR && !HONOR_SNANS (V32SFmode)) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fminv32sf ((TARGET_VECTOR && !HONOR_SNANS (V32SFmode)) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fmaxv64sf ((TARGET_VECTOR && !HONOR_SNANS (V64SFmode)) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fminv64sf ((TARGET_VECTOR && !HONOR_SNANS (V64SFmode)) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fmaxv128sf ((TARGET_VECTOR && !HONOR_SNANS (V128SFmode)) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fminv128sf ((TARGET_VECTOR && !HONOR_SNANS (V128SFmode)) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fmaxv256sf ((TARGET_VECTOR && !HONOR_SNANS (V256SFmode)) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fminv256sf ((TARGET_VECTOR && !HONOR_SNANS (V256SFmode)) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fmaxv512sf ((TARGET_VECTOR && !HONOR_SNANS (V512SFmode)) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fminv512sf ((TARGET_VECTOR && !HONOR_SNANS (V512SFmode)) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fmaxv1024sf ((TARGET_VECTOR && !HONOR_SNANS (V1024SFmode)) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fminv1024sf ((TARGET_VECTOR && !HONOR_SNANS (V1024SFmode)) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fmaxv1df ((TARGET_VECTOR && !HONOR_SNANS (V1DFmode)) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fminv1df ((TARGET_VECTOR && !HONOR_SNANS (V1DFmode)) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fmaxv2df ((TARGET_VECTOR && !HONOR_SNANS (V2DFmode)) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fminv2df ((TARGET_VECTOR && !HONOR_SNANS (V2DFmode)) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fmaxv4df ((TARGET_VECTOR && !HONOR_SNANS (V4DFmode)) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fminv4df ((TARGET_VECTOR && !HONOR_SNANS (V4DFmode)) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fmaxv8df ((TARGET_VECTOR && !HONOR_SNANS (V8DFmode)) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fminv8df ((TARGET_VECTOR && !HONOR_SNANS (V8DFmode)) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fmaxv16df ((TARGET_VECTOR && !HONOR_SNANS (V16DFmode)) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fminv16df ((TARGET_VECTOR && !HONOR_SNANS (V16DFmode)) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fmaxv32df ((TARGET_VECTOR && !HONOR_SNANS (V32DFmode)) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fminv32df ((TARGET_VECTOR && !HONOR_SNANS (V32DFmode)) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fmaxv64df ((TARGET_VECTOR && !HONOR_SNANS (V64DFmode)) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fminv64df ((TARGET_VECTOR && !HONOR_SNANS (V64DFmode)) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fmaxv128df ((TARGET_VECTOR && !HONOR_SNANS (V128DFmode)) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fminv128df ((TARGET_VECTOR && !HONOR_SNANS (V128DFmode)) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fmaxv256df ((TARGET_VECTOR && !HONOR_SNANS (V256DFmode)) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fminv256df ((TARGET_VECTOR && !HONOR_SNANS (V256DFmode)) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fmaxv512df ((TARGET_VECTOR && !HONOR_SNANS (V512DFmode)) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fminv512df ((TARGET_VECTOR && !HONOR_SNANS (V512DFmode)) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_copysignrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_copysignrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_copysignrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_copysignrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_copysignrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_copysignrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_copysignrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_copysignrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_copysignrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_copysignrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_copysignrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_copysignrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_copysignrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_copysignrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_copysignrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_copysignv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_copysignv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_copysignv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_copysignv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_copysignv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_copysignv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_copysignv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_copysignv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_copysignv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_copysignv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_copysignv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_copysignv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_copysignv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_copysignv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_copysignv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_copysignv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_copysignv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_copysignv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_copysignv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_copysignv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_copysignv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_copysignv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_copysignv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_copysignv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_copysignv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_copysignv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_copysignv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_copysignv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_copysignv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_copysignv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_copysignv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_copysignv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_copysignv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fmarvvm8qi (TARGET_VECTOR)
#define HAVE_cond_fmarvvm4qi (TARGET_VECTOR)
#define HAVE_cond_fmarvvm2qi (TARGET_VECTOR)
#define HAVE_cond_fmarvvm1qi (TARGET_VECTOR)
#define HAVE_cond_fmarvvm8hi (TARGET_VECTOR)
#define HAVE_cond_fmarvvm4hi (TARGET_VECTOR)
#define HAVE_cond_fmarvvm2hi (TARGET_VECTOR)
#define HAVE_cond_fmarvvm1hi (TARGET_VECTOR)
#define HAVE_cond_fmarvvm8si (TARGET_VECTOR)
#define HAVE_cond_fmarvvm4si (TARGET_VECTOR)
#define HAVE_cond_fmarvvm2si (TARGET_VECTOR)
#define HAVE_cond_fmarvvm1si (TARGET_VECTOR)
#define HAVE_cond_fmarvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fmarvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fmarvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fmarvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fmarvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_fmarvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_fmarvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_fmarvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_fmarvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_fmarvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_fmav1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_fmav2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_fmav4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_fmav8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_fmav16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_fmav32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_fmav64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fmav128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fmav256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fmav512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fmav1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fmav2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fmav4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fmav1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_fmav2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_fmav4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_fmav8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_fmav16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_fmav32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fmav64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fmav128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fmav256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fmav512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fmav1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fmav2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fmav1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_fmav2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_fmav4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_fmav8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_fmav16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fmav32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fmav64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fmav128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fmav256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fmav512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fmav1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fmav1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fmav2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fmav4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fmav8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fmav16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fmav32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fmav64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fmav128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fmav256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fmav512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fmarvvm8qi (TARGET_VECTOR)
#define HAVE_cond_len_fmarvvm4qi (TARGET_VECTOR)
#define HAVE_cond_len_fmarvvm2qi (TARGET_VECTOR)
#define HAVE_cond_len_fmarvvm1qi (TARGET_VECTOR)
#define HAVE_cond_len_fmarvvm8hi (TARGET_VECTOR)
#define HAVE_cond_len_fmarvvm4hi (TARGET_VECTOR)
#define HAVE_cond_len_fmarvvm2hi (TARGET_VECTOR)
#define HAVE_cond_len_fmarvvm1hi (TARGET_VECTOR)
#define HAVE_cond_len_fmarvvm8si (TARGET_VECTOR)
#define HAVE_cond_len_fmarvvm4si (TARGET_VECTOR)
#define HAVE_cond_len_fmarvvm2si (TARGET_VECTOR)
#define HAVE_cond_len_fmarvvm1si (TARGET_VECTOR)
#define HAVE_cond_len_fmarvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fmarvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fmarvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fmarvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fmarvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_fmarvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_fmarvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_fmarvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_fmarvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_fmarvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_fmav1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_len_fmav2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_len_fmav4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_len_fmav8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_len_fmav16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_len_fmav32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_len_fmav64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fmav128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fmav256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fmav512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fmav1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fmav2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fmav4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fmav1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_len_fmav2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_len_fmav4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_len_fmav8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_len_fmav16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_len_fmav32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fmav64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fmav128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fmav256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fmav512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fmav1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fmav2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fmav1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_len_fmav2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_len_fmav4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_len_fmav8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_len_fmav16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fmav32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fmav64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fmav128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fmav256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fmav512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fmav1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fmav1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fmav2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fmav4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fmav8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fmav16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fmav32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fmav64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fmav128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fmav256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fmav512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fnmarvvm8qi (TARGET_VECTOR)
#define HAVE_cond_fnmarvvm4qi (TARGET_VECTOR)
#define HAVE_cond_fnmarvvm2qi (TARGET_VECTOR)
#define HAVE_cond_fnmarvvm1qi (TARGET_VECTOR)
#define HAVE_cond_fnmarvvm8hi (TARGET_VECTOR)
#define HAVE_cond_fnmarvvm4hi (TARGET_VECTOR)
#define HAVE_cond_fnmarvvm2hi (TARGET_VECTOR)
#define HAVE_cond_fnmarvvm1hi (TARGET_VECTOR)
#define HAVE_cond_fnmarvvm8si (TARGET_VECTOR)
#define HAVE_cond_fnmarvvm4si (TARGET_VECTOR)
#define HAVE_cond_fnmarvvm2si (TARGET_VECTOR)
#define HAVE_cond_fnmarvvm1si (TARGET_VECTOR)
#define HAVE_cond_fnmarvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fnmarvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fnmarvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fnmarvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fnmarvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_fnmarvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_fnmarvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_fnmarvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_fnmarvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_fnmarvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_fnmav1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_fnmav2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_fnmav4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_fnmav8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_fnmav16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_fnmav32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_fnmav64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fnmav128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fnmav256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fnmav512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fnmav1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fnmav2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fnmav4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fnmav1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_fnmav2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_fnmav4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_fnmav8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_fnmav16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_fnmav32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fnmav64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fnmav128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fnmav256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fnmav512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fnmav1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fnmav2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fnmav1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_fnmav2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_fnmav4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_fnmav8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_fnmav16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fnmav32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fnmav64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fnmav128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fnmav256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fnmav512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fnmav1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fnmav1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fnmav2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fnmav4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fnmav8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fnmav16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fnmav32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fnmav64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fnmav128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fnmav256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fnmav512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fnmarvvm8qi (TARGET_VECTOR)
#define HAVE_cond_len_fnmarvvm4qi (TARGET_VECTOR)
#define HAVE_cond_len_fnmarvvm2qi (TARGET_VECTOR)
#define HAVE_cond_len_fnmarvvm1qi (TARGET_VECTOR)
#define HAVE_cond_len_fnmarvvm8hi (TARGET_VECTOR)
#define HAVE_cond_len_fnmarvvm4hi (TARGET_VECTOR)
#define HAVE_cond_len_fnmarvvm2hi (TARGET_VECTOR)
#define HAVE_cond_len_fnmarvvm1hi (TARGET_VECTOR)
#define HAVE_cond_len_fnmarvvm8si (TARGET_VECTOR)
#define HAVE_cond_len_fnmarvvm4si (TARGET_VECTOR)
#define HAVE_cond_len_fnmarvvm2si (TARGET_VECTOR)
#define HAVE_cond_len_fnmarvvm1si (TARGET_VECTOR)
#define HAVE_cond_len_fnmarvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fnmarvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fnmarvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fnmarvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fnmarvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_fnmarvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_fnmarvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_fnmarvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_fnmarvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_fnmarvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_fnmav1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_len_fnmav2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_len_fnmav4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_len_fnmav8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_len_fnmav16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_len_fnmav32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_len_fnmav64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fnmav128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fnmav256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fnmav512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fnmav1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fnmav2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fnmav4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fnmav1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_len_fnmav2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_len_fnmav4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_len_fnmav8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_len_fnmav16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_len_fnmav32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fnmav64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fnmav128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fnmav256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fnmav512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fnmav1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fnmav2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fnmav1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_len_fnmav2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_len_fnmav4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_len_fnmav8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_len_fnmav16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fnmav32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fnmav64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fnmav128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fnmav256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fnmav512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fnmav1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fnmav1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fnmav2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fnmav4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fnmav8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fnmav16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fnmav32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fnmav64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fnmav128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fnmav256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fnmav512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fmarvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_fmarvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_fmarvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_fmarvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_fmarvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_fmarvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fmarvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fmarvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fmarvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fmarvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fmarvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fmarvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fmarvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fmarvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fmarvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fmav1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_fmav2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_fmav4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_fmav8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_fmav16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_fmav32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fmav64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fmav128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fmav256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fmav512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fmav1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fmav2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fmav1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fmav2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fmav4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fmav8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fmav16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fmav32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fmav64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fmav128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fmav256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fmav512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fmav1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fmav1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fmav2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fmav4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fmav8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fmav16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fmav32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fmav64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fmav128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fmav256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fmav512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fmarvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_fmarvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_fmarvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_fmarvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_fmarvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_fmarvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fmarvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fmarvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fmarvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fmarvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fmarvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fmarvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fmarvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fmarvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fmarvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fmav1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fmav2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fmav4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fmav8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fmav16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fmav32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fmav64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fmav128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fmav256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fmav512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fmav1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fmav2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fmav1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fmav2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fmav4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fmav8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fmav16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fmav32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fmav64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fmav128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fmav256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fmav512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fmav1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fmav1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fmav2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fmav4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fmav8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fmav16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fmav32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fmav64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fmav128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fmav256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fmav512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fnmarvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_fnmarvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_fnmarvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_fnmarvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_fnmarvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_fnmarvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fnmarvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fnmarvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fnmarvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fnmarvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fnmarvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fnmarvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fnmarvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fnmarvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fnmarvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fnmav1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_fnmav2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_fnmav4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_fnmav8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_fnmav16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_fnmav32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fnmav64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fnmav128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fnmav256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fnmav512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fnmav1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fnmav2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fnmav1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fnmav2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fnmav4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fnmav8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fnmav16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fnmav32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fnmav64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fnmav128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fnmav256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fnmav512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fnmav1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fnmav1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fnmav2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fnmav4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fnmav8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fnmav16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fnmav32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fnmav64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fnmav128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fnmav256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fnmav512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fnmarvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_fnmarvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_fnmarvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_fnmarvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_fnmarvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_fnmarvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fnmarvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fnmarvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fnmarvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fnmarvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fnmarvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fnmarvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fnmarvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fnmarvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fnmarvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fnmav1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fnmav2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fnmav4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fnmav8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fnmav16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fnmav32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fnmav64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fnmav128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fnmav256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fnmav512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fnmav1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fnmav2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fnmav1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fnmav2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fnmav4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fnmav8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fnmav16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fnmav32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fnmav64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fnmav128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fnmav256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fnmav512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fnmav1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fnmav1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fnmav2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fnmav4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fnmav8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fnmav16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fnmav32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fnmav64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fnmav128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fnmav256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fnmav512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fmsrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_fmsrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_fmsrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_fmsrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_fmsrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_fmsrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fmsrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fmsrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fmsrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fmsrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fmsrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fmsrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fmsrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fmsrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fmsrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fmsv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_fmsv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_fmsv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_fmsv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_fmsv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_fmsv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fmsv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fmsv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fmsv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fmsv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fmsv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fmsv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fmsv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fmsv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fmsv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fmsv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fmsv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fmsv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fmsv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fmsv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fmsv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fmsv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fmsv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fmsv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fmsv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fmsv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fmsv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fmsv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fmsv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fmsv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fmsv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fmsv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fmsv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fmsrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_fmsrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_fmsrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_fmsrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_fmsrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_fmsrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fmsrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fmsrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fmsrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fmsrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fmsrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fmsrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fmsrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fmsrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fmsrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fmsv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fmsv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fmsv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fmsv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fmsv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fmsv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fmsv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fmsv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fmsv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fmsv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fmsv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fmsv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fmsv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fmsv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fmsv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fmsv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fmsv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fmsv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fmsv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fmsv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fmsv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fmsv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fmsv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fmsv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fmsv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fmsv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fmsv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fmsv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fmsv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fmsv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fmsv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fmsv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fmsv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fnmsrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_fnmsrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_fnmsrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_fnmsrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_fnmsrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_fnmsrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fnmsrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fnmsrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fnmsrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fnmsrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fnmsrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_fnmsrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fnmsrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fnmsrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fnmsrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fnmsv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_fnmsv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_fnmsv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_fnmsv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_fnmsv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_fnmsv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fnmsv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fnmsv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fnmsv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fnmsv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fnmsv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fnmsv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fnmsv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fnmsv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fnmsv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fnmsv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_fnmsv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fnmsv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fnmsv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fnmsv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fnmsv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fnmsv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fnmsv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_fnmsv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fnmsv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fnmsv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_fnmsv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_fnmsv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_fnmsv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_fnmsv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_fnmsv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_fnmsv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_fnmsv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fnmsrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_fnmsrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_fnmsrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_fnmsrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_fnmsrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_fnmsrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fnmsrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fnmsrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fnmsrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fnmsrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fnmsrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_fnmsrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fnmsrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fnmsrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fnmsrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fnmsv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fnmsv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fnmsv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fnmsv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fnmsv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_fnmsv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fnmsv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fnmsv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fnmsv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fnmsv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fnmsv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fnmsv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fnmsv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fnmsv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fnmsv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fnmsv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_fnmsv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fnmsv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fnmsv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fnmsv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fnmsv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fnmsv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fnmsv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_fnmsv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fnmsv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fnmsv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_fnmsv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_fnmsv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_fnmsv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_fnmsv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_fnmsv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_fnmsv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_fnmsv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_smax_scal_rvvm8qi (TARGET_VECTOR)
#define HAVE_reduc_smax_scal_rvvm4qi (TARGET_VECTOR)
#define HAVE_reduc_smax_scal_rvvm2qi (TARGET_VECTOR)
#define HAVE_reduc_smax_scal_rvvm1qi (TARGET_VECTOR)
#define HAVE_reduc_smax_scal_rvvm8hi (TARGET_VECTOR)
#define HAVE_reduc_smax_scal_rvvm4hi (TARGET_VECTOR)
#define HAVE_reduc_smax_scal_rvvm2hi (TARGET_VECTOR)
#define HAVE_reduc_smax_scal_rvvm1hi (TARGET_VECTOR)
#define HAVE_reduc_smax_scal_rvvm8si (TARGET_VECTOR)
#define HAVE_reduc_smax_scal_rvvm4si (TARGET_VECTOR)
#define HAVE_reduc_smax_scal_rvvm2si (TARGET_VECTOR)
#define HAVE_reduc_smax_scal_rvvm1si (TARGET_VECTOR)
#define HAVE_reduc_smax_scal_rvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_smax_scal_rvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_smax_scal_rvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_smax_scal_rvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_smax_scal_rvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_reduc_smax_scal_rvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_reduc_smax_scal_rvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_reduc_smax_scal_rvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_reduc_smax_scal_rvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_reduc_smax_scal_rvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_reduc_smax_scal_v1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_reduc_smax_scal_v2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_reduc_smax_scal_v4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_reduc_smax_scal_v8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_reduc_smax_scal_v16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_reduc_smax_scal_v32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_reduc_smax_scal_v64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_smax_scal_v128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_smax_scal_v256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_smax_scal_v512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_smax_scal_v1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_smax_scal_v2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_smax_scal_v4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_smax_scal_v1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_reduc_smax_scal_v2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_reduc_smax_scal_v4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_reduc_smax_scal_v8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_reduc_smax_scal_v16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_reduc_smax_scal_v32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_smax_scal_v64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_smax_scal_v128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_smax_scal_v256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_smax_scal_v512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_smax_scal_v1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_smax_scal_v2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_smax_scal_v1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_reduc_smax_scal_v2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_reduc_smax_scal_v4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_reduc_smax_scal_v8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_reduc_smax_scal_v16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_smax_scal_v32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_smax_scal_v64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_smax_scal_v128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_smax_scal_v256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_smax_scal_v512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_smax_scal_v1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_smax_scal_v1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_smax_scal_v2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_smax_scal_v4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_smax_scal_v8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_smax_scal_v16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_smax_scal_v32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_smax_scal_v64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_smax_scal_v128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_smax_scal_v256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_smax_scal_v512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_umax_scal_rvvm8qi (TARGET_VECTOR)
#define HAVE_reduc_umax_scal_rvvm4qi (TARGET_VECTOR)
#define HAVE_reduc_umax_scal_rvvm2qi (TARGET_VECTOR)
#define HAVE_reduc_umax_scal_rvvm1qi (TARGET_VECTOR)
#define HAVE_reduc_umax_scal_rvvm8hi (TARGET_VECTOR)
#define HAVE_reduc_umax_scal_rvvm4hi (TARGET_VECTOR)
#define HAVE_reduc_umax_scal_rvvm2hi (TARGET_VECTOR)
#define HAVE_reduc_umax_scal_rvvm1hi (TARGET_VECTOR)
#define HAVE_reduc_umax_scal_rvvm8si (TARGET_VECTOR)
#define HAVE_reduc_umax_scal_rvvm4si (TARGET_VECTOR)
#define HAVE_reduc_umax_scal_rvvm2si (TARGET_VECTOR)
#define HAVE_reduc_umax_scal_rvvm1si (TARGET_VECTOR)
#define HAVE_reduc_umax_scal_rvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_umax_scal_rvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_umax_scal_rvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_umax_scal_rvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_umax_scal_rvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_reduc_umax_scal_rvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_reduc_umax_scal_rvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_reduc_umax_scal_rvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_reduc_umax_scal_rvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_reduc_umax_scal_rvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_reduc_umax_scal_v1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_reduc_umax_scal_v2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_reduc_umax_scal_v4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_reduc_umax_scal_v8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_reduc_umax_scal_v16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_reduc_umax_scal_v32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_reduc_umax_scal_v64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_umax_scal_v128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_umax_scal_v256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_umax_scal_v512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_umax_scal_v1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_umax_scal_v2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_umax_scal_v4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_umax_scal_v1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_reduc_umax_scal_v2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_reduc_umax_scal_v4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_reduc_umax_scal_v8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_reduc_umax_scal_v16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_reduc_umax_scal_v32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_umax_scal_v64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_umax_scal_v128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_umax_scal_v256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_umax_scal_v512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_umax_scal_v1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_umax_scal_v2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_umax_scal_v1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_reduc_umax_scal_v2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_reduc_umax_scal_v4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_reduc_umax_scal_v8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_reduc_umax_scal_v16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_umax_scal_v32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_umax_scal_v64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_umax_scal_v128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_umax_scal_v256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_umax_scal_v512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_umax_scal_v1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_umax_scal_v1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_umax_scal_v2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_umax_scal_v4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_umax_scal_v8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_umax_scal_v16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_umax_scal_v32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_umax_scal_v64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_umax_scal_v128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_umax_scal_v256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_umax_scal_v512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_smin_scal_rvvm8qi (TARGET_VECTOR)
#define HAVE_reduc_smin_scal_rvvm4qi (TARGET_VECTOR)
#define HAVE_reduc_smin_scal_rvvm2qi (TARGET_VECTOR)
#define HAVE_reduc_smin_scal_rvvm1qi (TARGET_VECTOR)
#define HAVE_reduc_smin_scal_rvvm8hi (TARGET_VECTOR)
#define HAVE_reduc_smin_scal_rvvm4hi (TARGET_VECTOR)
#define HAVE_reduc_smin_scal_rvvm2hi (TARGET_VECTOR)
#define HAVE_reduc_smin_scal_rvvm1hi (TARGET_VECTOR)
#define HAVE_reduc_smin_scal_rvvm8si (TARGET_VECTOR)
#define HAVE_reduc_smin_scal_rvvm4si (TARGET_VECTOR)
#define HAVE_reduc_smin_scal_rvvm2si (TARGET_VECTOR)
#define HAVE_reduc_smin_scal_rvvm1si (TARGET_VECTOR)
#define HAVE_reduc_smin_scal_rvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_smin_scal_rvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_smin_scal_rvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_smin_scal_rvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_smin_scal_rvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_reduc_smin_scal_rvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_reduc_smin_scal_rvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_reduc_smin_scal_rvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_reduc_smin_scal_rvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_reduc_smin_scal_rvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_reduc_smin_scal_v1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_reduc_smin_scal_v2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_reduc_smin_scal_v4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_reduc_smin_scal_v8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_reduc_smin_scal_v16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_reduc_smin_scal_v32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_reduc_smin_scal_v64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_smin_scal_v128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_smin_scal_v256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_smin_scal_v512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_smin_scal_v1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_smin_scal_v2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_smin_scal_v4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_smin_scal_v1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_reduc_smin_scal_v2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_reduc_smin_scal_v4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_reduc_smin_scal_v8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_reduc_smin_scal_v16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_reduc_smin_scal_v32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_smin_scal_v64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_smin_scal_v128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_smin_scal_v256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_smin_scal_v512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_smin_scal_v1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_smin_scal_v2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_smin_scal_v1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_reduc_smin_scal_v2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_reduc_smin_scal_v4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_reduc_smin_scal_v8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_reduc_smin_scal_v16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_smin_scal_v32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_smin_scal_v64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_smin_scal_v128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_smin_scal_v256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_smin_scal_v512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_smin_scal_v1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_smin_scal_v1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_smin_scal_v2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_smin_scal_v4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_smin_scal_v8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_smin_scal_v16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_smin_scal_v32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_smin_scal_v64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_smin_scal_v128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_smin_scal_v256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_smin_scal_v512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_umin_scal_rvvm8qi (TARGET_VECTOR)
#define HAVE_reduc_umin_scal_rvvm4qi (TARGET_VECTOR)
#define HAVE_reduc_umin_scal_rvvm2qi (TARGET_VECTOR)
#define HAVE_reduc_umin_scal_rvvm1qi (TARGET_VECTOR)
#define HAVE_reduc_umin_scal_rvvm8hi (TARGET_VECTOR)
#define HAVE_reduc_umin_scal_rvvm4hi (TARGET_VECTOR)
#define HAVE_reduc_umin_scal_rvvm2hi (TARGET_VECTOR)
#define HAVE_reduc_umin_scal_rvvm1hi (TARGET_VECTOR)
#define HAVE_reduc_umin_scal_rvvm8si (TARGET_VECTOR)
#define HAVE_reduc_umin_scal_rvvm4si (TARGET_VECTOR)
#define HAVE_reduc_umin_scal_rvvm2si (TARGET_VECTOR)
#define HAVE_reduc_umin_scal_rvvm1si (TARGET_VECTOR)
#define HAVE_reduc_umin_scal_rvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_umin_scal_rvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_umin_scal_rvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_umin_scal_rvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_umin_scal_rvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_reduc_umin_scal_rvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_reduc_umin_scal_rvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_reduc_umin_scal_rvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_reduc_umin_scal_rvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_reduc_umin_scal_rvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_reduc_umin_scal_v1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_reduc_umin_scal_v2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_reduc_umin_scal_v4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_reduc_umin_scal_v8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_reduc_umin_scal_v16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_reduc_umin_scal_v32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_reduc_umin_scal_v64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_umin_scal_v128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_umin_scal_v256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_umin_scal_v512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_umin_scal_v1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_umin_scal_v2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_umin_scal_v4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_umin_scal_v1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_reduc_umin_scal_v2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_reduc_umin_scal_v4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_reduc_umin_scal_v8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_reduc_umin_scal_v16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_reduc_umin_scal_v32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_umin_scal_v64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_umin_scal_v128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_umin_scal_v256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_umin_scal_v512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_umin_scal_v1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_umin_scal_v2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_umin_scal_v1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_reduc_umin_scal_v2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_reduc_umin_scal_v4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_reduc_umin_scal_v8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_reduc_umin_scal_v16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_umin_scal_v32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_umin_scal_v64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_umin_scal_v128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_umin_scal_v256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_umin_scal_v512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_umin_scal_v1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_umin_scal_v1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_umin_scal_v2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_umin_scal_v4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_umin_scal_v8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_umin_scal_v16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_umin_scal_v32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_umin_scal_v64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_umin_scal_v128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_umin_scal_v256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_umin_scal_v512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_and_scal_rvvm8qi (TARGET_VECTOR)
#define HAVE_reduc_and_scal_rvvm4qi (TARGET_VECTOR)
#define HAVE_reduc_and_scal_rvvm2qi (TARGET_VECTOR)
#define HAVE_reduc_and_scal_rvvm1qi (TARGET_VECTOR)
#define HAVE_reduc_and_scal_rvvm8hi (TARGET_VECTOR)
#define HAVE_reduc_and_scal_rvvm4hi (TARGET_VECTOR)
#define HAVE_reduc_and_scal_rvvm2hi (TARGET_VECTOR)
#define HAVE_reduc_and_scal_rvvm1hi (TARGET_VECTOR)
#define HAVE_reduc_and_scal_rvvm8si (TARGET_VECTOR)
#define HAVE_reduc_and_scal_rvvm4si (TARGET_VECTOR)
#define HAVE_reduc_and_scal_rvvm2si (TARGET_VECTOR)
#define HAVE_reduc_and_scal_rvvm1si (TARGET_VECTOR)
#define HAVE_reduc_and_scal_rvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_and_scal_rvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_and_scal_rvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_and_scal_rvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_and_scal_rvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_reduc_and_scal_rvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_reduc_and_scal_rvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_reduc_and_scal_rvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_reduc_and_scal_rvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_reduc_and_scal_rvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_reduc_and_scal_v1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_reduc_and_scal_v2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_reduc_and_scal_v4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_reduc_and_scal_v8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_reduc_and_scal_v16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_reduc_and_scal_v32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_reduc_and_scal_v64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_and_scal_v128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_and_scal_v256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_and_scal_v512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_and_scal_v1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_and_scal_v2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_and_scal_v4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_and_scal_v1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_reduc_and_scal_v2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_reduc_and_scal_v4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_reduc_and_scal_v8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_reduc_and_scal_v16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_reduc_and_scal_v32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_and_scal_v64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_and_scal_v128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_and_scal_v256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_and_scal_v512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_and_scal_v1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_and_scal_v2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_and_scal_v1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_reduc_and_scal_v2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_reduc_and_scal_v4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_reduc_and_scal_v8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_reduc_and_scal_v16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_and_scal_v32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_and_scal_v64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_and_scal_v128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_and_scal_v256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_and_scal_v512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_and_scal_v1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_and_scal_v1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_and_scal_v2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_and_scal_v4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_and_scal_v8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_and_scal_v16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_and_scal_v32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_and_scal_v64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_and_scal_v128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_and_scal_v256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_and_scal_v512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_ior_scal_rvvm8qi (TARGET_VECTOR)
#define HAVE_reduc_ior_scal_rvvm4qi (TARGET_VECTOR)
#define HAVE_reduc_ior_scal_rvvm2qi (TARGET_VECTOR)
#define HAVE_reduc_ior_scal_rvvm1qi (TARGET_VECTOR)
#define HAVE_reduc_ior_scal_rvvm8hi (TARGET_VECTOR)
#define HAVE_reduc_ior_scal_rvvm4hi (TARGET_VECTOR)
#define HAVE_reduc_ior_scal_rvvm2hi (TARGET_VECTOR)
#define HAVE_reduc_ior_scal_rvvm1hi (TARGET_VECTOR)
#define HAVE_reduc_ior_scal_rvvm8si (TARGET_VECTOR)
#define HAVE_reduc_ior_scal_rvvm4si (TARGET_VECTOR)
#define HAVE_reduc_ior_scal_rvvm2si (TARGET_VECTOR)
#define HAVE_reduc_ior_scal_rvvm1si (TARGET_VECTOR)
#define HAVE_reduc_ior_scal_rvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_ior_scal_rvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_ior_scal_rvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_ior_scal_rvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_ior_scal_rvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_reduc_ior_scal_rvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_reduc_ior_scal_rvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_reduc_ior_scal_rvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_reduc_ior_scal_rvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_reduc_ior_scal_rvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_reduc_ior_scal_v1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_reduc_ior_scal_v2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_reduc_ior_scal_v4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_reduc_ior_scal_v8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_reduc_ior_scal_v16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_reduc_ior_scal_v32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_reduc_ior_scal_v64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_ior_scal_v128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_ior_scal_v256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_ior_scal_v512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_ior_scal_v1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_ior_scal_v2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_ior_scal_v4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_ior_scal_v1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_reduc_ior_scal_v2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_reduc_ior_scal_v4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_reduc_ior_scal_v8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_reduc_ior_scal_v16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_reduc_ior_scal_v32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_ior_scal_v64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_ior_scal_v128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_ior_scal_v256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_ior_scal_v512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_ior_scal_v1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_ior_scal_v2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_ior_scal_v1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_reduc_ior_scal_v2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_reduc_ior_scal_v4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_reduc_ior_scal_v8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_reduc_ior_scal_v16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_ior_scal_v32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_ior_scal_v64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_ior_scal_v128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_ior_scal_v256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_ior_scal_v512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_ior_scal_v1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_ior_scal_v1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_ior_scal_v2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_ior_scal_v4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_ior_scal_v8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_ior_scal_v16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_ior_scal_v32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_ior_scal_v64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_ior_scal_v128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_ior_scal_v256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_ior_scal_v512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_xor_scal_rvvm8qi (TARGET_VECTOR)
#define HAVE_reduc_xor_scal_rvvm4qi (TARGET_VECTOR)
#define HAVE_reduc_xor_scal_rvvm2qi (TARGET_VECTOR)
#define HAVE_reduc_xor_scal_rvvm1qi (TARGET_VECTOR)
#define HAVE_reduc_xor_scal_rvvm8hi (TARGET_VECTOR)
#define HAVE_reduc_xor_scal_rvvm4hi (TARGET_VECTOR)
#define HAVE_reduc_xor_scal_rvvm2hi (TARGET_VECTOR)
#define HAVE_reduc_xor_scal_rvvm1hi (TARGET_VECTOR)
#define HAVE_reduc_xor_scal_rvvm8si (TARGET_VECTOR)
#define HAVE_reduc_xor_scal_rvvm4si (TARGET_VECTOR)
#define HAVE_reduc_xor_scal_rvvm2si (TARGET_VECTOR)
#define HAVE_reduc_xor_scal_rvvm1si (TARGET_VECTOR)
#define HAVE_reduc_xor_scal_rvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_xor_scal_rvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_xor_scal_rvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_xor_scal_rvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_xor_scal_rvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_reduc_xor_scal_rvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_reduc_xor_scal_rvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_reduc_xor_scal_rvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_reduc_xor_scal_rvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_reduc_xor_scal_rvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_reduc_xor_scal_v1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_reduc_xor_scal_v2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_reduc_xor_scal_v4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_reduc_xor_scal_v8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_reduc_xor_scal_v16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_reduc_xor_scal_v32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_reduc_xor_scal_v64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_xor_scal_v128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_xor_scal_v256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_xor_scal_v512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_xor_scal_v1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_xor_scal_v2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_xor_scal_v4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_xor_scal_v1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_reduc_xor_scal_v2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_reduc_xor_scal_v4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_reduc_xor_scal_v8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_reduc_xor_scal_v16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_reduc_xor_scal_v32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_xor_scal_v64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_xor_scal_v128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_xor_scal_v256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_xor_scal_v512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_xor_scal_v1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_xor_scal_v2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_xor_scal_v1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_reduc_xor_scal_v2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_reduc_xor_scal_v4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_reduc_xor_scal_v8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_reduc_xor_scal_v16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_xor_scal_v32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_xor_scal_v64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_xor_scal_v128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_xor_scal_v256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_xor_scal_v512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_xor_scal_v1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_xor_scal_v1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_xor_scal_v2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_xor_scal_v4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_xor_scal_v8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_xor_scal_v16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_xor_scal_v32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_xor_scal_v64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_xor_scal_v128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_xor_scal_v256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_xor_scal_v512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_sbool_and_scal_rvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_sbool_and_scal_rvvmf32bi (TARGET_VECTOR)
#define HAVE_reduc_sbool_and_scal_rvvmf16bi (TARGET_VECTOR)
#define HAVE_reduc_sbool_and_scal_rvvmf8bi (TARGET_VECTOR)
#define HAVE_reduc_sbool_and_scal_rvvmf4bi (TARGET_VECTOR)
#define HAVE_reduc_sbool_and_scal_rvvmf2bi (TARGET_VECTOR)
#define HAVE_reduc_sbool_and_scal_rvvm1bi (TARGET_VECTOR)
#define HAVE_reduc_sbool_and_scal_v1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_reduc_sbool_and_scal_v2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_reduc_sbool_and_scal_v4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_reduc_sbool_and_scal_v8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_reduc_sbool_and_scal_v16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_reduc_sbool_and_scal_v32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_reduc_sbool_and_scal_v64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_sbool_and_scal_v128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_sbool_and_scal_v256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_sbool_and_scal_v512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_sbool_and_scal_v1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_sbool_and_scal_v2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_sbool_and_scal_v4096bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_sbool_ior_scal_rvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_sbool_ior_scal_rvvmf32bi (TARGET_VECTOR)
#define HAVE_reduc_sbool_ior_scal_rvvmf16bi (TARGET_VECTOR)
#define HAVE_reduc_sbool_ior_scal_rvvmf8bi (TARGET_VECTOR)
#define HAVE_reduc_sbool_ior_scal_rvvmf4bi (TARGET_VECTOR)
#define HAVE_reduc_sbool_ior_scal_rvvmf2bi (TARGET_VECTOR)
#define HAVE_reduc_sbool_ior_scal_rvvm1bi (TARGET_VECTOR)
#define HAVE_reduc_sbool_ior_scal_v1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_reduc_sbool_ior_scal_v2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_reduc_sbool_ior_scal_v4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_reduc_sbool_ior_scal_v8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_reduc_sbool_ior_scal_v16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_reduc_sbool_ior_scal_v32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_reduc_sbool_ior_scal_v64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_sbool_ior_scal_v128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_sbool_ior_scal_v256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_sbool_ior_scal_v512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_sbool_ior_scal_v1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_sbool_ior_scal_v2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_sbool_ior_scal_v4096bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_sbool_xor_scal_rvvmf64bi ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_sbool_xor_scal_rvvmf32bi (TARGET_VECTOR)
#define HAVE_reduc_sbool_xor_scal_rvvmf16bi (TARGET_VECTOR)
#define HAVE_reduc_sbool_xor_scal_rvvmf8bi (TARGET_VECTOR)
#define HAVE_reduc_sbool_xor_scal_rvvmf4bi (TARGET_VECTOR)
#define HAVE_reduc_sbool_xor_scal_rvvmf2bi (TARGET_VECTOR)
#define HAVE_reduc_sbool_xor_scal_rvvm1bi (TARGET_VECTOR)
#define HAVE_reduc_sbool_xor_scal_v1bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_reduc_sbool_xor_scal_v2bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_reduc_sbool_xor_scal_v4bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_reduc_sbool_xor_scal_v8bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_reduc_sbool_xor_scal_v16bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_reduc_sbool_xor_scal_v32bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_reduc_sbool_xor_scal_v64bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_sbool_xor_scal_v128bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_sbool_xor_scal_v256bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_sbool_xor_scal_v512bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_sbool_xor_scal_v1024bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_sbool_xor_scal_v2048bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_sbool_xor_scal_v4096bi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_smax_scal_rvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_reduc_smax_scal_rvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_reduc_smax_scal_rvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_reduc_smax_scal_rvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_reduc_smax_scal_rvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_reduc_smax_scal_rvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_smax_scal_rvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_smax_scal_rvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_smax_scal_rvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_smax_scal_rvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_smax_scal_rvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_smax_scal_rvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_smax_scal_rvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_smax_scal_rvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_smax_scal_rvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_smax_scal_v1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_reduc_smax_scal_v2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_reduc_smax_scal_v4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_reduc_smax_scal_v8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_reduc_smax_scal_v16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_reduc_smax_scal_v32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_smax_scal_v64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_smax_scal_v128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_smax_scal_v256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_smax_scal_v512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_smax_scal_v1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_smax_scal_v2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_smax_scal_v1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_smax_scal_v2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_smax_scal_v4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_smax_scal_v8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_smax_scal_v16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_smax_scal_v32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_smax_scal_v64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_smax_scal_v128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_smax_scal_v256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_smax_scal_v512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_smax_scal_v1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_smax_scal_v1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_smax_scal_v2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_smax_scal_v4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_smax_scal_v8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_smax_scal_v16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_smax_scal_v32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_smax_scal_v64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_smax_scal_v128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_smax_scal_v256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_smax_scal_v512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_smin_scal_rvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_reduc_smin_scal_rvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_reduc_smin_scal_rvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_reduc_smin_scal_rvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_reduc_smin_scal_rvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_reduc_smin_scal_rvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_smin_scal_rvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_smin_scal_rvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_smin_scal_rvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_smin_scal_rvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_smin_scal_rvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_smin_scal_rvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_smin_scal_rvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_smin_scal_rvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_smin_scal_rvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_smin_scal_v1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_reduc_smin_scal_v2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_reduc_smin_scal_v4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_reduc_smin_scal_v8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_reduc_smin_scal_v16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_reduc_smin_scal_v32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_smin_scal_v64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_smin_scal_v128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_smin_scal_v256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_smin_scal_v512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_smin_scal_v1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_smin_scal_v2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_smin_scal_v1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_smin_scal_v2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_smin_scal_v4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_smin_scal_v8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_smin_scal_v16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_smin_scal_v32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_smin_scal_v64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_smin_scal_v128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_smin_scal_v256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_smin_scal_v512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_smin_scal_v1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_smin_scal_v1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_smin_scal_v2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_smin_scal_v4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_smin_scal_v8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_smin_scal_v16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_smin_scal_v32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_smin_scal_v64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_smin_scal_v128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_smin_scal_v256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_smin_scal_v512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_fmax_scal_rvvm8hf ((TARGET_VECTOR && !HONOR_SNANS (RVVM8HFmode)) && (TARGET_ZVFH))
#define HAVE_reduc_fmax_scal_rvvm4hf ((TARGET_VECTOR && !HONOR_SNANS (RVVM4HFmode)) && (TARGET_ZVFH))
#define HAVE_reduc_fmax_scal_rvvm2hf ((TARGET_VECTOR && !HONOR_SNANS (RVVM2HFmode)) && (TARGET_ZVFH))
#define HAVE_reduc_fmax_scal_rvvm1hf ((TARGET_VECTOR && !HONOR_SNANS (RVVM1HFmode)) && (TARGET_ZVFH))
#define HAVE_reduc_fmax_scal_rvvmf2hf ((TARGET_VECTOR && !HONOR_SNANS (RVVMF2HFmode)) && (TARGET_ZVFH))
#define HAVE_reduc_fmax_scal_rvvmf4hf ((TARGET_VECTOR && !HONOR_SNANS (RVVMF4HFmode)) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_fmax_scal_rvvm8sf ((TARGET_VECTOR && !HONOR_SNANS (RVVM8SFmode)) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_fmax_scal_rvvm4sf ((TARGET_VECTOR && !HONOR_SNANS (RVVM4SFmode)) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_fmax_scal_rvvm2sf ((TARGET_VECTOR && !HONOR_SNANS (RVVM2SFmode)) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_fmax_scal_rvvm1sf ((TARGET_VECTOR && !HONOR_SNANS (RVVM1SFmode)) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_fmax_scal_rvvmf2sf ((TARGET_VECTOR && !HONOR_SNANS (RVVMF2SFmode)) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_fmax_scal_rvvm8df ((TARGET_VECTOR && !HONOR_SNANS (RVVM8DFmode)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_fmax_scal_rvvm4df ((TARGET_VECTOR && !HONOR_SNANS (RVVM4DFmode)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_fmax_scal_rvvm2df ((TARGET_VECTOR && !HONOR_SNANS (RVVM2DFmode)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_fmax_scal_rvvm1df ((TARGET_VECTOR && !HONOR_SNANS (RVVM1DFmode)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_fmax_scal_v1hf ((TARGET_VECTOR && !HONOR_SNANS (V1HFmode)) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_reduc_fmax_scal_v2hf ((TARGET_VECTOR && !HONOR_SNANS (V2HFmode)) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_reduc_fmax_scal_v4hf ((TARGET_VECTOR && !HONOR_SNANS (V4HFmode)) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_reduc_fmax_scal_v8hf ((TARGET_VECTOR && !HONOR_SNANS (V8HFmode)) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_reduc_fmax_scal_v16hf ((TARGET_VECTOR && !HONOR_SNANS (V16HFmode)) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_reduc_fmax_scal_v32hf ((TARGET_VECTOR && !HONOR_SNANS (V32HFmode)) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_fmax_scal_v64hf ((TARGET_VECTOR && !HONOR_SNANS (V64HFmode)) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_fmax_scal_v128hf ((TARGET_VECTOR && !HONOR_SNANS (V128HFmode)) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_fmax_scal_v256hf ((TARGET_VECTOR && !HONOR_SNANS (V256HFmode)) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_fmax_scal_v512hf ((TARGET_VECTOR && !HONOR_SNANS (V512HFmode)) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_fmax_scal_v1024hf ((TARGET_VECTOR && !HONOR_SNANS (V1024HFmode)) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_fmax_scal_v2048hf ((TARGET_VECTOR && !HONOR_SNANS (V2048HFmode)) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_fmax_scal_v1sf ((TARGET_VECTOR && !HONOR_SNANS (V1SFmode)) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_fmax_scal_v2sf ((TARGET_VECTOR && !HONOR_SNANS (V2SFmode)) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_fmax_scal_v4sf ((TARGET_VECTOR && !HONOR_SNANS (V4SFmode)) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_fmax_scal_v8sf ((TARGET_VECTOR && !HONOR_SNANS (V8SFmode)) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_fmax_scal_v16sf ((TARGET_VECTOR && !HONOR_SNANS (V16SFmode)) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_fmax_scal_v32sf ((TARGET_VECTOR && !HONOR_SNANS (V32SFmode)) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_fmax_scal_v64sf ((TARGET_VECTOR && !HONOR_SNANS (V64SFmode)) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_fmax_scal_v128sf ((TARGET_VECTOR && !HONOR_SNANS (V128SFmode)) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_fmax_scal_v256sf ((TARGET_VECTOR && !HONOR_SNANS (V256SFmode)) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_fmax_scal_v512sf ((TARGET_VECTOR && !HONOR_SNANS (V512SFmode)) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_fmax_scal_v1024sf ((TARGET_VECTOR && !HONOR_SNANS (V1024SFmode)) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_fmax_scal_v1df ((TARGET_VECTOR && !HONOR_SNANS (V1DFmode)) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_fmax_scal_v2df ((TARGET_VECTOR && !HONOR_SNANS (V2DFmode)) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_fmax_scal_v4df ((TARGET_VECTOR && !HONOR_SNANS (V4DFmode)) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_fmax_scal_v8df ((TARGET_VECTOR && !HONOR_SNANS (V8DFmode)) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_fmax_scal_v16df ((TARGET_VECTOR && !HONOR_SNANS (V16DFmode)) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_fmax_scal_v32df ((TARGET_VECTOR && !HONOR_SNANS (V32DFmode)) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_fmax_scal_v64df ((TARGET_VECTOR && !HONOR_SNANS (V64DFmode)) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_fmax_scal_v128df ((TARGET_VECTOR && !HONOR_SNANS (V128DFmode)) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_fmax_scal_v256df ((TARGET_VECTOR && !HONOR_SNANS (V256DFmode)) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_fmax_scal_v512df ((TARGET_VECTOR && !HONOR_SNANS (V512DFmode)) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_fmin_scal_rvvm8hf ((TARGET_VECTOR && !HONOR_SNANS (RVVM8HFmode)) && (TARGET_ZVFH))
#define HAVE_reduc_fmin_scal_rvvm4hf ((TARGET_VECTOR && !HONOR_SNANS (RVVM4HFmode)) && (TARGET_ZVFH))
#define HAVE_reduc_fmin_scal_rvvm2hf ((TARGET_VECTOR && !HONOR_SNANS (RVVM2HFmode)) && (TARGET_ZVFH))
#define HAVE_reduc_fmin_scal_rvvm1hf ((TARGET_VECTOR && !HONOR_SNANS (RVVM1HFmode)) && (TARGET_ZVFH))
#define HAVE_reduc_fmin_scal_rvvmf2hf ((TARGET_VECTOR && !HONOR_SNANS (RVVMF2HFmode)) && (TARGET_ZVFH))
#define HAVE_reduc_fmin_scal_rvvmf4hf ((TARGET_VECTOR && !HONOR_SNANS (RVVMF4HFmode)) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_fmin_scal_rvvm8sf ((TARGET_VECTOR && !HONOR_SNANS (RVVM8SFmode)) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_fmin_scal_rvvm4sf ((TARGET_VECTOR && !HONOR_SNANS (RVVM4SFmode)) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_fmin_scal_rvvm2sf ((TARGET_VECTOR && !HONOR_SNANS (RVVM2SFmode)) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_fmin_scal_rvvm1sf ((TARGET_VECTOR && !HONOR_SNANS (RVVM1SFmode)) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_fmin_scal_rvvmf2sf ((TARGET_VECTOR && !HONOR_SNANS (RVVMF2SFmode)) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_reduc_fmin_scal_rvvm8df ((TARGET_VECTOR && !HONOR_SNANS (RVVM8DFmode)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_fmin_scal_rvvm4df ((TARGET_VECTOR && !HONOR_SNANS (RVVM4DFmode)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_fmin_scal_rvvm2df ((TARGET_VECTOR && !HONOR_SNANS (RVVM2DFmode)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_fmin_scal_rvvm1df ((TARGET_VECTOR && !HONOR_SNANS (RVVM1DFmode)) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_fmin_scal_v1hf ((TARGET_VECTOR && !HONOR_SNANS (V1HFmode)) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_reduc_fmin_scal_v2hf ((TARGET_VECTOR && !HONOR_SNANS (V2HFmode)) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_reduc_fmin_scal_v4hf ((TARGET_VECTOR && !HONOR_SNANS (V4HFmode)) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_reduc_fmin_scal_v8hf ((TARGET_VECTOR && !HONOR_SNANS (V8HFmode)) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_reduc_fmin_scal_v16hf ((TARGET_VECTOR && !HONOR_SNANS (V16HFmode)) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_reduc_fmin_scal_v32hf ((TARGET_VECTOR && !HONOR_SNANS (V32HFmode)) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_fmin_scal_v64hf ((TARGET_VECTOR && !HONOR_SNANS (V64HFmode)) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_fmin_scal_v128hf ((TARGET_VECTOR && !HONOR_SNANS (V128HFmode)) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_fmin_scal_v256hf ((TARGET_VECTOR && !HONOR_SNANS (V256HFmode)) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_fmin_scal_v512hf ((TARGET_VECTOR && !HONOR_SNANS (V512HFmode)) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_fmin_scal_v1024hf ((TARGET_VECTOR && !HONOR_SNANS (V1024HFmode)) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_fmin_scal_v2048hf ((TARGET_VECTOR && !HONOR_SNANS (V2048HFmode)) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_fmin_scal_v1sf ((TARGET_VECTOR && !HONOR_SNANS (V1SFmode)) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_fmin_scal_v2sf ((TARGET_VECTOR && !HONOR_SNANS (V2SFmode)) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_fmin_scal_v4sf ((TARGET_VECTOR && !HONOR_SNANS (V4SFmode)) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_fmin_scal_v8sf ((TARGET_VECTOR && !HONOR_SNANS (V8SFmode)) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_reduc_fmin_scal_v16sf ((TARGET_VECTOR && !HONOR_SNANS (V16SFmode)) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_fmin_scal_v32sf ((TARGET_VECTOR && !HONOR_SNANS (V32SFmode)) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_fmin_scal_v64sf ((TARGET_VECTOR && !HONOR_SNANS (V64SFmode)) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_fmin_scal_v128sf ((TARGET_VECTOR && !HONOR_SNANS (V128SFmode)) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_fmin_scal_v256sf ((TARGET_VECTOR && !HONOR_SNANS (V256SFmode)) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_fmin_scal_v512sf ((TARGET_VECTOR && !HONOR_SNANS (V512SFmode)) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_fmin_scal_v1024sf ((TARGET_VECTOR && !HONOR_SNANS (V1024SFmode)) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_reduc_fmin_scal_v1df ((TARGET_VECTOR && !HONOR_SNANS (V1DFmode)) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_fmin_scal_v2df ((TARGET_VECTOR && !HONOR_SNANS (V2DFmode)) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_fmin_scal_v4df ((TARGET_VECTOR && !HONOR_SNANS (V4DFmode)) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_reduc_fmin_scal_v8df ((TARGET_VECTOR && !HONOR_SNANS (V8DFmode)) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_reduc_fmin_scal_v16df ((TARGET_VECTOR && !HONOR_SNANS (V16DFmode)) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_reduc_fmin_scal_v32df ((TARGET_VECTOR && !HONOR_SNANS (V32DFmode)) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_reduc_fmin_scal_v64df ((TARGET_VECTOR && !HONOR_SNANS (V64DFmode)) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_reduc_fmin_scal_v128df ((TARGET_VECTOR && !HONOR_SNANS (V128DFmode)) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_reduc_fmin_scal_v256df ((TARGET_VECTOR && !HONOR_SNANS (V256DFmode)) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_reduc_fmin_scal_v512df ((TARGET_VECTOR && !HONOR_SNANS (V512DFmode)) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_len_fold_extract_last_rvvm8qi (TARGET_VECTOR)
#define HAVE_len_fold_extract_last_rvvm4qi (TARGET_VECTOR)
#define HAVE_len_fold_extract_last_rvvm2qi (TARGET_VECTOR)
#define HAVE_len_fold_extract_last_rvvm1qi (TARGET_VECTOR)
#define HAVE_len_fold_extract_last_rvvm8hi (TARGET_VECTOR)
#define HAVE_len_fold_extract_last_rvvm4hi (TARGET_VECTOR)
#define HAVE_len_fold_extract_last_rvvm2hi (TARGET_VECTOR)
#define HAVE_len_fold_extract_last_rvvm1hi (TARGET_VECTOR)
#define HAVE_len_fold_extract_last_rvvm8si (TARGET_VECTOR)
#define HAVE_len_fold_extract_last_rvvm4si (TARGET_VECTOR)
#define HAVE_len_fold_extract_last_rvvm2si (TARGET_VECTOR)
#define HAVE_len_fold_extract_last_rvvm1si (TARGET_VECTOR)
#define HAVE_len_fold_extract_last_rvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_len_fold_extract_last_rvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_len_fold_extract_last_rvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_len_fold_extract_last_rvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_len_fold_extract_last_rvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_len_fold_extract_last_rvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_len_fold_extract_last_rvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_len_fold_extract_last_rvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_len_fold_extract_last_rvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_len_fold_extract_last_rvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_len_fold_extract_last_rvvm8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_len_fold_extract_last_rvvm4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_len_fold_extract_last_rvvm2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_len_fold_extract_last_rvvm1hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_len_fold_extract_last_rvvmf2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_len_fold_extract_last_rvvmf4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_len_fold_extract_last_rvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_len_fold_extract_last_rvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_len_fold_extract_last_rvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_len_fold_extract_last_rvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_len_fold_extract_last_rvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_len_fold_extract_last_rvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_len_fold_extract_last_rvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_len_fold_extract_last_rvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_len_fold_extract_last_rvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_len_fold_extract_last_rvvm8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_len_fold_extract_last_rvvm4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_len_fold_extract_last_rvvm2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_len_fold_extract_last_rvvm1bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_len_fold_extract_last_rvvmf2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_len_fold_extract_last_rvvmf4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_avgrvvm4qi3_floor (TARGET_VECTOR)
#define HAVE_avgrvvm2qi3_floor (TARGET_VECTOR)
#define HAVE_avgrvvm1qi3_floor (TARGET_VECTOR)
#define HAVE_avgrvvmf2qi3_floor (TARGET_VECTOR)
#define HAVE_avgrvvmf4qi3_floor (TARGET_VECTOR)
#define HAVE_avgrvvmf8qi3_floor ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_avgrvvm4hi3_floor (TARGET_VECTOR)
#define HAVE_avgrvvm2hi3_floor (TARGET_VECTOR)
#define HAVE_avgrvvm1hi3_floor (TARGET_VECTOR)
#define HAVE_avgrvvmf2hi3_floor (TARGET_VECTOR)
#define HAVE_avgrvvmf4hi3_floor ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_avgrvvm4si3_floor ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_avgrvvm2si3_floor ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_avgrvvm1si3_floor ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_avgrvvmf2si3_floor ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_avgv1qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_avgv2qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_avgv4qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_avgv8qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_avgv16qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_avgv32qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_avgv64qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_avgv128qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_avgv256qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_avgv512qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_avgv1024qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_avgv2048qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_avgv1hi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_avgv2hi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_avgv4hi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_avgv8hi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_avgv16hi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_avgv32hi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_avgv64hi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_avgv128hi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_avgv256hi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_avgv512hi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_avgv1024hi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_avgv1si3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_avgv2si3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_avgv4si3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_avgv8si3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_avgv16si3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_avgv32si3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_avgv64si3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_avgv128si3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_avgv256si3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_avgv512si3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_avgrvvm8di3_floor ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_avgrvvm4di3_floor ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_avgrvvm2di3_floor ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_avgrvvm1di3_floor ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_avgv1di3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_avgv2di3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_avgv4di3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_avgv8di3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_avgv16di3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_avgv32di3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_avgv64di3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_avgv128di3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_avgv256di3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_avgv512di3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_avgrvvm4qi3_ceil (TARGET_VECTOR)
#define HAVE_avgrvvm2qi3_ceil (TARGET_VECTOR)
#define HAVE_avgrvvm1qi3_ceil (TARGET_VECTOR)
#define HAVE_avgrvvmf2qi3_ceil (TARGET_VECTOR)
#define HAVE_avgrvvmf4qi3_ceil (TARGET_VECTOR)
#define HAVE_avgrvvmf8qi3_ceil ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_avgrvvm4hi3_ceil (TARGET_VECTOR)
#define HAVE_avgrvvm2hi3_ceil (TARGET_VECTOR)
#define HAVE_avgrvvm1hi3_ceil (TARGET_VECTOR)
#define HAVE_avgrvvmf2hi3_ceil (TARGET_VECTOR)
#define HAVE_avgrvvmf4hi3_ceil ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_avgrvvm4si3_ceil ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_avgrvvm2si3_ceil ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_avgrvvm1si3_ceil ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_avgrvvmf2si3_ceil ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_avgv1qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_avgv2qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_avgv4qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_avgv8qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_avgv16qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_avgv32qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_avgv64qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_avgv128qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_avgv256qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_avgv512qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_avgv1024qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_avgv2048qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_avgv1hi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_avgv2hi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_avgv4hi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_avgv8hi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_avgv16hi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_avgv32hi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_avgv64hi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_avgv128hi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_avgv256hi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_avgv512hi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_avgv1024hi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_avgv1si3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_avgv2si3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_avgv4si3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_avgv8si3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_avgv16si3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_avgv32si3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_avgv64si3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_avgv128si3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_avgv256si3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_avgv512si3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_avgrvvm8di3_ceil ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_avgrvvm4di3_ceil ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_avgrvvm2di3_ceil ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_avgrvvm1di3_ceil ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_avgv1di3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_avgv2di3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_avgv4di3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_avgv8di3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_avgv16di3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_avgv32di3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_avgv64di3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_avgv128di3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_avgv256di3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_avgv512di3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_uavgrvvm8qi3_floor (TARGET_VECTOR)
#define HAVE_uavgrvvm4qi3_floor (TARGET_VECTOR)
#define HAVE_uavgrvvm2qi3_floor (TARGET_VECTOR)
#define HAVE_uavgrvvm1qi3_floor (TARGET_VECTOR)
#define HAVE_uavgrvvm8hi3_floor (TARGET_VECTOR)
#define HAVE_uavgrvvm4hi3_floor (TARGET_VECTOR)
#define HAVE_uavgrvvm2hi3_floor (TARGET_VECTOR)
#define HAVE_uavgrvvm1hi3_floor (TARGET_VECTOR)
#define HAVE_uavgrvvm8si3_floor (TARGET_VECTOR)
#define HAVE_uavgrvvm4si3_floor (TARGET_VECTOR)
#define HAVE_uavgrvvm2si3_floor (TARGET_VECTOR)
#define HAVE_uavgrvvm1si3_floor (TARGET_VECTOR)
#define HAVE_uavgrvvm8di3_floor ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_uavgrvvm4di3_floor ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_uavgrvvm2di3_floor ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_uavgrvvm1di3_floor ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_uavgrvvmf2qi3_floor ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_uavgrvvmf4qi3_floor ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_uavgrvvmf8qi3_floor ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_uavgrvvmf2hi3_floor ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_uavgrvvmf4hi3_floor ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_uavgrvvmf2si3_floor ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_uavgv1qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_uavgv2qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_uavgv4qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_uavgv8qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_uavgv16qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_uavgv32qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_uavgv64qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_uavgv128qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_uavgv256qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_uavgv512qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_uavgv1024qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_uavgv2048qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_uavgv4096qi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_uavgv1hi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_uavgv2hi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_uavgv4hi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_uavgv8hi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_uavgv16hi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_uavgv32hi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_uavgv64hi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_uavgv128hi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_uavgv256hi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_uavgv512hi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_uavgv1024hi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_uavgv2048hi3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_uavgv1si3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_uavgv2si3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_uavgv4si3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_uavgv8si3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_uavgv16si3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_uavgv32si3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_uavgv64si3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_uavgv128si3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_uavgv256si3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_uavgv512si3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_uavgv1024si3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_uavgv1di3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_uavgv2di3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_uavgv4di3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_uavgv8di3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_uavgv16di3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_uavgv32di3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_uavgv64di3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_uavgv128di3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_uavgv256di3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_uavgv512di3_floor ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_uavgrvvm8qi3_ceil (TARGET_VECTOR)
#define HAVE_uavgrvvm4qi3_ceil (TARGET_VECTOR)
#define HAVE_uavgrvvm2qi3_ceil (TARGET_VECTOR)
#define HAVE_uavgrvvm1qi3_ceil (TARGET_VECTOR)
#define HAVE_uavgrvvm8hi3_ceil (TARGET_VECTOR)
#define HAVE_uavgrvvm4hi3_ceil (TARGET_VECTOR)
#define HAVE_uavgrvvm2hi3_ceil (TARGET_VECTOR)
#define HAVE_uavgrvvm1hi3_ceil (TARGET_VECTOR)
#define HAVE_uavgrvvm8si3_ceil (TARGET_VECTOR)
#define HAVE_uavgrvvm4si3_ceil (TARGET_VECTOR)
#define HAVE_uavgrvvm2si3_ceil (TARGET_VECTOR)
#define HAVE_uavgrvvm1si3_ceil (TARGET_VECTOR)
#define HAVE_uavgrvvm8di3_ceil ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_uavgrvvm4di3_ceil ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_uavgrvvm2di3_ceil ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_uavgrvvm1di3_ceil ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_uavgrvvmf2qi3_ceil ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_uavgrvvmf4qi3_ceil ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_uavgrvvmf8qi3_ceil ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_uavgrvvmf2hi3_ceil ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_uavgrvvmf4hi3_ceil ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_uavgrvvmf2si3_ceil ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_uavgv1qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_uavgv2qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_uavgv4qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_uavgv8qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_uavgv16qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_uavgv32qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_uavgv64qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_uavgv128qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_uavgv256qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_uavgv512qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_uavgv1024qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_uavgv2048qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_uavgv4096qi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_uavgv1hi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_uavgv2hi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_uavgv4hi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_uavgv8hi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_uavgv16hi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_uavgv32hi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_uavgv64hi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_uavgv128hi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_uavgv256hi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_uavgv512hi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_uavgv1024hi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_uavgv2048hi3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_uavgv1si3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_uavgv2si3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_uavgv4si3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_uavgv8si3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_uavgv16si3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_uavgv32si3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_uavgv64si3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_uavgv128si3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_uavgv256si3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_uavgv512si3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_uavgv1024si3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_uavgv1di3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_uavgv2di3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_uavgv4di3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_uavgv8di3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_uavgv16di3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_uavgv32di3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_uavgv64di3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_uavgv128di3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_uavgv256di3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_uavgv512di3_ceil ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_ceilrvvm8hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_ceilrvvm4hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_ceilrvvm2hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_ceilrvvm1hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_ceilrvvmf2hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_ceilrvvmf4hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_ceilrvvm8sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_ceilrvvm4sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_ceilrvvm2sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_ceilrvvm1sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_ceilrvvmf2sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_ceilrvvm8df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_ceilrvvm4df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_ceilrvvm2df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_ceilrvvm1df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_ceilv1hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_ceilv2hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_ceilv4hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_ceilv8hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_ceilv16hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_ceilv32hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_ceilv64hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_ceilv128hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_ceilv256hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_ceilv512hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_ceilv1024hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_ceilv2048hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_ceilv1sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_ceilv2sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_ceilv4sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_ceilv8sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_ceilv16sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_ceilv32sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_ceilv64sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_ceilv128sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_ceilv256sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_ceilv512sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_ceilv1024sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_ceilv1df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_ceilv2df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_ceilv4df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_ceilv8df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_ceilv16df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_ceilv32df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_ceilv64df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_ceilv128df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_ceilv256df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_ceilv512df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_floorrvvm8hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_floorrvvm4hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_floorrvvm2hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_floorrvvm1hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_floorrvvmf2hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_floorrvvmf4hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_floorrvvm8sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floorrvvm4sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floorrvvm2sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floorrvvm1sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floorrvvmf2sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_floorrvvm8df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floorrvvm4df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floorrvvm2df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floorrvvm1df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floorv1hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_floorv2hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_floorv4hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_floorv8hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_floorv16hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_floorv32hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_floorv64hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_floorv128hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_floorv256hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_floorv512hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_floorv1024hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_floorv2048hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_floorv1sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floorv2sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floorv4sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floorv8sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_floorv16sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_floorv32sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_floorv64sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_floorv128sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_floorv256sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_floorv512sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_floorv1024sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_floorv1df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floorv2df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floorv4df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_floorv8df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_floorv16df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_floorv32df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_floorv64df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_floorv128df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_floorv256df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_floorv512df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_nearbyintrvvm8hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_nearbyintrvvm4hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_nearbyintrvvm2hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_nearbyintrvvm1hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_nearbyintrvvmf2hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_nearbyintrvvmf4hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_nearbyintrvvm8sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_nearbyintrvvm4sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_nearbyintrvvm2sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_nearbyintrvvm1sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_nearbyintrvvmf2sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_nearbyintrvvm8df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_nearbyintrvvm4df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_nearbyintrvvm2df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_nearbyintrvvm1df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_nearbyintv1hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_nearbyintv2hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_nearbyintv4hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_nearbyintv8hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_nearbyintv16hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_nearbyintv32hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_nearbyintv64hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_nearbyintv128hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_nearbyintv256hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_nearbyintv512hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_nearbyintv1024hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_nearbyintv2048hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_nearbyintv1sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_nearbyintv2sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_nearbyintv4sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_nearbyintv8sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_nearbyintv16sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_nearbyintv32sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_nearbyintv64sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_nearbyintv128sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_nearbyintv256sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_nearbyintv512sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_nearbyintv1024sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_nearbyintv1df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_nearbyintv2df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_nearbyintv4df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_nearbyintv8df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_nearbyintv16df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_nearbyintv32df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_nearbyintv64df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_nearbyintv128df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_nearbyintv256df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_nearbyintv512df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_rintrvvm8hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_rintrvvm4hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_rintrvvm2hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_rintrvvm1hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_rintrvvmf2hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_rintrvvmf4hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_rintrvvm8sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_rintrvvm4sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_rintrvvm2sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_rintrvvm1sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_rintrvvmf2sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_rintrvvm8df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_rintrvvm4df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_rintrvvm2df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_rintrvvm1df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_rintv1hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_rintv2hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_rintv4hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_rintv8hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_rintv16hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_rintv32hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_rintv64hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_rintv128hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_rintv256hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_rintv512hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_rintv1024hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_rintv2048hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_rintv1sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_rintv2sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_rintv4sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_rintv8sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_rintv16sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_rintv32sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_rintv64sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_rintv128sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_rintv256sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_rintv512sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_rintv1024sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_rintv1df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_rintv2df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_rintv4df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_rintv8df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_rintv16df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_rintv32df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_rintv64df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_rintv128df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_rintv256df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_rintv512df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_roundrvvm8hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_roundrvvm4hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_roundrvvm2hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_roundrvvm1hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_roundrvvmf2hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_roundrvvmf4hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_roundrvvm8sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_roundrvvm4sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_roundrvvm2sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_roundrvvm1sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_roundrvvmf2sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_roundrvvm8df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_roundrvvm4df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_roundrvvm2df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_roundrvvm1df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_roundv1hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_roundv2hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_roundv4hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_roundv8hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_roundv16hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_roundv32hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_roundv64hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_roundv128hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_roundv256hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_roundv512hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_roundv1024hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_roundv2048hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_roundv1sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_roundv2sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_roundv4sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_roundv8sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_roundv16sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_roundv32sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_roundv64sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_roundv128sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_roundv256sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_roundv512sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_roundv1024sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_roundv1df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_roundv2df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_roundv4df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_roundv8df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_roundv16df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_roundv32df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_roundv64df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_roundv128df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_roundv256df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_roundv512df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_btruncrvvm8hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_btruncrvvm4hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_btruncrvvm2hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_btruncrvvm1hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_btruncrvvmf2hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_btruncrvvmf4hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_btruncrvvm8sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_btruncrvvm4sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_btruncrvvm2sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_btruncrvvm1sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_btruncrvvmf2sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_btruncrvvm8df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_btruncrvvm4df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_btruncrvvm2df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_btruncrvvm1df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_btruncv1hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_btruncv2hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_btruncv4hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_btruncv8hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_btruncv16hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_btruncv32hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_btruncv64hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_btruncv128hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_btruncv256hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_btruncv512hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_btruncv1024hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_btruncv2048hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_btruncv1sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_btruncv2sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_btruncv4sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_btruncv8sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_btruncv16sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_btruncv32sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_btruncv64sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_btruncv128sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_btruncv256sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_btruncv512sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_btruncv1024sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_btruncv1df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_btruncv2df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_btruncv4df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_btruncv8df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_btruncv16df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_btruncv32df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_btruncv64df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_btruncv128df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_btruncv256df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_btruncv512df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_roundevenrvvm8hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_roundevenrvvm4hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_roundevenrvvm2hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_roundevenrvvm1hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_roundevenrvvmf2hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_roundevenrvvmf4hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_roundevenrvvm8sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_roundevenrvvm4sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_roundevenrvvm2sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_roundevenrvvm1sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_roundevenrvvmf2sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_roundevenrvvm8df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_roundevenrvvm4df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_roundevenrvvm2df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_roundevenrvvm1df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_roundevenv1hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_roundevenv2hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_roundevenv4hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_roundevenv8hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_roundevenv16hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_roundevenv32hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_roundevenv64hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_roundevenv128hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_roundevenv256hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_roundevenv512hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_roundevenv1024hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_roundevenv2048hf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_roundevenv1sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_roundevenv2sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_roundevenv4sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_roundevenv8sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_roundevenv16sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_roundevenv32sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_roundevenv64sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_roundevenv128sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_roundevenv256sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_roundevenv512sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_roundevenv1024sf2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_roundevenv1df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_roundevenv2df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_roundevenv4df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_roundevenv8df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_roundevenv16df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_roundevenv32df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_roundevenv64df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_roundevenv128df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_roundevenv256df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_roundevenv512df2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_lrintrvvm4hfrvvm8si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lrintrvvm2hfrvvm4si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lrintrvvm1hfrvvm2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lrintrvvmf2hfrvvm1si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lrintrvvmf4hfrvvmf2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_lrintrvvm8sfrvvm8si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lrintrvvm4sfrvvm4si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lrintrvvm2sfrvvm2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lrintrvvm1sfrvvm1si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lrintrvvmf2sfrvvmf2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_lrintrvvm8dfrvvm4si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lrintrvvm4dfrvvm2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lrintrvvm2dfrvvm1si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lrintrvvm1dfrvvmf2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lrintv1hfv1si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_lrintv2hfv2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_lrintv4hfv4si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_lrintv8hfv8si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_lrintv16hfv16si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_lrintv32hfv32si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_lrintv64hfv64si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_lrintv128hfv128si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_lrintv256hfv256si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_lrintv512hfv512si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_lrintv1024hfv1024si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_lrintv1sfv1si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lrintv2sfv2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lrintv4sfv4si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lrintv8sfv8si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lrintv16sfv16si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_lrintv32sfv32si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_lrintv64sfv64si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_lrintv128sfv128si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_lrintv256sfv256si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_lrintv512sfv512si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_lrintv1024sfv1024si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_lrintv1dfv1si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lrintv2dfv2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lrintv4dfv4si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lrintv8dfv8si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_lrintv16dfv16si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_lrintv32dfv32si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_lrintv64dfv64si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_lrintv128dfv128si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_lrintv256dfv256si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_lrintv512dfv512si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_lrintrvvm2hfrvvm8di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lrintrvvm1hfrvvm4di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lrintrvvmf2hfrvvm2di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lrintrvvmf4hfrvvm1di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_lrintrvvm4sfrvvm8di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lrintrvvm2sfrvvm4di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lrintrvvm1sfrvvm2di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lrintrvvmf2sfrvvm1di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_lrintrvvm8dfrvvm8di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lrintrvvm4dfrvvm4di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lrintrvvm2dfrvvm2di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lrintrvvm1dfrvvm1di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lrintv1hfv1di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_lrintv2hfv2di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_lrintv4hfv4di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_lrintv8hfv8di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_lrintv16hfv16di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_lrintv32hfv32di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_lrintv64hfv64di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_lrintv128hfv128di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_lrintv256hfv256di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_lrintv512hfv512di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_lrintv1sfv1di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lrintv2sfv2di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lrintv4sfv4di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lrintv8sfv8di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lrintv16sfv16di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_lrintv32sfv32di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_lrintv64sfv64di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_lrintv128sfv128di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_lrintv256sfv256di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_lrintv512sfv512di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_lrintv1dfv1di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lrintv2dfv2di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lrintv4dfv4di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lrintv8dfv8di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_lrintv16dfv16di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_lrintv32dfv32di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_lrintv64dfv64di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_lrintv128dfv128di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_lrintv256dfv256di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_lrintv512dfv512di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_lroundrvvm4hfrvvm8si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lroundrvvm2hfrvvm4si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lroundrvvm1hfrvvm2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lroundrvvmf2hfrvvm1si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lroundrvvmf4hfrvvmf2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_lroundrvvm8sfrvvm8si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lroundrvvm4sfrvvm4si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lroundrvvm2sfrvvm2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lroundrvvm1sfrvvm1si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lroundrvvmf2sfrvvmf2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_lroundrvvm8dfrvvm4si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lroundrvvm4dfrvvm2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lroundrvvm2dfrvvm1si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lroundrvvm1dfrvvmf2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lroundv1hfv1si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_lroundv2hfv2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_lroundv4hfv4si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_lroundv8hfv8si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_lroundv16hfv16si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_lroundv32hfv32si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_lroundv64hfv64si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_lroundv128hfv128si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_lroundv256hfv256si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_lroundv512hfv512si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_lroundv1024hfv1024si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_lroundv1sfv1si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lroundv2sfv2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lroundv4sfv4si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lroundv8sfv8si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lroundv16sfv16si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_lroundv32sfv32si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_lroundv64sfv64si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_lroundv128sfv128si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_lroundv256sfv256si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_lroundv512sfv512si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_lroundv1024sfv1024si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_lroundv1dfv1si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lroundv2dfv2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lroundv4dfv4si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lroundv8dfv8si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_lroundv16dfv16si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_lroundv32dfv32si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_lroundv64dfv64si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_lroundv128dfv128si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_lroundv256dfv256si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_lroundv512dfv512si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_lroundrvvm2hfrvvm8di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lroundrvvm1hfrvvm4di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lroundrvvmf2hfrvvm2di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lroundrvvmf4hfrvvm1di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_lroundrvvm4sfrvvm8di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lroundrvvm2sfrvvm4di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lroundrvvm1sfrvvm2di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lroundrvvmf2sfrvvm1di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_lroundrvvm8dfrvvm8di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lroundrvvm4dfrvvm4di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lroundrvvm2dfrvvm2di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lroundrvvm1dfrvvm1di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lroundv1hfv1di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_lroundv2hfv2di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_lroundv4hfv4di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_lroundv8hfv8di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_lroundv16hfv16di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_lroundv32hfv32di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_lroundv64hfv64di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_lroundv128hfv128di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_lroundv256hfv256di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_lroundv512hfv512di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_lroundv1sfv1di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lroundv2sfv2di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lroundv4sfv4di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lroundv8sfv8di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lroundv16sfv16di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_lroundv32sfv32di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_lroundv64sfv64di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_lroundv128sfv128di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_lroundv256sfv256di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_lroundv512sfv512di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_lroundv1dfv1di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lroundv2dfv2di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lroundv4dfv4di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lroundv8dfv8di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_lroundv16dfv16di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_lroundv32dfv32di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_lroundv64dfv64di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_lroundv128dfv128di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_lroundv256dfv256di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_lroundv512dfv512di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_lceilrvvm4hfrvvm8si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lceilrvvm2hfrvvm4si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lceilrvvm1hfrvvm2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lceilrvvmf2hfrvvm1si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lceilrvvmf4hfrvvmf2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_lceilrvvm8sfrvvm8si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lceilrvvm4sfrvvm4si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lceilrvvm2sfrvvm2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lceilrvvm1sfrvvm1si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lceilrvvmf2sfrvvmf2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_lceilrvvm8dfrvvm4si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lceilrvvm4dfrvvm2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lceilrvvm2dfrvvm1si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lceilrvvm1dfrvvmf2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lceilv1hfv1si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_lceilv2hfv2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_lceilv4hfv4si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_lceilv8hfv8si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_lceilv16hfv16si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_lceilv32hfv32si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_lceilv64hfv64si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_lceilv128hfv128si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_lceilv256hfv256si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_lceilv512hfv512si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_lceilv1024hfv1024si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_lceilv1sfv1si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lceilv2sfv2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lceilv4sfv4si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lceilv8sfv8si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lceilv16sfv16si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_lceilv32sfv32si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_lceilv64sfv64si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_lceilv128sfv128si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_lceilv256sfv256si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_lceilv512sfv512si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_lceilv1024sfv1024si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_lceilv1dfv1si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lceilv2dfv2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lceilv4dfv4si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lceilv8dfv8si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_lceilv16dfv16si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_lceilv32dfv32si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_lceilv64dfv64si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_lceilv128dfv128si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_lceilv256dfv256si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_lceilv512dfv512si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_lceilrvvm2hfrvvm8di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lceilrvvm1hfrvvm4di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lceilrvvmf2hfrvvm2di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lceilrvvmf4hfrvvm1di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_lceilrvvm4sfrvvm8di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lceilrvvm2sfrvvm4di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lceilrvvm1sfrvvm2di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lceilrvvmf2sfrvvm1di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_lceilrvvm8dfrvvm8di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lceilrvvm4dfrvvm4di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lceilrvvm2dfrvvm2di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lceilrvvm1dfrvvm1di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lceilv1hfv1di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_lceilv2hfv2di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_lceilv4hfv4di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_lceilv8hfv8di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_lceilv16hfv16di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_lceilv32hfv32di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_lceilv64hfv64di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_lceilv128hfv128di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_lceilv256hfv256di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_lceilv512hfv512di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_lceilv1sfv1di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lceilv2sfv2di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lceilv4sfv4di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lceilv8sfv8di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lceilv16sfv16di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_lceilv32sfv32di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_lceilv64sfv64di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_lceilv128sfv128di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_lceilv256sfv256di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_lceilv512sfv512di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_lceilv1dfv1di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lceilv2dfv2di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lceilv4dfv4di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lceilv8dfv8di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_lceilv16dfv16di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_lceilv32dfv32di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_lceilv64dfv64di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_lceilv128dfv128di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_lceilv256dfv256di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_lceilv512dfv512di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_lfloorrvvm4hfrvvm8si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lfloorrvvm2hfrvvm4si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lfloorrvvm1hfrvvm2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lfloorrvvmf2hfrvvm1si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lfloorrvvmf4hfrvvmf2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_lfloorrvvm8sfrvvm8si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lfloorrvvm4sfrvvm4si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lfloorrvvm2sfrvvm2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lfloorrvvm1sfrvvm1si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lfloorrvvmf2sfrvvmf2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_lfloorrvvm8dfrvvm4si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lfloorrvvm4dfrvvm2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lfloorrvvm2dfrvvm1si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lfloorrvvm1dfrvvmf2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lfloorv1hfv1si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_lfloorv2hfv2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_lfloorv4hfv4si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_lfloorv8hfv8si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_lfloorv16hfv16si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_lfloorv32hfv32si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_lfloorv64hfv64si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_lfloorv128hfv128si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_lfloorv256hfv256si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_lfloorv512hfv512si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_lfloorv1024hfv1024si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_lfloorv1sfv1si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lfloorv2sfv2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lfloorv4sfv4si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lfloorv8sfv8si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lfloorv16sfv16si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_lfloorv32sfv32si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_lfloorv64sfv64si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_lfloorv128sfv128si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_lfloorv256sfv256si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_lfloorv512sfv512si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_lfloorv1024sfv1024si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_lfloorv1dfv1si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lfloorv2dfv2si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lfloorv4dfv4si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lfloorv8dfv8si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_lfloorv16dfv16si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_lfloorv32dfv32si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_lfloorv64dfv64si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_lfloorv128dfv128si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_lfloorv256dfv256si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_lfloorv512dfv512si2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_lfloorrvvm2hfrvvm8di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lfloorrvvm1hfrvvm4di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lfloorrvvmf2hfrvvm2di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH))
#define HAVE_lfloorrvvmf4hfrvvm1di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_lfloorrvvm4sfrvvm8di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lfloorrvvm2sfrvvm4di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lfloorrvvm1sfrvvm2di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lfloorrvvmf2sfrvvm1di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_lfloorrvvm8dfrvvm8di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lfloorrvvm4dfrvvm4di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lfloorrvvm2dfrvvm2di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lfloorrvvm1dfrvvm1di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lfloorv1hfv1di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_lfloorv2hfv2di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_lfloorv4hfv4di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_lfloorv8hfv8di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_lfloorv16hfv16di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_lfloorv32hfv32di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_lfloorv64hfv64di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_lfloorv128hfv128di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_lfloorv256hfv256di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_lfloorv512hfv512di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_lfloorv1sfv1di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lfloorv2sfv2di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lfloorv4sfv4di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lfloorv8sfv8di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_lfloorv16sfv16di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_lfloorv32sfv32di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_lfloorv64sfv64di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_lfloorv128sfv128di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_lfloorv256sfv256di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_lfloorv512sfv512di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_lfloorv1dfv1di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lfloorv2dfv2di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lfloorv4dfv4di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_lfloorv8dfv8di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_lfloorv16dfv16di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_lfloorv32dfv32di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_lfloorv64dfv64di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_lfloorv128dfv128di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_lfloorv256dfv256di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_lfloorv512dfv512di2 ((TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_rawmemchrqi (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_rawmemchrhi (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_rawmemchrsi (TARGET_VECTOR && !TARGET_XTHEADVECTOR)
#define HAVE_rawmemchrdi ((TARGET_VECTOR && !TARGET_XTHEADVECTOR) && (TARGET_64BIT))
#define HAVE_usaddrvvm8qi3 (TARGET_VECTOR)
#define HAVE_usaddrvvm4qi3 (TARGET_VECTOR)
#define HAVE_usaddrvvm2qi3 (TARGET_VECTOR)
#define HAVE_usaddrvvm1qi3 (TARGET_VECTOR)
#define HAVE_usaddrvvm8hi3 (TARGET_VECTOR)
#define HAVE_usaddrvvm4hi3 (TARGET_VECTOR)
#define HAVE_usaddrvvm2hi3 (TARGET_VECTOR)
#define HAVE_usaddrvvm1hi3 (TARGET_VECTOR)
#define HAVE_usaddrvvm8si3 (TARGET_VECTOR)
#define HAVE_usaddrvvm4si3 (TARGET_VECTOR)
#define HAVE_usaddrvvm2si3 (TARGET_VECTOR)
#define HAVE_usaddrvvm1si3 (TARGET_VECTOR)
#define HAVE_usaddrvvm8di3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_usaddrvvm4di3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_usaddrvvm2di3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_usaddrvvm1di3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_usaddrvvmf2qi3 ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_usaddrvvmf4qi3 ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_usaddrvvmf8qi3 ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_usaddrvvmf2hi3 ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_usaddrvvmf4hi3 ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_usaddrvvmf2si3 ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_usaddv1qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_usaddv2qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_usaddv4qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_usaddv8qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_usaddv16qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_usaddv32qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_usaddv64qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_usaddv128qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_usaddv256qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_usaddv512qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_usaddv1024qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_usaddv2048qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_usaddv4096qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_usaddv1hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_usaddv2hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_usaddv4hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_usaddv8hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_usaddv16hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_usaddv32hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_usaddv64hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_usaddv128hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_usaddv256hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_usaddv512hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_usaddv1024hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_usaddv2048hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_usaddv1si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_usaddv2si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_usaddv4si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_usaddv8si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_usaddv16si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_usaddv32si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_usaddv64si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_usaddv128si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_usaddv256si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_usaddv512si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_usaddv1024si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_usaddv1di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_usaddv2di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_usaddv4di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_usaddv8di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_usaddv16di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_usaddv32di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_usaddv64di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_usaddv128di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_usaddv256di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_usaddv512di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_ssaddrvvm8qi3 (TARGET_VECTOR)
#define HAVE_ssaddrvvm4qi3 (TARGET_VECTOR)
#define HAVE_ssaddrvvm2qi3 (TARGET_VECTOR)
#define HAVE_ssaddrvvm1qi3 (TARGET_VECTOR)
#define HAVE_ssaddrvvm8hi3 (TARGET_VECTOR)
#define HAVE_ssaddrvvm4hi3 (TARGET_VECTOR)
#define HAVE_ssaddrvvm2hi3 (TARGET_VECTOR)
#define HAVE_ssaddrvvm1hi3 (TARGET_VECTOR)
#define HAVE_ssaddrvvm8si3 (TARGET_VECTOR)
#define HAVE_ssaddrvvm4si3 (TARGET_VECTOR)
#define HAVE_ssaddrvvm2si3 (TARGET_VECTOR)
#define HAVE_ssaddrvvm1si3 (TARGET_VECTOR)
#define HAVE_ssaddrvvm8di3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ssaddrvvm4di3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ssaddrvvm2di3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ssaddrvvm1di3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ssaddrvvmf2qi3 ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_ssaddrvvmf4qi3 ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_ssaddrvvmf8qi3 ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_ssaddrvvmf2hi3 ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_ssaddrvvmf4hi3 ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_ssaddrvvmf2si3 ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_ssaddv1qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_ssaddv2qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_ssaddv4qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_ssaddv8qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_ssaddv16qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_ssaddv32qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_ssaddv64qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_ssaddv128qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_ssaddv256qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_ssaddv512qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_ssaddv1024qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_ssaddv2048qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_ssaddv4096qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_ssaddv1hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_ssaddv2hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_ssaddv4hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_ssaddv8hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_ssaddv16hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_ssaddv32hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_ssaddv64hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_ssaddv128hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_ssaddv256hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_ssaddv512hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_ssaddv1024hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_ssaddv2048hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_ssaddv1si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_ssaddv2si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_ssaddv4si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_ssaddv8si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_ssaddv16si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_ssaddv32si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_ssaddv64si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_ssaddv128si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_ssaddv256si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_ssaddv512si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_ssaddv1024si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_ssaddv1di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_ssaddv2di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_ssaddv4di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_ssaddv8di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_ssaddv16di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_ssaddv32di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_ssaddv64di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_ssaddv128di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_ssaddv256di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_ssaddv512di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_ussubrvvm8qi3 (TARGET_VECTOR)
#define HAVE_ussubrvvm4qi3 (TARGET_VECTOR)
#define HAVE_ussubrvvm2qi3 (TARGET_VECTOR)
#define HAVE_ussubrvvm1qi3 (TARGET_VECTOR)
#define HAVE_ussubrvvm8hi3 (TARGET_VECTOR)
#define HAVE_ussubrvvm4hi3 (TARGET_VECTOR)
#define HAVE_ussubrvvm2hi3 (TARGET_VECTOR)
#define HAVE_ussubrvvm1hi3 (TARGET_VECTOR)
#define HAVE_ussubrvvm8si3 (TARGET_VECTOR)
#define HAVE_ussubrvvm4si3 (TARGET_VECTOR)
#define HAVE_ussubrvvm2si3 (TARGET_VECTOR)
#define HAVE_ussubrvvm1si3 (TARGET_VECTOR)
#define HAVE_ussubrvvm8di3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ussubrvvm4di3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ussubrvvm2di3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ussubrvvm1di3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ussubrvvmf2qi3 ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_ussubrvvmf4qi3 ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_ussubrvvmf8qi3 ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_ussubrvvmf2hi3 ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_ussubrvvmf4hi3 ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_ussubrvvmf2si3 ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_ussubv1qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_ussubv2qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_ussubv4qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_ussubv8qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_ussubv16qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_ussubv32qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_ussubv64qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_ussubv128qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_ussubv256qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_ussubv512qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_ussubv1024qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_ussubv2048qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_ussubv4096qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_ussubv1hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_ussubv2hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_ussubv4hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_ussubv8hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_ussubv16hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_ussubv32hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_ussubv64hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_ussubv128hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_ussubv256hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_ussubv512hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_ussubv1024hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_ussubv2048hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_ussubv1si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_ussubv2si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_ussubv4si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_ussubv8si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_ussubv16si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_ussubv32si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_ussubv64si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_ussubv128si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_ussubv256si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_ussubv512si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_ussubv1024si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_ussubv1di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_ussubv2di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_ussubv4di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_ussubv8di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_ussubv16di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_ussubv32di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_ussubv64di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_ussubv128di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_ussubv256di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_ussubv512di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_sssubrvvm8qi3 (TARGET_VECTOR)
#define HAVE_sssubrvvm4qi3 (TARGET_VECTOR)
#define HAVE_sssubrvvm2qi3 (TARGET_VECTOR)
#define HAVE_sssubrvvm1qi3 (TARGET_VECTOR)
#define HAVE_sssubrvvm8hi3 (TARGET_VECTOR)
#define HAVE_sssubrvvm4hi3 (TARGET_VECTOR)
#define HAVE_sssubrvvm2hi3 (TARGET_VECTOR)
#define HAVE_sssubrvvm1hi3 (TARGET_VECTOR)
#define HAVE_sssubrvvm8si3 (TARGET_VECTOR)
#define HAVE_sssubrvvm4si3 (TARGET_VECTOR)
#define HAVE_sssubrvvm2si3 (TARGET_VECTOR)
#define HAVE_sssubrvvm1si3 (TARGET_VECTOR)
#define HAVE_sssubrvvm8di3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sssubrvvm4di3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sssubrvvm2di3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sssubrvvm1di3 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sssubrvvmf2qi3 ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_sssubrvvmf4qi3 ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_sssubrvvmf8qi3 ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_sssubrvvmf2hi3 ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_sssubrvvmf4hi3 ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_sssubrvvmf2si3 ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_sssubv1qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_sssubv2qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_sssubv4qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_sssubv8qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_sssubv16qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_sssubv32qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_sssubv64qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sssubv128qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sssubv256qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sssubv512qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sssubv1024qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sssubv2048qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sssubv4096qi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sssubv1hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sssubv2hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sssubv4hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sssubv8hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sssubv16hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sssubv32hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sssubv64hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sssubv128hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sssubv256hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sssubv512hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sssubv1024hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sssubv2048hi3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sssubv1si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sssubv2si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sssubv4si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sssubv8si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sssubv16si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sssubv32si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sssubv64si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sssubv128si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sssubv256si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sssubv512si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sssubv1024si3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sssubv1di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_sssubv2di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_sssubv4di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_sssubv8di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_sssubv16di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_sssubv32di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_sssubv64di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_sssubv128di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_sssubv256di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_sssubv512di3 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_ustruncrvvm8hirvvm4qi2 (TARGET_VECTOR)
#define HAVE_ustruncrvvm4hirvvm2qi2 (TARGET_VECTOR)
#define HAVE_ustruncrvvm2hirvvm1qi2 (TARGET_VECTOR)
#define HAVE_ustruncrvvm1hirvvmf2qi2 (TARGET_VECTOR)
#define HAVE_ustruncrvvmf2hirvvmf4qi2 (TARGET_VECTOR)
#define HAVE_ustruncrvvmf4hirvvmf8qi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ustruncrvvm8sirvvm4hi2 (TARGET_VECTOR)
#define HAVE_ustruncrvvm4sirvvm2hi2 (TARGET_VECTOR)
#define HAVE_ustruncrvvm2sirvvm1hi2 (TARGET_VECTOR)
#define HAVE_ustruncrvvm1sirvvmf2hi2 (TARGET_VECTOR)
#define HAVE_ustruncrvvmf2sirvvmf4hi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ustruncrvvm8dirvvm4si2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ustruncrvvm4dirvvm2si2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ustruncrvvm2dirvvm1si2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ustruncrvvm1dirvvmf2si2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ustruncv1hiv1qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_ustruncv2hiv2qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_ustruncv4hiv4qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_ustruncv8hiv8qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_ustruncv16hiv16qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_ustruncv32hiv32qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_ustruncv64hiv64qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_ustruncv128hiv128qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_ustruncv256hiv256qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_ustruncv512hiv512qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_ustruncv1024hiv1024qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_ustruncv2048hiv2048qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_ustruncv1siv1hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_ustruncv2siv2hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_ustruncv4siv4hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_ustruncv8siv8hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_ustruncv16siv16hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_ustruncv32siv32hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_ustruncv64siv64hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_ustruncv128siv128hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_ustruncv256siv256hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_ustruncv512siv512hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_ustruncv1024siv1024hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_ustruncv1div1si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_ustruncv2div2si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_ustruncv4div4si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_ustruncv8div8si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_ustruncv16div16si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_ustruncv32div32si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_ustruncv64div64si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_ustruncv128div128si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_ustruncv256div256si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_ustruncv512div512si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_ustruncrvvm8sirvvm2qi2 (TARGET_VECTOR)
#define HAVE_ustruncrvvm4sirvvm1qi2 (TARGET_VECTOR)
#define HAVE_ustruncrvvm2sirvvmf2qi2 (TARGET_VECTOR)
#define HAVE_ustruncrvvm1sirvvmf4qi2 (TARGET_VECTOR)
#define HAVE_ustruncrvvmf2sirvvmf8qi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ustruncrvvm8dirvvm2hi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ustruncrvvm4dirvvm1hi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ustruncrvvm2dirvvmf2hi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ustruncrvvm1dirvvmf4hi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ustruncv1siv1qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_ustruncv2siv2qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_ustruncv4siv4qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_ustruncv8siv8qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_ustruncv16siv16qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_ustruncv32siv32qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_ustruncv64siv64qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_ustruncv128siv128qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_ustruncv256siv256qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_ustruncv512siv512qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_ustruncv1024siv1024qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_ustruncv1div1hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_ustruncv2div2hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_ustruncv4div4hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_ustruncv8div8hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_ustruncv16div16hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_ustruncv32div32hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_ustruncv64div64hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_ustruncv128div128hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_ustruncv256div256hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_ustruncv512div512hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_ustruncrvvm8dirvvm1qi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ustruncrvvm4dirvvmf2qi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ustruncrvvm2dirvvmf4qi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ustruncrvvm1dirvvmf8qi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_ustruncv1div1qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_ustruncv2div2qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_ustruncv4div4qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_ustruncv8div8qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_ustruncv16div16qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_ustruncv32div32qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_ustruncv64div64qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_ustruncv128div128qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_ustruncv256div256qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_ustruncv512div512qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_sstruncrvvm8hirvvm4qi2 (TARGET_VECTOR)
#define HAVE_sstruncrvvm4hirvvm2qi2 (TARGET_VECTOR)
#define HAVE_sstruncrvvm2hirvvm1qi2 (TARGET_VECTOR)
#define HAVE_sstruncrvvm1hirvvmf2qi2 (TARGET_VECTOR)
#define HAVE_sstruncrvvmf2hirvvmf4qi2 (TARGET_VECTOR)
#define HAVE_sstruncrvvmf4hirvvmf8qi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sstruncrvvm8sirvvm4hi2 (TARGET_VECTOR)
#define HAVE_sstruncrvvm4sirvvm2hi2 (TARGET_VECTOR)
#define HAVE_sstruncrvvm2sirvvm1hi2 (TARGET_VECTOR)
#define HAVE_sstruncrvvm1sirvvmf2hi2 (TARGET_VECTOR)
#define HAVE_sstruncrvvmf2sirvvmf4hi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sstruncrvvm8dirvvm4si2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sstruncrvvm4dirvvm2si2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sstruncrvvm2dirvvm1si2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sstruncrvvm1dirvvmf2si2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sstruncv1hiv1qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_sstruncv2hiv2qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_sstruncv4hiv4qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_sstruncv8hiv8qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_sstruncv16hiv16qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_sstruncv32hiv32qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sstruncv64hiv64qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sstruncv128hiv128qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sstruncv256hiv256qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sstruncv512hiv512qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sstruncv1024hiv1024qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sstruncv2048hiv2048qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sstruncv1siv1hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sstruncv2siv2hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sstruncv4siv4hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sstruncv8siv8hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sstruncv16siv16hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sstruncv32siv32hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sstruncv64siv64hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sstruncv128siv128hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sstruncv256siv256hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sstruncv512siv512hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sstruncv1024siv1024hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sstruncv1div1si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_sstruncv2div2si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_sstruncv4div4si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_sstruncv8div8si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_sstruncv16div16si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_sstruncv32div32si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_sstruncv64div64si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_sstruncv128div128si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_sstruncv256div256si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_sstruncv512div512si2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_sstruncrvvm8sirvvm2qi2 (TARGET_VECTOR)
#define HAVE_sstruncrvvm4sirvvm1qi2 (TARGET_VECTOR)
#define HAVE_sstruncrvvm2sirvvmf2qi2 (TARGET_VECTOR)
#define HAVE_sstruncrvvm1sirvvmf4qi2 (TARGET_VECTOR)
#define HAVE_sstruncrvvmf2sirvvmf8qi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sstruncrvvm8dirvvm2hi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sstruncrvvm4dirvvm1hi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sstruncrvvm2dirvvmf2hi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sstruncrvvm1dirvvmf4hi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sstruncv1siv1qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_sstruncv2siv2qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_sstruncv4siv4qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_sstruncv8siv8qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_sstruncv16siv16qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_sstruncv32siv32qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_sstruncv64siv64qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_sstruncv128siv128qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_sstruncv256siv256qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_sstruncv512siv512qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_sstruncv1024siv1024qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_sstruncv1div1hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_sstruncv2div2hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_sstruncv4div4hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_sstruncv8div8hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_sstruncv16div16hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_sstruncv32div32hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_sstruncv64div64hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_sstruncv128div128hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_sstruncv256div256hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_sstruncv512div512hi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_sstruncrvvm8dirvvm1qi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sstruncrvvm4dirvvmf2qi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sstruncrvvm2dirvvmf4qi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sstruncrvvm1dirvvmf8qi2 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_sstruncv1div1qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_sstruncv2div2qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_sstruncv4div4qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_sstruncv8div8qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_sstruncv16div16qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_sstruncv32div32qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_sstruncv64div64qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_sstruncv128div128qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_sstruncv256div256qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_sstruncv512div512qi2 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cbranchrvvmf64bi4 ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cbranchrvvmf32bi4 (TARGET_VECTOR)
#define HAVE_cbranchrvvmf16bi4 (TARGET_VECTOR)
#define HAVE_cbranchrvvmf8bi4 (TARGET_VECTOR)
#define HAVE_cbranchrvvmf4bi4 (TARGET_VECTOR)
#define HAVE_cbranchrvvmf2bi4 (TARGET_VECTOR)
#define HAVE_cbranchrvvm1bi4 (TARGET_VECTOR)
#define HAVE_cbranchv1bi4 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BImode)))
#define HAVE_cbranchv2bi4 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BImode)))
#define HAVE_cbranchv4bi4 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BImode)))
#define HAVE_cbranchv8bi4 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BImode)))
#define HAVE_cbranchv16bi4 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BImode)))
#define HAVE_cbranchv32bi4 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BImode)))
#define HAVE_cbranchv64bi4 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cbranchv128bi4 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cbranchv256bi4 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cbranchv512bi4 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cbranchv1024bi4 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cbranchv2048bi4 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cbranchv4096bi4 ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096BImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_vec_cbranch_allrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_len_vec_cbranch_anyrvvm8qi (TARGET_VECTOR)
#define HAVE_cond_len_vec_cbranch_allrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_len_vec_cbranch_anyrvvm4qi (TARGET_VECTOR)
#define HAVE_cond_len_vec_cbranch_allrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_len_vec_cbranch_anyrvvm2qi (TARGET_VECTOR)
#define HAVE_cond_len_vec_cbranch_allrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_len_vec_cbranch_anyrvvm1qi (TARGET_VECTOR)
#define HAVE_cond_len_vec_cbranch_allrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_len_vec_cbranch_anyrvvm8hi (TARGET_VECTOR)
#define HAVE_cond_len_vec_cbranch_allrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_len_vec_cbranch_anyrvvm4hi (TARGET_VECTOR)
#define HAVE_cond_len_vec_cbranch_allrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_len_vec_cbranch_anyrvvm2hi (TARGET_VECTOR)
#define HAVE_cond_len_vec_cbranch_allrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_len_vec_cbranch_anyrvvm1hi (TARGET_VECTOR)
#define HAVE_cond_len_vec_cbranch_allrvvm8si (TARGET_VECTOR)
#define HAVE_cond_len_vec_cbranch_anyrvvm8si (TARGET_VECTOR)
#define HAVE_cond_len_vec_cbranch_allrvvm4si (TARGET_VECTOR)
#define HAVE_cond_len_vec_cbranch_anyrvvm4si (TARGET_VECTOR)
#define HAVE_cond_len_vec_cbranch_allrvvm2si (TARGET_VECTOR)
#define HAVE_cond_len_vec_cbranch_anyrvvm2si (TARGET_VECTOR)
#define HAVE_cond_len_vec_cbranch_allrvvm1si (TARGET_VECTOR)
#define HAVE_cond_len_vec_cbranch_anyrvvm1si (TARGET_VECTOR)
#define HAVE_cond_len_vec_cbranch_allrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_vec_cbranch_anyrvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_vec_cbranch_allrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_vec_cbranch_anyrvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_vec_cbranch_allrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_vec_cbranch_anyrvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_vec_cbranch_allrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_vec_cbranch_anyrvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_vec_cbranch_allrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_vec_cbranch_anyrvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_vec_cbranch_allrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_vec_cbranch_anyrvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_vec_cbranch_allrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_vec_cbranch_anyrvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_vec_cbranch_allrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_vec_cbranch_anyrvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_cond_len_vec_cbranch_allrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_vec_cbranch_anyrvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_vec_cbranch_allrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_vec_cbranch_anyrvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_cond_len_vec_cbranch_allv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_len_vec_cbranch_anyv1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_cond_len_vec_cbranch_allv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_len_vec_cbranch_anyv2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_cond_len_vec_cbranch_allv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_len_vec_cbranch_anyv4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_cond_len_vec_cbranch_allv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_len_vec_cbranch_anyv8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_cond_len_vec_cbranch_allv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_len_vec_cbranch_anyv16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_cond_len_vec_cbranch_allv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_len_vec_cbranch_anyv32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_cond_len_vec_cbranch_allv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_vec_cbranch_anyv64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_vec_cbranch_allv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_vec_cbranch_anyv128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_vec_cbranch_allv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_vec_cbranch_anyv256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_vec_cbranch_allv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_vec_cbranch_anyv512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_vec_cbranch_allv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_vec_cbranch_anyv1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_vec_cbranch_allv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_vec_cbranch_anyv2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_vec_cbranch_allv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_vec_cbranch_anyv4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_vec_cbranch_allv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_len_vec_cbranch_anyv1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_cond_len_vec_cbranch_allv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_len_vec_cbranch_anyv2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_cond_len_vec_cbranch_allv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_len_vec_cbranch_anyv4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_cond_len_vec_cbranch_allv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_len_vec_cbranch_anyv8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_cond_len_vec_cbranch_allv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_len_vec_cbranch_anyv16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_cond_len_vec_cbranch_allv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_vec_cbranch_anyv32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_vec_cbranch_allv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_vec_cbranch_anyv64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_vec_cbranch_allv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_vec_cbranch_anyv128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_vec_cbranch_allv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_vec_cbranch_anyv256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_vec_cbranch_allv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_vec_cbranch_anyv512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_vec_cbranch_allv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_vec_cbranch_anyv1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_vec_cbranch_allv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_vec_cbranch_anyv2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_vec_cbranch_allv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_len_vec_cbranch_anyv1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_cond_len_vec_cbranch_allv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_len_vec_cbranch_anyv2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_cond_len_vec_cbranch_allv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_len_vec_cbranch_anyv4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_cond_len_vec_cbranch_allv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_len_vec_cbranch_anyv8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_cond_len_vec_cbranch_allv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_vec_cbranch_anyv16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_vec_cbranch_allv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_vec_cbranch_anyv32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_vec_cbranch_allv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_vec_cbranch_anyv64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_vec_cbranch_allv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_vec_cbranch_anyv128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_vec_cbranch_allv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_vec_cbranch_anyv256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_vec_cbranch_allv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_vec_cbranch_anyv512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_vec_cbranch_allv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_vec_cbranch_anyv1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_vec_cbranch_allv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_vec_cbranch_anyv1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_vec_cbranch_allv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_vec_cbranch_anyv2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_vec_cbranch_allv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_vec_cbranch_anyv4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_vec_cbranch_allv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_vec_cbranch_anyv8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_vec_cbranch_allv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_vec_cbranch_anyv16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_vec_cbranch_allv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_vec_cbranch_anyv32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_vec_cbranch_allv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_vec_cbranch_anyv64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_vec_cbranch_allv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_vec_cbranch_anyv128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_vec_cbranch_allv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_vec_cbranch_anyv256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_vec_cbranch_allv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_vec_cbranch_anyv512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_vec_cbranch_allrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_vec_cbranch_anyrvvm8hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_vec_cbranch_allrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_vec_cbranch_anyrvvm4hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_vec_cbranch_allrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_vec_cbranch_anyrvvm2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_vec_cbranch_allrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_vec_cbranch_anyrvvm1hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_vec_cbranch_allrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_vec_cbranch_anyrvvmf2hf ((TARGET_VECTOR) && (TARGET_ZVFH))
#define HAVE_cond_len_vec_cbranch_allrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_vec_cbranch_anyrvvmf4hf ((TARGET_VECTOR) && (TARGET_ZVFH && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_vec_cbranch_allrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_vec_cbranch_anyrvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_vec_cbranch_allrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_vec_cbranch_anyrvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_vec_cbranch_allrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_vec_cbranch_anyrvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_vec_cbranch_allrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_vec_cbranch_anyrvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_vec_cbranch_allrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_vec_cbranch_anyrvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_cond_len_vec_cbranch_allrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_vec_cbranch_anyrvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_vec_cbranch_allrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_vec_cbranch_anyrvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_vec_cbranch_allrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_vec_cbranch_anyrvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_vec_cbranch_allrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_vec_cbranch_anyrvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_vec_cbranch_allv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_vec_cbranch_anyv1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_vec_cbranch_allv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_vec_cbranch_anyv2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_vec_cbranch_allv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_vec_cbranch_anyv4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_vec_cbranch_allv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_vec_cbranch_anyv8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_vec_cbranch_allv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_vec_cbranch_anyv16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_ZVFH))
#define HAVE_cond_len_vec_cbranch_allv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_vec_cbranch_anyv32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_vec_cbranch_allv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_vec_cbranch_anyv64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_vec_cbranch_allv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_vec_cbranch_anyv128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_vec_cbranch_allv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_vec_cbranch_anyv256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_vec_cbranch_allv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_vec_cbranch_anyv512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_vec_cbranch_allv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_vec_cbranch_anyv1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_vec_cbranch_allv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_vec_cbranch_anyv2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_vec_cbranch_allv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_vec_cbranch_anyv1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_vec_cbranch_allv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_vec_cbranch_anyv2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_vec_cbranch_allv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_vec_cbranch_anyv4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_vec_cbranch_allv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_vec_cbranch_anyv8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_cond_len_vec_cbranch_allv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_vec_cbranch_anyv16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_vec_cbranch_allv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_vec_cbranch_anyv32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_vec_cbranch_allv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_vec_cbranch_anyv64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_vec_cbranch_allv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_vec_cbranch_anyv128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_vec_cbranch_allv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_vec_cbranch_anyv256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_vec_cbranch_allv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_vec_cbranch_anyv512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_vec_cbranch_allv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_vec_cbranch_anyv1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_vec_cbranch_allv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_vec_cbranch_anyv1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_vec_cbranch_allv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_vec_cbranch_anyv2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_vec_cbranch_allv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_vec_cbranch_anyv4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_cond_len_vec_cbranch_allv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_vec_cbranch_anyv8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_cond_len_vec_cbranch_allv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_vec_cbranch_anyv16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_cond_len_vec_cbranch_allv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_vec_cbranch_anyv32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_cond_len_vec_cbranch_allv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_vec_cbranch_anyv64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_cond_len_vec_cbranch_allv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_vec_cbranch_anyv128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_cond_len_vec_cbranch_allv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_vec_cbranch_anyv256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_cond_len_vec_cbranch_allv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_cond_len_vec_cbranch_anyv512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vrotlrvvm8qi3 (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_vrotrrvvm8qi3 (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_vrotlrvvm4qi3 (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_vrotrrvvm4qi3 (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_vrotlrvvm2qi3 (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_vrotrrvvm2qi3 (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_vrotlrvvm1qi3 (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_vrotrrvvm1qi3 (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_vrotlrvvm8hi3 (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_vrotrrvvm8hi3 (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_vrotlrvvm4hi3 (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_vrotrrvvm4hi3 (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_vrotlrvvm2hi3 (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_vrotrrvvm2hi3 (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_vrotlrvvm1hi3 (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_vrotrrvvm1hi3 (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_vrotlrvvm8si3 (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_vrotrrvvm8si3 (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_vrotlrvvm4si3 (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_vrotrrvvm4si3 (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_vrotlrvvm2si3 (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_vrotrrvvm2si3 (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_vrotlrvvm1si3 (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_vrotrrvvm1si3 (TARGET_ZVBB || TARGET_ZVKB)
#define HAVE_vrotlrvvm8di3 ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vrotrrvvm8di3 ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vrotlrvvm4di3 ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vrotrrvvm4di3 ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vrotlrvvm2di3 ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vrotrrvvm2di3 ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vrotlrvvm1di3 ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vrotrrvvm1di3 ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_vrotlrvvmf2qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_vrotrrvvmf2qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_vrotlrvvmf4qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_vrotrrvvmf4qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_vrotlrvvmf8qi3 ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vrotrrvvmf8qi3 ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vrotlrvvmf2hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_vrotrrvvmf2hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (!TARGET_XTHEADVECTOR))
#define HAVE_vrotlrvvmf4hi3 ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vrotrrvvmf4hi3 ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vrotlrvvmf2si3 ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vrotrrvvmf2si3 ((TARGET_ZVBB || TARGET_ZVKB) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_vrotlv1qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_vrotrv1qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_vrotlv2qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_vrotrv2qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_vrotlv4qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_vrotrv4qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_vrotlv8qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_vrotrv8qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_vrotlv16qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_vrotrv16qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_vrotlv32qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_vrotrv32qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_vrotlv64qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vrotrv64qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vrotlv128qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vrotrv128qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vrotlv256qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vrotrv256qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vrotlv512qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vrotrv512qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vrotlv1024qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vrotrv1024qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vrotlv2048qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vrotrv2048qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vrotlv4096qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vrotrv4096qi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vrotlv1hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_vrotrv1hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_vrotlv2hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_vrotrv2hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_vrotlv4hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_vrotrv4hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_vrotlv8hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_vrotrv8hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_vrotlv16hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_vrotrv16hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_vrotlv32hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vrotrv32hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vrotlv64hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vrotrv64hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vrotlv128hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vrotrv128hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vrotlv256hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vrotrv256hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vrotlv512hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vrotrv512hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vrotlv1024hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vrotrv1024hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vrotlv2048hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vrotrv2048hi3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vrotlv1si3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_vrotrv1si3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_vrotlv2si3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_vrotrv2si3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_vrotlv4si3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_vrotrv4si3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_vrotlv8si3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_vrotrv8si3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_vrotlv16si3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vrotrv16si3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_vrotlv32si3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vrotrv32si3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_vrotlv64si3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vrotrv64si3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_vrotlv128si3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vrotrv128si3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_vrotlv256si3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vrotrv256si3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_vrotlv512si3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vrotrv512si3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_vrotlv1024si3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vrotrv1024si3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_vrotlv1di3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vrotrv1di3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vrotlv2di3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vrotrv2di3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vrotlv4di3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vrotrv4di3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_vrotlv8di3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vrotrv8di3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_vrotlv16di3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vrotrv16di3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_vrotlv32di3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vrotrv32di3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_vrotlv64di3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vrotrv64di3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_vrotlv128di3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vrotrv128di3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_vrotlv256di3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vrotrv256di3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_vrotlv512di3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_vrotrv512di3 ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_strided_load_rvvm8qi (TARGET_VECTOR)
#define HAVE_mask_len_strided_load_rvvm4qi (TARGET_VECTOR)
#define HAVE_mask_len_strided_load_rvvm2qi (TARGET_VECTOR)
#define HAVE_mask_len_strided_load_rvvm1qi (TARGET_VECTOR)
#define HAVE_mask_len_strided_load_rvvm8hi (TARGET_VECTOR)
#define HAVE_mask_len_strided_load_rvvm4hi (TARGET_VECTOR)
#define HAVE_mask_len_strided_load_rvvm2hi (TARGET_VECTOR)
#define HAVE_mask_len_strided_load_rvvm1hi (TARGET_VECTOR)
#define HAVE_mask_len_strided_load_rvvm8si (TARGET_VECTOR)
#define HAVE_mask_len_strided_load_rvvm4si (TARGET_VECTOR)
#define HAVE_mask_len_strided_load_rvvm2si (TARGET_VECTOR)
#define HAVE_mask_len_strided_load_rvvm1si (TARGET_VECTOR)
#define HAVE_mask_len_strided_load_rvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_strided_load_rvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_strided_load_rvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_strided_load_rvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_strided_load_rvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_mask_len_strided_load_rvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_mask_len_strided_load_rvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_mask_len_strided_load_rvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_mask_len_strided_load_rvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_mask_len_strided_load_rvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_mask_len_strided_load_rvvm8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_strided_load_rvvm4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_strided_load_rvvm2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_strided_load_rvvm1hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_strided_load_rvvmf2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_strided_load_rvvmf4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_strided_load_rvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_strided_load_rvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_strided_load_rvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_strided_load_rvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_strided_load_rvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_strided_load_rvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_strided_load_rvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_strided_load_rvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_strided_load_rvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_strided_load_rvvm8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_strided_load_rvvm4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_strided_load_rvvm2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_strided_load_rvvm1bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_strided_load_rvvmf2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_strided_load_rvvmf4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_strided_load_v1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_mask_len_strided_load_v2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_mask_len_strided_load_v4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_mask_len_strided_load_v8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_mask_len_strided_load_v16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_mask_len_strided_load_v32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_mask_len_strided_load_v64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_strided_load_v128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_strided_load_v256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_strided_load_v512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_strided_load_v1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_strided_load_v2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_strided_load_v4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_strided_load_v1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_mask_len_strided_load_v2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_mask_len_strided_load_v4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_mask_len_strided_load_v8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_mask_len_strided_load_v16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_mask_len_strided_load_v32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_strided_load_v64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_strided_load_v128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_strided_load_v256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_strided_load_v512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_strided_load_v1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_strided_load_v2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_strided_load_v1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_mask_len_strided_load_v2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_mask_len_strided_load_v4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_mask_len_strided_load_v8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_mask_len_strided_load_v16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_strided_load_v32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_strided_load_v64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_strided_load_v128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_strided_load_v256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_strided_load_v512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_strided_load_v1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_strided_load_v1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_strided_load_v2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_strided_load_v4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_strided_load_v8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_strided_load_v16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_strided_load_v32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_strided_load_v64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_strided_load_v128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_strided_load_v256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_strided_load_v512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_strided_load_v1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_strided_load_v2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_strided_load_v4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_strided_load_v8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_strided_load_v16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_strided_load_v32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_strided_load_v64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_strided_load_v128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_strided_load_v256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_strided_load_v512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_strided_load_v1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_strided_load_v2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_strided_load_v1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_strided_load_v2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_strided_load_v4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_strided_load_v8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_strided_load_v16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_strided_load_v32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_strided_load_v64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_strided_load_v128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_strided_load_v256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_strided_load_v512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_strided_load_v1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_strided_load_v1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_strided_load_v2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_strided_load_v4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_strided_load_v8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_strided_load_v16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_strided_load_v32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_strided_load_v64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_strided_load_v128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_strided_load_v256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_strided_load_v512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_strided_load_v1bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_strided_load_v2bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_strided_load_v4bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_strided_load_v8bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_strided_load_v16bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_strided_load_v32bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_strided_load_v64bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_strided_load_v128bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_strided_load_v256bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_strided_load_v512bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_strided_load_v1024bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_strided_load_v2048bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_strided_store_rvvm8qi (TARGET_VECTOR)
#define HAVE_mask_len_strided_store_rvvm4qi (TARGET_VECTOR)
#define HAVE_mask_len_strided_store_rvvm2qi (TARGET_VECTOR)
#define HAVE_mask_len_strided_store_rvvm1qi (TARGET_VECTOR)
#define HAVE_mask_len_strided_store_rvvm8hi (TARGET_VECTOR)
#define HAVE_mask_len_strided_store_rvvm4hi (TARGET_VECTOR)
#define HAVE_mask_len_strided_store_rvvm2hi (TARGET_VECTOR)
#define HAVE_mask_len_strided_store_rvvm1hi (TARGET_VECTOR)
#define HAVE_mask_len_strided_store_rvvm8si (TARGET_VECTOR)
#define HAVE_mask_len_strided_store_rvvm4si (TARGET_VECTOR)
#define HAVE_mask_len_strided_store_rvvm2si (TARGET_VECTOR)
#define HAVE_mask_len_strided_store_rvvm1si (TARGET_VECTOR)
#define HAVE_mask_len_strided_store_rvvm8di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_strided_store_rvvm4di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_strided_store_rvvm2di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_strided_store_rvvm1di ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_strided_store_rvvmf2qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_mask_len_strided_store_rvvmf4qi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_mask_len_strided_store_rvvmf8qi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_mask_len_strided_store_rvvmf2hi ((TARGET_VECTOR) && (!TARGET_XTHEADVECTOR))
#define HAVE_mask_len_strided_store_rvvmf4hi ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_mask_len_strided_store_rvvmf2si ((TARGET_VECTOR) && ((TARGET_VECTOR_ELEN_64) && (!TARGET_XTHEADVECTOR)))
#define HAVE_mask_len_strided_store_rvvm8hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_strided_store_rvvm4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_strided_store_rvvm2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_strided_store_rvvm1hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_strided_store_rvvmf2hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_strided_store_rvvmf4hf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_strided_store_rvvm8sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_strided_store_rvvm4sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_strided_store_rvvm2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_strided_store_rvvm1sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_strided_store_rvvmf2sf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_32 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_strided_store_rvvm8df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_strided_store_rvvm4df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_strided_store_rvvm2df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_strided_store_rvvm1df ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_strided_store_rvvm8bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_strided_store_rvvm4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_strided_store_rvvm2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_strided_store_rvvm1bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_strided_store_rvvmf2bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_strided_store_rvvmf4bf ((TARGET_VECTOR) && (TARGET_VECTOR_ELEN_BF_16 && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_strided_store_v1qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1QImode)))
#define HAVE_mask_len_strided_store_v2qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2QImode)))
#define HAVE_mask_len_strided_store_v4qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4QImode)))
#define HAVE_mask_len_strided_store_v8qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8QImode)))
#define HAVE_mask_len_strided_store_v16qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16QImode)))
#define HAVE_mask_len_strided_store_v32qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32QImode)))
#define HAVE_mask_len_strided_store_v64qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64QImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_strided_store_v128qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128QImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_strided_store_v256qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256QImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_strided_store_v512qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512QImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_strided_store_v1024qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024QImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_strided_store_v2048qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048QImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_strided_store_v4096qi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4096QImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_strided_store_v1hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HImode)))
#define HAVE_mask_len_strided_store_v2hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HImode)))
#define HAVE_mask_len_strided_store_v4hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HImode)))
#define HAVE_mask_len_strided_store_v8hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HImode)))
#define HAVE_mask_len_strided_store_v16hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HImode)))
#define HAVE_mask_len_strided_store_v32hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_strided_store_v64hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_strided_store_v128hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_strided_store_v256hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_strided_store_v512hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_strided_store_v1024hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_strided_store_v2048hi ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_strided_store_v1si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SImode)))
#define HAVE_mask_len_strided_store_v2si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SImode)))
#define HAVE_mask_len_strided_store_v4si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SImode)))
#define HAVE_mask_len_strided_store_v8si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SImode)))
#define HAVE_mask_len_strided_store_v16si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SImode) && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_strided_store_v32si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SImode) && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_strided_store_v64si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SImode) && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_strided_store_v128si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SImode) && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_strided_store_v256si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SImode) && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_strided_store_v512si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SImode) && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_strided_store_v1024si ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SImode) && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_strided_store_v1di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_strided_store_v2di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_strided_store_v4di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_mask_len_strided_store_v8di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_strided_store_v16di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_strided_store_v32di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_strided_store_v64di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_strided_store_v128di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_strided_store_v256di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_strided_store_v512di ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_strided_store_v1hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_strided_store_v2hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_strided_store_v4hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_strided_store_v8hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_strided_store_v16hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16HFmode) && TARGET_VECTOR_ELEN_FP_16))
#define HAVE_mask_len_strided_store_v32hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_strided_store_v64hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_strided_store_v128hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_strided_store_v256hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_strided_store_v512hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_strided_store_v1024hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_strided_store_v2048hf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048HFmode) && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_strided_store_v1sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_strided_store_v2sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_strided_store_v4sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_strided_store_v8sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8SFmode) && TARGET_VECTOR_ELEN_FP_32))
#define HAVE_mask_len_strided_store_v16sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_strided_store_v32sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_strided_store_v64sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_strided_store_v128sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_strided_store_v256sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_strided_store_v512sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_strided_store_v1024sf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024SFmode) && TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_strided_store_v1df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_strided_store_v2df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_strided_store_v4df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4DFmode) && TARGET_VECTOR_ELEN_FP_64))
#define HAVE_mask_len_strided_store_v8df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_strided_store_v16df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_strided_store_v32df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_strided_store_v64df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_strided_store_v128df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_strided_store_v256df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_strided_store_v512df ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512DFmode) && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_mask_len_strided_store_v1bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_strided_store_v2bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_strided_store_v4bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V4BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_strided_store_v8bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V8BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_strided_store_v16bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V16BFmode) && TARGET_VECTOR_ELEN_BF_16))
#define HAVE_mask_len_strided_store_v32bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V32BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 64))
#define HAVE_mask_len_strided_store_v64bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V64BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 128))
#define HAVE_mask_len_strided_store_v128bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V128BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 256))
#define HAVE_mask_len_strided_store_v256bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V256BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 512))
#define HAVE_mask_len_strided_store_v512bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V512BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 1024))
#define HAVE_mask_len_strided_store_v1024bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V1024BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 2048))
#define HAVE_mask_len_strided_store_v2048bf ((TARGET_VECTOR) && (riscv_vector::vls_mode_valid_p (V2048BFmode) && TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vandnrvvm8di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vandnrvvm4di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vandnrvvm2di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vandnrvvm1di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vandnv1di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vandnv2di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vandnv4di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vandnv8di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vandnv16di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vandnv32di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vandnv64di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vandnv128di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vandnv256di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vandnv512di_scalar ((TARGET_ZVBB || TARGET_ZVKB) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vclmulrvvm8di_scalar ((TARGET_ZVBC) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulhrvvm8di_scalar ((TARGET_ZVBC) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulrvvm4di_scalar ((TARGET_ZVBC) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulhrvvm4di_scalar ((TARGET_ZVBC) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulrvvm2di_scalar ((TARGET_ZVBC) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulhrvvm2di_scalar ((TARGET_ZVBC) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulrvvm1di_scalar ((TARGET_ZVBC) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulhrvvm1di_scalar ((TARGET_ZVBC) && (TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulv1di_scalar ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulhv1di_scalar ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V1DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulv2di_scalar ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulhv2di_scalar ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V2DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulv4di_scalar ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulhv4di_scalar ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V4DImode) && TARGET_VECTOR_ELEN_64))
#define HAVE_pred_vclmulv8di_scalar ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vclmulhv8di_scalar ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V8DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 64))
#define HAVE_pred_vclmulv16di_scalar ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vclmulhv16di_scalar ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V16DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 128))
#define HAVE_pred_vclmulv32di_scalar ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vclmulhv32di_scalar ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V32DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 256))
#define HAVE_pred_vclmulv64di_scalar ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vclmulhv64di_scalar ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V64DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 512))
#define HAVE_pred_vclmulv128di_scalar ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vclmulhv128di_scalar ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V128DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 1024))
#define HAVE_pred_vclmulv256di_scalar ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vclmulhv256di_scalar ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V256DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 2048))
#define HAVE_pred_vclmulv512di_scalar ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
#define HAVE_pred_vclmulhv512di_scalar ((TARGET_ZVBC) && (riscv_vector::vls_mode_valid_p (V512DImode) && TARGET_VECTOR_ELEN_64 && TARGET_MIN_VLEN >= 4096))
extern rtx        gen_addsf3                                         (rtx, rtx, rtx);
extern rtx        gen_adddf3                                         (rtx, rtx, rtx);
extern rtx        gen_addhf3                                         (rtx, rtx, rtx);
extern rtx        gen_addsi3_extended                                (rtx, rtx, rtx);
extern rtx        gen_subsf3                                         (rtx, rtx, rtx);
extern rtx        gen_subdf3                                         (rtx, rtx, rtx);
extern rtx        gen_subhf3                                         (rtx, rtx, rtx);
extern rtx        gen_subdi3                                         (rtx, rtx, rtx);
extern rtx        gen_subsi3_extended                                (rtx, rtx, rtx);
extern rtx        gen_negdi2                                         (rtx, rtx);
extern rtx        gen_negsi2_extended                                (rtx, rtx);
extern rtx        gen_mulsf3                                         (rtx, rtx, rtx);
extern rtx        gen_muldf3                                         (rtx, rtx, rtx);
extern rtx        gen_mulhf3                                         (rtx, rtx, rtx);
extern rtx        gen_muldi3                                         (rtx, rtx, rtx);
extern rtx        gen_mulsi3_extended                                (rtx, rtx, rtx);
extern rtx        gen_smuldi3_highpart                               (rtx, rtx, rtx);
extern rtx        gen_umuldi3_highpart                               (rtx, rtx, rtx);
extern rtx        gen_usmuldi3_highpart                              (rtx, rtx, rtx);
extern rtx        gen_smulsi3_highpart                               (rtx, rtx, rtx);
extern rtx        gen_umulsi3_highpart                               (rtx, rtx, rtx);
extern rtx        gen_usmulsi3_highpart                              (rtx, rtx, rtx);
extern rtx        gen_divdi3                                         (rtx, rtx, rtx);
extern rtx        gen_udivdi3                                        (rtx, rtx, rtx);
extern rtx        gen_moddi3                                         (rtx, rtx, rtx);
extern rtx        gen_umoddi3                                        (rtx, rtx, rtx);
extern rtx        gen_divsi3_extended                                (rtx, rtx, rtx);
extern rtx        gen_udivsi3_extended                               (rtx, rtx, rtx);
extern rtx        gen_modsi3_extended                                (rtx, rtx, rtx);
extern rtx        gen_umodsi3_extended                               (rtx, rtx, rtx);
extern rtx        gen_divsf3                                         (rtx, rtx, rtx);
extern rtx        gen_divdf3                                         (rtx, rtx, rtx);
extern rtx        gen_divhf3                                         (rtx, rtx, rtx);
extern rtx        gen_sqrtsf2                                        (rtx, rtx);
extern rtx        gen_sqrtdf2                                        (rtx, rtx);
extern rtx        gen_sqrthf2                                        (rtx, rtx);
extern rtx        gen_fmasf4                                         (rtx, rtx, rtx, rtx);
extern rtx        gen_fmadf4                                         (rtx, rtx, rtx, rtx);
extern rtx        gen_fmahf4                                         (rtx, rtx, rtx, rtx);
extern rtx        gen_fmssf4                                         (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsdf4                                         (rtx, rtx, rtx, rtx);
extern rtx        gen_fmshf4                                         (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmssf4                                        (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsdf4                                        (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmshf4                                        (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmasf4                                        (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmadf4                                        (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmahf4                                        (rtx, rtx, rtx, rtx);
extern rtx        gen_abssf2                                         (rtx, rtx);
extern rtx        gen_absdf2                                         (rtx, rtx);
extern rtx        gen_abshf2                                         (rtx, rtx);
extern rtx        gen_copysignsf3                                    (rtx, rtx, rtx);
extern rtx        gen_copysigndf3                                    (rtx, rtx, rtx);
extern rtx        gen_copysignhf3                                    (rtx, rtx, rtx);
extern rtx        gen_negsf2                                         (rtx, rtx);
extern rtx        gen_negdf2                                         (rtx, rtx);
extern rtx        gen_neghf2                                         (rtx, rtx);
extern rtx        gen_fminmsf3                                       (rtx, rtx, rtx);
extern rtx        gen_fminmdf3                                       (rtx, rtx, rtx);
extern rtx        gen_fminmhf3                                       (rtx, rtx, rtx);
extern rtx        gen_fmaxmsf3                                       (rtx, rtx, rtx);
extern rtx        gen_fmaxmdf3                                       (rtx, rtx, rtx);
extern rtx        gen_fmaxmhf3                                       (rtx, rtx, rtx);
extern rtx        gen_fminsf3                                        (rtx, rtx, rtx);
extern rtx        gen_fmindf3                                        (rtx, rtx, rtx);
extern rtx        gen_fminhf3                                        (rtx, rtx, rtx);
extern rtx        gen_fmaxsf3                                        (rtx, rtx, rtx);
extern rtx        gen_fmaxdf3                                        (rtx, rtx, rtx);
extern rtx        gen_fmaxhf3                                        (rtx, rtx, rtx);
extern rtx        gen_sminsf3                                        (rtx, rtx, rtx);
extern rtx        gen_smindf3                                        (rtx, rtx, rtx);
extern rtx        gen_sminhf3                                        (rtx, rtx, rtx);
extern rtx        gen_smaxsf3                                        (rtx, rtx, rtx);
extern rtx        gen_smaxdf3                                        (rtx, rtx, rtx);
extern rtx        gen_smaxhf3                                        (rtx, rtx, rtx);
extern rtx        gen_one_cmplsi2                                    (rtx, rtx);
extern rtx        gen_one_cmpldi2                                    (rtx, rtx);
extern rtx        gen_truncdfsf2                                     (rtx, rtx);
extern rtx        gen_truncsfhf2                                     (rtx, rtx);
extern rtx        gen_truncdfhf2                                     (rtx, rtx);
extern rtx        gen_truncsfbf2                                     (rtx, rtx);
extern rtx        gen_extendhfsf2                                    (rtx, rtx);
extern rtx        gen_extendbfsf2                                    (rtx, rtx);
extern rtx        gen_extendsfdf2                                    (rtx, rtx);
extern rtx        gen_extendhfdf2                                    (rtx, rtx);
extern rtx        gen_fix_truncsfsi2_sext                            (rtx, rtx);
extern rtx        gen_fixuns_truncsfsi2_sext                         (rtx, rtx);
extern rtx        gen_fix_truncdfsi2_sext                            (rtx, rtx);
extern rtx        gen_fixuns_truncdfsi2_sext                         (rtx, rtx);
extern rtx        gen_fix_trunchfsi2_sext                            (rtx, rtx);
extern rtx        gen_fixuns_trunchfsi2_sext                         (rtx, rtx);
extern rtx        gen_fix_truncsfdi2                                 (rtx, rtx);
extern rtx        gen_fixuns_truncsfdi2                              (rtx, rtx);
extern rtx        gen_fix_truncdfdi2                                 (rtx, rtx);
extern rtx        gen_fixuns_truncdfdi2                              (rtx, rtx);
extern rtx        gen_fix_trunchfdi2                                 (rtx, rtx);
extern rtx        gen_fixuns_trunchfdi2                              (rtx, rtx);
extern rtx        gen_floatsisf2                                     (rtx, rtx);
extern rtx        gen_floatdisf2                                     (rtx, rtx);
extern rtx        gen_floatsidf2                                     (rtx, rtx);
extern rtx        gen_floatdidf2                                     (rtx, rtx);
extern rtx        gen_floatsihf2                                     (rtx, rtx);
extern rtx        gen_floatdihf2                                     (rtx, rtx);
extern rtx        gen_floatunssisf2                                  (rtx, rtx);
extern rtx        gen_floatunsdisf2                                  (rtx, rtx);
extern rtx        gen_floatunssidf2                                  (rtx, rtx);
extern rtx        gen_floatunsdidf2                                  (rtx, rtx);
extern rtx        gen_floatunssihf2                                  (rtx, rtx);
extern rtx        gen_floatunsdihf2                                  (rtx, rtx);
extern rtx        gen_lrintsfsi2_sext                                (rtx, rtx);
extern rtx        gen_lrintdfsi2_sext                                (rtx, rtx);
extern rtx        gen_lrinthfsi2_sext                                (rtx, rtx);
extern rtx        gen_lrintsfdi2                                     (rtx, rtx);
extern rtx        gen_lrintdfdi2                                     (rtx, rtx);
extern rtx        gen_lrinthfdi2                                     (rtx, rtx);
extern rtx        gen_lroundsfsi2_sext                               (rtx, rtx);
extern rtx        gen_lfloorsfsi2_sext                               (rtx, rtx);
extern rtx        gen_lceilsfsi2_sext                                (rtx, rtx);
extern rtx        gen_lbtruncsfsi2_sext                              (rtx, rtx);
extern rtx        gen_lroundevensfsi2_sext                           (rtx, rtx);
extern rtx        gen_lnearbyintsfsi2_sext                           (rtx, rtx);
extern rtx        gen_lrounddfsi2_sext                               (rtx, rtx);
extern rtx        gen_lfloordfsi2_sext                               (rtx, rtx);
extern rtx        gen_lceildfsi2_sext                                (rtx, rtx);
extern rtx        gen_lbtruncdfsi2_sext                              (rtx, rtx);
extern rtx        gen_lroundevendfsi2_sext                           (rtx, rtx);
extern rtx        gen_lnearbyintdfsi2_sext                           (rtx, rtx);
extern rtx        gen_lroundhfsi2_sext                               (rtx, rtx);
extern rtx        gen_lfloorhfsi2_sext                               (rtx, rtx);
extern rtx        gen_lceilhfsi2_sext                                (rtx, rtx);
extern rtx        gen_lbtrunchfsi2_sext                              (rtx, rtx);
extern rtx        gen_lroundevenhfsi2_sext                           (rtx, rtx);
extern rtx        gen_lnearbyinthfsi2_sext                           (rtx, rtx);
extern rtx        gen_lroundsfdi2                                    (rtx, rtx);
extern rtx        gen_lfloorsfdi2                                    (rtx, rtx);
extern rtx        gen_lceilsfdi2                                     (rtx, rtx);
extern rtx        gen_lbtruncsfdi2                                   (rtx, rtx);
extern rtx        gen_lroundevensfdi2                                (rtx, rtx);
extern rtx        gen_lnearbyintsfdi2                                (rtx, rtx);
extern rtx        gen_lrounddfdi2                                    (rtx, rtx);
extern rtx        gen_lfloordfdi2                                    (rtx, rtx);
extern rtx        gen_lceildfdi2                                     (rtx, rtx);
extern rtx        gen_lbtruncdfdi2                                   (rtx, rtx);
extern rtx        gen_lroundevendfdi2                                (rtx, rtx);
extern rtx        gen_lnearbyintdfdi2                                (rtx, rtx);
extern rtx        gen_lroundhfdi2                                    (rtx, rtx);
extern rtx        gen_lfloorhfdi2                                    (rtx, rtx);
extern rtx        gen_lceilhfdi2                                     (rtx, rtx);
extern rtx        gen_lbtrunchfdi2                                   (rtx, rtx);
extern rtx        gen_lroundevenhfdi2                                (rtx, rtx);
extern rtx        gen_lnearbyinthfdi2                                (rtx, rtx);
extern rtx        gen_roundsf_zfa2                                   (rtx, rtx);
extern rtx        gen_floorsf_zfa2                                   (rtx, rtx);
extern rtx        gen_ceilsf_zfa2                                    (rtx, rtx);
extern rtx        gen_btruncsf_zfa2                                  (rtx, rtx);
extern rtx        gen_roundevensf_zfa2                               (rtx, rtx);
extern rtx        gen_nearbyintsf_zfa2                               (rtx, rtx);
extern rtx        gen_rounddf_zfa2                                   (rtx, rtx);
extern rtx        gen_floordf_zfa2                                   (rtx, rtx);
extern rtx        gen_ceildf_zfa2                                    (rtx, rtx);
extern rtx        gen_btruncdf_zfa2                                  (rtx, rtx);
extern rtx        gen_roundevendf_zfa2                               (rtx, rtx);
extern rtx        gen_nearbyintdf_zfa2                               (rtx, rtx);
extern rtx        gen_roundhf_zfa2                                   (rtx, rtx);
extern rtx        gen_floorhf_zfa2                                   (rtx, rtx);
extern rtx        gen_ceilhf_zfa2                                    (rtx, rtx);
extern rtx        gen_btrunchf_zfa2                                  (rtx, rtx);
extern rtx        gen_roundevenhf_zfa2                               (rtx, rtx);
extern rtx        gen_nearbyinthf_zfa2                               (rtx, rtx);
extern rtx        gen_rintsf2                                        (rtx, rtx);
extern rtx        gen_rintdf2                                        (rtx, rtx);
extern rtx        gen_rinthf2                                        (rtx, rtx);
extern rtx        gen_got_loadsi                                     (rtx, rtx);
extern rtx        gen_got_loaddi                                     (rtx, rtx);
extern rtx        gen_tls_add_tp_lesi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_tls_add_tp_ledi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_got_load_tls_gdsi                              (rtx, rtx);
extern rtx        gen_got_load_tls_gddi                              (rtx, rtx);
extern rtx        gen_got_load_tls_iesi                              (rtx, rtx);
extern rtx        gen_got_load_tls_iedi                              (rtx, rtx);
extern rtx        gen_tlsdescsi                                      (rtx);
extern rtx        gen_tlsdescdi                                      (rtx);
extern rtx        gen_auipcsi                                        (rtx, rtx, rtx);
extern rtx        gen_auipcdi                                        (rtx, rtx, rtx);
extern rtx        gen_movsidf2_low_rv32                              (rtx, rtx);
extern rtx        gen_movsidf2_high_rv32                             (rtx, rtx);
extern rtx        gen_movdfsisi3_rv32                                (rtx, rtx, rtx);
extern rtx        gen_fence                                          (void);
extern rtx        gen_fence_i                                        (void);
extern rtx        gen_riscv_pause                                    (void);
extern rtx        gen_ashldi3                                        (rtx, rtx, rtx);
extern rtx        gen_ashrdi3                                        (rtx, rtx, rtx);
extern rtx        gen_lshrdi3                                        (rtx, rtx, rtx);
extern rtx        gen_ashlsi3_extend                                 (rtx, rtx, rtx);
extern rtx        gen_ashrsi3_extend                                 (rtx, rtx, rtx);
extern rtx        gen_lshrsi3_extend                                 (rtx, rtx, rtx);
extern rtx        gen_and_shift_reversesi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_ior_shift_reversesi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_xor_shift_reversesi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_and_shift_reversedi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_ior_shift_reversedi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_xor_shift_reversedi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_zero_extendsidi2_shifted                       (rtx, rtx, rtx, rtx);
extern rtx        gen_flt_quietsfsi4_zfa                             (rtx, rtx, rtx);
extern rtx        gen_fle_quietsfsi4_zfa                             (rtx, rtx, rtx);
extern rtx        gen_flt_quietsfdi4_zfa                             (rtx, rtx, rtx);
extern rtx        gen_fle_quietsfdi4_zfa                             (rtx, rtx, rtx);
extern rtx        gen_flt_quietdfsi4_zfa                             (rtx, rtx, rtx);
extern rtx        gen_fle_quietdfsi4_zfa                             (rtx, rtx, rtx);
extern rtx        gen_flt_quietdfdi4_zfa                             (rtx, rtx, rtx);
extern rtx        gen_fle_quietdfdi4_zfa                             (rtx, rtx, rtx);
extern rtx        gen_flt_quiethfsi4_zfa                             (rtx, rtx, rtx);
extern rtx        gen_fle_quiethfsi4_zfa                             (rtx, rtx, rtx);
extern rtx        gen_flt_quiethfdi4_zfa                             (rtx, rtx, rtx);
extern rtx        gen_fle_quiethfdi4_zfa                             (rtx, rtx, rtx);
extern rtx        gen_fclasssfsi                                     (rtx, rtx);
extern rtx        gen_fclasssfdi                                     (rtx, rtx);
extern rtx        gen_fclassdfsi                                     (rtx, rtx);
extern rtx        gen_fclassdfdi                                     (rtx, rtx);
extern rtx        gen_fclasshfsi                                     (rtx, rtx);
extern rtx        gen_fclasshfdi                                     (rtx, rtx);
extern rtx        gen_slt_sisi3                                      (rtx, rtx, rtx);
extern rtx        gen_sltu_sisi3                                     (rtx, rtx, rtx);
static inline rtx gen_slt_sidi3                                      (rtx, rtx, rtx);
static inline rtx
gen_slt_sidi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_sltu_sidi3                                     (rtx, rtx, rtx);
static inline rtx
gen_sltu_sidi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
extern rtx        gen_slt_disi3                                      (rtx, rtx, rtx);
extern rtx        gen_sltu_disi3                                     (rtx, rtx, rtx);
extern rtx        gen_slt_didi3                                      (rtx, rtx, rtx);
extern rtx        gen_sltu_didi3                                     (rtx, rtx, rtx);
extern rtx        gen_jump                                           (rtx);
extern rtx        gen_indirect_jumpsi                                (rtx);
extern rtx        gen_indirect_jumpdi                                (rtx);
extern rtx        gen_tablejumpsi                                    (rtx, rtx);
extern rtx        gen_tablejumpdi                                    (rtx, rtx);
extern rtx        gen_tablejump_cfisi                                (rtx);
extern rtx        gen_tablejump_cfidi                                (rtx);
extern rtx        gen_blockage                                       (void);
extern rtx        gen_simple_return                                  (void);
extern rtx        gen_simple_return_internal                         (rtx);
extern rtx        gen_eh_set_lr_si                                   (rtx);
extern rtx        gen_eh_set_lr_di                                   (rtx);
extern rtx        gen_eh_return_internal                             (void);
extern rtx        gen_sibcall_internal                               (rtx, rtx, rtx);
extern rtx        gen_sibcall_value_internal                         (rtx, rtx, rtx, rtx);
extern rtx        gen_call_internal                                  (rtx, rtx, rtx);
extern rtx        gen_call_value_internal                            (rtx, rtx, rtx, rtx);
extern rtx        gen_nop                                            (void);
extern rtx        gen_trap                                           (void);
extern rtx        gen_gpr_save                                       (rtx, rtx);
extern rtx        gen_gpr_restore                                    (rtx);
extern rtx        gen_gpr_restore_return                             (rtx);
extern rtx        gen_riscv_frcsr                                    (rtx);
extern rtx        gen_riscv_fscsr                                    (rtx);
extern rtx        gen_riscv_frflags                                  (rtx);
extern rtx        gen_riscv_fsflags                                  (rtx);
extern rtx        gen_riscv_mret                                     (void);
extern rtx        gen_riscv_sret                                     (void);
extern rtx        gen_riscv_mnret                                    (void);
extern rtx        gen_stack_tiesi                                    (rtx, rtx);
extern rtx        gen_stack_tiedi                                    (rtx, rtx);
extern rtx        gen_stack_protect_set_si                           (rtx, rtx);
extern rtx        gen_stack_protect_set_di                           (rtx, rtx);
extern rtx        gen_stack_protect_test_si                          (rtx, rtx, rtx);
extern rtx        gen_stack_protect_test_di                          (rtx, rtx, rtx);
extern rtx        gen_riscv_clean_si                                 (rtx);
extern rtx        gen_riscv_clean_di                                 (rtx);
extern rtx        gen_riscv_flush_si                                 (rtx);
extern rtx        gen_riscv_flush_di                                 (rtx);
extern rtx        gen_riscv_inval_si                                 (rtx);
extern rtx        gen_riscv_inval_di                                 (rtx);
extern rtx        gen_riscv_zero_si                                  (rtx);
extern rtx        gen_riscv_zero_di                                  (rtx);
extern rtx        gen_prefetch                                       (rtx, rtx, rtx);
extern rtx        gen_riscv_prefetchi_si                             (rtx, rtx);
extern rtx        gen_riscv_prefetchi_di                             (rtx, rtx);
extern rtx        gen_sspushsi                                       (rtx);
extern rtx        gen_sspushdi                                       (rtx);
extern rtx        gen_sspopchksi                                     (rtx);
extern rtx        gen_sspopchkdi                                     (rtx);
extern rtx        gen_ssrdpsi                                        (rtx);
extern rtx        gen_ssrdpdi                                        (rtx);
extern rtx        gen_write_sspsi                                    (rtx);
extern rtx        gen_write_sspdi                                    (rtx);
extern rtx        gen_lpad                                           (rtx);
extern rtx        gen_set_lplsi                                      (rtx);
extern rtx        gen_set_lpldi                                      (rtx);
extern rtx        gen_lpad_align                                     (void);
extern rtx        gen_set_guardedsi                                  (rtx);
extern rtx        gen_set_guardeddi                                  (rtx);
extern rtx        gen_and_notsi3                                     (rtx, rtx, rtx);
extern rtx        gen_ior_notsi3                                     (rtx, rtx, rtx);
extern rtx        gen_and_notdi3                                     (rtx, rtx, rtx);
extern rtx        gen_ior_notdi3                                     (rtx, rtx, rtx);
extern rtx        gen_rotrsi3_sext                                   (rtx, rtx, rtx);
extern rtx        gen_rotldi3                                        (rtx, rtx, rtx);
extern rtx        gen_rotlsi3_sext                                   (rtx, rtx, rtx);
extern rtx        gen_orcbsi2                                        (rtx, rtx);
extern rtx        gen_orcbdi2                                        (rtx, rtx);
extern rtx        gen_riscv_clmul_si                                 (rtx, rtx, rtx);
extern rtx        gen_riscv_clmul_di                                 (rtx, rtx, rtx);
extern rtx        gen_riscv_clmulh_si                                (rtx, rtx, rtx);
extern rtx        gen_riscv_clmulh_di                                (rtx, rtx, rtx);
extern rtx        gen_riscv_clmulr_si                                (rtx, rtx, rtx);
extern rtx        gen_riscv_clmulr_di                                (rtx, rtx, rtx);
extern rtx        gen_riscv_brev8_si                                 (rtx, rtx);
extern rtx        gen_riscv_brev8_di                                 (rtx, rtx);
extern rtx        gen_riscv_zip                                      (rtx, rtx);
extern rtx        gen_riscv_unzip                                    (rtx, rtx);
extern rtx        gen_riscv_pack_sihi                                (rtx, rtx, rtx);
extern rtx        gen_riscv_pack_sisi                                (rtx, rtx, rtx);
extern rtx        gen_riscv_pack_dihi                                (rtx, rtx, rtx);
extern rtx        gen_riscv_pack_disi                                (rtx, rtx, rtx);
extern rtx        gen_riscv_xpack_si_hi_2                            (rtx, rtx, rtx, rtx);
static inline rtx gen_riscv_xpack_si_si_2                            (rtx, rtx, rtx, rtx);
static inline rtx
gen_riscv_xpack_si_si_2(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d))
{
  return 0;
}
static inline rtx gen_riscv_xpack_di_hi_2                            (rtx, rtx, rtx, rtx);
static inline rtx
gen_riscv_xpack_di_hi_2(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d))
{
  return 0;
}
extern rtx        gen_riscv_xpack_di_si_2                            (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_packh_si                                 (rtx, rtx, rtx);
extern rtx        gen_riscv_packh_di                                 (rtx, rtx, rtx);
extern rtx        gen_riscv_packw                                    (rtx, rtx, rtx);
extern rtx        gen_riscv_xperm4_si                                (rtx, rtx, rtx);
extern rtx        gen_riscv_xperm4_di                                (rtx, rtx, rtx);
extern rtx        gen_riscv_xperm8_si                                (rtx, rtx, rtx);
extern rtx        gen_riscv_xperm8_di                                (rtx, rtx, rtx);
extern rtx        gen_riscv_aes32dsi                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_aes32dsmi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_aes64ds                                  (rtx, rtx, rtx);
extern rtx        gen_riscv_aes64dsm                                 (rtx, rtx, rtx);
extern rtx        gen_riscv_aes64im                                  (rtx, rtx);
extern rtx        gen_riscv_aes64ks1i                                (rtx, rtx, rtx);
extern rtx        gen_riscv_aes64ks2                                 (rtx, rtx, rtx);
extern rtx        gen_riscv_aes32esi                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_aes32esmi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_aes64es                                  (rtx, rtx, rtx);
extern rtx        gen_riscv_aes64esm                                 (rtx, rtx, rtx);
extern rtx        gen_riscv_sha256sig0_di_extended                   (rtx, rtx);
extern rtx        gen_riscv_sha256sig1_di_extended                   (rtx, rtx);
extern rtx        gen_riscv_sha256sum0_di_extended                   (rtx, rtx);
extern rtx        gen_riscv_sha256sum1_di_extended                   (rtx, rtx);
extern rtx        gen_riscv_sha512sig0h                              (rtx, rtx, rtx);
extern rtx        gen_riscv_sha512sig0l                              (rtx, rtx, rtx);
extern rtx        gen_riscv_sha512sig1h                              (rtx, rtx, rtx);
extern rtx        gen_riscv_sha512sig1l                              (rtx, rtx, rtx);
extern rtx        gen_riscv_sha512sum0r                              (rtx, rtx, rtx);
extern rtx        gen_riscv_sha512sum1r                              (rtx, rtx, rtx);
extern rtx        gen_riscv_sha512sig0                               (rtx, rtx);
extern rtx        gen_riscv_sha512sig1                               (rtx, rtx);
extern rtx        gen_riscv_sha512sum0                               (rtx, rtx);
extern rtx        gen_riscv_sha512sum1                               (rtx, rtx);
extern rtx        gen_riscv_sm3p0_di_extended                        (rtx, rtx);
extern rtx        gen_riscv_sm3p1_di_extended                        (rtx, rtx);
extern rtx        gen_riscv_sm4ed_di_extended                        (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_sm4ks_di_extended                        (rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_addqi                                   (rtx, rtx, rtx);
extern rtx        gen_atomic_orqi                                    (rtx, rtx, rtx);
extern rtx        gen_atomic_xorqi                                   (rtx, rtx, rtx);
extern rtx        gen_atomic_andqi                                   (rtx, rtx, rtx);
extern rtx        gen_atomic_addhi                                   (rtx, rtx, rtx);
extern rtx        gen_atomic_orhi                                    (rtx, rtx, rtx);
extern rtx        gen_atomic_xorhi                                   (rtx, rtx, rtx);
extern rtx        gen_atomic_andhi                                   (rtx, rtx, rtx);
extern rtx        gen_amo_atomic_addsi                               (rtx, rtx, rtx);
extern rtx        gen_amo_atomic_orsi                                (rtx, rtx, rtx);
extern rtx        gen_amo_atomic_xorsi                               (rtx, rtx, rtx);
extern rtx        gen_amo_atomic_andsi                               (rtx, rtx, rtx);
extern rtx        gen_amo_atomic_adddi                               (rtx, rtx, rtx);
extern rtx        gen_amo_atomic_ordi                                (rtx, rtx, rtx);
extern rtx        gen_amo_atomic_xordi                               (rtx, rtx, rtx);
extern rtx        gen_amo_atomic_anddi                               (rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_addsi                              (rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_orsi                               (rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_xorsi                              (rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_andsi                              (rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_adddi                              (rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_ordi                               (rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_xordi                              (rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_anddi                              (rtx, rtx, rtx);
extern rtx        gen_amo_atomic_fetch_addsi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_amo_atomic_fetch_orsi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_amo_atomic_fetch_xorsi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_amo_atomic_fetch_andsi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_amo_atomic_fetch_adddi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_amo_atomic_fetch_ordi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_amo_atomic_fetch_xordi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_amo_atomic_fetch_anddi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_fetch_addsi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_fetch_orsi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_fetch_xorsi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_fetch_andsi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_fetch_adddi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_fetch_ordi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_fetch_xordi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_fetch_anddi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_subword_atomic_fetch_strong_add                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_subword_atomic_fetch_strong_or                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_subword_atomic_fetch_strong_xor                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_subword_atomic_fetch_strong_and                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_subword_atomic_fetch_strong_nand               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_zabha_atomic_fetch_addqi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_zabha_atomic_fetch_orqi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_zabha_atomic_fetch_xorqi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_zabha_atomic_fetch_andqi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_zabha_atomic_fetch_addhi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_zabha_atomic_fetch_orhi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_zabha_atomic_fetch_xorhi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_zabha_atomic_fetch_andhi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_amo_atomic_exchangesi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_amo_atomic_exchangedi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_amo_atomic_exchange_extended                   (rtx, rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_exchangesi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_exchangedi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_zabha_atomic_exchangeqi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_zabha_atomic_exchangehi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_subword_atomic_exchange_strong                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_zacas_atomic_cas_value_strongsi                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_zacas_atomic_cas_value_strongdi                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_zalrsc_atomic_cas_value_strongsi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_zalrsc_atomic_cas_value_strongdi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_zacas_atomic_cas_value_strongqi                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_zacas_atomic_cas_value_stronghi                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_subword_atomic_cas_strong                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mem_thread_fence_rvwmo                         (rtx, rtx);
extern rtx        gen_atomic_load_rvwmoqi                            (rtx, rtx, rtx);
extern rtx        gen_atomic_load_rvwmohi                            (rtx, rtx, rtx);
extern rtx        gen_atomic_load_rvwmosi                            (rtx, rtx, rtx);
extern rtx        gen_atomic_load_rvwmodi                            (rtx, rtx, rtx);
extern rtx        gen_atomic_store_rvwmoqi                           (rtx, rtx, rtx);
extern rtx        gen_atomic_store_rvwmohi                           (rtx, rtx, rtx);
extern rtx        gen_atomic_store_rvwmosi                           (rtx, rtx, rtx);
extern rtx        gen_atomic_store_rvwmodi                           (rtx, rtx, rtx);
extern rtx        gen_mem_thread_fence_ztso                          (rtx, rtx);
extern rtx        gen_atomic_load_ztsoqi                             (rtx, rtx, rtx);
extern rtx        gen_atomic_load_ztsohi                             (rtx, rtx, rtx);
extern rtx        gen_atomic_load_ztsosi                             (rtx, rtx, rtx);
extern rtx        gen_atomic_load_ztsodi                             (rtx, rtx, rtx);
extern rtx        gen_atomic_store_ztsoqi                            (rtx, rtx, rtx);
extern rtx        gen_atomic_store_ztsohi                            (rtx, rtx, rtx);
extern rtx        gen_atomic_store_ztsosi                            (rtx, rtx, rtx);
extern rtx        gen_atomic_store_ztsodi                            (rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm8qi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm4qi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2qi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1qi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm8hi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm4hi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2hi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1hi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm8si                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm4si                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2si                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1si                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm8di                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm4di                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2di                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1di                       (rtx, rtx, rtx, rtx);
static inline rtx gen_pred_th_whole_movrvvmf2qi                      (rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_th_whole_movrvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d))
{
  return 0;
}
static inline rtx gen_pred_th_whole_movrvvmf4qi                      (rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_th_whole_movrvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d))
{
  return 0;
}
extern rtx        gen_pred_th_whole_movrvvmf8qi                      (rtx, rtx, rtx, rtx);
static inline rtx gen_pred_th_whole_movrvvmf2hi                      (rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_th_whole_movrvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d))
{
  return 0;
}
extern rtx        gen_pred_th_whole_movrvvmf4hi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2si                      (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm8hf                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm4hf                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2hf                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1hf                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2hf                      (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4hf                      (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm8sf                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm4sf                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2sf                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1sf                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2sf                      (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm8df                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm4df                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2df                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1df                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm8bf                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm4bf                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2bf                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1bf                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2bf                      (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4bf                      (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv1qi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv2qi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv4qi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv8qi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv16qi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv32qi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv64qi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv128qi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv256qi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv512qi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv1024qi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv2048qi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv4096qi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv1hi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv2hi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv4hi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv8hi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv16hi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv32hi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv64hi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv128hi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv256hi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv512hi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv1024hi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv2048hi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv1si                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv2si                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv4si                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv8si                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv16si                         (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv32si                         (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv64si                         (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv128si                        (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv256si                        (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv512si                        (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv1024si                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv1di                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv2di                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv4di                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv8di                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv16di                         (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv32di                         (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv64di                         (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv128di                        (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv256di                        (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv512di                        (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv1hf                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv2hf                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv4hf                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv8hf                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv16hf                         (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv32hf                         (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv64hf                         (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv128hf                        (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv256hf                        (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv512hf                        (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv1024hf                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv2048hf                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv1sf                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv2sf                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv4sf                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv8sf                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv16sf                         (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv32sf                         (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv64sf                         (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv128sf                        (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv256sf                        (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv512sf                        (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv1024sf                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv1df                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv2df                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv4df                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv8df                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv16df                         (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv32df                         (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv64df                         (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv128df                        (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv256df                        (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv512df                        (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv1bf                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv2bf                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv4bf                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv8bf                          (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv16bf                         (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv32bf                         (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv64bf                         (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv128bf                        (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv256bf                        (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv512bf                        (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv1024bf                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movv2048bf                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf8x2qi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf8x3qi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf8x4qi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf8x5qi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf8x6qi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf8x7qi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf8x8qi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x2hi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x3hi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x4hi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x5hi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x6hi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x7hi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x8hi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x2si                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x3si                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x4si                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x5si                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x6si                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x7si                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x8si                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x2di                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x3di                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x4di                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x5di                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x6di                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x7di                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x8di                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x2bf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x3bf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x4bf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x5bf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x6bf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x7bf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x8bf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x2hf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x3hf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x4hf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x5hf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x6hf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x7hf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x8hf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x2sf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x3sf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x4sf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x5sf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x6sf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x7sf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x8sf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x2df                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x3df                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x4df                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x5df                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x6df                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x7df                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x8df                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x2qi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x3qi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x4qi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x5qi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x6qi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x7qi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4x8qi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x2hi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x3hi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x4hi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x5hi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x6hi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x7hi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x8hi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x2si                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x3si                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x4si                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x5si                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x6si                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x7si                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x8si                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2x2di                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2x3di                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2x4di                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x2bf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x3bf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x4bf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x5bf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x6bf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x7bf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x8bf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x2hf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x3hf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x4hf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x5hf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x6hf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x7hf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x8hf                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x2sf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x3sf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x4sf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x5sf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x6sf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x7sf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x8sf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2x2df                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2x3df                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2x4df                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x2qi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x3qi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x4qi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x5qi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x6qi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x7qi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2x8qi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x2hi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x3hi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x4hi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x5hi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x6hi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x7hi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x8hi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2x2si                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2x3si                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2x4si                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm4x2di                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x2bf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x3bf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x4bf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x5bf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x6bf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x7bf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x8bf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x2hf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x3hf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x4hf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x5hf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x6hf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x7hf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x8hf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2x2sf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2x3sf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2x4sf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm4x2df                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x2qi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x3qi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x4qi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x5qi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x6qi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x7qi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1x8qi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2x2hi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2x3hi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2x4hi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm4x2si                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2x2bf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2x3bf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2x4bf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2x2hf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2x3hf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2x4hf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm4x2sf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2x2qi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2x3qi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm2x4qi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm4x2hi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm4x2bf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm4x2hf                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm4x2qi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf64bi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf32bi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf16bi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf8bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf4bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvmf2bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_whole_movrvvm1bi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthbrvvm8qi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthhrvvm8qi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthwrvvm8qi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthbrvvm4qi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthhrvvm4qi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthwrvvm4qi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthbrvvm2qi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthhrvvm2qi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthwrvvm2qi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthbrvvm1qi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthhrvvm1qi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthwrvvm1qi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthbrvvm8hi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthhrvvm8hi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthwrvvm8hi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthbrvvm4hi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthhrvvm4hi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthwrvvm4hi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthbrvvm2hi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthhrvvm2hi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthwrvvm2hi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthbrvvm1hi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthhrvvm1hi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthwrvvm1hi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthbrvvm8si                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthhrvvm8si                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthwrvvm8si                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthbrvvm4si                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthhrvvm4si                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthwrvvm4si                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthbrvvm2si                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthhrvvm2si                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthwrvvm2si                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthbrvvm1si                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthhrvvm1si                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthwrvvm1si                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthbrvvm8di                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthhrvvm8di                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthwrvvm8di                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthbrvvm4di                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthhrvvm4di                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthwrvvm4di                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthbrvvm2di                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthhrvvm2di                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthwrvvm2di                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthbrvvm1di                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthhrvvm1di                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthwrvvm1di                       (rtx, rtx, rtx, rtx, rtx);
static inline rtx gen_pred_store_widthbrvvmf2qi                      (rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_store_widthbrvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e))
{
  return 0;
}
static inline rtx gen_pred_store_widthhrvvmf2qi                      (rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_store_widthhrvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e))
{
  return 0;
}
static inline rtx gen_pred_store_widthwrvvmf2qi                      (rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_store_widthwrvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e))
{
  return 0;
}
static inline rtx gen_pred_store_widthbrvvmf4qi                      (rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_store_widthbrvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e))
{
  return 0;
}
static inline rtx gen_pred_store_widthhrvvmf4qi                      (rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_store_widthhrvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e))
{
  return 0;
}
static inline rtx gen_pred_store_widthwrvvmf4qi                      (rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_store_widthwrvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e))
{
  return 0;
}
extern rtx        gen_pred_store_widthbrvvmf8qi                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthhrvvmf8qi                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthwrvvmf8qi                      (rtx, rtx, rtx, rtx, rtx);
static inline rtx gen_pred_store_widthbrvvmf2hi                      (rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_store_widthbrvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e))
{
  return 0;
}
static inline rtx gen_pred_store_widthhrvvmf2hi                      (rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_store_widthhrvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e))
{
  return 0;
}
static inline rtx gen_pred_store_widthwrvvmf2hi                      (rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_store_widthwrvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e))
{
  return 0;
}
extern rtx        gen_pred_store_widthbrvvmf4hi                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthhrvvmf4hi                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthwrvvmf4hi                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthbrvvmf2si                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthhrvvmf2si                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_store_widthwrvvmf2si                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthbrvvm8qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthburvvm8qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhrvvm8qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhurvvm8qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwrvvm8qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwurvvm8qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthbrvvm4qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthburvvm4qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhrvvm4qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhurvvm4qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwrvvm4qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwurvvm4qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthbrvvm2qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthburvvm2qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhrvvm2qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhurvvm2qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwrvvm2qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwurvvm2qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthbrvvm1qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthburvvm1qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhrvvm1qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhurvvm1qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwrvvm1qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwurvvm1qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthbrvvm8hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthburvvm8hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhrvvm8hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhurvvm8hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwrvvm8hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwurvvm8hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthbrvvm4hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthburvvm4hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhrvvm4hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhurvvm4hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwrvvm4hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwurvvm4hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthbrvvm2hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthburvvm2hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhrvvm2hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhurvvm2hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwrvvm2hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwurvvm2hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthbrvvm1hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthburvvm1hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhrvvm1hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhurvvm1hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwrvvm1hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwurvvm1hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthbrvvm8si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthburvvm8si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhrvvm8si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhurvvm8si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwrvvm8si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwurvvm8si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthbrvvm4si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthburvvm4si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhrvvm4si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhurvvm4si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwrvvm4si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwurvvm4si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthbrvvm2si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthburvvm2si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhrvvm2si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhurvvm2si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwrvvm2si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwurvvm2si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthbrvvm1si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthburvvm1si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhrvvm1si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhurvvm1si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwrvvm1si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwurvvm1si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthbrvvm8di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthburvvm8di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhrvvm8di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhurvvm8di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwrvvm8di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwurvvm8di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthbrvvm4di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthburvvm4di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhrvvm4di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhurvvm4di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwrvvm4di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwurvvm4di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthbrvvm2di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthburvvm2di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhrvvm2di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhurvvm2di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwrvvm2di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwurvvm2di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthbrvvm1di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthburvvm1di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhrvvm1di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhurvvm1di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwrvvm1di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwurvvm1di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx gen_pred_strided_load_widthbrvvmf2qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_load_widthbrvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_strided_load_widthburvvmf2qi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_load_widthburvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_strided_load_widthhrvvmf2qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_load_widthhrvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_strided_load_widthhurvvmf2qi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_load_widthhurvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_strided_load_widthwrvvmf2qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_load_widthwrvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_strided_load_widthwurvvmf2qi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_load_widthwurvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_strided_load_widthbrvvmf4qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_load_widthbrvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_strided_load_widthburvvmf4qi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_load_widthburvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_strided_load_widthhrvvmf4qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_load_widthhrvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_strided_load_widthhurvvmf4qi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_load_widthhurvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_strided_load_widthwrvvmf4qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_load_widthwrvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_strided_load_widthwurvvmf4qi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_load_widthwurvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
extern rtx        gen_pred_strided_load_widthbrvvmf8qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthburvvmf8qi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhrvvmf8qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhurvvmf8qi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwrvvmf8qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwurvvmf8qi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx gen_pred_strided_load_widthbrvvmf2hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_load_widthbrvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_strided_load_widthburvvmf2hi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_load_widthburvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_strided_load_widthhrvvmf2hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_load_widthhrvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_strided_load_widthhurvvmf2hi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_load_widthhurvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_strided_load_widthwrvvmf2hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_load_widthwrvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_strided_load_widthwurvvmf2hi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_load_widthwurvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
extern rtx        gen_pred_strided_load_widthbrvvmf4hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthburvvmf4hi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhrvvmf4hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhurvvmf4hi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwrvvmf4hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwurvvmf4hi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthbrvvmf2si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthburvvmf2si              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhrvvmf2si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthhurvvmf2si              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwrvvmf2si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_load_widthwurvvmf2si              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthbrvvm8qi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthhrvvm8qi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthwrvvm8qi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthbrvvm4qi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthhrvvm4qi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthwrvvm4qi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthbrvvm2qi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthhrvvm2qi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthwrvvm2qi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthbrvvm1qi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthhrvvm1qi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthwrvvm1qi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthbrvvm8hi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthhrvvm8hi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthwrvvm8hi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthbrvvm4hi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthhrvvm4hi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthwrvvm4hi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthbrvvm2hi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthhrvvm2hi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthwrvvm2hi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthbrvvm1hi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthhrvvm1hi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthwrvvm1hi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthbrvvm8si               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthhrvvm8si               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthwrvvm8si               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthbrvvm4si               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthhrvvm4si               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthwrvvm4si               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthbrvvm2si               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthhrvvm2si               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthwrvvm2si               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthbrvvm1si               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthhrvvm1si               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthwrvvm1si               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthbrvvm8di               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthhrvvm8di               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthwrvvm8di               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthbrvvm4di               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthhrvvm4di               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthwrvvm4di               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthbrvvm2di               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthhrvvm2di               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthwrvvm2di               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthbrvvm1di               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthhrvvm1di               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthwrvvm1di               (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx gen_pred_strided_store_widthbrvvmf2qi              (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_store_widthbrvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
static inline rtx gen_pred_strided_store_widthhrvvmf2qi              (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_store_widthhrvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
static inline rtx gen_pred_strided_store_widthwrvvmf2qi              (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_store_widthwrvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
static inline rtx gen_pred_strided_store_widthbrvvmf4qi              (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_store_widthbrvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
static inline rtx gen_pred_strided_store_widthhrvvmf4qi              (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_store_widthhrvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
static inline rtx gen_pred_strided_store_widthwrvvmf4qi              (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_store_widthwrvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
extern rtx        gen_pred_strided_store_widthbrvvmf8qi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthhrvvmf8qi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthwrvvmf8qi              (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx gen_pred_strided_store_widthbrvvmf2hi              (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_store_widthbrvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
static inline rtx gen_pred_strided_store_widthhrvvmf2hi              (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_store_widthhrvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
static inline rtx gen_pred_strided_store_widthwrvvmf2hi              (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_strided_store_widthwrvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
extern rtx        gen_pred_strided_store_widthbrvvmf4hi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthhrvvmf4hi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthwrvvmf4hi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthbrvvmf2si              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthhrvvmf2si              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_store_widthwrvvmf2si              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthbrvvm8qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthburvvm8qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhrvvm8qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhurvvm8qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwrvvm8qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwurvvm8qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthbrvvm4qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthburvvm4qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhrvvm4qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhurvvm4qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwrvvm4qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwurvvm4qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthbrvvm2qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthburvvm2qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhrvvm2qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhurvvm2qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwrvvm2qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwurvvm2qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthbrvvm1qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthburvvm1qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhrvvm1qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhurvvm1qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwrvvm1qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwurvvm1qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthbrvvm8hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthburvvm8hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhrvvm8hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhurvvm8hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwrvvm8hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwurvvm8hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthbrvvm4hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthburvvm4hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhrvvm4hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhurvvm4hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwrvvm4hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwurvvm4hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthbrvvm2hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthburvvm2hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhrvvm2hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhurvvm2hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwrvvm2hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwurvvm2hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthbrvvm1hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthburvvm1hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhrvvm1hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhurvvm1hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwrvvm1hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwurvvm1hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthbrvvm8si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthburvvm8si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhrvvm8si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhurvvm8si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwrvvm8si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwurvvm8si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthbrvvm4si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthburvvm4si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhrvvm4si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhurvvm4si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwrvvm4si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwurvvm4si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthbrvvm2si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthburvvm2si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhrvvm2si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhurvvm2si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwrvvm2si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwurvvm2si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthbrvvm1si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthburvvm1si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhrvvm1si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhurvvm1si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwrvvm1si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwurvvm1si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthbrvvm8di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthburvvm8di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhrvvm8di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhurvvm8di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwrvvm8di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwurvvm8di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthbrvvm4di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthburvvm4di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhrvvm4di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhurvvm4di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwrvvm4di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwurvvm4di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthbrvvm2di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthburvvm2di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhrvvm2di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhurvvm2di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwrvvm2di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwurvvm2di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthbrvvm1di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthburvvm1di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhrvvm1di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhurvvm1di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwrvvm1di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwurvvm1di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx gen_pred_indexed_load_widthbrvvmf2qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_load_widthbrvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_indexed_load_widthburvvmf2qi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_load_widthburvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_indexed_load_widthhrvvmf2qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_load_widthhrvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_indexed_load_widthhurvvmf2qi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_load_widthhurvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_indexed_load_widthwrvvmf2qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_load_widthwrvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_indexed_load_widthwurvvmf2qi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_load_widthwurvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_indexed_load_widthbrvvmf4qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_load_widthbrvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_indexed_load_widthburvvmf4qi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_load_widthburvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_indexed_load_widthhrvvmf4qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_load_widthhrvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_indexed_load_widthhurvvmf4qi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_load_widthhurvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_indexed_load_widthwrvvmf4qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_load_widthwrvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_indexed_load_widthwurvvmf4qi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_load_widthwurvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
extern rtx        gen_pred_indexed_load_widthbrvvmf8qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthburvvmf8qi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhrvvmf8qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhurvvmf8qi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwrvvmf8qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwurvvmf8qi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx gen_pred_indexed_load_widthbrvvmf2hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_load_widthbrvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_indexed_load_widthburvvmf2hi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_load_widthburvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_indexed_load_widthhrvvmf2hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_load_widthhrvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_indexed_load_widthhurvvmf2hi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_load_widthhurvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_indexed_load_widthwrvvmf2hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_load_widthwrvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
static inline rtx gen_pred_indexed_load_widthwurvvmf2hi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_load_widthwurvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h), rtx ARG_UNUSED (i))
{
  return 0;
}
extern rtx        gen_pred_indexed_load_widthbrvvmf4hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthburvvmf4hi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhrvvmf4hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhurvvmf4hi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwrvvmf4hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwurvvmf4hi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthbrvvmf2si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthburvvmf2si              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhrvvmf2si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthhurvvmf2si              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwrvvmf2si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_load_widthwurvvmf2si              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthbrvvm8qi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthhrvvm8qi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthwrvvm8qi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthbrvvm8qi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthhrvvm8qi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthwrvvm8qi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthbrvvm4qi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthhrvvm4qi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthwrvvm4qi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthbrvvm4qi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthhrvvm4qi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthwrvvm4qi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthbrvvm2qi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthhrvvm2qi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthwrvvm2qi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthbrvvm2qi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthhrvvm2qi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthwrvvm2qi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthbrvvm1qi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthhrvvm1qi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthwrvvm1qi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthbrvvm1qi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthhrvvm1qi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthwrvvm1qi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthbrvvm8hi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthhrvvm8hi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthwrvvm8hi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthbrvvm8hi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthhrvvm8hi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthwrvvm8hi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthbrvvm4hi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthhrvvm4hi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthwrvvm4hi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthbrvvm4hi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthhrvvm4hi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthwrvvm4hi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthbrvvm2hi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthhrvvm2hi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthwrvvm2hi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthbrvvm2hi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthhrvvm2hi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthwrvvm2hi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthbrvvm1hi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthhrvvm1hi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthwrvvm1hi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthbrvvm1hi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthhrvvm1hi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthwrvvm1hi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthbrvvm8si               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthhrvvm8si               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthwrvvm8si               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthbrvvm8si              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthhrvvm8si              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthwrvvm8si              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthbrvvm4si               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthhrvvm4si               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthwrvvm4si               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthbrvvm4si              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthhrvvm4si              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthwrvvm4si              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthbrvvm2si               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthhrvvm2si               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthwrvvm2si               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthbrvvm2si              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthhrvvm2si              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthwrvvm2si              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthbrvvm1si               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthhrvvm1si               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthwrvvm1si               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthbrvvm1si              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthhrvvm1si              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthwrvvm1si              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthbrvvm8di               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthhrvvm8di               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthwrvvm8di               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthbrvvm8di              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthhrvvm8di              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthwrvvm8di              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthbrvvm4di               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthhrvvm4di               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthwrvvm4di               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthbrvvm4di              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthhrvvm4di              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthwrvvm4di              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthbrvvm2di               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthhrvvm2di               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthwrvvm2di               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthbrvvm2di              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthhrvvm2di              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthwrvvm2di              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthbrvvm1di               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthhrvvm1di               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthwrvvm1di               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthbrvvm1di              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthhrvvm1di              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthwrvvm1di              (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx gen_pred_indexed_store_widthbrvvmf2qi              (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_store_widthbrvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
static inline rtx gen_pred_indexed_store_widthhrvvmf2qi              (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_store_widthhrvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
static inline rtx gen_pred_indexed_store_widthwrvvmf2qi              (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_store_widthwrvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
static inline rtx gen_pred_indexed_ustore_widthbrvvmf2qi             (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_ustore_widthbrvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
static inline rtx gen_pred_indexed_ustore_widthhrvvmf2qi             (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_ustore_widthhrvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
static inline rtx gen_pred_indexed_ustore_widthwrvvmf2qi             (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_ustore_widthwrvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
static inline rtx gen_pred_indexed_store_widthbrvvmf4qi              (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_store_widthbrvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
static inline rtx gen_pred_indexed_store_widthhrvvmf4qi              (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_store_widthhrvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
static inline rtx gen_pred_indexed_store_widthwrvvmf4qi              (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_store_widthwrvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
static inline rtx gen_pred_indexed_ustore_widthbrvvmf4qi             (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_ustore_widthbrvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
static inline rtx gen_pred_indexed_ustore_widthhrvvmf4qi             (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_ustore_widthhrvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
static inline rtx gen_pred_indexed_ustore_widthwrvvmf4qi             (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_ustore_widthwrvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
extern rtx        gen_pred_indexed_store_widthbrvvmf8qi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthhrvvmf8qi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthwrvvmf8qi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthbrvvmf8qi             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthhrvvmf8qi             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthwrvvmf8qi             (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx gen_pred_indexed_store_widthbrvvmf2hi              (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_store_widthbrvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
static inline rtx gen_pred_indexed_store_widthhrvvmf2hi              (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_store_widthhrvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
static inline rtx gen_pred_indexed_store_widthwrvvmf2hi              (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_store_widthwrvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
static inline rtx gen_pred_indexed_ustore_widthbrvvmf2hi             (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_ustore_widthbrvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
static inline rtx gen_pred_indexed_ustore_widthhrvvmf2hi             (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_ustore_widthhrvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
static inline rtx gen_pred_indexed_ustore_widthwrvvmf2hi             (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_indexed_ustore_widthwrvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f))
{
  return 0;
}
extern rtx        gen_pred_indexed_store_widthbrvvmf4hi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthhrvvmf4hi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthwrvvmf4hi              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthbrvvmf4hi             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthhrvvmf4hi             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthwrvvmf4hi             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthbrvvmf2si              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthhrvvmf2si              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_store_widthwrvvmf2si              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthbrvvmf2si             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthhrvvmf2si             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustore_widthwrvvmf2si             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vundefinedrvvm8qi                              (rtx);
extern rtx        gen_vundefinedrvvm4qi                              (rtx);
extern rtx        gen_vundefinedrvvm2qi                              (rtx);
extern rtx        gen_vundefinedrvvm1qi                              (rtx);
extern rtx        gen_vundefinedrvvm8hi                              (rtx);
extern rtx        gen_vundefinedrvvm4hi                              (rtx);
extern rtx        gen_vundefinedrvvm2hi                              (rtx);
extern rtx        gen_vundefinedrvvm1hi                              (rtx);
extern rtx        gen_vundefinedrvvm8si                              (rtx);
extern rtx        gen_vundefinedrvvm4si                              (rtx);
extern rtx        gen_vundefinedrvvm2si                              (rtx);
extern rtx        gen_vundefinedrvvm1si                              (rtx);
extern rtx        gen_vundefinedrvvm8di                              (rtx);
extern rtx        gen_vundefinedrvvm4di                              (rtx);
extern rtx        gen_vundefinedrvvm2di                              (rtx);
extern rtx        gen_vundefinedrvvm1di                              (rtx);
extern rtx        gen_vundefinedrvvmf2qi                             (rtx);
extern rtx        gen_vundefinedrvvmf4qi                             (rtx);
extern rtx        gen_vundefinedrvvmf8qi                             (rtx);
extern rtx        gen_vundefinedrvvmf2hi                             (rtx);
extern rtx        gen_vundefinedrvvmf4hi                             (rtx);
extern rtx        gen_vundefinedrvvmf2si                             (rtx);
extern rtx        gen_vundefinedrvvm8hf                              (rtx);
extern rtx        gen_vundefinedrvvm4hf                              (rtx);
extern rtx        gen_vundefinedrvvm2hf                              (rtx);
extern rtx        gen_vundefinedrvvm1hf                              (rtx);
extern rtx        gen_vundefinedrvvmf2hf                             (rtx);
extern rtx        gen_vundefinedrvvmf4hf                             (rtx);
extern rtx        gen_vundefinedrvvm8sf                              (rtx);
extern rtx        gen_vundefinedrvvm4sf                              (rtx);
extern rtx        gen_vundefinedrvvm2sf                              (rtx);
extern rtx        gen_vundefinedrvvm1sf                              (rtx);
extern rtx        gen_vundefinedrvvmf2sf                             (rtx);
extern rtx        gen_vundefinedrvvm8df                              (rtx);
extern rtx        gen_vundefinedrvvm4df                              (rtx);
extern rtx        gen_vundefinedrvvm2df                              (rtx);
extern rtx        gen_vundefinedrvvm1df                              (rtx);
extern rtx        gen_vundefinedrvvm8bf                              (rtx);
extern rtx        gen_vundefinedrvvm4bf                              (rtx);
extern rtx        gen_vundefinedrvvm2bf                              (rtx);
extern rtx        gen_vundefinedrvvm1bf                              (rtx);
extern rtx        gen_vundefinedrvvmf2bf                             (rtx);
extern rtx        gen_vundefinedrvvmf4bf                             (rtx);
extern rtx        gen_vundefinedv1qi                                 (rtx);
extern rtx        gen_vundefinedv2qi                                 (rtx);
extern rtx        gen_vundefinedv4qi                                 (rtx);
extern rtx        gen_vundefinedv8qi                                 (rtx);
extern rtx        gen_vundefinedv16qi                                (rtx);
extern rtx        gen_vundefinedv32qi                                (rtx);
extern rtx        gen_vundefinedv64qi                                (rtx);
extern rtx        gen_vundefinedv128qi                               (rtx);
extern rtx        gen_vundefinedv256qi                               (rtx);
extern rtx        gen_vundefinedv512qi                               (rtx);
extern rtx        gen_vundefinedv1024qi                              (rtx);
extern rtx        gen_vundefinedv2048qi                              (rtx);
extern rtx        gen_vundefinedv4096qi                              (rtx);
extern rtx        gen_vundefinedv1hi                                 (rtx);
extern rtx        gen_vundefinedv2hi                                 (rtx);
extern rtx        gen_vundefinedv4hi                                 (rtx);
extern rtx        gen_vundefinedv8hi                                 (rtx);
extern rtx        gen_vundefinedv16hi                                (rtx);
extern rtx        gen_vundefinedv32hi                                (rtx);
extern rtx        gen_vundefinedv64hi                                (rtx);
extern rtx        gen_vundefinedv128hi                               (rtx);
extern rtx        gen_vundefinedv256hi                               (rtx);
extern rtx        gen_vundefinedv512hi                               (rtx);
extern rtx        gen_vundefinedv1024hi                              (rtx);
extern rtx        gen_vundefinedv2048hi                              (rtx);
extern rtx        gen_vundefinedv1si                                 (rtx);
extern rtx        gen_vundefinedv2si                                 (rtx);
extern rtx        gen_vundefinedv4si                                 (rtx);
extern rtx        gen_vundefinedv8si                                 (rtx);
extern rtx        gen_vundefinedv16si                                (rtx);
extern rtx        gen_vundefinedv32si                                (rtx);
extern rtx        gen_vundefinedv64si                                (rtx);
extern rtx        gen_vundefinedv128si                               (rtx);
extern rtx        gen_vundefinedv256si                               (rtx);
extern rtx        gen_vundefinedv512si                               (rtx);
extern rtx        gen_vundefinedv1024si                              (rtx);
extern rtx        gen_vundefinedv1di                                 (rtx);
extern rtx        gen_vundefinedv2di                                 (rtx);
extern rtx        gen_vundefinedv4di                                 (rtx);
extern rtx        gen_vundefinedv8di                                 (rtx);
extern rtx        gen_vundefinedv16di                                (rtx);
extern rtx        gen_vundefinedv32di                                (rtx);
extern rtx        gen_vundefinedv64di                                (rtx);
extern rtx        gen_vundefinedv128di                               (rtx);
extern rtx        gen_vundefinedv256di                               (rtx);
extern rtx        gen_vundefinedv512di                               (rtx);
extern rtx        gen_vundefinedv1hf                                 (rtx);
extern rtx        gen_vundefinedv2hf                                 (rtx);
extern rtx        gen_vundefinedv4hf                                 (rtx);
extern rtx        gen_vundefinedv8hf                                 (rtx);
extern rtx        gen_vundefinedv16hf                                (rtx);
extern rtx        gen_vundefinedv32hf                                (rtx);
extern rtx        gen_vundefinedv64hf                                (rtx);
extern rtx        gen_vundefinedv128hf                               (rtx);
extern rtx        gen_vundefinedv256hf                               (rtx);
extern rtx        gen_vundefinedv512hf                               (rtx);
extern rtx        gen_vundefinedv1024hf                              (rtx);
extern rtx        gen_vundefinedv2048hf                              (rtx);
extern rtx        gen_vundefinedv1sf                                 (rtx);
extern rtx        gen_vundefinedv2sf                                 (rtx);
extern rtx        gen_vundefinedv4sf                                 (rtx);
extern rtx        gen_vundefinedv8sf                                 (rtx);
extern rtx        gen_vundefinedv16sf                                (rtx);
extern rtx        gen_vundefinedv32sf                                (rtx);
extern rtx        gen_vundefinedv64sf                                (rtx);
extern rtx        gen_vundefinedv128sf                               (rtx);
extern rtx        gen_vundefinedv256sf                               (rtx);
extern rtx        gen_vundefinedv512sf                               (rtx);
extern rtx        gen_vundefinedv1024sf                              (rtx);
extern rtx        gen_vundefinedv1df                                 (rtx);
extern rtx        gen_vundefinedv2df                                 (rtx);
extern rtx        gen_vundefinedv4df                                 (rtx);
extern rtx        gen_vundefinedv8df                                 (rtx);
extern rtx        gen_vundefinedv16df                                (rtx);
extern rtx        gen_vundefinedv32df                                (rtx);
extern rtx        gen_vundefinedv64df                                (rtx);
extern rtx        gen_vundefinedv128df                               (rtx);
extern rtx        gen_vundefinedv256df                               (rtx);
extern rtx        gen_vundefinedv512df                               (rtx);
extern rtx        gen_vundefinedv1bf                                 (rtx);
extern rtx        gen_vundefinedv2bf                                 (rtx);
extern rtx        gen_vundefinedv4bf                                 (rtx);
extern rtx        gen_vundefinedv8bf                                 (rtx);
extern rtx        gen_vundefinedv16bf                                (rtx);
extern rtx        gen_vundefinedv32bf                                (rtx);
extern rtx        gen_vundefinedv64bf                                (rtx);
extern rtx        gen_vundefinedv128bf                               (rtx);
extern rtx        gen_vundefinedv256bf                               (rtx);
extern rtx        gen_vundefinedv512bf                               (rtx);
extern rtx        gen_vundefinedv1024bf                              (rtx);
extern rtx        gen_vundefinedv2048bf                              (rtx);
extern rtx        gen_vundefinedrvvmf64bi                            (rtx);
extern rtx        gen_vundefinedrvvmf32bi                            (rtx);
extern rtx        gen_vundefinedrvvmf16bi                            (rtx);
extern rtx        gen_vundefinedrvvmf8bi                             (rtx);
extern rtx        gen_vundefinedrvvmf4bi                             (rtx);
extern rtx        gen_vundefinedrvvmf2bi                             (rtx);
extern rtx        gen_vundefinedrvvm1bi                              (rtx);
extern rtx        gen_vundefinedv1bi                                 (rtx);
extern rtx        gen_vundefinedv2bi                                 (rtx);
extern rtx        gen_vundefinedv4bi                                 (rtx);
extern rtx        gen_vundefinedv8bi                                 (rtx);
extern rtx        gen_vundefinedv16bi                                (rtx);
extern rtx        gen_vundefinedv32bi                                (rtx);
extern rtx        gen_vundefinedv64bi                                (rtx);
extern rtx        gen_vundefinedv128bi                               (rtx);
extern rtx        gen_vundefinedv256bi                               (rtx);
extern rtx        gen_vundefinedv512bi                               (rtx);
extern rtx        gen_vundefinedv1024bi                              (rtx);
extern rtx        gen_vundefinedv2048bi                              (rtx);
extern rtx        gen_vundefinedv4096bi                              (rtx);
extern rtx        gen_vundefinedrvvmf8x2qi                           (rtx);
extern rtx        gen_vundefinedrvvmf8x3qi                           (rtx);
extern rtx        gen_vundefinedrvvmf8x4qi                           (rtx);
extern rtx        gen_vundefinedrvvmf8x5qi                           (rtx);
extern rtx        gen_vundefinedrvvmf8x6qi                           (rtx);
extern rtx        gen_vundefinedrvvmf8x7qi                           (rtx);
extern rtx        gen_vundefinedrvvmf8x8qi                           (rtx);
extern rtx        gen_vundefinedrvvmf4x2hi                           (rtx);
extern rtx        gen_vundefinedrvvmf4x3hi                           (rtx);
extern rtx        gen_vundefinedrvvmf4x4hi                           (rtx);
extern rtx        gen_vundefinedrvvmf4x5hi                           (rtx);
extern rtx        gen_vundefinedrvvmf4x6hi                           (rtx);
extern rtx        gen_vundefinedrvvmf4x7hi                           (rtx);
extern rtx        gen_vundefinedrvvmf4x8hi                           (rtx);
extern rtx        gen_vundefinedrvvmf2x2si                           (rtx);
extern rtx        gen_vundefinedrvvmf2x3si                           (rtx);
extern rtx        gen_vundefinedrvvmf2x4si                           (rtx);
extern rtx        gen_vundefinedrvvmf2x5si                           (rtx);
extern rtx        gen_vundefinedrvvmf2x6si                           (rtx);
extern rtx        gen_vundefinedrvvmf2x7si                           (rtx);
extern rtx        gen_vundefinedrvvmf2x8si                           (rtx);
extern rtx        gen_vundefinedrvvm1x2di                            (rtx);
extern rtx        gen_vundefinedrvvm1x3di                            (rtx);
extern rtx        gen_vundefinedrvvm1x4di                            (rtx);
extern rtx        gen_vundefinedrvvm1x5di                            (rtx);
extern rtx        gen_vundefinedrvvm1x6di                            (rtx);
extern rtx        gen_vundefinedrvvm1x7di                            (rtx);
extern rtx        gen_vundefinedrvvm1x8di                            (rtx);
extern rtx        gen_vundefinedrvvmf4x2bf                           (rtx);
extern rtx        gen_vundefinedrvvmf4x3bf                           (rtx);
extern rtx        gen_vundefinedrvvmf4x4bf                           (rtx);
extern rtx        gen_vundefinedrvvmf4x5bf                           (rtx);
extern rtx        gen_vundefinedrvvmf4x6bf                           (rtx);
extern rtx        gen_vundefinedrvvmf4x7bf                           (rtx);
extern rtx        gen_vundefinedrvvmf4x8bf                           (rtx);
extern rtx        gen_vundefinedrvvmf4x2hf                           (rtx);
extern rtx        gen_vundefinedrvvmf4x3hf                           (rtx);
extern rtx        gen_vundefinedrvvmf4x4hf                           (rtx);
extern rtx        gen_vundefinedrvvmf4x5hf                           (rtx);
extern rtx        gen_vundefinedrvvmf4x6hf                           (rtx);
extern rtx        gen_vundefinedrvvmf4x7hf                           (rtx);
extern rtx        gen_vundefinedrvvmf4x8hf                           (rtx);
extern rtx        gen_vundefinedrvvmf2x2sf                           (rtx);
extern rtx        gen_vundefinedrvvmf2x3sf                           (rtx);
extern rtx        gen_vundefinedrvvmf2x4sf                           (rtx);
extern rtx        gen_vundefinedrvvmf2x5sf                           (rtx);
extern rtx        gen_vundefinedrvvmf2x6sf                           (rtx);
extern rtx        gen_vundefinedrvvmf2x7sf                           (rtx);
extern rtx        gen_vundefinedrvvmf2x8sf                           (rtx);
extern rtx        gen_vundefinedrvvm1x2df                            (rtx);
extern rtx        gen_vundefinedrvvm1x3df                            (rtx);
extern rtx        gen_vundefinedrvvm1x4df                            (rtx);
extern rtx        gen_vundefinedrvvm1x5df                            (rtx);
extern rtx        gen_vundefinedrvvm1x6df                            (rtx);
extern rtx        gen_vundefinedrvvm1x7df                            (rtx);
extern rtx        gen_vundefinedrvvm1x8df                            (rtx);
extern rtx        gen_vundefinedrvvmf4x2qi                           (rtx);
extern rtx        gen_vundefinedrvvmf4x3qi                           (rtx);
extern rtx        gen_vundefinedrvvmf4x4qi                           (rtx);
extern rtx        gen_vundefinedrvvmf4x5qi                           (rtx);
extern rtx        gen_vundefinedrvvmf4x6qi                           (rtx);
extern rtx        gen_vundefinedrvvmf4x7qi                           (rtx);
extern rtx        gen_vundefinedrvvmf4x8qi                           (rtx);
extern rtx        gen_vundefinedrvvmf2x2hi                           (rtx);
extern rtx        gen_vundefinedrvvmf2x3hi                           (rtx);
extern rtx        gen_vundefinedrvvmf2x4hi                           (rtx);
extern rtx        gen_vundefinedrvvmf2x5hi                           (rtx);
extern rtx        gen_vundefinedrvvmf2x6hi                           (rtx);
extern rtx        gen_vundefinedrvvmf2x7hi                           (rtx);
extern rtx        gen_vundefinedrvvmf2x8hi                           (rtx);
extern rtx        gen_vundefinedrvvm1x2si                            (rtx);
extern rtx        gen_vundefinedrvvm1x3si                            (rtx);
extern rtx        gen_vundefinedrvvm1x4si                            (rtx);
extern rtx        gen_vundefinedrvvm1x5si                            (rtx);
extern rtx        gen_vundefinedrvvm1x6si                            (rtx);
extern rtx        gen_vundefinedrvvm1x7si                            (rtx);
extern rtx        gen_vundefinedrvvm1x8si                            (rtx);
extern rtx        gen_vundefinedrvvm2x2di                            (rtx);
extern rtx        gen_vundefinedrvvm2x3di                            (rtx);
extern rtx        gen_vundefinedrvvm2x4di                            (rtx);
extern rtx        gen_vundefinedrvvmf2x2bf                           (rtx);
extern rtx        gen_vundefinedrvvmf2x3bf                           (rtx);
extern rtx        gen_vundefinedrvvmf2x4bf                           (rtx);
extern rtx        gen_vundefinedrvvmf2x5bf                           (rtx);
extern rtx        gen_vundefinedrvvmf2x6bf                           (rtx);
extern rtx        gen_vundefinedrvvmf2x7bf                           (rtx);
extern rtx        gen_vundefinedrvvmf2x8bf                           (rtx);
extern rtx        gen_vundefinedrvvmf2x2hf                           (rtx);
extern rtx        gen_vundefinedrvvmf2x3hf                           (rtx);
extern rtx        gen_vundefinedrvvmf2x4hf                           (rtx);
extern rtx        gen_vundefinedrvvmf2x5hf                           (rtx);
extern rtx        gen_vundefinedrvvmf2x6hf                           (rtx);
extern rtx        gen_vundefinedrvvmf2x7hf                           (rtx);
extern rtx        gen_vundefinedrvvmf2x8hf                           (rtx);
extern rtx        gen_vundefinedrvvm1x2sf                            (rtx);
extern rtx        gen_vundefinedrvvm1x3sf                            (rtx);
extern rtx        gen_vundefinedrvvm1x4sf                            (rtx);
extern rtx        gen_vundefinedrvvm1x5sf                            (rtx);
extern rtx        gen_vundefinedrvvm1x6sf                            (rtx);
extern rtx        gen_vundefinedrvvm1x7sf                            (rtx);
extern rtx        gen_vundefinedrvvm1x8sf                            (rtx);
extern rtx        gen_vundefinedrvvm2x2df                            (rtx);
extern rtx        gen_vundefinedrvvm2x3df                            (rtx);
extern rtx        gen_vundefinedrvvm2x4df                            (rtx);
extern rtx        gen_vundefinedrvvmf2x2qi                           (rtx);
extern rtx        gen_vundefinedrvvmf2x3qi                           (rtx);
extern rtx        gen_vundefinedrvvmf2x4qi                           (rtx);
extern rtx        gen_vundefinedrvvmf2x5qi                           (rtx);
extern rtx        gen_vundefinedrvvmf2x6qi                           (rtx);
extern rtx        gen_vundefinedrvvmf2x7qi                           (rtx);
extern rtx        gen_vundefinedrvvmf2x8qi                           (rtx);
extern rtx        gen_vundefinedrvvm1x2hi                            (rtx);
extern rtx        gen_vundefinedrvvm1x3hi                            (rtx);
extern rtx        gen_vundefinedrvvm1x4hi                            (rtx);
extern rtx        gen_vundefinedrvvm1x5hi                            (rtx);
extern rtx        gen_vundefinedrvvm1x6hi                            (rtx);
extern rtx        gen_vundefinedrvvm1x7hi                            (rtx);
extern rtx        gen_vundefinedrvvm1x8hi                            (rtx);
extern rtx        gen_vundefinedrvvm2x2si                            (rtx);
extern rtx        gen_vundefinedrvvm2x3si                            (rtx);
extern rtx        gen_vundefinedrvvm2x4si                            (rtx);
extern rtx        gen_vundefinedrvvm4x2di                            (rtx);
extern rtx        gen_vundefinedrvvm1x2bf                            (rtx);
extern rtx        gen_vundefinedrvvm1x3bf                            (rtx);
extern rtx        gen_vundefinedrvvm1x4bf                            (rtx);
extern rtx        gen_vundefinedrvvm1x5bf                            (rtx);
extern rtx        gen_vundefinedrvvm1x6bf                            (rtx);
extern rtx        gen_vundefinedrvvm1x7bf                            (rtx);
extern rtx        gen_vundefinedrvvm1x8bf                            (rtx);
extern rtx        gen_vundefinedrvvm1x2hf                            (rtx);
extern rtx        gen_vundefinedrvvm1x3hf                            (rtx);
extern rtx        gen_vundefinedrvvm1x4hf                            (rtx);
extern rtx        gen_vundefinedrvvm1x5hf                            (rtx);
extern rtx        gen_vundefinedrvvm1x6hf                            (rtx);
extern rtx        gen_vundefinedrvvm1x7hf                            (rtx);
extern rtx        gen_vundefinedrvvm1x8hf                            (rtx);
extern rtx        gen_vundefinedrvvm2x2sf                            (rtx);
extern rtx        gen_vundefinedrvvm2x3sf                            (rtx);
extern rtx        gen_vundefinedrvvm2x4sf                            (rtx);
extern rtx        gen_vundefinedrvvm4x2df                            (rtx);
extern rtx        gen_vundefinedrvvm1x2qi                            (rtx);
extern rtx        gen_vundefinedrvvm1x3qi                            (rtx);
extern rtx        gen_vundefinedrvvm1x4qi                            (rtx);
extern rtx        gen_vundefinedrvvm1x5qi                            (rtx);
extern rtx        gen_vundefinedrvvm1x6qi                            (rtx);
extern rtx        gen_vundefinedrvvm1x7qi                            (rtx);
extern rtx        gen_vundefinedrvvm1x8qi                            (rtx);
extern rtx        gen_vundefinedrvvm2x2hi                            (rtx);
extern rtx        gen_vundefinedrvvm2x3hi                            (rtx);
extern rtx        gen_vundefinedrvvm2x4hi                            (rtx);
extern rtx        gen_vundefinedrvvm4x2si                            (rtx);
extern rtx        gen_vundefinedrvvm2x2bf                            (rtx);
extern rtx        gen_vundefinedrvvm2x3bf                            (rtx);
extern rtx        gen_vundefinedrvvm2x4bf                            (rtx);
extern rtx        gen_vundefinedrvvm2x2hf                            (rtx);
extern rtx        gen_vundefinedrvvm2x3hf                            (rtx);
extern rtx        gen_vundefinedrvvm2x4hf                            (rtx);
extern rtx        gen_vundefinedrvvm4x2sf                            (rtx);
extern rtx        gen_vundefinedrvvm2x2qi                            (rtx);
extern rtx        gen_vundefinedrvvm2x3qi                            (rtx);
extern rtx        gen_vundefinedrvvm2x4qi                            (rtx);
extern rtx        gen_vundefinedrvvm4x2hi                            (rtx);
extern rtx        gen_vundefinedrvvm4x2bf                            (rtx);
extern rtx        gen_vundefinedrvvm4x2hf                            (rtx);
extern rtx        gen_vundefinedrvvm4x2qi                            (rtx);
extern rtx        gen_vlmax_avlsi                                    (rtx, rtx);
extern rtx        gen_vlmax_avldi                                    (rtx, rtx);
extern rtx        gen_vxrmsi                                         (rtx);
extern rtx        gen_fsrmsi_backup                                  (rtx, rtx);
extern rtx        gen_fsrmsi_restore                                 (rtx);
extern rtx        gen_frrmsi                                         (rtx);
extern rtx        gen_vsetvlsi                                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vsetvldi                                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vsetvl_vtype_change_only                       (rtx, rtx, rtx, rtx);
extern rtx        gen_vsetvl_discard_resultsi                        (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vsetvl_discard_resultdi                        (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vsetvlsi_no_side_effects                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vsetvldi_no_side_effects                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm8qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm4qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm2qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm1qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm8hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm4hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm2hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm1hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm8si                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm4si                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm2si                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm1si                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm8di                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm4di                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm2di                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm1di                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvmf2qi                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvmf4qi                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvmf8qi                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvmf2hi                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvmf4hi                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvmf2si                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm8hf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm4hf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm2hf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm1hf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvmf2hf                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvmf4hf                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm8sf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm4sf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm2sf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm1sf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvmf2sf                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm8df                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm4df                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm2df                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm1df                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm8bf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm4bf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm2bf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm1bf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvmf2bf                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvmf4bf                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev1qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev2qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev4qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev8qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev16qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev32qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev64qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev128qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev256qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev512qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev1024qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev2048qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev4096qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev1hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev2hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev4hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev8hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev16hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev32hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev64hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev128hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev256hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev512hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev1024hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev2048hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev1si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev2si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev4si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev8si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev16si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev32si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev64si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev128si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev256si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev512si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev1024si                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev1di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev2di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev4di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev8di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev16di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev32di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev64di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev128di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev256di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev512di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev1hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev2hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev4hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev8hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev16hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev32hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev64hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev128hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev256hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev512hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev1024hf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev2048hf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev1sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev2sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev4sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev8sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev16sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev32sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev64sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev128sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev256sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev512sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev1024sf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev1df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev2df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev4df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev8df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev16df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev32df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev64df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev128df                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev256df                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev512df                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev1bf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev2bf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev4bf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev8bf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev16bf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev32bf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev64bf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev128bf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev256bf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev512bf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev1024bf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storev2048bf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvmf64bi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvmf32bi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvmf16bi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvmf8bi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvmf4bi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvmf2bi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm1bi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv1bi                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv2bi                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv4bi                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv8bi                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv16bi                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv32bi                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv64bi                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv128bi                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv256bi                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv512bi                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv1024bi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv2048bi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv4096bi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvmf64bi                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvmf32bi                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvmf16bi                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvmf8bi                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvmf4bi                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvmf2bi                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_storervvm1bi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvmf2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvmf4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvmf8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvmf2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvmf4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvmf2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm8hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm4hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm2hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm1hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvmf2hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvmf4hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm8sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm4sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm2sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm1sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvmf2sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm8df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm4df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm2df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm1df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm8bf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm4bf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm2bf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm1bf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvmf2bf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvmf4bf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev2qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev4qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev8qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev16qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev32qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev64qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev128qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev256qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev512qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1024qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev2048qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev4096qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev2hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev4hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev8hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev16hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev32hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev64hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev128hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev256hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev512hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1024hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev2048hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev2si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev4si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev8si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev16si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev32si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev64si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev128si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev256si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev512si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1024si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev2di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev4di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev8di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev16di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev32di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev64di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev128di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev256di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev512di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev2hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev4hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev8hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev16hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev32hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev64hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev128hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev256hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev512hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1024hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev2048hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev2sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev4sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev8sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev16sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev32sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev64sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev128sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev256sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev512sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1024sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev2df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev4df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev8df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev16df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev32df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev64df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev128df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev256df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev512df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1bf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev2bf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev4bf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev8bf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev16bf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev32bf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev64bf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev128bf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev256bf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev512bf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1024bf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev2048bf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm1qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvmf2qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvmf4qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvmf8qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm8hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm1hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvmf2hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvmf4hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm8si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm4si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm1si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvmf2si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev2qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev4qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev8qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev16qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev32qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev64qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev128qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev256qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev512qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1024qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev2048qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev4096qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev2hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev4hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev8hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev16hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev32hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev64hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev128hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev256hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev512hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1024hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev2048hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev2si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev4si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev8si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev16si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev32si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev64si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev128si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev256si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev512si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1024si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm8hf_zvfh                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm4hf_zvfh                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm2hf_zvfh                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm1hf_zvfh                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvmf2hf_zvfh                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvmf4hf_zvfh                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm8sf_zvfh                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm4sf_zvfh                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm2sf_zvfh                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm1sf_zvfh                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvmf2sf_zvfh                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm8df_zvfh                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm4df_zvfh                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm2df_zvfh                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm1df_zvfh                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv1hf_zvfh                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv2hf_zvfh                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv4hf_zvfh                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv8hf_zvfh                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv16hf_zvfh                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv32hf_zvfh                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv64hf_zvfh                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv128hf_zvfh                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv256hf_zvfh                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv512hf_zvfh                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv1024hf_zvfh                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv2048hf_zvfh                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv1sf_zvfh                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv2sf_zvfh                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv4sf_zvfh                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv8sf_zvfh                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv16sf_zvfh                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv32sf_zvfh                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv64sf_zvfh                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv128sf_zvfh                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv256sf_zvfh                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv512sf_zvfh                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv1024sf_zvfh                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv1df_zvfh                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv2df_zvfh                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv4df_zvfh                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv8df_zvfh                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv16df_zvfh                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv32df_zvfh                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv64df_zvfh                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv128df_zvfh                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv256df_zvfh                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv512df_zvfh                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm8qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm4qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm8hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm8si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm4si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm8di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm4di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf8qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm8hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm4hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm8sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm4sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm8df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm4df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm8bf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm4bf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2bf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1bf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2bf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4bf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv1qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv16qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv32qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv64qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv128qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv256qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv512qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv1024qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv2048qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv4096qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv1hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv8hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv16hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv32hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv64hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv128hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv256hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv512hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv1024hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv2048hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv1si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv4si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv8si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv16si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv32si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv64si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv128si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv256si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv512si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv1024si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv1di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv2di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv4di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv8di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv16di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv32di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv64di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv128di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv256di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv512di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv1hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv2hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv4hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv8hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv16hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv32hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv64hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv128hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv256hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv512hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv1024hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv2048hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv1sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv2sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv4sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv8sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv16sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv32sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv64sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv128sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv256sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv512sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv1024sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv1df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv2df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv4df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv8df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv16df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv32df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv64df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv128df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv256df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv512df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv1bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv2bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv4bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv8bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv16bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv32bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv64bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv128bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv256bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv512bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv1024bf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadv2048bf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm8qi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm4qi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2qi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1qi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm8hi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm4hi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2hi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1hi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm8si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm4si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm8di                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm4di                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2di                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1di                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2qi                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4qi                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf8qi                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2hi                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4hi                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm8hf                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm4hf                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2hf                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1hf                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2hf                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4hf                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm8sf                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm4sf                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2sf                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1sf                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2sf                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm8df                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm4df                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2df                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1df                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm8bf                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm4bf                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2bf                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1bf                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2bf                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4bf                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev1qi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev2qi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev4qi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev8qi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev16qi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev32qi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev64qi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev128qi                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev256qi                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev512qi                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev1024qi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev2048qi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev4096qi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev1hi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev2hi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev4hi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev8hi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev16hi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev32hi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev64hi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev128hi                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev256hi                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev512hi                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev1024hi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev2048hi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev1si                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev2si                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev4si                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev8si                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev16si                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev32si                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev64si                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev128si                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev256si                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev512si                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev1024si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev1di                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev2di                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev4di                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev8di                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev16di                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev32di                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev64di                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev128di                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev256di                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev512di                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev1hf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev2hf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev4hf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev8hf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev16hf                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev32hf                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev64hf                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev128hf                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev256hf                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev512hf                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev1024hf                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev2048hf                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev1sf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev2sf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev4sf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev8sf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev16sf                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev32sf                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev64sf                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev128sf                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev256sf                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev512sf                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev1024sf                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev1df                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev2df                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev4df                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev8df                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev16df                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev32df                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev64df                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev128df                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev256df                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev512df                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev1bf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev2bf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev4bf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev8bf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev16bf                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev32bf                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev64bf                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev128bf                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev256bf                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev512bf                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev1024bf                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storev2048bf                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm8qi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm8qi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4qi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4qi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2qi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2qi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1qi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1qi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2qi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2qi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4qi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4qi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8qi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8qi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm8hi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm8hi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4hi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4hi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2hi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2hi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1hi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1hi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2hi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2hi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4hi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4hi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm8si_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm8si_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4si_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4si_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2si_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2si_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1si_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1si_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2si_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2si_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm8di_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm8di_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4di_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4di_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2di_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2di_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1di_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1di_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm8bf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm8bf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4bf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4bf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2bf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2bf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1bf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1bf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2bf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2bf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4bf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4bf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm8hf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm8hf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4hf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4hf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2hf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2hf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1hf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1hf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2hf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2hf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4hf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4hf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm8sf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm8sf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4sf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4sf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2sf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2sf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1sf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1sf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2sf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2sf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm8df_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm8df_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4df_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4df_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2df_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2df_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1df_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1df_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1qi_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1qi_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2qi_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2qi_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4qi_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4qi_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8qi_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8qi_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16qi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16qi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32qi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32qi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64qi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64qi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128qi_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128qi_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256qi_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256qi_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512qi_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512qi_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1024qi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1024qi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2048qi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2048qi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4096qi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4096qi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1hi_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1hi_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2hi_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2hi_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4hi_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4hi_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8hi_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8hi_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16hi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16hi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32hi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32hi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64hi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64hi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128hi_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128hi_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256hi_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256hi_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512hi_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512hi_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1024hi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1024hi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2048hi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2048hi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1si_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1si_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2si_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2si_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4si_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4si_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8si_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8si_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16si_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16si_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32si_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32si_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64si_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64si_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128si_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128si_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256si_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256si_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512si_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512si_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1024si_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1024si_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1di_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1di_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2di_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2di_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4di_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4di_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8di_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8di_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16di_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16di_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32di_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32di_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64di_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64di_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128di_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128di_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256di_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256di_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512di_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512di_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1hf_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1hf_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2hf_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2hf_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4hf_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4hf_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8hf_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8hf_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16hf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16hf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32hf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32hf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64hf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64hf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128hf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128hf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256hf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256hf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512hf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512hf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1024hf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1024hf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2048hf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2048hf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1bf_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1bf_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2bf_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2bf_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4bf_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4bf_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8bf_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8bf_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16bf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16bf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32bf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32bf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64bf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64bf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128bf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128bf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256bf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256bf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512bf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512bf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1024bf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1024bf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2048bf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2048bf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1sf_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1sf_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2sf_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2sf_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4sf_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4sf_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8sf_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8sf_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16sf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16sf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32sf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32sf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64sf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64sf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128sf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128sf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256sf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256sf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512sf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512sf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1024sf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1024sf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1df_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1df_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2df_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2df_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4df_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4df_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8df_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8df_same_eew                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16df_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16df_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32df_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32df_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64df_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64df_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128df_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128df_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256df_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256df_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512df_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512df_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm8hi_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm8hi_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4hi_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4hi_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2hi_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2hi_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1hi_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1hi_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2hi_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2hi_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4hi_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4hi_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm8bf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm8bf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4bf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4bf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2bf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2bf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1bf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1bf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2bf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2bf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4bf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4bf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm8hf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm8hf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4hf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4hf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2hf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2hf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1hf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1hf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2hf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2hf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4hf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4hf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm8si_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm8si_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4si_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4si_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2si_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2si_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1si_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1si_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2si_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2si_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm8sf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm8sf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4sf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4sf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2sf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2sf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1sf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1sf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2sf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2sf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm8di_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm8di_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4di_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4di_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2di_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2di_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1di_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1di_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm8df_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm8df_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4df_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4df_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2df_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2df_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1df_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1df_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1hi_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1hi_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2hi_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2hi_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4hi_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4hi_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8hi_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8hi_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16hi_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16hi_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32hi_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32hi_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64hi_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64hi_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128hi_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128hi_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256hi_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256hi_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512hi_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512hi_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1024hi_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1024hi_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1si_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1si_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2si_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2si_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4si_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4si_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8si_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8si_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16si_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16si_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32si_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32si_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64si_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64si_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128si_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128si_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256si_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256si_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512si_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512si_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1024si_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1024si_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1di_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1di_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2di_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2di_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4di_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4di_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8di_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8di_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16di_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16di_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32di_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32di_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64di_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64di_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128di_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128di_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256di_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256di_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512di_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512di_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1hf_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1hf_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2hf_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2hf_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4hf_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4hf_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8hf_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8hf_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16hf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16hf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32hf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32hf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64hf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64hf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128hf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128hf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256hf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256hf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512hf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512hf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1024hf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1024hf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2048hf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2048hf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1bf_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1bf_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2bf_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2bf_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4bf_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4bf_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8bf_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8bf_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16bf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16bf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32bf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32bf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64bf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64bf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128bf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128bf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256bf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256bf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512bf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512bf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1024bf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1024bf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2048bf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2048bf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1sf_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1sf_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2sf_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2sf_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4sf_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4sf_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8sf_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8sf_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16sf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16sf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32sf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32sf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64sf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64sf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128sf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128sf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256sf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256sf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512sf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512sf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1024sf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1024sf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1df_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1df_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2df_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2df_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4df_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4df_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8df_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8df_x2_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16df_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16df_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32df_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32df_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64df_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64df_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128df_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128df_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256df_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256df_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512df_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512df_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm8si_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm8si_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4si_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4si_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2si_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2si_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1si_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1si_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2si_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2si_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm8sf_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm8sf_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4sf_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4sf_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2sf_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2sf_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1sf_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1sf_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2sf_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2sf_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm8di_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm8di_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4di_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4di_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2di_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2di_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1di_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1di_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm8df_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm8df_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4df_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4df_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2df_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2df_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1df_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1df_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1si_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1si_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2si_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2si_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4si_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4si_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8si_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8si_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16si_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16si_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32si_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32si_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64si_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64si_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128si_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128si_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256si_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256si_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512si_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512si_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1024si_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1024si_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1di_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1di_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2di_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2di_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4di_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4di_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8di_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8di_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16di_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16di_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32di_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32di_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64di_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64di_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128di_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128di_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256di_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256di_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512di_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512di_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1sf_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1sf_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2sf_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2sf_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4sf_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4sf_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8sf_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8sf_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16sf_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16sf_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32sf_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32sf_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64sf_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64sf_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128sf_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128sf_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256sf_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256sf_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512sf_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512sf_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1024sf_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1024sf_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1df_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1df_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2df_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2df_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4df_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4df_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8df_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8df_x4_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16df_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16df_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32df_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32df_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64df_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64df_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128df_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128df_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256df_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256df_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512df_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512df_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm8di_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm8di_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4di_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4di_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2di_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2di_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1di_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1di_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm8df_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm8df_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4df_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4df_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2df_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2df_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1df_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1df_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1di_x8_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1di_x8_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2di_x8_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2di_x8_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4di_x8_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4di_x8_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8di_x8_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8di_x8_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16di_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16di_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32di_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32di_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64di_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64di_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128di_x8_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128di_x8_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256di_x8_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256di_x8_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512di_x8_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512di_x8_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1df_x8_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1df_x8_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2df_x8_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2df_x8_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4df_x8_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4df_x8_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8df_x8_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8df_x8_greater_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16df_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16df_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32df_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32df_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64df_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64df_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128df_x8_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128df_x8_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256df_x8_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256df_x8_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512df_x8_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512df_x8_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4qi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4qi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2qi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2qi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1qi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1qi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2qi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2qi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4qi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4qi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8qi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8qi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4hi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4hi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2hi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2hi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1hi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1hi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2hi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2hi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4hi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4hi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4bf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4bf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2bf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2bf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1bf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1bf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2bf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2bf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4bf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4bf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4hf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4hf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2hf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2hf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1hf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1hf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2hf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2hf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4hf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4hf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4si_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4si_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2si_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2si_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1si_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1si_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2si_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2si_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4sf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4sf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2sf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2sf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1sf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1sf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2sf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2sf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1qi_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1qi_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2qi_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2qi_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4qi_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4qi_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8qi_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8qi_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16qi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16qi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32qi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32qi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64qi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64qi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128qi_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128qi_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256qi_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256qi_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512qi_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512qi_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1024qi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1024qi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2048qi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2048qi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1hi_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1hi_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2hi_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2hi_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4hi_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4hi_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8hi_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8hi_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16hi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16hi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32hi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32hi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64hi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64hi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128hi_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128hi_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256hi_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256hi_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512hi_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512hi_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1024hi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1024hi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1si_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1si_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2si_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2si_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4si_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4si_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8si_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8si_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16si_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16si_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32si_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32si_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64si_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64si_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128si_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128si_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256si_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256si_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512si_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512si_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1hf_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1hf_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2hf_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2hf_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4hf_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4hf_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8hf_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8hf_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16hf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16hf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32hf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32hf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64hf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64hf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128hf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128hf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256hf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256hf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512hf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512hf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1024hf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1024hf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1bf_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1bf_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2bf_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2bf_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4bf_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4bf_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8bf_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8bf_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16bf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16bf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32bf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32bf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64bf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64bf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128bf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128bf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256bf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256bf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512bf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512bf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1024bf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1024bf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1sf_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1sf_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2sf_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2sf_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4sf_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4sf_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8sf_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8sf_x2_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16sf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16sf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32sf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32sf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64sf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64sf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128sf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128sf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256sf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256sf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512sf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512sf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2qi_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2qi_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1qi_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1qi_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2qi_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2qi_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4qi_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4qi_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8qi_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8qi_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2hi_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2hi_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1hi_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1hi_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2hi_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2hi_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4hi_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4hi_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2bf_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2bf_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1bf_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1bf_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2bf_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2bf_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4bf_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4bf_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2hf_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2hf_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1hf_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1hf_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2hf_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2hf_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4hf_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4hf_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1qi_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1qi_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2qi_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2qi_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4qi_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4qi_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8qi_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8qi_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16qi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16qi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32qi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32qi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64qi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64qi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128qi_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128qi_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256qi_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256qi_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512qi_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512qi_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1024qi_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1024qi_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1hi_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1hi_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2hi_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2hi_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4hi_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4hi_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8hi_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8hi_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16hi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16hi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32hi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32hi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64hi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64hi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128hi_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128hi_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256hi_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256hi_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512hi_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512hi_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1hf_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1hf_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2hf_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2hf_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4hf_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4hf_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8hf_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8hf_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16hf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16hf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32hf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32hf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64hf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64hf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128hf_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128hf_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256hf_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256hf_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512hf_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512hf_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1bf_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1bf_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2bf_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2bf_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4bf_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4bf_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8bf_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8bf_x4_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16bf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16bf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32bf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32bf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64bf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64bf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128bf_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128bf_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256bf_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256bf_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512bf_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512bf_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1qi_x8_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1qi_x8_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2qi_x8_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2qi_x8_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4qi_x8_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4qi_x8_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8qi_x8_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8qi_x8_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv1qi_x8_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv1qi_x8_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv2qi_x8_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv2qi_x8_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv4qi_x8_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv4qi_x8_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv8qi_x8_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv8qi_x8_smaller_eew          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv16qi_x8_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv16qi_x8_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv32qi_x8_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv32qi_x8_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv64qi_x8_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv64qi_x8_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv128qi_x8_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv128qi_x8_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv256qi_x8_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv256qi_x8_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadv512qi_x8_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadv512qi_x8_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm8qi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm8qi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4qi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4qi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2qi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2qi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1qi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1qi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2qi_same_eew           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2qi_same_eew           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4qi_same_eew           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4qi_same_eew           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8qi_same_eew           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8qi_same_eew           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm8hi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm8hi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4hi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4hi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2hi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2hi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1hi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1hi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2hi_same_eew           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2hi_same_eew           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4hi_same_eew           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4hi_same_eew           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm8si_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm8si_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4si_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4si_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2si_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2si_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1si_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1si_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2si_same_eew           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2si_same_eew           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm8di_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm8di_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4di_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4di_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2di_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2di_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1di_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1di_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm8bf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm8bf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4bf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4bf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2bf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2bf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1bf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1bf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2bf_same_eew           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2bf_same_eew           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4bf_same_eew           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4bf_same_eew           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm8hf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm8hf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4hf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4hf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2hf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2hf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1hf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1hf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2hf_same_eew           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2hf_same_eew           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4hf_same_eew           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4hf_same_eew           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm8sf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm8sf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4sf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4sf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2sf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2sf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1sf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1sf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2sf_same_eew           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2sf_same_eew           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm8df_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm8df_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4df_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4df_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2df_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2df_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1df_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1df_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1qi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1qi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2qi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2qi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4qi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4qi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8qi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8qi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16qi_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16qi_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32qi_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32qi_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64qi_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64qi_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128qi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128qi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256qi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256qi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512qi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512qi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1024qi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1024qi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2048qi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2048qi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4096qi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4096qi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1hi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1hi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2hi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2hi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4hi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4hi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8hi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8hi_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16hi_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16hi_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32hi_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32hi_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64hi_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64hi_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128hi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128hi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256hi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256hi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512hi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512hi_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1024hi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1024hi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2048hi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2048hi_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1si_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1si_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2si_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2si_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4si_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4si_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8si_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8si_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16si_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16si_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32si_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32si_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64si_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64si_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128si_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128si_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256si_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256si_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512si_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512si_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1024si_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1024si_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1di_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1di_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2di_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2di_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4di_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4di_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8di_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8di_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16di_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16di_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32di_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32di_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64di_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64di_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128di_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128di_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256di_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256di_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512di_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512di_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1hf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1hf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2hf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2hf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4hf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4hf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8hf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8hf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16hf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16hf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32hf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32hf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64hf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64hf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128hf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128hf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256hf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256hf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512hf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512hf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1024hf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1024hf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2048hf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2048hf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1bf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1bf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2bf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2bf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4bf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4bf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8bf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8bf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16bf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16bf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32bf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32bf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64bf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64bf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128bf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128bf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256bf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256bf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512bf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512bf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1024bf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1024bf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2048bf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2048bf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1sf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1sf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2sf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2sf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4sf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4sf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8sf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8sf_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16sf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16sf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32sf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32sf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64sf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64sf_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128sf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128sf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256sf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256sf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512sf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512sf_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1024sf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1024sf_same_eew            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1df_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1df_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2df_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2df_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4df_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4df_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8df_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8df_same_eew               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16df_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16df_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32df_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32df_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64df_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64df_same_eew              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128df_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128df_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256df_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256df_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512df_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512df_same_eew             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm8hi_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm8hi_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4hi_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4hi_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2hi_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2hi_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1hi_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1hi_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2hi_x2_greater_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2hi_x2_greater_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4hi_x2_greater_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4hi_x2_greater_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm8bf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm8bf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4bf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4bf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2bf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2bf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1bf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1bf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2bf_x2_greater_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2bf_x2_greater_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4bf_x2_greater_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4bf_x2_greater_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm8hf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm8hf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4hf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4hf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2hf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2hf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1hf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1hf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2hf_x2_greater_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2hf_x2_greater_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4hf_x2_greater_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4hf_x2_greater_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm8si_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm8si_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4si_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4si_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2si_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2si_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1si_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1si_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2si_x2_greater_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2si_x2_greater_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm8sf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm8sf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4sf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4sf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2sf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2sf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1sf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1sf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2sf_x2_greater_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2sf_x2_greater_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm8di_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm8di_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4di_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4di_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2di_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2di_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1di_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1di_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm8df_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm8df_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4df_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4df_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2df_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2df_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1df_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1df_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1hi_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1hi_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2hi_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2hi_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4hi_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4hi_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8hi_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8hi_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16hi_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16hi_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32hi_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32hi_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64hi_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64hi_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128hi_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128hi_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256hi_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256hi_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512hi_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512hi_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1024hi_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1024hi_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1si_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1si_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2si_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2si_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4si_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4si_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8si_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8si_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16si_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16si_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32si_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32si_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64si_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64si_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128si_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128si_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256si_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256si_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512si_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512si_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1024si_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1024si_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1di_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1di_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2di_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2di_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4di_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4di_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8di_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8di_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16di_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16di_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32di_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32di_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64di_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64di_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128di_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128di_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256di_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256di_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512di_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512di_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1hf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1hf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2hf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2hf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4hf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4hf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8hf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8hf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16hf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16hf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32hf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32hf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64hf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64hf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128hf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128hf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256hf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256hf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512hf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512hf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1024hf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1024hf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2048hf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2048hf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1bf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1bf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2bf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2bf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4bf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4bf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8bf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8bf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16bf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16bf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32bf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32bf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64bf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64bf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128bf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128bf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256bf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256bf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512bf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512bf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1024bf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1024bf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2048bf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2048bf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1sf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1sf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2sf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2sf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4sf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4sf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8sf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8sf_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16sf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16sf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32sf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32sf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64sf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64sf_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128sf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128sf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256sf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256sf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512sf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512sf_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1024sf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1024sf_x2_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1df_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1df_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2df_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2df_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4df_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4df_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8df_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8df_x2_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16df_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16df_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32df_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32df_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64df_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64df_x2_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128df_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128df_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256df_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256df_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512df_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512df_x2_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm8si_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm8si_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4si_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4si_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2si_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2si_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1si_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1si_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2si_x4_greater_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2si_x4_greater_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm8sf_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm8sf_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4sf_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4sf_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2sf_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2sf_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1sf_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1sf_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2sf_x4_greater_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2sf_x4_greater_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm8di_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm8di_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4di_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4di_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2di_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2di_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1di_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1di_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm8df_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm8df_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4df_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4df_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2df_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2df_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1df_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1df_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1si_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1si_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2si_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2si_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4si_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4si_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8si_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8si_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16si_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16si_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32si_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32si_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64si_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64si_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128si_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128si_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256si_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256si_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512si_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512si_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1024si_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1024si_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1di_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1di_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2di_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2di_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4di_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4di_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8di_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8di_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16di_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16di_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32di_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32di_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64di_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64di_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128di_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128di_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256di_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256di_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512di_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512di_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1sf_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1sf_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2sf_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2sf_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4sf_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4sf_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8sf_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8sf_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16sf_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16sf_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32sf_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32sf_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64sf_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64sf_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128sf_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128sf_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256sf_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256sf_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512sf_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512sf_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1024sf_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1024sf_x4_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1df_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1df_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2df_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2df_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4df_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4df_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8df_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8df_x4_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16df_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16df_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32df_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32df_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64df_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64df_x4_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128df_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128df_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256df_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256df_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512df_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512df_x4_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm8di_x8_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm8di_x8_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4di_x8_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4di_x8_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2di_x8_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2di_x8_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1di_x8_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1di_x8_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm8df_x8_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm8df_x8_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4df_x8_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4df_x8_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2df_x8_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2df_x8_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1df_x8_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1df_x8_greater_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1di_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1di_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2di_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2di_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4di_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4di_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8di_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8di_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16di_x8_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16di_x8_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32di_x8_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32di_x8_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64di_x8_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64di_x8_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128di_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128di_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256di_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256di_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512di_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512di_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1df_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1df_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2df_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2df_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4df_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4df_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8df_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8df_x8_greater_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16df_x8_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16df_x8_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32df_x8_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32df_x8_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64df_x8_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64df_x8_greater_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128df_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128df_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256df_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256df_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512df_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512df_x8_greater_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4qi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4qi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2qi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2qi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1qi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1qi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2qi_x2_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2qi_x2_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4qi_x2_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4qi_x2_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8qi_x2_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8qi_x2_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4hi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4hi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2hi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2hi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1hi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1hi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2hi_x2_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2hi_x2_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4hi_x2_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4hi_x2_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4bf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4bf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2bf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2bf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1bf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1bf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2bf_x2_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2bf_x2_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4bf_x2_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4bf_x2_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4hf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4hf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2hf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2hf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1hf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1hf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2hf_x2_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2hf_x2_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4hf_x2_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4hf_x2_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4si_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4si_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2si_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2si_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1si_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1si_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2si_x2_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2si_x2_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4sf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4sf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2sf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2sf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1sf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1sf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2sf_x2_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2sf_x2_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1qi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1qi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2qi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2qi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4qi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4qi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8qi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8qi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16qi_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16qi_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32qi_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32qi_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64qi_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64qi_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128qi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128qi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256qi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256qi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512qi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512qi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1024qi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1024qi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2048qi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2048qi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1hi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1hi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2hi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2hi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4hi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4hi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8hi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8hi_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16hi_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16hi_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32hi_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32hi_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64hi_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64hi_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128hi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128hi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256hi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256hi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512hi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512hi_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1024hi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1024hi_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1si_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1si_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2si_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2si_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4si_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4si_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8si_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8si_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16si_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16si_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32si_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32si_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64si_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64si_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128si_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128si_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256si_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256si_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512si_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512si_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1hf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1hf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2hf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2hf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4hf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4hf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8hf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8hf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16hf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16hf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32hf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32hf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64hf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64hf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128hf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128hf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256hf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256hf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512hf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512hf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1024hf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1024hf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1bf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1bf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2bf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2bf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4bf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4bf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8bf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8bf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16bf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16bf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32bf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32bf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64bf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64bf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128bf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128bf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256bf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256bf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512bf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512bf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1024bf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1024bf_x2_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1sf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1sf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2sf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2sf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4sf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4sf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8sf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8sf_x2_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16sf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16sf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32sf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32sf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64sf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64sf_x2_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128sf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128sf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256sf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256sf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512sf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512sf_x2_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2qi_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2qi_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1qi_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1qi_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2qi_x4_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2qi_x4_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4qi_x4_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4qi_x4_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8qi_x4_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8qi_x4_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2hi_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2hi_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1hi_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1hi_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2hi_x4_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2hi_x4_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4hi_x4_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4hi_x4_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2bf_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2bf_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1bf_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1bf_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2bf_x4_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2bf_x4_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4bf_x4_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4bf_x4_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2hf_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2hf_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1hf_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1hf_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2hf_x4_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2hf_x4_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4hf_x4_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4hf_x4_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1qi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1qi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2qi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2qi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4qi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4qi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8qi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8qi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16qi_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16qi_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32qi_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32qi_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64qi_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64qi_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128qi_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128qi_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256qi_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256qi_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512qi_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512qi_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1024qi_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1024qi_x4_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1hi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1hi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2hi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2hi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4hi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4hi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8hi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8hi_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16hi_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16hi_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32hi_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32hi_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64hi_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64hi_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128hi_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128hi_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256hi_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256hi_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512hi_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512hi_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1hf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1hf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2hf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2hf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4hf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4hf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8hf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8hf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16hf_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16hf_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32hf_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32hf_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64hf_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64hf_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128hf_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128hf_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256hf_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256hf_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512hf_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512hf_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1bf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1bf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2bf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2bf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4bf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4bf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8bf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8bf_x4_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16bf_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16bf_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32bf_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32bf_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64bf_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64bf_x4_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128bf_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128bf_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256bf_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256bf_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512bf_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512bf_x4_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1qi_x8_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1qi_x8_smaller_eew      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2qi_x8_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2qi_x8_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4qi_x8_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4qi_x8_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8qi_x8_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8qi_x8_smaller_eew     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev1qi_x8_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev1qi_x8_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev2qi_x8_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev2qi_x8_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev4qi_x8_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev4qi_x8_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev8qi_x8_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev8qi_x8_smaller_eew         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev16qi_x8_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev16qi_x8_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev32qi_x8_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev32qi_x8_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev64qi_x8_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev64qi_x8_smaller_eew        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev128qi_x8_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev128qi_x8_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev256qi_x8_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev256qi_x8_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorev512qi_x8_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorev512qi_x8_smaller_eew       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvmf2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvmf2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvmf2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvmf2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvmf2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvmf2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvmf2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvmf4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvmf4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvmf4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvmf4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvmf4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvmf4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvmf4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvmf8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvmf8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvmf8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvmf8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvmf8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvmf8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvmf8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvmf2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvmf2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvmf2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvmf2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvmf2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvmf2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvmf2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvmf4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvmf4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvmf4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvmf4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvmf4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvmf4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvmf4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvmf2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvmf2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvmf2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvmf2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvmf2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvmf2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvmf2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvmf2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvmf2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvmf2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvmf2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvmf2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvmf2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvmf2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvmf2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvmf2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv1qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv1qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv1qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv1qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv1qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv1qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv1qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv1qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv1qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv1qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv1qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv1qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv1qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv1qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv1qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv2qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv2qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv2qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv2qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv2qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv2qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv2qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv2qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv2qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv2qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv2qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv2qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv2qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv2qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv2qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv2qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv4qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv4qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv4qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv4qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv4qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv4qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv4qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv4qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv4qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv4qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv4qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv4qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv4qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv4qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv4qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv4qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv4qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv8qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv8qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv8qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv8qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv8qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv8qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv8qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv8qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv8qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv8qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv8qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv8qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv8qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv8qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv8qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv8qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv8qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv16qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv16qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv16qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv16qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv16qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv16qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv16qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv16qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv16qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv16qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv16qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv16qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv16qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv16qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv16qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv16qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv16qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv32qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv32qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv32qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv32qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv32qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv32qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv32qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv32qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv32qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv32qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv32qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv32qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv32qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv32qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv32qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv32qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv32qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv64qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv64qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv64qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv64qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv64qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv64qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv64qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv64qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv64qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv64qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv64qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv64qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv64qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv64qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv64qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv64qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv64qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv128qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv128qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv128qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv128qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv128qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv128qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv128qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv128qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv128qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv128qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv128qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv128qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv128qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv128qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv128qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv128qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv128qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv256qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv256qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv256qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv256qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv256qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv256qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv256qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv256qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv256qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv256qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv256qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv256qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv256qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv256qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv256qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv256qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv256qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv512qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv512qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv512qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv512qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv512qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv512qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv512qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv512qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv512qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv512qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv512qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv512qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv512qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv512qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv512qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv512qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv512qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv1024qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1024qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv1024qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv1024qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv1024qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv1024qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv1024qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv1024qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv1024qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv1024qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv1024qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv1024qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv1024qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1024qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv1024qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv1024qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv1024qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv2048qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2048qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv2048qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv2048qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv2048qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv2048qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv2048qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv2048qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv2048qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv2048qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv2048qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv2048qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv2048qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv2048qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv2048qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv2048qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv2048qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv4096qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv4096qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv4096qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv4096qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv4096qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv4096qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv4096qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv4096qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv4096qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv4096qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv4096qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv4096qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv4096qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv4096qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv4096qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv4096qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv4096qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv1hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv1hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv1hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv1hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv1hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv1hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv1hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv1hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv1hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv1hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv1hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv1hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv1hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv1hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv1hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv2hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv2hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv2hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv2hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv2hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv2hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv2hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv2hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv2hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv2hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv2hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv2hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv2hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv2hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv2hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv2hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv4hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv4hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv4hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv4hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv4hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv4hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv4hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv4hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv4hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv4hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv4hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv4hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv4hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv4hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv4hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv4hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv4hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv8hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv8hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv8hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv8hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv8hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv8hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv8hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv8hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv8hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv8hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv8hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv8hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv8hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv8hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv8hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv8hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv8hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv16hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv16hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv16hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv16hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv16hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv16hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv16hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv16hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv16hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv16hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv16hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv16hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv16hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv16hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv16hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv16hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv16hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv32hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv32hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv32hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv32hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv32hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv32hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv32hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv32hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv32hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv32hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv32hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv32hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv32hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv32hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv32hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv32hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv32hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv64hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv64hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv64hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv64hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv64hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv64hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv64hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv64hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv64hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv64hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv64hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv64hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv64hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv64hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv64hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv64hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv64hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv128hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv128hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv128hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv128hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv128hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv128hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv128hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv128hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv128hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv128hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv128hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv128hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv128hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv128hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv128hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv128hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv128hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv256hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv256hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv256hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv256hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv256hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv256hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv256hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv256hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv256hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv256hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv256hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv256hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv256hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv256hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv256hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv256hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv256hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv512hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv512hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv512hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv512hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv512hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv512hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv512hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv512hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv512hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv512hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv512hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv512hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv512hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv512hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv512hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv512hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv512hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv1024hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1024hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv1024hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv1024hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv1024hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv1024hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv1024hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv1024hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv1024hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv1024hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv1024hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv1024hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv1024hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1024hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv1024hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv1024hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv1024hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv2048hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2048hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv2048hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv2048hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv2048hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv2048hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv2048hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv2048hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv2048hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv2048hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv2048hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv2048hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv2048hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv2048hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv2048hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv2048hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv2048hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv1si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv1si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv1si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv1si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv1si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv1si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv1si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv1si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv1si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv1si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv1si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv1si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv1si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv1si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv1si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv2si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv2si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv2si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv2si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv2si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv2si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv2si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv2si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv2si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv2si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv2si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv2si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv2si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv2si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv2si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv2si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv4si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv4si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv4si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv4si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv4si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv4si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv4si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv4si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv4si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv4si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv4si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv4si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv4si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv4si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv4si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv4si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv4si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv8si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv8si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv8si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv8si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv8si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv8si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv8si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv8si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv8si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv8si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv8si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv8si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv8si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv8si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv8si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv8si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv8si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv16si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv16si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv16si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv16si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv16si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv16si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv16si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv16si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv16si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv16si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv16si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv16si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv16si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv16si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv16si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv16si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv16si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv32si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv32si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv32si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv32si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv32si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv32si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv32si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv32si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv32si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv32si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv32si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv32si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv32si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv32si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv32si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv32si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv32si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv64si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv64si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv64si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv64si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv64si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv64si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv64si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv64si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv64si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv64si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv64si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv64si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv64si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv64si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv64si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv64si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv64si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv128si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv128si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv128si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv128si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv128si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv128si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv128si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv128si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv128si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv128si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv128si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv128si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv128si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv128si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv128si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv128si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv128si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv256si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv256si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv256si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv256si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv256si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv256si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv256si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv256si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv256si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv256si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv256si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv256si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv256si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv256si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv256si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv256si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv256si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv512si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv512si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv512si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv512si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv512si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv512si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv512si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv512si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv512si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv512si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv512si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv512si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv512si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv512si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv512si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv512si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv512si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv1024si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1024si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv1024si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv1024si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv1024si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv1024si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv1024si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv1024si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv1024si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv1024si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv1024si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv1024si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv1024si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1024si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv1024si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv1024si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv1024si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv1di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv1di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv1di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv1di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv1di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv1di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv1di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv1di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv1di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv1di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv1di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv1di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv1di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv1di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv1di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv2di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv2di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv2di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv2di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv2di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv2di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv2di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv2di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv2di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv2di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv2di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv2di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv2di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv2di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv2di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv2di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv4di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv4di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv4di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv4di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv4di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv4di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv4di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv4di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv4di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv4di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv4di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv4di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv4di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv4di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv4di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv4di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv4di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv8di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv8di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv8di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv8di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv8di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv8di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv8di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv8di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv8di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv8di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv8di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv8di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv8di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv8di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv8di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv8di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv8di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv16di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv16di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv16di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv16di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv16di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv16di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv16di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv16di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv16di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv16di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv16di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv16di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv16di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv16di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv16di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv16di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv16di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv32di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv32di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv32di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv32di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv32di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv32di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv32di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv32di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv32di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv32di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv32di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv32di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv32di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv32di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv32di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv32di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv32di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv64di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv64di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv64di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv64di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv64di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv64di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv64di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv64di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv64di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv64di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv64di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv64di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv64di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv64di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv64di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv64di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv64di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv128di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv128di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv128di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv128di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv128di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv128di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv128di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv128di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv128di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv128di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv128di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv128di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv128di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv128di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv128di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv128di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv128di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv256di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv256di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv256di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv256di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv256di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv256di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv256di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv256di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv256di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv256di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv256di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv256di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv256di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv256di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv256di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv256di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv256di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv512di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv512di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv512di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv512di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv512di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv512di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv512di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv512di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv512di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv512di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv512di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv512di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv512di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv512di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv512di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv512di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv512di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm1qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm1qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm1qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm8hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm8hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm8hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm1hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm1hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm1hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm8si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm8si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm8si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm4si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm4si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm4si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm1si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm1si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm1si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm8di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm8di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm8di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm4di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm4di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm4di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm2di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm2di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm2di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvm1di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvm1di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvm1di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvmf2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvmf2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvmf2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvmf4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvmf4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvmf4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvmf8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvmf8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvmf8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvmf2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvmf2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvmf2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvmf4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvmf4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvmf4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlrvvmf2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrrvvmf2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrrvvmf2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv1qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv1qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv1qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv2qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv2qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv2qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv4qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv4qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv4qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv8qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv8qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv8qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv16qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv16qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv16qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv32qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv32qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv32qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv64qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv64qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv64qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv128qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv128qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv128qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv256qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv256qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv256qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv512qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv512qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv512qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv1024qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv1024qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv1024qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv2048qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv2048qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv2048qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv4096qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv4096qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv4096qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv1hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv1hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv1hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv2hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv2hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv2hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv4hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv4hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv4hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv8hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv8hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv8hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv16hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv16hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv16hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv32hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv32hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv32hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv64hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv64hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv64hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv128hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv128hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv128hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv256hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv256hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv256hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv512hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv512hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv512hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv1024hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv1024hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv1024hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv2048hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv2048hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv2048hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv1si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv1si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv1si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv2si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv2si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv2si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv4si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv4si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv4si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv8si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv8si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv8si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv16si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv16si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv16si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv32si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv32si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv32si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv64si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv64si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv64si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv128si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv128si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv128si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv256si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv256si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv256si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv512si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv512si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv512si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv1024si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv1024si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv1024si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv1di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv1di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv1di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv2di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv2di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv2di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv4di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv4di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv4di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv8di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv8di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv8di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv16di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv16di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv16di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv32di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv32di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv32di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv64di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv64di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv64di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv128di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv128di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv128di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv256di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv256di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv256di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashlv512di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ashrv512di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_lshrv512di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm8qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm8qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm8qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm8qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm8qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm4qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm4qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm4qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm4qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm4qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm2qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm2qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm2qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm2qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm2qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm1qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm1qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm1qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm1qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm1qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm1qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm1qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm1qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm1qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvmf2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvmf2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvmf2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvmf2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvmf2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvmf2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvmf2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvmf2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvmf2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvmf4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvmf4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvmf4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvmf4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvmf4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvmf4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvmf4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvmf4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvmf4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvmf8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvmf8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvmf8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvmf8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvmf8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvmf8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvmf8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvmf8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvmf8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm8hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm8hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm8hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm8hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm8hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm8hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm8hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm8hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm8hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm4hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm4hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm4hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm4hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm4hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm2hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm2hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm2hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm2hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm2hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm1hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm1hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm1hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm1hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm1hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm1hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm1hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm1hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm1hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvmf2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvmf2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvmf2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvmf2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvmf2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvmf2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvmf2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvmf2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvmf2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvmf4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvmf4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvmf4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvmf4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvmf4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvmf4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvmf4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvmf4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvmf4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm8si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm8si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm8si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm8si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm8si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm8si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm8si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm8si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm8si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm4si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm4si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm4si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm4si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm4si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm4si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm4si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm4si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm4si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm2si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm2si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm2si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm2si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm2si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm1si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm1si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm1si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm1si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm1si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm1si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm1si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm1si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm1si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvmf2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvmf2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvmf2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvmf2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvmf2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvmf2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvmf2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvmf2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvmf2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv1qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv1qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv1qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv1qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv1qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv1qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv1qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv1qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv1qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv2qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv2qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv2qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv2qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv2qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv2qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv2qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv2qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv2qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv4qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv4qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv4qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv4qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv4qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv4qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv4qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv4qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv4qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv8qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv8qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv8qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv8qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv8qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv8qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv8qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv8qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv8qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv16qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv16qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv16qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv16qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv16qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv16qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv16qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv16qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv16qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv32qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv32qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv32qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv32qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv32qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv32qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv32qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv32qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv32qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv64qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv64qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv64qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv64qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv64qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv64qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv64qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv64qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv64qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv128qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv128qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv128qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv128qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv128qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv128qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv128qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv128qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv128qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv256qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv256qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv256qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv256qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv256qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv256qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv256qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv256qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv256qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv512qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv512qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv512qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv512qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv512qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv512qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv512qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv512qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv512qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv1024qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv1024qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv1024qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv1024qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv1024qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv1024qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv1024qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv1024qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv1024qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv2048qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv2048qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv2048qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv2048qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv2048qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv2048qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv2048qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv2048qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv2048qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv4096qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv4096qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv4096qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv4096qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv4096qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv4096qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv4096qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv4096qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv4096qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv1hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv1hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv1hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv1hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv1hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv1hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv1hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv1hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv1hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv2hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv2hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv2hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv2hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv2hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv2hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv2hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv2hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv2hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv4hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv4hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv4hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv4hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv4hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv4hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv4hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv4hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv4hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv8hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv8hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv8hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv8hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv8hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv8hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv8hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv8hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv8hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv16hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv16hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv16hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv16hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv16hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv16hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv16hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv16hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv16hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv32hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv32hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv32hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv32hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv32hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv32hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv32hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv32hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv32hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv64hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv64hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv64hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv64hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv64hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv64hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv64hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv64hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv64hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv128hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv128hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv128hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv128hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv128hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv128hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv128hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv128hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv128hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv256hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv256hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv256hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv256hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv256hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv256hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv256hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv256hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv256hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv512hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv512hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv512hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv512hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv512hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv512hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv512hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv512hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv512hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv1024hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv1024hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv1024hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv1024hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv1024hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv1024hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv1024hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv1024hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv1024hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv2048hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv2048hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv2048hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv2048hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv2048hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv2048hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv2048hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv2048hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv2048hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv1si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv1si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv1si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv1si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv1si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv1si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv1si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv1si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv1si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv2si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv2si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv2si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv2si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv2si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv2si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv2si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv2si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv2si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv4si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv4si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv4si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv4si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv4si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv4si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv4si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv4si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv4si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv8si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv8si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv8si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv8si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv8si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv8si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv8si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv8si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv8si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv16si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv16si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv16si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv16si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv16si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv16si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv16si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv16si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv16si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv32si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv32si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv32si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv32si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv32si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv32si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv32si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv32si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv32si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv64si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv64si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv64si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv64si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv64si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv64si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv64si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv64si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv64si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv128si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv128si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv128si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv128si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv128si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv128si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv128si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv128si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv128si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv256si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv256si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv256si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv256si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv256si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv256si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv256si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv256si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv256si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv512si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv512si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv512si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv512si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv512si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv512si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv512si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv512si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv512si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv1024si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv1024si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv1024si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv1024si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv1024si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv1024si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv1024si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv1024si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv1024si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm8qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm8qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm8qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm4qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm4qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm4qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm2qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm2qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm2qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm1qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm1qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm1qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm1qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm1qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvmf2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvmf2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvmf2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvmf2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvmf4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvmf4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvmf4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvmf4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvmf8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvmf8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvmf8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvmf8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm8hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm8hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm8hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm8hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm8hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm4hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm4hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm4hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm2hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm2hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm2hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm1hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm1hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm1hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm1hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm1hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvmf2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvmf2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvmf2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvmf2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvmf4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvmf4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvmf4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvmf4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm8si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm8si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm8si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm8si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm8si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm4si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm4si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm4si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm4si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm4si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm2si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm2si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm2si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm1si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm1si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm1si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm1si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm1si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvmf2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvmf2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvmf2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvmf2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv1qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv1qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv1qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv2qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv2qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv2qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv2qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv4qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv4qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv4qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv4qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv4qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv8qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv8qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv8qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv8qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv8qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv16qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv16qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv16qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv16qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv16qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv32qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv32qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv32qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv32qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv32qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv64qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv64qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv64qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv64qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv64qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv128qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv128qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv128qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv128qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv128qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv256qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv256qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv256qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv256qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv256qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv512qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv512qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv512qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv512qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv512qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1024qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1024qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv1024qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv1024qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv1024qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2048qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv2048qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv2048qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv2048qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv2048qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv4096qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv4096qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv4096qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv4096qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv4096qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv1hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv1hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv1hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv2hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv2hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv2hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv2hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv4hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv4hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv4hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv4hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv4hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv8hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv8hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv8hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv8hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv8hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv16hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv16hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv16hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv16hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv16hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv32hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv32hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv32hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv32hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv32hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv64hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv64hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv64hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv64hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv64hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv128hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv128hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv128hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv128hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv128hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv256hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv256hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv256hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv256hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv256hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv512hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv512hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv512hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv512hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv512hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1024hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1024hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv1024hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv1024hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv1024hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2048hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv2048hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv2048hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv2048hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv2048hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv1si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv1si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv1si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv2si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv2si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv2si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv2si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv4si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv4si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv4si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv4si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv4si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv8si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv8si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv8si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv8si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv8si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv16si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv16si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv16si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv16si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv16si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv32si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv32si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv32si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv32si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv32si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv64si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv64si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv64si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv64si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv64si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv128si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv128si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv128si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv128si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv128si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv256si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv256si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv256si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv256si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv256si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv512si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv512si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv512si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv512si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv512si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1024si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1024si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv1024si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv1024si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv1024si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm8qi_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm4qi_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm2qi_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm1qi_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf2qi_reverse_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf4qi_reverse_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf8qi_reverse_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm8hi_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm4hi_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm2hi_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm1hi_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf2hi_reverse_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf4hi_reverse_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm8si_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm4si_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm2si_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm1si_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf2si_reverse_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1qi_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2qi_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv4qi_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv8qi_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv16qi_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv32qi_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv64qi_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv128qi_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv256qi_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv512qi_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1024qi_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2048qi_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv4096qi_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1hi_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2hi_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv4hi_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv8hi_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv16hi_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv32hi_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv64hi_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv128hi_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv256hi_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv512hi_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1024hi_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2048hi_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1si_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2si_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv4si_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv8si_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv16si_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv32si_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv64si_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv128si_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv256si_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv512si_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1024si_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm1qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvmf2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvmf2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvmf4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvmf4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvmf8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvmf8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm8hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvmf2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvmf2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvmf4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvmf4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvmf2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvmf2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvmf2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv1qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv1qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv2qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv2qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv4qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv4qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv8qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv8qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv16qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv16qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv16qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv32qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv32qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv32qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv64qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv64qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv64qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv128qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv128qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv128qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv256qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv256qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv256qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv512qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv512qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv512qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv1024qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv1024qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv1024qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv2048qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv2048qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv2048qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv4096qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv4096qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv4096qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv1hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv1hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv2hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv2hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv4hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv4hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv8hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv8hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv16hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv16hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv16hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv32hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv32hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv32hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv64hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv64hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv64hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv128hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv128hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv128hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv256hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv256hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv256hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv512hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv512hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv512hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv1024hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv1024hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv1024hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv2048hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv2048hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv2048hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv1si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv1si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv2si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv2si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv4si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv4si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv8si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv8si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv16si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv16si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv16si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv32si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv32si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv32si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv64si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv64si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv64si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv128si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv128si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv128si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv256si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv256si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv256si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv512si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv512si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv512si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv1024si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv1024si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv1024si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv1di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv1di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv2di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv2di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv4di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv4di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv8di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv8di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv16di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv16di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv16di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv32di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv32di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv32di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv64di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv64di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv64di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv128di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv128di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv128di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv256di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv256di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv256di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv512di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv512di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv512di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm8qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm4qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm2qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm1qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm1qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm1qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvmf2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvmf2qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvmf2qi_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvmf4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvmf4qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvmf4qi_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvmf8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvmf8qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvmf8qi_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm8hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm8hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm8hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm4hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm2hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm1hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm1hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm1hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvmf2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvmf2hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvmf2hi_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvmf4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvmf4hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvmf4hi_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm8si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm8si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm8si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm4si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm4si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm4si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm2si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm1si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm1si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm1si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvmf2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvmf2si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvmf2si_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv1qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv1qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv1qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv2qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv2qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv2qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv4qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv4qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv4qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv8qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv8qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv8qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv16qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv16qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv16qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv32qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv32qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv32qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv64qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv64qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv64qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv128qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv128qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv128qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv256qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv256qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv256qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv512qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv512qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv512qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv1024qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv1024qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv1024qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv2048qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv2048qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv2048qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv4096qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv4096qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv4096qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv1hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv1hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv1hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv2hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv2hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv2hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv4hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv4hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv4hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv8hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv8hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv8hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv16hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv16hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv16hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv32hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv32hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv32hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv64hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv64hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv64hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv128hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv128hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv128hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv256hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv256hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv256hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv512hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv512hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv512hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv1024hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv1024hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv1024hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv2048hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv2048hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv2048hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv1si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv1si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv1si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv2si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv2si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv2si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv4si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv4si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv4si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv8si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv8si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv8si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv16si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv16si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv16si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv32si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv32si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv32si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv64si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv64si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv64si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv128si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv128si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv128si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv256si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv256si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv256si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv512si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv512si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv512si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhv1024si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhuv1024si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsuv1024si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvmf2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvmf4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvmf8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvmf2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvmf4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvmf2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvmf2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvmf4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvmf8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvmf2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvmf4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvmf2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm8qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm4qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm2qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm1qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvmf2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvmf4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvmf8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm8hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm4hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm2hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm1hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvmf2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvmf4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm8si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm4si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm2si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm1si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvmf2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv1qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv2qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv4qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv8qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv16qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv32qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv64qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv128qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv256qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv512qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv1024qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv2048qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv4096qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv1hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv2hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv4hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv8hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv16hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv32hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv64hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv128hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv256hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv512hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv1024hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv2048hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv1si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv2si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv4si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv8si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv16si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv32si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv64si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv128si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv256si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv512si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcv1024si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm8qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm4qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm2qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm1qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvmf2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvmf4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvmf8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm8hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm4hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm2hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm1hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvmf2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvmf4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm8si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm4si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm2si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm1si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvmf2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv1qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv2qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv4qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv8qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv16qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv32qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv64qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv128qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv256qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv512qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv1024qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv2048qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv4096qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv1hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv2hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv4hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv8hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv16hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv32hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv64hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv128hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv256hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv512hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv1024hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv2048hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv1si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv2si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv4si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv8si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv16si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv32si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv64si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv128si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv256si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv512si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcv1024si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm8qi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm4qi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm2qi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm1qi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm8hi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm4hi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm2hi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm1hi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm8si                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm4si                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm2si                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm1si                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm8di                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm4di                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm2di                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm1di                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvmf2si                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm8qi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm4qi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm2qi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm1qi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm8hi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm4hi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm2hi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm1hi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm8si                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm4si                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm2si                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm1si                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm8di                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm4di                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm2di                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm1di                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvmf2si                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm1qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvmf2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvmf4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvmf8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm8hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm1hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvmf2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvmf4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm8si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm4si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm1si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvmf2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv1qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv2qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv4qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv8qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv16qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv32qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv64qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv128qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv256qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv512qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv1024qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv2048qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv4096qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv1hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv2hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv4hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv8hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv16hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv32hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv64hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv128hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv256hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv512hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv1024hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv2048hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv1si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv2si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv4si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv8si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv16si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv32si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv64si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv128si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv256si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv512si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv1024si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm1qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvmf2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvmf4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvmf8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm8hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm1hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvmf2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvmf4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm8si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm4si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm1si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvmf2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv1qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv2qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv4qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv8qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv16qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv32qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv64qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv128qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv256qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv512qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv1024qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv2048qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv4096qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv1hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv2hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv4hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv8hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv16hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv32hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv64hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv128hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv256hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv512hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv1024hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv2048hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv1si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv2si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv4si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv8si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv16si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv32si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv64si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv128si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv256si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv512si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv1024si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm8qi_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm4qi_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm2qi_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm1qi_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm8hi_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm4hi_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm2hi_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm1hi_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm8si_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm4si_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm2si_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm1si_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm8di_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm4di_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm2di_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm1di_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvmf2qi_overflow                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvmf4qi_overflow                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvmf8qi_overflow                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvmf2hi_overflow                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvmf4hi_overflow                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvmf2si_overflow                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm8qi_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm4qi_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm2qi_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm1qi_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm8hi_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm4hi_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm2hi_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm1hi_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm8si_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm4si_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm2si_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm1si_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm8di_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm4di_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm2di_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm1di_overflow                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvmf2qi_overflow                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvmf4qi_overflow                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvmf8qi_overflow                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvmf2hi_overflow                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvmf4hi_overflow                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvmf2si_overflow                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm8qi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm4qi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm2qi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm1qi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvmf2qi_overflow_scalar              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvmf4qi_overflow_scalar              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvmf8qi_overflow_scalar              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm8hi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm4hi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm2hi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm1hi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvmf2hi_overflow_scalar              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvmf4hi_overflow_scalar              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm8si_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm4si_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm2si_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm1si_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvmf2si_overflow_scalar              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv1qi_overflow_scalar                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv2qi_overflow_scalar                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv4qi_overflow_scalar                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv8qi_overflow_scalar                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv16qi_overflow_scalar                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv32qi_overflow_scalar                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv64qi_overflow_scalar                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv128qi_overflow_scalar                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv256qi_overflow_scalar                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv512qi_overflow_scalar                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv1024qi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv2048qi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv4096qi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv1hi_overflow_scalar                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv2hi_overflow_scalar                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv4hi_overflow_scalar                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv8hi_overflow_scalar                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv16hi_overflow_scalar                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv32hi_overflow_scalar                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv64hi_overflow_scalar                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv128hi_overflow_scalar                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv256hi_overflow_scalar                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv512hi_overflow_scalar                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv1024hi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv2048hi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv1si_overflow_scalar                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv2si_overflow_scalar                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv4si_overflow_scalar                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv8si_overflow_scalar                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv16si_overflow_scalar                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv32si_overflow_scalar                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv64si_overflow_scalar                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv128si_overflow_scalar                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv256si_overflow_scalar                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv512si_overflow_scalar                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcv1024si_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm8qi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm4qi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm2qi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm1qi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvmf2qi_overflow_scalar              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvmf4qi_overflow_scalar              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvmf8qi_overflow_scalar              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm8hi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm4hi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm2hi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm1hi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvmf2hi_overflow_scalar              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvmf4hi_overflow_scalar              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm8si_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm4si_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm2si_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm1si_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvmf2si_overflow_scalar              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv1qi_overflow_scalar                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv2qi_overflow_scalar                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv4qi_overflow_scalar                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv8qi_overflow_scalar                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv16qi_overflow_scalar                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv32qi_overflow_scalar                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv64qi_overflow_scalar                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv128qi_overflow_scalar                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv256qi_overflow_scalar                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv512qi_overflow_scalar                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv1024qi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv2048qi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv4096qi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv1hi_overflow_scalar                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv2hi_overflow_scalar                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv4hi_overflow_scalar                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv8hi_overflow_scalar                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv16hi_overflow_scalar                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv32hi_overflow_scalar                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv64hi_overflow_scalar                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv128hi_overflow_scalar                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv256hi_overflow_scalar                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv512hi_overflow_scalar                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv1024hi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv2048hi_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv1si_overflow_scalar                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv2si_overflow_scalar                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv4si_overflow_scalar                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv8si_overflow_scalar                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv16si_overflow_scalar                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv32si_overflow_scalar                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv64si_overflow_scalar                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv128si_overflow_scalar                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv256si_overflow_scalar                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv512si_overflow_scalar                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcv1024si_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplrvvm8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplrvvm4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplrvvm2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplrvvm1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplrvvm8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplrvvm4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplrvvm2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplrvvm1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplrvvm8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplrvvm4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplrvvm2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplrvvm1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplrvvm8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplrvvm4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplrvvm2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplrvvm1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvmf2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplrvvmf2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvmf4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplrvvmf4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvmf8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplrvvmf8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvmf2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplrvvmf2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvmf4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplrvvmf4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvmf2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplrvvmf2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv1qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv2qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv4qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv8qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv16qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv16qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv32qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv32qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv64qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv64qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv128qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv128qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv256qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv256qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv512qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv512qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv1024qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv1024qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv2048qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv2048qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv4096qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv4096qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv1hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv2hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv4hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv8hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv16hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv16hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv32hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv32hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv64hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv64hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv128hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv128hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv256hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv256hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv512hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv512hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv1024hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv1024hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv2048hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv2048hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv1si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv2si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv4si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv8si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv16si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv16si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv32si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv32si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv64si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv64si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv128si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv128si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv256si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv256si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv512si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv512si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv1024si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv1024si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv1di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv2di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv4di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv8di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv16di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv16di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv32di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv32di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv64di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv64di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv128di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv128di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv256di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv256di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv512di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_one_cmplv512di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm8hi_vf2                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm8hi_vf2                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm4hi_vf2                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm4hi_vf2                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm2hi_vf2                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm2hi_vf2                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm1hi_vf2                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm1hi_vf2                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvmf2hi_vf2                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvmf2hi_vf2                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvmf4hi_vf2                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvmf4hi_vf2                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm8si_vf2                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm8si_vf2                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm4si_vf2                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm4si_vf2                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm2si_vf2                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm2si_vf2                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm1si_vf2                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm1si_vf2                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvmf2si_vf2                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvmf2si_vf2                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm8di_vf2                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm8di_vf2                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm4di_vf2                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm4di_vf2                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm2di_vf2                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm2di_vf2                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm1di_vf2                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm1di_vf2                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv1hi_vf2                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv1hi_vf2                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv2hi_vf2                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv2hi_vf2                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv4hi_vf2                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv4hi_vf2                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv8hi_vf2                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv8hi_vf2                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv16hi_vf2                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv16hi_vf2                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv32hi_vf2                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv32hi_vf2                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv64hi_vf2                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv64hi_vf2                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv128hi_vf2                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv128hi_vf2                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv256hi_vf2                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv256hi_vf2                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv512hi_vf2                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv512hi_vf2                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv1024hi_vf2                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv1024hi_vf2                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv2048hi_vf2                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv2048hi_vf2                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv1si_vf2                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv1si_vf2                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv2si_vf2                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv2si_vf2                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv4si_vf2                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv4si_vf2                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv8si_vf2                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv8si_vf2                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv16si_vf2                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv16si_vf2                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv32si_vf2                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv32si_vf2                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv64si_vf2                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv64si_vf2                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv128si_vf2                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv128si_vf2                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv256si_vf2                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv256si_vf2                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv512si_vf2                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv512si_vf2                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv1024si_vf2                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv1024si_vf2                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv1di_vf2                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv1di_vf2                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv2di_vf2                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv2di_vf2                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv4di_vf2                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv4di_vf2                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv8di_vf2                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv8di_vf2                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv16di_vf2                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv16di_vf2                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv32di_vf2                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv32di_vf2                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv64di_vf2                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv64di_vf2                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv128di_vf2                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv128di_vf2                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv256di_vf2                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv256di_vf2                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv512di_vf2                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv512di_vf2                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm8si_vf4                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm8si_vf4                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm4si_vf4                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm4si_vf4                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm2si_vf4                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm2si_vf4                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm1si_vf4                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm1si_vf4                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvmf2si_vf4                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvmf2si_vf4                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm8di_vf4                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm8di_vf4                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm4di_vf4                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm4di_vf4                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm2di_vf4                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm2di_vf4                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm1di_vf4                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm1di_vf4                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv1si_vf4                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv1si_vf4                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv2si_vf4                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv2si_vf4                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv4si_vf4                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv4si_vf4                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv8si_vf4                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv8si_vf4                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv16si_vf4                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv16si_vf4                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv32si_vf4                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv32si_vf4                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv64si_vf4                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv64si_vf4                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv128si_vf4                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv128si_vf4                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv256si_vf4                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv256si_vf4                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv512si_vf4                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv512si_vf4                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv1024si_vf4                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv1024si_vf4                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv1di_vf4                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv1di_vf4                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv2di_vf4                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv2di_vf4                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv4di_vf4                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv4di_vf4                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv8di_vf4                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv8di_vf4                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv16di_vf4                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv16di_vf4                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv32di_vf4                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv32di_vf4                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv64di_vf4                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv64di_vf4                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv128di_vf4                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv128di_vf4                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv256di_vf4                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv256di_vf4                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv512di_vf4                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv512di_vf4                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm8di_vf8                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm8di_vf8                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm4di_vf8                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm4di_vf8                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm2di_vf8                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm2di_vf8                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm1di_vf8                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm1di_vf8                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv1di_vf8                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv1di_vf8                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv2di_vf8                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv2di_vf8                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv4di_vf8                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv4di_vf8                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv8di_vf8                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv8di_vf8                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv16di_vf8                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv16di_vf8                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv32di_vf8                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv32di_vf8                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv64di_vf8                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv64di_vf8                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv128di_vf8                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv128di_vf8                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv256di_vf8                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv256di_vf8                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv512di_vf8                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv512di_vf8                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvm8hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvm8hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvm8hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvm8hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvm8hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvm8hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvm4hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvm4hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvm4hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvm4hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvm4hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvm4hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvm2hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvm2hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvm2hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvm2hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvm2hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvm2hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvm1hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvm1hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvm1hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvm1hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvm1hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvm1hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvmf2hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvmf2hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvmf2hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvmf2hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvmf2hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvmf2hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvmf4hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvmf4hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvmf4hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvmf4hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvmf4hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvmf4hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvm8si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvm8si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvm8si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvm8si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvm8si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvm8si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvm4si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvm4si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvm4si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvm4si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvm4si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvm4si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvm2si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvm2si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvm2si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvm2si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvm2si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvm2si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvm1si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvm1si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvm1si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvm1si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvm1si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvm1si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvmf2si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvmf2si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvmf2si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvmf2si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvmf2si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvmf2si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvm8di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvm8di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvm8di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvm8di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvm8di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvm8di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvm4di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvm4di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvm4di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvm4di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvm4di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvm4di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvm2di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvm2di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvm2di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvm2di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvm2di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvm2di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvm1di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvm1di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvm1di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvm1di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvm1di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvm1di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv1hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv1hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv1hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv1hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv1hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv1hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv8hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv8hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv8hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv8hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv8hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv8hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv16hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv16hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv16hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv16hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv16hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv16hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv32hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv32hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv32hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv32hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv32hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv32hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv64hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv64hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv64hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv64hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv64hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv64hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv128hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv128hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv128hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv128hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv128hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv128hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv256hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv256hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv256hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv256hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv256hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv256hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv512hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv512hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv512hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv512hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv512hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv512hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv1024hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv1024hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv1024hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv1024hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv1024hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv1024hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv2048hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv2048hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv2048hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv2048hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv2048hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv2048hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv1si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv1si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv1si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv1si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv1si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv1si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv4si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv4si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv4si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv4si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv4si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv4si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv8si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv8si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv8si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv8si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv8si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv8si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv16si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv16si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv16si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv16si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv16si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv16si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv32si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv32si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv32si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv32si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv32si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv32si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv64si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv64si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv64si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv64si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv64si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv64si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv128si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv128si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv128si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv128si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv128si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv128si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv256si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv256si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv256si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv256si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv256si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv256si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv512si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv512si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv512si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv512si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv512si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv512si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv1024si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv1024si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv1024si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv1024si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv1024si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv1024si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv1di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv1di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv1di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv1di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv1di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv1di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv2di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv2di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv2di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv2di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv2di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv2di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv4di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv4di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv4di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv4di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv4di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv4di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv8di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv8di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv8di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv8di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv8di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv8di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv16di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv16di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv16di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv16di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv16di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv16di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv32di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv32di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv32di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv32di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv32di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv32di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv64di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv64di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv64di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv64di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv64di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv64di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv128di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv128di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv128di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv128di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv128di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv128di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv256di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv256di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv256di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv256di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv256di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv256di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv512di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv512di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv512di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv512di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv512di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv512di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvm8hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvm8hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvm8hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvm8hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvm8hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvm8hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvm4hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvm4hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvm4hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvm4hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvm4hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvm4hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvm2hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvm2hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvm2hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvm2hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvm2hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvm2hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvm1hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvm1hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvm1hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvm1hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvm1hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvm1hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvmf2hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvmf2hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvmf2hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvmf2hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvmf2hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvmf2hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvmf4hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvmf4hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvmf4hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvmf4hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvmf4hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvmf4hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvm8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvm8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvm8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvm8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvm8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvm8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvm4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvm4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvm4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvm4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvm4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvm4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvm2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvm2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvm2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvm2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvm2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvm2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvm1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvm1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvm1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvm1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvm1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvm1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvmf2si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvmf2si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvmf2si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvmf2si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvmf2si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvmf2si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvm8di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvm8di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvm8di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvm8di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvm8di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvm8di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvm4di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvm4di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvm4di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvm4di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvm4di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvm4di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvm2di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvm2di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvm2di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvm2di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvm2di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvm2di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsrvvm1di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addurvvm1di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsrvvm1di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_suburvvm1di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsrvvm1di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulurvvm1di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv1hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv1hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv1hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv1hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv1hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv1hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv2hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv2hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv2hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv2hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv2hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv2hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv4hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv4hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv4hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv4hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv4hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv4hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv8hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv8hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv8hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv8hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv8hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv8hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv16hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv16hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv16hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv16hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv16hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv16hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv32hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv32hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv32hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv32hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv32hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv32hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv64hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv64hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv64hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv64hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv64hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv64hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv128hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv128hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv128hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv128hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv128hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv128hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv256hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv256hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv256hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv256hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv256hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv256hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv512hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv512hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv512hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv512hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv512hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv512hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv1024hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv1024hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv1024hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv1024hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv1024hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv1024hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv2048hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv2048hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv2048hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv2048hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv2048hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv2048hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv1si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv1si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv1si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv1si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv1si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv1si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv2si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv2si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv2si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv2si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv2si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv2si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv4si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv4si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv4si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv4si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv4si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv4si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv8si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv8si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv8si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv8si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv8si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv8si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv16si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv16si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv16si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv16si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv16si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv16si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv32si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv32si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv32si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv32si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv32si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv32si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv64si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv64si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv64si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv64si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv64si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv64si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv128si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv128si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv128si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv128si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv128si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv128si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv256si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv256si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv256si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv256si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv256si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv256si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv512si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv512si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv512si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv512si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv512si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv512si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv1024si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv1024si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv1024si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv1024si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv1024si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv1024si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv1di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv1di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv1di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv1di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv1di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv1di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv2di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv2di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv2di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv2di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv2di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv2di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv4di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv4di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv4di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv4di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv4di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv4di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv8di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv8di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv8di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv8di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv8di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv8di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv16di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv16di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv16di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv16di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv16di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv16di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv32di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv32di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv32di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv32di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv32di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv32di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv64di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv64di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv64di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv64di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv64di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv64di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv128di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv128di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv128di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv128di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv128di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv128di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv256di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv256di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv256di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv256di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv256di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv256di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addsv512di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_adduv512di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subsv512di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subuv512di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulsv512di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_muluv512di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm8hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm8hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm4hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm4hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm2hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm2hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm1hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm1hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvmf2hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvmf2hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvmf4hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvmf4hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm8si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm8si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm4si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm4si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm2si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm2si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm1si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm1si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvmf2si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvmf2si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm8di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm8di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm4di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm4di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm2di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm2di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm1di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm1di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv1hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv1hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv2hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv2hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv4hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv4hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv8hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv8hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv16hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv16hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv32hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv32hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv64hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv64hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv128hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv128hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv256hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv256hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv512hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv512hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv1024hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv1024hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv2048hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv2048hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv1si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv1si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv2si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv2si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv4si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv4si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv8si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv8si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv16si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv16si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv32si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv32si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv64si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv64si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv128si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv128si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv256si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv256si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv512si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv512si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv1024si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv1024si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv1di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv1di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv2di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv2di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv4di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv4di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv8di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv8di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv16di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv16di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv32di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv32di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv64di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv64di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv128di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv128di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv256di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv256di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv512di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv512di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm8hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm8hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm4hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm4hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm2hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm2hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm1hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm1hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvmf2hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvmf2hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvmf4hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvmf4hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm8si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm8si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm4si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm4si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm2si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm2si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm1si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm1si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvmf2si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvmf2si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm8di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm8di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm4di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm4di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm2di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm2di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm1di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm1di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv1hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv1hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv2hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv2hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv4hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv4hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv8hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv8hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv16hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv16hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv32hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv32hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv64hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv64hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv128hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv128hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv256hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv256hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv512hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv512hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv1024hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv1024hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv2048hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv2048hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv1si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv1si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv2si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv2si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv4si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv4si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv8si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv8si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv16si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv16si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv32si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv32si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv64si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv64si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv128si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv128si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv256si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv256si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv512si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv512si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv1024si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv1024si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv1di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv1di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv2di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv2di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv4di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv4di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv8di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv8di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv16di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv16di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv32di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv32di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv64di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv64di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv128di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv128di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv256di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv256di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv512di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv512di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm8hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm8hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm8hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm8hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm4hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm4hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm4hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm4hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm2hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm2hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm2hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm2hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm1hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm1hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm1hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm1hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvmf2hi_scalar          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvmf2hi_scalar          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvmf2hi_scalar          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvmf2hi_scalar          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvmf4hi_scalar          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvmf4hi_scalar          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvmf4hi_scalar          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvmf4hi_scalar          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm8si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm8si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm8si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm8si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm4si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm4si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm4si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm4si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm2si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm2si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm2si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm2si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm1si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm1si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm1si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm1si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvmf2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvmf2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvmf2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvmf2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm8di_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm8di_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm8di_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm8di_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm4di_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm4di_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm4di_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm4di_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm2di_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm2di_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm2di_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm2di_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm1di_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm1di_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm1di_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm1di_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv1hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv1hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv1hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv1hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv2hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv2hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv2hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv2hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv4hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv4hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv4hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv4hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv8hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv8hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv8hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv8hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv16hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv16hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv16hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv16hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv32hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv32hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv32hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv32hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv64hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv64hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv64hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv64hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv128hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv128hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv128hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv128hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv256hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv256hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv256hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv256hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv512hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv512hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv512hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv512hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv1024hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv1024hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv1024hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv1024hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv2048hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv2048hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv2048hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv2048hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv1si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv1si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv1si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv1si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv2si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv2si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv2si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv2si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv4si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv4si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv4si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv4si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv8si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv8si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv8si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv8si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv16si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv16si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv16si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv16si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv32si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv32si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv32si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv32si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv64si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv64si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv64si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv64si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv128si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv128si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv128si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv128si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv256si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv256si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv256si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv256si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv512si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv512si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv512si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv512si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv1024si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv1024si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv1024si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv1024si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv1di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv1di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv1di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv1di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv2di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv2di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv2di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv2di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv4di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv4di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv4di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv4di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv8di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv8di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv8di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv8di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv16di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv16di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv16di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv16di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv32di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv32di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv32di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv32di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv64di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv64di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv64di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv64di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv128di_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv128di_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv128di_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv128di_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv256di_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv256di_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv256di_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv256di_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv512di_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv512di_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv512di_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv512di_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm8hi_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm8hi_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm4hi_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm4hi_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm2hi_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm2hi_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm1hi_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm1hi_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvmf2hi_extended_scalar (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvmf2hi_extended_scalar (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvmf4hi_extended_scalar (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvmf4hi_extended_scalar (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm8si_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm8si_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm4si_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm4si_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm2si_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm2si_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm1si_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm1si_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvmf2si_extended_scalar (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvmf2si_extended_scalar (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm8di_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm8di_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm4di_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm4di_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm2di_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm2di_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsrvvm1di_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addurvvm1di_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv1hi_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv1hi_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv2hi_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv2hi_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv4hi_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv4hi_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv8hi_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv8hi_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv16hi_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv16hi_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv32hi_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv32hi_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv64hi_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv64hi_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv128hi_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv128hi_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv256hi_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv256hi_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv512hi_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv512hi_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv1024hi_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv1024hi_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv2048hi_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv2048hi_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv1si_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv1si_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv2si_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv2si_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv4si_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv4si_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv8si_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv8si_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv16si_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv16si_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv32si_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv32si_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv64si_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv64si_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv128si_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv128si_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv256si_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv256si_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv512si_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv512si_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv1024si_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv1024si_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv1di_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv1di_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv2di_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv2di_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv4di_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv4di_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv8di_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv8di_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv16di_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv16di_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv32di_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv32di_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv64di_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv64di_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv128di_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv128di_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv256di_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv256di_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addsv512di_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_adduv512di_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm8hi_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm8hi_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm4hi_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm4hi_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm2hi_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm2hi_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm1hi_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm1hi_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvmf2hi_extended_scalar (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvmf2hi_extended_scalar (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvmf4hi_extended_scalar (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvmf4hi_extended_scalar (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm8si_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm8si_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm4si_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm4si_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm2si_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm2si_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm1si_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm1si_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvmf2si_extended_scalar (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvmf2si_extended_scalar (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm8di_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm8di_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm4di_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm4di_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm2di_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm2di_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsrvvm1di_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_suburvvm1di_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv1hi_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv1hi_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv2hi_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv2hi_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv4hi_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv4hi_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv8hi_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv8hi_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv16hi_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv16hi_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv32hi_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv32hi_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv64hi_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv64hi_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv128hi_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv128hi_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv256hi_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv256hi_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv512hi_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv512hi_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv1024hi_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv1024hi_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv2048hi_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv2048hi_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv1si_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv1si_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv2si_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv2si_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv4si_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv4si_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv8si_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv8si_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv16si_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv16si_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv32si_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv32si_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv64si_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv64si_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv128si_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv128si_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv256si_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv256si_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv512si_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv512si_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv1024si_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv1024si_extended_scalar  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv1di_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv1di_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv2di_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv2di_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv4di_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv4di_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv8di_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv8di_extended_scalar     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv16di_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv16di_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv32di_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv32di_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv64di_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv64di_extended_scalar    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv128di_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv128di_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv256di_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv256di_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subsv512di_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subuv512di_extended_scalar   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvm8hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvm4hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvm2hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvm1hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvmf2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvmf4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvm8si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvm4si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvm2si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvm1si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvmf2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvm8di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvm4di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvm2di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvm1di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv16hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv32hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv64hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv128hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv256hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv512hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv1024hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv2048hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv16si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv32si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv64si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv128si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv256si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv512si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv1024si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv16di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv32di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv64di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv128di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv256di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv512di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvm8hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvm4hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvm2hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvm1hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvmf2hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvmf4hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvm8si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvm4si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvm2si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvm1si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvmf2si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvm8di_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvm4di_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvm2di_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsurvvm1di_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv1hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv2hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv4hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv8hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv16hi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv32hi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv64hi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv128hi_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv256hi_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv512hi_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv1024hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv2048hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv1si_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv2si_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv4si_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv8si_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv16si_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv32si_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv64si_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv128si_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv256si_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv512si_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv1024si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv1di_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv2di_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv4di_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv8di_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv16di_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv32di_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv64di_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv128di_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv256di_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mulsuv512di_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm8hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm8hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm4hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm2hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm1hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvmf2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvmf2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvmf4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvmf4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm8si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm4si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm2si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm1si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvmf2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvmf2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm8di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm4di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm2di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendrvvm1di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv16hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv16hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv32hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv32hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv64hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv64hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv128hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv128hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv256hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv256hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv512hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv512hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv1024hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv1024hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv2048hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv2048hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv16si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv16si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv32si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv32si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv64si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv64si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv128si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv128si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv256si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv256si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv512si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv512si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv1024si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv1024si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv16di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv16di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv32di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv32di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv64di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv64di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv128di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv128di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv256di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv256di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv512di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_zero_extendv512di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvm8hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvm8hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvm4hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvm4hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvm2hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvm2hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvm1hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvm1hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvmf2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvmf2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvmf4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvmf4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvm8si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvm8si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvm4si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvm4si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvm2si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvm2si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvm1si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvm1si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvmf2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvmf2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvm8di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvm8di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvm4di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvm4di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvm2di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvm2di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvm1di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvm1di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv16hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv16hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv32hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv32hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv64hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv64hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv128hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv128hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv256hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv256hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv512hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv512hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv1024hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv1024hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv2048hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv2048hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv16si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv16si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv32si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv32si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv64si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv64si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv128si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv128si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv256si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv256si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv512si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv512si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv1024si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv1024si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv16di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv16di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv32di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv32di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv64di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv64di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv128di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv128di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv256di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv256di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv512di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv512di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvm8hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvm8hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvm4hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvm4hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvm2hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvm2hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvm1hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvm1hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvmf2hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvmf2hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvmf4hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvmf4hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvm8si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvm8si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvm4si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvm4si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvm2si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvm2si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvm1si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvm1si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvmf2si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvmf2si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvm8di_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvm8di_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvm4di_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvm4di_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvm2di_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvm2di_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrrvvm1di_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrrvvm1di_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv1hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv1hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv2hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv2hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv4hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv4hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv8hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv8hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv16hi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv16hi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv32hi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv32hi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv64hi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv64hi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv128hi_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv128hi_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv256hi_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv256hi_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv512hi_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv512hi_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv1024hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv1024hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv2048hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv2048hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv1si_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv1si_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv2si_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv2si_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv4si_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv4si_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv8si_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv8si_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv16si_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv16si_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv32si_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv32si_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv64si_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv64si_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv128si_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv128si_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv256si_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv256si_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv512si_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv512si_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv1024si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv1024si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv1di_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv1di_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv2di_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv2di_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv4di_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv4di_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv8di_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv8di_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv16di_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv16di_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv32di_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv32di_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv64di_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv64di_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv128di_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv128di_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv256di_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv256di_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_ashrv512di_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_lshrv512di_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvm8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvm4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvm2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvm1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvmf2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvmf4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvm8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvm4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvm2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvm1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvmf2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvm8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvm4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvm2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvm1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv1hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv2hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv4hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv8hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv16hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv32hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv64hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv128hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv256hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv512hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv1024hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv2048hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv1si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv2si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv4si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv8si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv16si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv32si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv64si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv128si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv256si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv512si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv1024si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv1di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv2di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv4di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv8di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv16di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv32di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv64di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv128di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv256di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv512di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvmf2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvmf2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvmf2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvmf2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvmf4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvmf4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvmf4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvmf4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvmf8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvmf8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvmf8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvmf8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvmf2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvmf2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvmf2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvmf2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvmf4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvmf4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvmf4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvmf4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvmf2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvmf2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvmf2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvmf2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv1qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv1qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv1qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv1qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv2qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv2qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv2qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv2qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv4qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv4qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv4qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv4qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv8qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv8qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv8qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv8qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv16qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv16qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv16qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv16qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv32qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv32qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv32qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv32qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv64qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv64qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv64qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv64qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv128qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv128qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv128qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv128qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv256qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv256qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv256qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv256qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv512qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv512qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv512qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv512qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv1024qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv1024qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv1024qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv1024qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv2048qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv2048qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv2048qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv2048qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv4096qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv4096qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv4096qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv4096qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv1hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv1hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv1hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv1hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv2hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv2hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv2hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv2hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv4hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv4hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv4hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv4hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv8hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv8hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv8hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv8hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv16hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv16hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv16hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv16hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv32hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv32hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv32hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv32hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv64hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv64hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv64hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv64hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv128hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv128hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv128hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv128hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv256hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv256hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv256hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv256hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv512hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv512hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv512hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv512hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv1024hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv1024hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv1024hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv1024hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv2048hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv2048hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv2048hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv2048hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv1si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv1si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv1si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv1si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv2si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv2si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv2si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv2si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv4si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv4si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv4si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv4si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv8si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv8si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv8si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv8si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv16si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv16si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv16si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv16si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv32si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv32si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv32si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv32si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv64si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv64si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv64si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv64si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv128si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv128si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv128si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv128si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv256si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv256si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv256si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv256si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv512si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv512si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv512si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv512si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv1024si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv1024si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv1024si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv1024si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv1di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv1di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv1di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv1di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv2di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv2di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv2di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv2di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv4di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv4di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv4di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv4di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv8di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv8di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv8di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv8di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv16di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv16di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv16di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv16di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv32di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv32di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv32di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv32di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv64di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv64di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv64di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv64di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv128di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv128di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv128di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv128di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv256di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv256di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv256di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv256di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv512di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv512di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv512di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv512di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm1qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm1qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvmf2qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvmf2qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvmf4qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvmf4qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvmf8qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvmf8qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm8hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm8hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm1hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm1hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvmf2hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvmf2hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvmf4hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvmf4hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm8si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm8si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm4si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm4si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm1si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm1si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvmf2si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvmf2si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv1qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv1qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv2qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv2qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv4qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv4qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv8qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv8qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv16qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv16qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv32qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv32qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv64qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv64qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv128qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv128qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv256qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv256qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv512qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv512qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv1024qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv1024qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv2048qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv2048qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv4096qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv4096qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv1hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv1hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv2hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv2hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv4hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv4hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv8hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv8hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv16hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv16hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv32hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv32hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv64hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv64hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv128hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv128hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv256hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv256hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv512hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv512hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv1024hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv1024hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv2048hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv2048hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv1si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv1si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv2si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv2si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv4si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv4si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv8si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv8si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv16si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv16si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv32si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv32si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv64si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv64si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv128si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv128si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv256si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv256si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv512si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv512si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddv1024si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddv1024si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm1qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm1qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvmf2qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvmf2qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvmf4qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvmf4qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvmf8qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvmf8qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm8hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm8hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm1hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm1hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvmf2hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvmf2hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvmf4hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvmf4hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm8si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm8si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm4si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm4si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm1si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm1si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvmf2si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvmf2si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv1qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv1qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv2qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv2qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv4qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv4qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv8qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv8qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv16qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv16qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv32qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv32qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv64qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv64qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv128qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv128qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv256qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv256qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv512qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv512qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv1024qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv1024qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv2048qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv2048qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv4096qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv4096qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv1hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv1hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv2hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv2hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv4hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv4hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv8hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv8hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv16hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv16hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv32hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv32hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv64hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv64hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv128hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv128hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv256hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv256hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv512hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv512hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv1024hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv1024hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv2048hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv2048hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv1si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv1si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv2si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv2si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv4si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv4si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv8si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv8si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv16si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv16si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv32si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv32si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv64si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv64si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv128si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv128si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv256si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv256si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv512si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv512si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubv1024si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubv1024si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvmf2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvmf2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvmf2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvmf4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvmf4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvmf4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvmf8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvmf8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvmf8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvmf2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvmf2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvmf2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvmf4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvmf4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvmf4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvmf2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvmf2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvmf2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvmf2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvmf2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvmf2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvmf2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv1qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv1qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv1qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv1qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv1qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv1qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav1qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv2qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv2qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv2qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv2qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv2qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv2qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav2qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv4qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv4qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv4qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv4qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv4qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv4qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav4qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv8qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv8qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv8qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv8qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv8qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv8qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav8qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv16qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv16qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv16qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv16qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv16qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv16qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav16qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv32qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv32qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv32qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv32qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv32qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv32qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav32qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv64qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv64qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv64qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv64qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv64qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv64qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav64qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv128qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv128qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv128qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv128qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv128qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv128qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav128qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv256qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv256qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv256qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv256qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv256qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv256qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav256qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv512qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv512qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv512qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv512qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv512qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv512qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav512qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv1024qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv1024qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv1024qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv1024qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv1024qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv1024qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav1024qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv2048qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv2048qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv2048qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv2048qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv2048qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv2048qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav2048qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv4096qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv4096qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv4096qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv4096qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv4096qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv4096qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav4096qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv1hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv1hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv1hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv1hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv1hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv1hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav1hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv2hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv2hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv2hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv2hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv2hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv2hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav2hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv4hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv4hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv4hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv4hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv4hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv4hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav4hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv8hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv8hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv8hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv8hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv8hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv8hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav8hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv16hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv16hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv16hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv16hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv16hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv16hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav16hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv32hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv32hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv32hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv32hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv32hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv32hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav32hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv64hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv64hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv64hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv64hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv64hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv64hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav64hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv128hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv128hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv128hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv128hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv128hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv128hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav128hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv256hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv256hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv256hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv256hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv256hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv256hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav256hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv512hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv512hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv512hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv512hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv512hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv512hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav512hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv1024hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv1024hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv1024hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv1024hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv1024hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv1024hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav1024hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv2048hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv2048hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv2048hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv2048hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv2048hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv2048hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav2048hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv1si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv1si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv1si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv1si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv1si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv1si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav1si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv2si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv2si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv2si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv2si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv2si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv2si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav2si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv4si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv4si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv4si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv4si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv4si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv4si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav4si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv8si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv8si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv8si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv8si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv8si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv8si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav8si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv16si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv16si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv16si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv16si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv16si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv16si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav16si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv32si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv32si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv32si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv32si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv32si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv32si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav32si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv64si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv64si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv64si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv64si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv64si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv64si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav64si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv128si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv128si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv128si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv128si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv128si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv128si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav128si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv256si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv256si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv256si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv256si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv256si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv256si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav256si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv512si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv512si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv512si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv512si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv512si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv512si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav512si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv1024si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv1024si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv1024si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv1024si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv1024si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv1024si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav1024si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv1di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv1di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv1di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv1di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv1di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv1di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav1di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv2di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv2di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv2di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv2di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv2di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv2di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav2di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv4di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv4di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv4di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv4di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv4di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv4di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav4di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv8di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv8di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv8di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv8di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv8di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv8di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav8di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv16di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv16di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv16di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv16di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv16di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv16di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav16di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv32di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv32di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv32di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv32di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv32di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv32di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav32di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv64di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv64di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv64di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv64di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv64di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv64di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav64di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv128di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv128di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv128di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv128di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv128di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv128di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav128di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv256di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv256di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv256di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv256di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv256di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv256di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav256di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv512di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv512di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv512di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv512di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv512di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlv512di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrav512di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm1qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm1qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm1qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm1qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm1qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvmf2qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvmf2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvmf2qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvmf2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvmf2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvmf4qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvmf4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvmf4qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvmf4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvmf4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvmf8qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvmf8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvmf8qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvmf8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvmf8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm8hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm8hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm8hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm8hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm8hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm1hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm1hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm1hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm1hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm1hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvmf2hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvmf2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvmf2hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvmf2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvmf2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvmf4hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvmf4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvmf4hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvmf4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvmf4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm8si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm8si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm8si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm8si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm8si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm4si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm4si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm4si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm4si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm4si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm1si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm1si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm1si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm1si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm1si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvmf2si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvmf2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvmf2si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvmf2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvmf2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv1qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv1qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv1qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv1qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv1qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv2qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv2qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv2qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv2qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv2qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv4qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv4qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv4qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv4qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv4qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv8qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv8qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv8qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv8qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv8qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv16qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv16qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv16qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv16qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv16qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv32qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv32qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv32qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv32qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv32qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv64qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv64qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv64qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv64qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv64qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv128qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv128qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv128qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv128qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv128qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv256qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv256qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv256qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv256qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv256qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv512qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv512qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv512qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv512qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv512qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv1024qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv1024qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv1024qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv1024qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv1024qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv2048qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv2048qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv2048qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv2048qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv2048qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv4096qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv4096qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv4096qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv4096qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv4096qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv1hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv1hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv1hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv1hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv1hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv2hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv2hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv2hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv2hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv2hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv4hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv4hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv4hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv4hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv4hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv8hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv8hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv8hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv8hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv8hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv16hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv16hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv16hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv16hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv16hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv32hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv32hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv32hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv32hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv32hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv64hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv64hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv64hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv64hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv64hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv128hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv128hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv128hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv128hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv128hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv256hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv256hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv256hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv256hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv256hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv512hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv512hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv512hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv512hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv512hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv1024hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv1024hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv1024hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv1024hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv1024hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv2048hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv2048hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv2048hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv2048hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv2048hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv1si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv1si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv1si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv1si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv1si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv2si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv2si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv2si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv2si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv2si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv4si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv4si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv4si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv4si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv4si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv8si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv8si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv8si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv8si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv8si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv16si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv16si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv16si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv16si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv16si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv32si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv32si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv32si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv32si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv32si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv64si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv64si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv64si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv64si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv64si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv128si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv128si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv128si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv128si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv128si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv256si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv256si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv256si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv256si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv256si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv512si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv512si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv512si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv512si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv512si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv1024si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv1024si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv1024si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv1024si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv1024si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm1qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm1qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm8hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm8hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm1hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm1hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm8si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm8si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm4si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm4si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm1si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm1si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm8di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm8di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm4di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm4di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm2di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm2di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvm1di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvm1di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvmf2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvmf2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvmf4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvmf4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvmf8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvmf8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvmf2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvmf2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvmf4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvmf4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrlrvvmf2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssrarvvmf2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvm8hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvm8hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvm4hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvm4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvm2hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvm2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvm1hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvm1hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvmf2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvmf2hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvmf4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvmf4hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvm8si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvm8si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvm4si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvm4si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvm2si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvm2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvm1si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvm1si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvmf2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvmf2si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvm8di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvm8di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvm4di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvm4di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvm2di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvm2di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvm1di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvm1di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv1hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv8hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv16hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv16hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv32hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv32hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv64hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv64hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv128hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv128hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv256hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv256hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv512hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv512hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv1024hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv1024hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv2048hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv2048hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv1si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv4si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv8si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv16si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv16si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv32si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv32si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv64si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv64si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv128si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv128si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv256si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv256si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv512si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv512si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv1024si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv1024si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv1di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv2di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv4di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv8di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv16di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv16di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv32di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv32di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv64di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv64di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv128di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv128di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv256di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv256di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv512di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv512di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvm8hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvm8hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvm4hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvm4hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvm2hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvm2hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvm1hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvm1hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvmf2hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvmf2hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvmf4hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvmf4hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvm8si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvm8si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvm4si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvm4si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvm2si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvm2si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvm1si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvm1si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvmf2si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvmf2si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvm8di_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvm8di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvm4di_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvm4di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvm2di_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvm2di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_cliprvvm1di_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipurvvm1di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv1hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv1hi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv2hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv2hi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv4hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv4hi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv8hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv8hi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv16hi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv16hi_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv32hi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv32hi_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv64hi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv64hi_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv128hi_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv128hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv256hi_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv256hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv512hi_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv512hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv1024hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv1024hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv2048hi_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv2048hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv1si_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv1si_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv2si_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv2si_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv4si_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv4si_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv8si_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv8si_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv16si_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv16si_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv32si_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv32si_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv64si_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv64si_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv128si_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv128si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv256si_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv256si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv512si_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv512si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv1024si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv1024si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv1di_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv1di_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv2di_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv2di_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv4di_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv4di_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv8di_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv8di_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv16di_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv16di_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv32di_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv32di_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv64di_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv64di_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv128di_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv128di_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv256di_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv256di_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipv512di_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_clipuv512di_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvm8hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvm8hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvm4hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvm4hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvm2hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvm2hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvm1hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvm1hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvmf2hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvmf2hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvmf4hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvmf4hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvm8si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvm8si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvm4si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvm4si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvm2si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvm2si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvm1si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvm1si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvmf2si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvmf2si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvm8di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvm8di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvm4di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvm4di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvm2di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvm2di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvm1di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvm1di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv1hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv1hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv8hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv8hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv16hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv16hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv32hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv32hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv64hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv64hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv128hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv128hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv256hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv256hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv512hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv512hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv1024hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv1024hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv2048hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv2048hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv1si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv1si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv4si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv4si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv8si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv8si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv16si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv16si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv32si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv32si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv64si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv64si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv128si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv128si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv256si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv256si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv512si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv512si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv1024si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv1024si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv1di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv1di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv2di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv2di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv4di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv4di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv8di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv8di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv16di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv16di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv32di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv32di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv64di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv64di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv128di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv128di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv256di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv256di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv512di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv512di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvm8hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvm8hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvm4hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvm4hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvm2hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvm2hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvm1hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvm1hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvmf2hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvmf2hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvmf4hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvmf4hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvm8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvm8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvm4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvm4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvm2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvm2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvm1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvm1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvmf2si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvmf2si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvm8di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvm8di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvm4di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvm4di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvm2di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvm2di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussrvvm1di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusurvvm1di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv1hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv1hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv2hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv2hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv4hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv4hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv8hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv8hi_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv16hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv16hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv32hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv32hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv64hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv64hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv128hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv128hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv256hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv256hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv512hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv512hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv1024hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv1024hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv2048hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv2048hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv1si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv1si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv2si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv2si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv4si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv4si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv8si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv8si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv16si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv16si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv32si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv32si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv64si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv64si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv128si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv128si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv256si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv256si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv512si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv512si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv1024si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv1024si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv1di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv1di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv2di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv2di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv4di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv4di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv8di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv8di_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv16di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv16di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv32di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv32di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv64di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv64di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv128di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv128di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv256di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv256di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussv512di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plusuv512di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvm8hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvm4hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvm2hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvm1hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvmf2hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvmf4hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvm8si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvm4si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvm2si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvm1si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvmf2si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvm8di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvm4di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvm2di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvm1di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv1hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv2hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv4hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv8hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv16hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv32hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv64hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv128hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv256hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv512hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv1024hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv2048hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv1si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv2si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv4si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv8si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv16si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv32si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv64si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv128si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv256si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv512si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv1024si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv1di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv2di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv4di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv8di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv16di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv32di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv64di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv128di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv256di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv512di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvm8hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvm4hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvm2hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvm1hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvmf2hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvmf4hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvm8si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvm4si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvm2si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvm1si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvmf2si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvm8di_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvm4di_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvm2di_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussurvvm1di_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv1hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv2hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv4hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv8hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv16hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv32hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv64hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv128hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv256hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv512hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv1024hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv2048hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv1si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv2si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv4si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv8si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv16si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv32si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv64si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv128si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv256si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv512si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv1024si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv1di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv2di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv4di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv8di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv16di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv32di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv64di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv128di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv256di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plussuv512di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususrvvm8hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususrvvm4hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususrvvm2hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususrvvm1hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususrvvmf2hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususrvvmf4hi_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususrvvm8si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususrvvm4si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususrvvm2si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususrvvm1si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususrvvmf2si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususrvvm8di_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususrvvm4di_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususrvvm2di_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususrvvm1di_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv1hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv2hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv4hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv8hi_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv16hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv32hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv64hi_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv128hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv256hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv512hi_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv1024hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv2048hi_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv1si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv2si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv4si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv8si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv16si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv32si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv64si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv128si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv256si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv512si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv1024si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv1di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv2di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv4di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv8di_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv16di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv32di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv64di_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv128di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv256di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plususv512di_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvmf64bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvmf64bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvmf64bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvmf32bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvmf32bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvmf32bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvmf16bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvmf16bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvmf16bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvmf8bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvmf8bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvmf8bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvmf4bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvmf4bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvmf4bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvmf2bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvmf2bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvmf2bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm1bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm1bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm1bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv1bi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv1bi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv1bi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv2bi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv2bi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv2bi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv4bi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv4bi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv4bi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv8bi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv8bi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv8bi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv16bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv16bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv16bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv32bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv32bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv32bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv64bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv64bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv64bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv128bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv128bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv128bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv256bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv256bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv256bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv512bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv512bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv512bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv1024bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv1024bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv1024bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv2048bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv2048bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv2048bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv4096bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv4096bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv4096bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nandrvvmf64bi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_niorrvvmf64bi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nxorrvvmf64bi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nandrvvmf32bi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_niorrvvmf32bi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nxorrvvmf32bi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nandrvvmf16bi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_niorrvvmf16bi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nxorrvvmf16bi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nandrvvmf8bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_niorrvvmf8bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nxorrvvmf8bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nandrvvmf4bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_niorrvvmf4bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nxorrvvmf4bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nandrvvmf2bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_niorrvvmf2bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nxorrvvmf2bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nandrvvm1bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_niorrvvm1bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nxorrvvm1bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nandv1bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_niorv1bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nxorv1bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nandv2bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_niorv2bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nxorv2bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nandv4bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_niorv4bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nxorv4bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nandv8bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_niorv8bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nxorv8bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nandv16bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_niorv16bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nxorv16bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nandv32bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_niorv32bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nxorv32bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nandv64bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_niorv64bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nxorv64bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nandv128bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_niorv128bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nxorv128bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nandv256bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_niorv256bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nxorv256bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nandv512bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_niorv512bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nxorv512bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nandv1024bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_niorv1024bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nxorv1024bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nandv2048bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_niorv2048bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nxorv2048bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nandv4096bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_niorv4096bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nxorv4096bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andnotrvvmf64bi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iornotrvvmf64bi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andnotrvvmf32bi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iornotrvvmf32bi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andnotrvvmf16bi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iornotrvvmf16bi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andnotrvvmf8bi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iornotrvvmf8bi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andnotrvvmf4bi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iornotrvvmf4bi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andnotrvvmf2bi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iornotrvvmf2bi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andnotrvvm1bi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iornotrvvm1bi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andnotv1bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iornotv1bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andnotv2bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iornotv2bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andnotv4bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iornotv4bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andnotv8bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iornotv8bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andnotv16bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iornotv16bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andnotv32bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iornotv32bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andnotv64bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iornotv64bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andnotv128bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iornotv128bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andnotv256bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iornotv256bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andnotv512bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iornotv512bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andnotv1024bi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iornotv1024bi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andnotv2048bi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iornotv2048bi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andnotv4096bi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iornotv4096bi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_notrvvmf64bi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_notrvvmf32bi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_notrvvmf16bi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_notrvvmf8bi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_notrvvmf4bi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_notrvvmf2bi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_notrvvm1bi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_notv1bi                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_notv2bi                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_notv4bi                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_notv8bi                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_notv16bi                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_notv32bi                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_notv64bi                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_notv128bi                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_notv256bi                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_notv512bi                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_notv1024bi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_notv2048bi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_notv4096bi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountrvvmf64bisi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountrvvmf64bidi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountrvvmf32bisi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountrvvmf32bidi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountrvvmf16bisi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountrvvmf16bidi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountrvvmf8bisi                        (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountrvvmf8bidi                        (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountrvvmf4bisi                        (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountrvvmf4bidi                        (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountrvvmf2bisi                        (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountrvvmf2bidi                        (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountrvvm1bisi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountrvvm1bidi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv1bisi                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv1bidi                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv2bisi                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv2bidi                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv4bisi                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv4bidi                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv8bisi                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv8bidi                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv16bisi                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv16bidi                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv32bisi                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv32bidi                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv64bisi                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv64bidi                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv128bisi                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv128bidi                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv256bisi                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv256bidi                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv512bisi                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv512bidi                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv1024bisi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv1024bidi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv2048bisi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv2048bidi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv4096bisi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_popcountv4096bidi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsrvvmf64bisi                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsrvvmf64bidi                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsrvvmf32bisi                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsrvvmf32bidi                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsrvvmf16bisi                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsrvvmf16bidi                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsrvvmf8bisi                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsrvvmf8bidi                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsrvvmf4bisi                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsrvvmf4bidi                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsrvvmf2bisi                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsrvvmf2bidi                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsrvvm1bisi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsrvvm1bidi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv1bisi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv1bidi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv2bisi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv2bidi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv4bisi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv4bidi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv8bisi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv8bidi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv16bisi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv16bidi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv32bisi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv32bidi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv64bisi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv64bidi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv128bisi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv128bidi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv256bisi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv256bidi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv512bisi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv512bidi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv1024bisi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv1024bidi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv2048bisi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv2048bidi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv4096bisi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ffsv4096bidi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbfrvvmf64bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sifrvvmf64bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sofrvvmf64bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbfrvvmf32bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sifrvvmf32bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sofrvvmf32bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbfrvvmf16bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sifrvvmf16bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sofrvvmf16bi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbfrvvmf8bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sifrvvmf8bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sofrvvmf8bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbfrvvmf4bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sifrvvmf4bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sofrvvmf4bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbfrvvmf2bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sifrvvmf2bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sofrvvmf2bi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbfrvvm1bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sifrvvm1bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sofrvvm1bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbfv1bi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sifv1bi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sofv1bi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbfv2bi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sifv2bi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sofv2bi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbfv4bi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sifv4bi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sofv4bi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbfv8bi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sifv8bi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sofv8bi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbfv16bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sifv16bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sofv16bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbfv32bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sifv32bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sofv32bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbfv64bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sifv64bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sofv64bi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbfv128bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sifv128bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sofv128bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbfv256bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sifv256bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sofv256bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbfv512bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sifv512bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sofv512bi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbfv1024bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sifv1024bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sofv1024bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbfv2048bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sifv2048bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sofv2048bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbfv4096bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sifv4096bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sofv4096bi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotarvvm8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotarvvm4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotarvvm2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotarvvm1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotarvvm8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotarvvm4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotarvvm2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotarvvm1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotarvvm8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotarvvm4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotarvvm2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotarvvm1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotarvvm8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotarvvm4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotarvvm2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotarvvm1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotarvvmf2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotarvvmf4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotarvvmf8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotarvvmf2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotarvvmf4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotarvvmf2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav1qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav2qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav4qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav8qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav16qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav32qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav64qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav128qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav256qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav512qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav1024qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav2048qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav4096qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav1hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav2hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav4hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav8hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav16hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav32hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav64hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav128hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav256hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav512hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav1024hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav2048hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav1si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav2si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav4si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav8si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav16si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav32si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav64si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav128si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav256si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav512si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav1024si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav1di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav2di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav4di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav8di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav16di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav32di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav64di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav128di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav256di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iotav512di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesrvvm8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesrvvm4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesrvvm2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesrvvm1qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesrvvm8hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesrvvm4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesrvvm2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesrvvm1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesrvvm8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesrvvm4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesrvvm2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesrvvm1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesrvvm8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesrvvm4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesrvvm2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesrvvm1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesrvvmf2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesrvvmf4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesrvvmf8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesrvvmf2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesrvvmf4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesrvvmf2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv16qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv32qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv64qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv128qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv256qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv512qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv1024qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv2048qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv4096qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv16hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv32hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv64hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv128hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv256hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv512hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv1024hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv2048hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv16si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv32si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv64si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv128si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv256si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv512si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv1024si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv16di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv32di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv64di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv128di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv256di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_seriesv512di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm8hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm8hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm8hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm8hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm4hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm4hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm4hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm4hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm2hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm2hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm2hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm2hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm1hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm1hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm1hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm1hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvmf2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvmf2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvmf2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvmf4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvmf4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvmf4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm8sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm8sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm8sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm8sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm4sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm4sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm4sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm4sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm2sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm2sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm2sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm2sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm1sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm1sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm1sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm1sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvmf2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvmf2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvmf2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm8df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm8df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm8df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm8df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm4df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm4df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm4df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm4df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm2df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm2df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm2df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm2df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm1df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm1df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm1df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm1df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv1hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv1hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv2hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv2hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv2hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv4hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv4hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv4hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv4hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv8hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv8hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv8hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv8hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv16hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv16hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv16hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv16hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv32hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv32hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv32hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv32hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv64hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv64hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv64hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv64hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv128hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv128hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv128hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv128hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv256hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv256hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv256hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv256hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv512hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv512hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv512hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv512hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv1024hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv1024hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1024hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1024hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv2048hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv2048hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2048hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv2048hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv1sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv1sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv2sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv2sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv2sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv4sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv4sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv4sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv4sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv8sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv8sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv8sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv8sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv16sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv16sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv16sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv16sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv32sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv32sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv32sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv32sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv64sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv64sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv64sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv64sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv128sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv128sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv128sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv128sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv256sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv256sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv256sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv256sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv512sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv512sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv512sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv512sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv1024sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv1024sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1024sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1024sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv1df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv1df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv2df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv2df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv2df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv4df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv4df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv4df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv4df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv8df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv8df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv8df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv8df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv16df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv16df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv16df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv16df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv32df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv32df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv32df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv32df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv64df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv64df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv64df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv64df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv128df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv128df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv128df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv128df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv256df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv256df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv256df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv256df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv512df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv512df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv512df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv512df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm8hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm8hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm1hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm1hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvmf2hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvmf2hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvmf4hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvmf4hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm8sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm8sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm4sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm4sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm1sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm1sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvmf2sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvmf2sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm8df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm8df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm4df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm4df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm2df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm2df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm1df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm1df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv1hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv1hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv2hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv2hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv4hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv4hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv8hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv8hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv16hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv16hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv32hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv32hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv64hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv64hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv128hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv128hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv256hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv256hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv512hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv512hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv1024hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv1024hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv2048hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv2048hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv1sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv1sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv2sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv2sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv4sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv4sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv8sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv8sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv16sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv16sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv32sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv32sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv64sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv64sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv128sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv128sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv256sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv256sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv512sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv512sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv1024sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv1024sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv1df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv1df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv2df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv2df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv4df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv4df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv8df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv8df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv16df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv16df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv32df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv32df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv64df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv64df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv128df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv128df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv256df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv256df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv512df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv512df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvm8hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvm8hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvm4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvm4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvm2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvm2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvm1hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvm1hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvmf2hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvmf2hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvmf4hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvmf4hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvm8sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvm8sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvm4sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvm4sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvm2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvm2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvm1sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvm1sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvmf2sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvmf2sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvm8df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvm8df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvm4df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvm4df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvm2df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvm2df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvm1df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvm1df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv1hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv1hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv2hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv2hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv4hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv4hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv8hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv8hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv16hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv16hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv32hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv32hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv64hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv64hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv128hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv128hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv256hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv256hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv512hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv512hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv1024hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv1024hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv2048hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv2048hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv1sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv1sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv2sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv2sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv4sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv4sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv8sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv8sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv16sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv16sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv32sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv32sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv64sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv64sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv128sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv128sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv256sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv256sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv512sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv512sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv1024sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv1024sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv1df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv1df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv2df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv2df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv4df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv4df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv8df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv8df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv16df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv16df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv32df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv32df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv64df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv64df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv128df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv128df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv256df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv256df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv512df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv512df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm8hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm8hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm4hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm4hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm2hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm2hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm1hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm1hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvmf2hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvmf2hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvmf4hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvmf4hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm8sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm8sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm4sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm4sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm2sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm2sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm1sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm1sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvmf2sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvmf2sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm8df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm8df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm4df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm4df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm2df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm2df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm1df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm1df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv1hf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv1hf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv2hf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv2hf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv4hf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv4hf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv8hf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv8hf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv16hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv16hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv32hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv32hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv64hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv64hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv128hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv128hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv256hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv256hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv512hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv512hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv1024hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv1024hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv2048hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv2048hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv1sf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv1sf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv2sf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv2sf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv4sf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv4sf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv8sf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv8sf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv16sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv16sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv32sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv32sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv64sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv64sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv128sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv128sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv256sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv256sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv512sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv512sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv1024sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv1024sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv1df_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv1df_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv2df_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv2df_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv4df_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv4df_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv8df_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv8df_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv16df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv16df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv32df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv32df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv64df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv64df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv128df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv128df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv256df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv256df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv512df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv512df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm8hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm8hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm4hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm4hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm2hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm2hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm1hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm1hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvmf2hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvmf2hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvmf4hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvmf4hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm8sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm8sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm4sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm4sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm2sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm2sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm1sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm1sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvmf2sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvmf2sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm8df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm8df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm4df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm4df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm2df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm2df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm1df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm1df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv1hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv1hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv2hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv2hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv4hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv4hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv8hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv8hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv16hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv16hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv32hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv32hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv64hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv64hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv128hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv128hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv256hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv256hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv512hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv512hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv1024hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv1024hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv2048hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv2048hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv1sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv1sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv2sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv2sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv4sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv4sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv8sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv8sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv16sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv16sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv32sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv32sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv64sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv64sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv128sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv128sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv256sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv256sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv512sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv512sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv1024sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv1024sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv1df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv1df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv2df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv2df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv4df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv4df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv8df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv8df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv16df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv16df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv32df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv32df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv64df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv64df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv128df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv128df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv256df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv256df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv512df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv512df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvm8hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvm8hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvm4hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvm4hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvm2hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvm2hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvm1hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvm1hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvmf2hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvmf2hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvmf4hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvmf4hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvm8sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvm8sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvm4sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvm4sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvm2sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvm2sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvm1sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvm1sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvmf2sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvmf2sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvm8df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvm8df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvm4df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvm4df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvm2df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvm2df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxrvvm1df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminrvvm1df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv1hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv1hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv2hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv2hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv4hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv4hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv8hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv8hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv16hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv16hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv32hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv32hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv64hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv64hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv128hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv128hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv256hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv256hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv512hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv512hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv1024hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv1024hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv2048hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv2048hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv1sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv1sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv2sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv2sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv4sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv4sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv8sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv8sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv16sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv16sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv32sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv32sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv64sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv64sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv128sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv128sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv256sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv256sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv512sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv512sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv1024sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv1024sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv1df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv1df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv2df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv2df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv4df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv4df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv8df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv8df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv16df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv16df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv32df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv32df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv64df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv64df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv128df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv128df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv256df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv256df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fmaxv512df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fminv512df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm8hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm8hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm4hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm4hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm2hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm2hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm1hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm1hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf2hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvmf2hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf4hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvmf4hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm8sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm8sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm4sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm4sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm2sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm2sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm1sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm1sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf2sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvmf2sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm8df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm8df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm4df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm4df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm2df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm2df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm1df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm1df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1hf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1hf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2hf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv2hf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv4hf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv4hf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv8hf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv8hf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv16hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv16hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv32hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv32hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv64hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv64hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv128hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv128hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv256hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv256hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv512hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv512hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1024hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1024hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2048hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv2048hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1sf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1sf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2sf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv2sf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv4sf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv4sf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv8sf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv8sf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv16sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv16sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv32sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv32sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv64sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv64sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv128sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv128sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv256sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv256sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv512sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv512sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1024sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1024sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1df_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1df_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2df_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv2df_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv4df_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv4df_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv8df_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv8df_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv16df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv16df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv32df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv32df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv64df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv64df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv128df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv128df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv256df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv256df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv512df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv512df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm8hf_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm8hf_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm4hf_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm4hf_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm2hf_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm2hf_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm1hf_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm1hf_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf2hf_reverse_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvmf2hf_reverse_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf4hf_reverse_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvmf4hf_reverse_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm8sf_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm8sf_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm4sf_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm4sf_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm2sf_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm2sf_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm1sf_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm1sf_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvmf2sf_reverse_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvmf2sf_reverse_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm8df_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm8df_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm4df_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm4df_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm2df_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm2df_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm1df_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm1df_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1hf_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1hf_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2hf_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv2hf_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv4hf_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv4hf_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv8hf_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv8hf_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv16hf_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv16hf_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv32hf_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv32hf_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv64hf_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv64hf_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv128hf_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv128hf_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv256hf_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv256hf_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv512hf_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv512hf_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1024hf_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1024hf_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2048hf_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv2048hf_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1sf_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1sf_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2sf_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv2sf_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv4sf_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv4sf_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv8sf_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv8sf_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv16sf_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv16sf_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv32sf_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv32sf_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv64sf_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv64sf_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv128sf_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv128sf_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv256sf_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv256sf_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv512sf_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv512sf_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1024sf_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1024sf_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1df_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1df_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2df_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv2df_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv4df_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv4df_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv8df_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv8df_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv16df_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv16df_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv32df_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv32df_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv64df_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv64df_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv128df_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv128df_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv256df_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv256df_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv512df_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv512df_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvm8hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvm8hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvm4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvm4hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvm2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvm2hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvm1hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvm1hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvmf2hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvmf2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvmf4hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvmf4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvm8sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvm8sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvm4sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvm4sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvm2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvm2sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvm1sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvm1sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvmf2sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvmf2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvm8df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvm8df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvm4df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvm4df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvm2df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvm2df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvm1df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvm1df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv1hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv1hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv2hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv4hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv8hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv8hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv16hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv16hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv32hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv32hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv64hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv64hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv128hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv128hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv256hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv256hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv512hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv512hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv1024hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv1024hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv2048hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv2048hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv1sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv1sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv2sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv4sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv4sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv8sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv8sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv16sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv16sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv32sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv32sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv64sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv64sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv128sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv128sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv256sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv256sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv512sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv512sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv1024sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv1024sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv1df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv1df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv2df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv2df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv4df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv4df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv8df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv8df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv16df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv16df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv32df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv32df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv64df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv64df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv128df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv128df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv256df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv256df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv512df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv512df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvm8hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvm4hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvm2hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvm1hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvmf2hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvmf4hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvm8sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvm4sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvm2sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvm1sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvmf2sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvm8df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvm4df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvm2df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvm1df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv1hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv2hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv4hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv8hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv16hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv32hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv64hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv128hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv256hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv512hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv1024hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv2048hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv1sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv2sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv4sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv8sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv16sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv32sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv64sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv128sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv256sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv512sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv1024sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv1df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv2df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv4df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv8df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv16df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv32df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv64df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv128df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv256df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv512df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvm8hf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvm8hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvm4hf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvm4hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvm2hf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvm2hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvm1hf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvm1hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvmf2hf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvmf2hf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvmf4hf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvmf4hf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvm8sf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvm8sf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvm4sf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvm4sf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvm2sf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvm2sf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvm1sf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvm1sf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvmf2sf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvmf2sf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvm8df_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvm8df_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvm4df_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvm4df_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvm2df_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvm2df_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignrvvm1df_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignrvvm1df_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv1hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv1hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv2hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv2hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv4hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv4hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv8hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv8hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv16hf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv16hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv32hf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv32hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv64hf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv64hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv128hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv128hf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv256hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv256hf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv512hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv512hf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv1024hf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv1024hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv2048hf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv2048hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv1sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv1sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv2sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv2sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv4sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv4sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv8sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv8sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv16sf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv16sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv32sf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv32sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv64sf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv64sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv128sf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv128sf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv256sf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv256sf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv512sf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv512sf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv1024sf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv1024sf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv1df_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv1df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv2df_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv2df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv4df_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv4df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv8df_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv8df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv16df_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv16df_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv32df_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv32df_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv64df_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv64df_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv128df_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv128df_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv256df_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv256df_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_copysignv512df_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorsignv512df_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvm8hf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvm4hf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvm2hf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvm1hf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvmf2hf_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvmf4hf_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvm8sf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvm4sf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvm2sf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvm1sf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvmf2sf_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvm8df_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvm4df_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvm2df_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignrvvm1df_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv1hf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv2hf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv4hf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv8hf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv16hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv32hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv64hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv128hf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv256hf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv512hf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv1024hf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv2048hf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv1sf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv2sf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv4sf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv8sf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv16sf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv32sf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv64sf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv128sf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv256sf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv512sf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv1024sf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv1df_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv2df_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv4df_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv8df_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv16df_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv32df_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv64df_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv128df_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv256df_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ncopysignv512df_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtrvvm8hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtrvvm4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtrvvm2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtrvvm1hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtrvvmf2hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtrvvmf4hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtrvvm8sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtrvvm4sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtrvvm2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtrvvm1sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtrvvmf2sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtrvvm8df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtrvvm4df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtrvvm2df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtrvvm1df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv1hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv2hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv4hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv8hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv16hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv32hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv64hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv128hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv256hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv512hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv1024hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv2048hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv1sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv2sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv4sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv8sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv16sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv32sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv64sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv128sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv256sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv512sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv1024sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv1df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv2df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv4df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv8df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv16df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv32df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv64df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv128df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv256df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sqrtv512df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm8hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absrvvm8hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm4hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absrvvm4hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm2hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absrvvm2hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm1hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absrvvm1hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvmf2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absrvvmf2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvmf4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absrvvmf4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm8sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absrvvm8sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm4sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absrvvm4sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm2sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absrvvm2sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm1sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absrvvm1sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvmf2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absrvvmf2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm8df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absrvvm8df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm4df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absrvvm4df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm2df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absrvvm2df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negrvvm1df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absrvvm1df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv1hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv1hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv2hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv2hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv4hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv4hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv8hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv8hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv16hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv16hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv32hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv32hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv64hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv64hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv128hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv128hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv256hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv256hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv512hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv512hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv1024hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv1024hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv2048hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv2048hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv1sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv1sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv2sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv2sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv4sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv4sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv8sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv8sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv16sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv16sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv32sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv32sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv64sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv64sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv128sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv128sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv256sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv256sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv512sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv512sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv1024sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv1024sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv1df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv1df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv2df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv2df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv4df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv4df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv8df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv8df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv16df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv16df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv32df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv32df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv64df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv64df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv128df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv128df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv256df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv256df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_negv512df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_absv512df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7rvvm8hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7rvvm4hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7rvvm2hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7rvvm1hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7rvvmf2hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7rvvmf4hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7rvvm8sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7rvvm4sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7rvvm2sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7rvvm1sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7rvvmf2sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7rvvm8df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7rvvm4df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7rvvm2df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7rvvm1df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v1hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v2hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v4hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v8hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v16hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v32hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v64hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v128hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v256hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v512hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v1024hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v2048hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v1sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v2sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v4sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v8sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v16sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v32sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v64sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v128sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v256sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v512sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v1024sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v1df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v2df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v4df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v8df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v16df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v32df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v64df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v128df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v256df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rsqrt7v512df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7rvvm8hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7rvvm4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7rvvm2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7rvvm1hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7rvvmf2hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7rvvmf4hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7rvvm8sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7rvvm4sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7rvvm2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7rvvm1sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7rvvmf2sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7rvvm8df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7rvvm4df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7rvvm2df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7rvvm1df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v1hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v2hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v4hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v8hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v16hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v32hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v64hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v128hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v256hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v512hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v1024hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v2048hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v1sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v2sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v4sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v8sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v16sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v32sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v64sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v128sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v256sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v512sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v1024sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v1df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v2df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v4df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v8df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v16df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v32df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v64df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v128df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v256df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rec7v512df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classrvvm8hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classrvvm4hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classrvvm2hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classrvvm1hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classrvvmf2hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classrvvmf4hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classrvvm8sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classrvvm4sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classrvvm2sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classrvvm1sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classrvvmf2sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classrvvm8df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classrvvm4df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classrvvm2df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classrvvm1df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv1hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv2hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv4hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv8hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv16hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv32hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv64hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv128hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv256hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv512hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv1024hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv2048hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv1sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv2sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv4sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv8sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv16sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv32sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv64sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv128sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv256sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv512sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv1024sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv1df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv2df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv4df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv8df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv16df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv32df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv64df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv128df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv256df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_classv512df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addrvvm8sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subrvvm8sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulrvvm8sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addrvvm4sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subrvvm4sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulrvvm4sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addrvvm2sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subrvvm2sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulrvvm2sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addrvvm1sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subrvvm1sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulrvvm1sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addrvvmf2sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subrvvmf2sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulrvvmf2sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addrvvm8df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subrvvm8df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulrvvm8df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addrvvm4df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subrvvm4df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulrvvm4df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addrvvm2df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subrvvm2df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulrvvm2df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addrvvm1df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subrvvm1df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulrvvm1df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv1sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv1sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv1sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv2sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv2sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv2sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv4sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv4sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv4sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv8sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv8sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv8sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv16sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv16sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv16sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv32sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv32sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv32sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv64sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv64sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv64sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv128sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv128sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv128sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv256sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv256sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv256sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv512sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv512sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv512sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv1024sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv1024sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv1024sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv1df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv1df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv1df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv2df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv2df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv2df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv4df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv4df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv4df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv8df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv8df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv8df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv16df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv16df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv16df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv32df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv32df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv32df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv64df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv64df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv64df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv128df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv128df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv128df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv256df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv256df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv256df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv512df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv512df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv512df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addrvvm8sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subrvvm8sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulrvvm8sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addrvvm4sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subrvvm4sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulrvvm4sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addrvvm2sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subrvvm2sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulrvvm2sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addrvvm1sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subrvvm1sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulrvvm1sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addrvvmf2sf_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subrvvmf2sf_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulrvvmf2sf_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addrvvm8df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subrvvm8df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulrvvm8df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addrvvm4df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subrvvm4df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulrvvm4df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addrvvm2df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subrvvm2df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulrvvm2df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addrvvm1df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subrvvm1df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulrvvm1df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv1sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv1sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv1sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv2sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv2sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv2sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv4sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv4sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv4sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv8sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv8sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv8sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv16sf_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv16sf_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv16sf_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv32sf_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv32sf_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv32sf_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv64sf_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv64sf_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv64sf_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv128sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv128sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv128sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv256sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv256sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv256sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv512sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv512sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv512sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv1024sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv1024sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv1024sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv1df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv1df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv1df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv2df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv2df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv2df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv4df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv4df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv4df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv8df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv8df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv8df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv16df_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv16df_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv16df_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv32df_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv32df_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv32df_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv64df_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv64df_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv64df_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv128df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv128df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv128df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv256df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv256df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv256df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_addv512df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_subv512df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_dual_widen_mulv512df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addrvvm8sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addrvvm4sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addrvvm2sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addrvvm1sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addrvvmf2sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addrvvm8df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addrvvm4df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addrvvm2df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addrvvm1df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv1sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv2sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv4sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv8sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv16sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv32sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv64sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv128sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv256sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv512sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv1024sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv1df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv2df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv4df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv8df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv16df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv32df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv64df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv128df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv256df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv512df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subrvvm8sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subrvvm4sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subrvvm2sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subrvvm1sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subrvvmf2sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subrvvm8df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subrvvm4df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subrvvm2df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subrvvm1df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv1sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv2sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv4sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv8sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv16sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv32sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv64sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv128sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv256sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv512sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv1024sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv1df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv2df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv4df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv8df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv16df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv32df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv64df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv128df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv256df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv512df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addrvvm8sf_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subrvvm8sf_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addrvvm4sf_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subrvvm4sf_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addrvvm2sf_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subrvvm2sf_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addrvvm1sf_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subrvvm1sf_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addrvvmf2sf_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subrvvmf2sf_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addrvvm8df_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subrvvm8df_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addrvvm4df_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subrvvm4df_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addrvvm2df_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subrvvm2df_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addrvvm1df_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subrvvm1df_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv1sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv1sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv2sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv2sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv4sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv4sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv8sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv8sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv16sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv16sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv32sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv32sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv64sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv64sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv128sf_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv128sf_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv256sf_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv256sf_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv512sf_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv512sf_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv1024sf_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv1024sf_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv1df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv1df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv2df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv2df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv4df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv4df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv8df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv8df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv16df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv16df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv32df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv32df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv64df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv64df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv128df_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv128df_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv256df_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv256df_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_addv512df_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_single_widen_subv512df_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addrvvm8sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subrvvm8sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addrvvm4sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subrvvm4sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addrvvm2sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subrvvm2sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addrvvm1sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subrvvm1sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addrvvmf2sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subrvvmf2sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addrvvm8df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subrvvm8df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addrvvm4df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subrvvm4df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addrvvm2df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subrvvm2df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addrvvm1df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subrvvm1df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv1sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv1sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv2sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv2sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv4sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv4sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv8sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv8sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv16sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv16sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv32sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv32sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv64sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv64sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv128sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv128sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv256sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv256sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv512sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv512sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv1024sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv1024sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv1df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv1df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv2df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv2df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv4df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv4df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv8df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv8df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv16df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv16df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv32df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv32df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv64df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv64df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv128df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv128df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv256df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv256df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv512df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv512df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addrvvm8sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subrvvm8sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addrvvm4sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subrvvm4sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addrvvm2sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subrvvm2sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addrvvm1sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subrvvm1sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addrvvmf2sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subrvvmf2sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addrvvm8df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subrvvm8df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addrvvm4df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subrvvm4df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addrvvm2df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subrvvm2df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addrvvm1df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subrvvm1df_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv1sf_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv1sf_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv2sf_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv2sf_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv4sf_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv4sf_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv8sf_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv8sf_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv16sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv16sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv32sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv32sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv64sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv64sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv128sf_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv128sf_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv256sf_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv256sf_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv512sf_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv512sf_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv1024sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv1024sf_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv1df_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv1df_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv2df_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv2df_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv4df_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv4df_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv8df_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv8df_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv16df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv16df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv32df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv32df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv64df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv64df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv128df_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv128df_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv256df_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv256df_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_addv512df_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_subv512df_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addrvvm8sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subrvvm8sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addrvvm4sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subrvvm4sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addrvvm2sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subrvvm2sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addrvvm1sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subrvvm1sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addrvvmf2sf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subrvvmf2sf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addrvvm8df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subrvvm8df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addrvvm4df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subrvvm4df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addrvvm2df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subrvvm2df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addrvvm1df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subrvvm1df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv1sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv1sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv2sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv2sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv4sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv4sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv8sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv8sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv16sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv16sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv32sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv32sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv64sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv64sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv128sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv128sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv256sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv256sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv512sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv512sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv1024sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv1024sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv1df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv1df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv2df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv2df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv4df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv4df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv8df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv8df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv16df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv16df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv32df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv32df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv64df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv64df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv128df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv128df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv256df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv256df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv512df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv512df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addrvvm8sf_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subrvvm8sf_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addrvvm4sf_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subrvvm4sf_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addrvvm2sf_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subrvvm2sf_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addrvvm1sf_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subrvvm1sf_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addrvvmf2sf_scalar          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subrvvmf2sf_scalar          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addrvvm8df_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subrvvm8df_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addrvvm4df_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subrvvm4df_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addrvvm2df_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subrvvm2df_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addrvvm1df_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subrvvm1df_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv1sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv1sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv2sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv2sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv4sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv4sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv8sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv8sf_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv16sf_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv16sf_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv32sf_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv32sf_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv64sf_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv64sf_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv128sf_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv128sf_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv256sf_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv256sf_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv512sf_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv512sf_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv1024sf_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv1024sf_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv1df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv1df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv2df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv2df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv4df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv4df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv8df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv8df_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv16df_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv16df_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv32df_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv32df_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv64df_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv64df_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv128df_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv128df_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv256df_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv256df_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_addv512df_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_neg_subv512df_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm8hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm4hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm2hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm1hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvmf2hf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvmf4hf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm8sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm4sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm2sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm1sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvmf2sf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm8df_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm4df_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm2df_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm1df_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev2hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev4hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev8hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev16hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev32hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev64hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev128hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev256hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev512hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1024hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev2048hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev2sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev4sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev8sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev16sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev32sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev64sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev128sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev256sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev512sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1024sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev2df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev4df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev8df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev16df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev32df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev64df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev128df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev256df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev512df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_frvvm8hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_frvvm8hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_frvvm4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_frvvm4hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_frvvm2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_frvvm2hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_frvvm1hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_frvvm1hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_frvvmf2hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_frvvmf2hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_frvvmf4hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_frvvmf4hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_frvvm8sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_frvvm8sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_frvvm4sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_frvvm4sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_frvvm2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_frvvm2sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_frvvm1sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_frvvm1sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_frvvmf2sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_frvvmf2sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_frvvm8df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_frvvm8df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_frvvm4df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_frvvm4df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_frvvm2df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_frvvm2df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_frvvm1df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_frvvm1df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv1hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv1hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv2hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv2hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv4hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv4hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv8hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv8hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv16hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv16hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv32hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv32hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv64hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv64hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv128hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv128hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv256hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv256hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv512hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv512hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv1024hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv1024hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv2048hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv2048hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv1sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv1sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv2sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv2sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv4sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv4sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv8sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv8sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv16sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv16sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv32sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv32sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv64sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv64sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv128sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv128sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv256sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv256sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv512sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv512sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv1024sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv1024sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv1df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv1df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv2df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv2df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv4df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv4df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv8df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv8df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv16df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv16df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv32df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv32df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv64df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv64df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv128df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv128df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv256df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv256df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_x_fv512df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fcvt_xu_fv512df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncrvvm8hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncrvvm8hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncrvvm4hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncrvvm4hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncrvvm2hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncrvvm2hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncrvvm1hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncrvvm1hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncrvvmf2hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncrvvmf2hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncrvvmf4hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncrvvmf4hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncrvvm8sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncrvvm8sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncrvvm4sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncrvvm4sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncrvvm2sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncrvvm2sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncrvvm1sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncrvvm1sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncrvvmf2sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncrvvmf2sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncrvvm8df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncrvvm8df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncrvvm4df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncrvvm4df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncrvvm2df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncrvvm2df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncrvvm1df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncrvvm1df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv1hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv1hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv2hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv2hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv4hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv4hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv8hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv8hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv16hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv16hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv32hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv32hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv64hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv64hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv128hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv128hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv256hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv256hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv512hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv512hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv1024hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv1024hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv2048hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv2048hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv1sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv1sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv2sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv2sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv4sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv4sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv8sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv8sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv16sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv16sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv32sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv32sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv64sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv64sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv128sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv128sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv256sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv256sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv512sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv512sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv1024sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv1024sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv1df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv1df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv2df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv2df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv4df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv4df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv8df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv8df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv16df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv16df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv32df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv32df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv64df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv64df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv128df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv128df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv256df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv256df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fix_truncv512df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fixuns_truncv512df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatrvvm8hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsrvvm8hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatrvvm4hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsrvvm4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatrvvm2hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsrvvm2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatrvvm1hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsrvvm1hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatrvvmf2hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsrvvmf2hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatrvvmf4hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsrvvmf4hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatrvvm8sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsrvvm8sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatrvvm4sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsrvvm4sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatrvvm2sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsrvvm2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatrvvm1sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsrvvm1sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatrvvmf2sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsrvvmf2sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatrvvm8df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsrvvm8df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatrvvm4df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsrvvm4df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatrvvm2df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsrvvm2df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatrvvm1df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsrvvm1df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv1hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv1hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv2hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv2hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv4hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv4hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv8hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv8hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv16hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv16hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv32hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv32hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv64hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv64hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv128hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv128hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv256hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv256hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv512hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv512hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv1024hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv1024hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv2048hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv2048hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv1sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv1sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv2sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv2sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv4sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv4sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv8sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv8sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv16sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv16sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv32sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv32sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv64sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv64sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv128sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv128sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv256sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv256sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv512sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv512sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv1024sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv1024sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv1df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv1df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv2df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv2df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv4df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv4df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv8df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv8df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv16df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv16df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv32df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv32df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv64df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv64df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv128df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv128df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv256df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv256df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatv512df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_floatunsv512df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_frvvm8si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_frvvm8si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_frvvm4si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_frvvm4si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_frvvm2si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_frvvm2si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_frvvm1si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_frvvm1si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_frvvmf2si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_frvvmf2si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_frvvm8di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_frvvm8di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_frvvm4di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_frvvm4di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_frvvm2di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_frvvm2di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_frvvm1di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_frvvm1di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_fv1si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_fv1si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_fv2si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_fv2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_fv4si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_fv4si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_fv8si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_fv8si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_fv16si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_fv16si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_fv32si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_fv32si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_fv64si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_fv64si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_fv128si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_fv128si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_fv256si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_fv256si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_fv512si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_fv512si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_fv1024si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_fv1024si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_fv1di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_fv1di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_fv2di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_fv2di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_fv4di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_fv4di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_fv8di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_fv8di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_fv16di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_fv16di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_fv32di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_fv32di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_fv64di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_fv64di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_fv128di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_fv128di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_fv256di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_fv256di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_x_fv512di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fcvt_xu_fv512di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncrvvm8si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncrvvm8si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncrvvm4si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncrvvm4si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncrvvm2si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncrvvm2si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncrvvm1si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncrvvm1si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncrvvmf2si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncrvvmf2si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncrvvm8di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncrvvm8di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncrvvm4di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncrvvm4di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncrvvm2di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncrvvm2di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncrvvm1di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncrvvm1di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncv1si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncv1si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncv2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncv2si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncv4si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncv4si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncv8si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncv8si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncv16si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncv16si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncv32si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncv32si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncv64si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncv64si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncv128si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncv128si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncv256si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncv256si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncv512si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncv512si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncv1024si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncv1024si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncv1di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncv1di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncv2di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncv2di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncv4di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncv4di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncv8di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncv8di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncv16di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncv16di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncv32di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncv32di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncv64di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncv64di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncv128di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncv128di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncv256di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncv256di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fix_truncv512di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_fixuns_truncv512di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatrvvm8hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsrvvm8hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatrvvm4hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsrvvm4hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatrvvm2hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsrvvm2hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatrvvm1hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsrvvm1hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatrvvmf2hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsrvvmf2hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatrvvmf4hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsrvvmf4hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatrvvm8sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsrvvm8sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatrvvm4sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsrvvm4sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatrvvm2sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsrvvm2sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatrvvm1sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsrvvm1sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatrvvmf2sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsrvvmf2sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatrvvm8df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsrvvm8df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatrvvm4df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsrvvm4df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatrvvm2df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsrvvm2df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatrvvm1df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsrvvm1df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv1hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv1hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv2hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv4hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv8hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv8hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv16hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv16hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv32hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv32hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv64hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv64hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv128hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv128hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv256hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv256hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv512hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv512hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv1024hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv1024hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv2048hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv2048hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv1sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv1sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv2sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv4sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv4sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv8sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv8sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv16sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv16sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv32sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv32sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv64sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv64sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv128sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv128sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv256sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv256sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv512sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv512sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv1024sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv1024sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv1df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv1df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv2df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv2df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv4df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv4df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv8df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv8df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv16df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv16df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv32df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv32df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv64df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv64df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv128df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv128df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv256df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv256df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatv512df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_floatunsv512df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm8sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm4sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm2sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm1sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvmf2sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm8df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm4df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm2df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendrvvm1df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv1sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv2sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv4sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv8sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv16sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv32sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv64sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv128sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv256sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv512sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv1024sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv1df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv2df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv4df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv8df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv16df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv32df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv64df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv128df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv256df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extendv512df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_frvvm8hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_frvvm8hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_frvvm4hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_frvvm4hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_frvvm2hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_frvvm2hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_frvvm1hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_frvvm1hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_frvvmf2hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_frvvmf2hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_frvvmf4hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_frvvmf4hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_frvvm8sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_frvvm8sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_frvvm4sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_frvvm4sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_frvvm2sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_frvvm2sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_frvvm1sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_frvvm1sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_frvvmf2sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_frvvmf2sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_frvvm8df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_frvvm8df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_frvvm4df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_frvvm4df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_frvvm2df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_frvvm2df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_frvvm1df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_frvvm1df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv1hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv1hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv2hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv2hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv4hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv4hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv8hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv8hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv16hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv16hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv32hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv32hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv64hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv64hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv128hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv128hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv256hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv256hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv512hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv512hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv1024hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv1024hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv2048hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv2048hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv1sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv1sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv2sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv2sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv4sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv4sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv8sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv8sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv16sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv16sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv32sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv32sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv64sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv64sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv128sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv128sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv256sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv256sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv512sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv512sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv1024sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv1024sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv1df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv1df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv2df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv2df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv4df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv4df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv8df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv8df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv16df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv16df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv32df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv32df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv64df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv64df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv128df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv128df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv256df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv256df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_x_fv512df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fcvt_xu_fv512df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncrvvm8hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncrvvm8hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncrvvm4hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncrvvm4hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncrvvm2hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncrvvm2hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncrvvm1hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncrvvm1hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncrvvmf2hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncrvvmf2hf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncrvvmf4hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncrvvmf4hf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncrvvm8sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncrvvm8sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncrvvm4sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncrvvm4sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncrvvm2sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncrvvm2sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncrvvm1sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncrvvm1sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncrvvmf2sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncrvvmf2sf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncrvvm8df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncrvvm8df                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncrvvm4df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncrvvm4df                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncrvvm2df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncrvvm2df                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncrvvm1df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncrvvm1df                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv1hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv1hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv2hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv2hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv4hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv4hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv8hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv8hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv16hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv16hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv32hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv32hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv64hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv64hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv128hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv128hf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv256hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv256hf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv512hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv512hf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv1024hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv1024hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv2048hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv2048hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv1sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv1sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv2sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv2sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv4sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv4sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv8sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv8sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv16sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv16sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv32sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv32sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv64sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv64sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv128sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv128sf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv256sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv256sf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv512sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv512sf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv1024sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv1024sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv1df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv1df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv2df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv2df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv4df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv4df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv8df                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv8df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv16df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv16df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv32df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv32df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv64df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv64df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv128df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv128df                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv256df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv256df                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fix_truncv512df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_fixuns_truncv512df                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatrvvm8si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsrvvm8si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatrvvm4si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsrvvm4si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatrvvm2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsrvvm2si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatrvvm1si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsrvvm1si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatrvvmf2si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsrvvmf2si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatrvvm8di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsrvvm8di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatrvvm4di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsrvvm4di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatrvvm2di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsrvvm2di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatrvvm1di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsrvvm1di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatv1si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsv1si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatv2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsv2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatv4si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsv4si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatv8si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsv8si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatv16si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsv16si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatv32si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsv32si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatv64si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsv64si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatv128si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsv128si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatv256si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsv256si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatv512si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsv512si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatv1024si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsv1024si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatv1di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsv1di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatv2di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsv2di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatv4di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsv4di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatv8di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsv8di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatv16di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsv16di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatv32di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsv32di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatv64di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsv64di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatv128di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsv128di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatv256di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsv256di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatv512di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_narrow_floatunsv512di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvm8sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvm4sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvm2sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvm1sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvmf2sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvm8df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvm4df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvm2df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvm1df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv1sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv2sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv4sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv8sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv16sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv32sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv64sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv128sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv256sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv512sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv1024sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv1df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv2df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv4df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv8df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv16df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv32df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv64df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv128df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv256df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncv512df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncrvvm8sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncrvvm4sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncrvvm2sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncrvvm1sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncrvvmf2sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncrvvm8df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncrvvm4df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncrvvm2df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncrvvm1df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncv1sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncv2sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncv4sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncv8sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncv16sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncv32sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncv64sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncv128sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncv256sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncv512sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncv1024sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncv1df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncv2df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncv4df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncv8df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncv16df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncv32df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncv64df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncv128df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncv256df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_rod_truncv512df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumrvvm8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxurvvm8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminurvvm8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandrvvm8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorrvvm8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorrvvm8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumrvvm4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxurvvm4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminurvvm4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandrvvm4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorrvvm4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorrvvm4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumrvvm2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxurvvm2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminurvvm2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandrvvm2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorrvvm2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorrvvm2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumrvvm1qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxurvvm1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm1qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminurvvm1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm1qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandrvvm1qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorrvvm1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorrvvm1qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumrvvm8hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxurvvm8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm8hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminurvvm8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm8hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandrvvm8hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorrvvm8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorrvvm8hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumrvvm4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxurvvm4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminurvvm4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandrvvm4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorrvvm4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorrvvm4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumrvvm2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxurvvm2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminurvvm2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandrvvm2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorrvvm2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorrvvm2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumrvvm1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxurvvm1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminurvvm1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandrvvm1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorrvvm1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorrvvm1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumrvvm8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxurvvm8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminurvvm8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandrvvm8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorrvvm8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorrvvm8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumrvvm4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxurvvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminurvvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandrvvm4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorrvvm4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorrvvm4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumrvvm2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxurvvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminurvvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandrvvm2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorrvvm2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorrvvm2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumrvvm1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxurvvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminurvvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandrvvm1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorrvvm1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorrvvm1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumrvvm8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxurvvm8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminurvvm8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandrvvm8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorrvvm8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorrvvm8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumrvvm4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxurvvm4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminurvvm4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandrvvm4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorrvvm4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorrvvm4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumrvvm2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxurvvm2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminurvvm2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandrvvm2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorrvvm2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorrvvm2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumrvvm1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxurvvm1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminurvvm1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandrvvm1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorrvvm1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorrvvm1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumrvvmf2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxurvvmf2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvmf2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminurvvmf2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvmf2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandrvvmf2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorrvvmf2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorrvvmf2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumrvvmf4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxurvvmf4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvmf4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminurvvmf4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvmf4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandrvvmf4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorrvvmf4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorrvvmf4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumrvvmf8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxurvvmf8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvmf8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminurvvmf8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvmf8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandrvvmf8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorrvvmf8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorrvvmf8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumrvvmf2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxurvvmf2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvmf2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminurvvmf2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvmf2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandrvvmf2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorrvvmf2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorrvvmf2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumrvvmf4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxurvvmf4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvmf4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminurvvmf4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvmf4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandrvvmf4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorrvvmf4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorrvvmf4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumrvvmf2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxurvvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvmf2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminurvvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvmf2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandrvvmf2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorrvvmf2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorrvvmf2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv1qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv2qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv4qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv8qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv16qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv16qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv16qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv16qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv16qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv16qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv16qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv16qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv32qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv32qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv32qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv32qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv32qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv32qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv32qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv32qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv64qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv64qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv64qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv64qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv64qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv64qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv64qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv64qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv128qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv128qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv128qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv128qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv128qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv128qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv128qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv128qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv256qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv256qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv256qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv256qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv256qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv256qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv256qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv256qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv512qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv512qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv512qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv512qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv512qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv512qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv512qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv512qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv1024qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv1024qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv1024qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv1024qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv1024qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv1024qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv1024qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv1024qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv2048qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv2048qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv2048qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv2048qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv2048qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv2048qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv2048qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv2048qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv4096qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv4096qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv4096qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv4096qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv4096qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv4096qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv4096qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv4096qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv1hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv2hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv4hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv8hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv16hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv16hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv16hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv16hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv16hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv16hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv16hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv16hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv32hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv32hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv32hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv32hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv32hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv32hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv32hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv32hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv64hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv64hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv64hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv64hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv64hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv64hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv64hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv64hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv128hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv128hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv128hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv128hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv128hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv128hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv128hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv128hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv256hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv256hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv256hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv256hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv256hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv256hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv256hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv256hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv512hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv512hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv512hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv512hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv512hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv512hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv512hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv512hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv1024hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv1024hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv1024hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv1024hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv1024hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv1024hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv1024hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv1024hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv2048hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv2048hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv2048hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv2048hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv2048hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv2048hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv2048hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv2048hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv1si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv2si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv4si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv8si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv16si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv16si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv16si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv16si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv16si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv16si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv16si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv16si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv32si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv32si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv32si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv32si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv32si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv32si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv32si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv32si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv64si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv64si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv64si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv64si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv64si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv64si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv64si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv64si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv128si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv128si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv128si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv128si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv128si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv128si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv128si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv128si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv256si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv256si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv256si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv256si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv256si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv256si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv256si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv256si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv512si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv512si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv512si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv512si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv512si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv512si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv512si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv512si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv1024si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv1024si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv1024si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv1024si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv1024si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv1024si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv1024si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv1024si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv1di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv2di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv4di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv8di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv16di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv16di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv16di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv16di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv16di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv16di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv16di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv16di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv32di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv32di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv32di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv32di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv32di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv32di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv32di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv32di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv64di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv64di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv64di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv64di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv64di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv64di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv64di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv64di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv128di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv128di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv128di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv128di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv128di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv128di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv128di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv128di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv256di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv256di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv256di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv256di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv256di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv256di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv256di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv256di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsumv512di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxuv512di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv512di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminuv512di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv512di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redandv512di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redorv512di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxorv512di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0srvvm8qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0srvvm8qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm8qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0srvvm8qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm8qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0srvvm8qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0srvvm8qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0srvvm8qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0srvvm4qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0srvvm4qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm4qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0srvvm4qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm4qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0srvvm4qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0srvvm4qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0srvvm4qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0srvvm2qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0srvvm2qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm2qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0srvvm2qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm2qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0srvvm2qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0srvvm2qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0srvvm2qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0srvvm1qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0srvvm1qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm1qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0srvvm1qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm1qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0srvvm1qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0srvvm1qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0srvvm1qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0srvvm8hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0srvvm8hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm8hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0srvvm8hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm8hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0srvvm8hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0srvvm8hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0srvvm8hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0srvvm4hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0srvvm4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm4hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0srvvm4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm4hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0srvvm4hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0srvvm4hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0srvvm4hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0srvvm2hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0srvvm2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm2hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0srvvm2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm2hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0srvvm2hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0srvvm2hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0srvvm2hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0srvvm1hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0srvvm1hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm1hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0srvvm1hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm1hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0srvvm1hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0srvvm1hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0srvvm1hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0srvvm8si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0srvvm8si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm8si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0srvvm8si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm8si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0srvvm8si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0srvvm8si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0srvvm8si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0srvvm4si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0srvvm4si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm4si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0srvvm4si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm4si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0srvvm4si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0srvvm4si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0srvvm4si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0srvvm2si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0srvvm2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm2si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0srvvm2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm2si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0srvvm2si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0srvvm2si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0srvvm2si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0srvvm1si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0srvvm1si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm1si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0srvvm1si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm1si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0srvvm1si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0srvvm1si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0srvvm1si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0srvvm8di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0srvvm8di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm8di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0srvvm8di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm8di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0srvvm8di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0srvvm8di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0srvvm8di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0srvvm4di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0srvvm4di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm4di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0srvvm4di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm4di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0srvvm4di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0srvvm4di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0srvvm4di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0srvvm2di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0srvvm2di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm2di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0srvvm2di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm2di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0srvvm2di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0srvvm2di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0srvvm2di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0srvvm1di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0srvvm1di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm1di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0srvvm1di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm1di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0srvvm1di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0srvvm1di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0srvvm1di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0srvvmf2qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0srvvmf2qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvmf2qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0srvvmf2qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvmf2qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0srvvmf2qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0srvvmf2qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0srvvmf2qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0srvvmf4qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0srvvmf4qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvmf4qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0srvvmf4qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvmf4qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0srvvmf4qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0srvvmf4qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0srvvmf4qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0srvvmf8qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0srvvmf8qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvmf8qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0srvvmf8qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvmf8qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0srvvmf8qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0srvvmf8qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0srvvmf8qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0srvvmf2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0srvvmf2hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvmf2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0srvvmf2hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvmf2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0srvvmf2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0srvvmf2hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0srvvmf2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0srvvmf4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0srvvmf4hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvmf4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0srvvmf4hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvmf4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0srvvmf4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0srvvmf4hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0srvvmf4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0srvvmf2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0srvvmf2si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvmf2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0srvvmf2si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvmf2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0srvvmf2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0srvvmf2si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0srvvmf2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv1qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv1qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv16qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv16qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv16qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv16qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv16qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv16qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv16qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv16qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv32qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv32qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv32qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv32qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv32qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv32qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv32qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv32qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv64qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv64qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv64qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv64qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv64qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv64qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv64qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv64qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv128qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv128qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv128qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv128qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv128qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv128qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv128qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv128qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv256qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv256qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv256qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv256qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv256qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv256qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv256qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv256qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv512qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv512qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv512qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv512qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv512qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv512qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv512qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv512qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv1024qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv1024qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv1024qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv1024qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv1024qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv1024qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv1024qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv1024qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv2048qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv2048qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv2048qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv2048qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv2048qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv2048qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv2048qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv2048qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv4096qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv4096qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv4096qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv4096qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv4096qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv4096qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv4096qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv4096qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv1hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv1hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv8hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv8hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv16hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv16hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv16hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv16hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv16hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv16hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv16hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv16hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv32hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv32hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv32hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv32hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv32hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv32hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv32hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv32hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv64hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv64hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv64hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv64hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv64hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv64hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv64hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv64hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv128hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv128hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv128hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv128hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv128hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv128hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv128hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv128hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv256hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv256hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv256hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv256hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv256hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv256hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv256hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv256hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv512hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv512hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv512hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv512hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv512hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv512hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv512hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv512hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv1024hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv1024hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv1024hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv1024hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv1024hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv1024hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv1024hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv1024hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv2048hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv2048hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv2048hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv2048hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv2048hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv2048hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv2048hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv2048hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv1si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv1si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv4si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv4si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv8si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv8si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv16si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv16si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv16si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv16si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv16si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv16si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv16si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv16si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv32si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv32si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv32si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv32si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv32si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv32si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv32si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv32si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv64si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv64si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv64si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv64si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv64si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv64si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv64si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv64si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv128si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv128si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv128si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv128si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv128si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv128si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv128si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv128si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv256si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv256si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv256si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv256si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv256si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv256si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv256si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv256si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv512si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv512si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv512si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv512si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv512si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv512si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv512si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv512si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv1024si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv1024si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv1024si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv1024si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv1024si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv1024si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv1024si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv1024si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv1di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv1di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv2di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv2di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv4di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv4di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv8di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv8di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv16di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv16di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv16di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv16di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv16di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv16di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv16di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv16di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv32di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv32di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv32di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv32di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv32di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv32di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv32di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv32di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv64di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv64di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv64di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv64di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv64di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv64di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv64di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv64di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv128di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv128di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv128di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv128di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv128di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv128di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv128di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv128di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv256di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv256di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv256di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv256di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv256di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv256di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv256di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv256di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redsum_vl0sv512di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxu_vl0sv512di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv512di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminu_vl0sv512di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv512di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redand_vl0sv512di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redor_vl0sv512di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redxor_vl0sv512di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumrvvm8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumurvvm8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumrvvm4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumurvvm4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumrvvm2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumurvvm2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumrvvm1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumurvvm1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumrvvmf2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumurvvmf2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumrvvmf4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumurvvmf4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumrvvmf8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumurvvmf8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumrvvm8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumurvvm8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumrvvm4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumurvvm4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumrvvm2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumurvvm2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumrvvm1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumurvvm1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumrvvmf2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumurvvmf2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumrvvmf4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumurvvmf4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumrvvm8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumurvvm8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumrvvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumurvvm4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumrvvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumurvvm2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumrvvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumurvvm1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumrvvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumurvvmf2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv16qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv16qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv32qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv32qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv64qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv64qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv128qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv128qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv256qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv256qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv512qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv512qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv1024qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv1024qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv2048qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv2048qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv4096qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv4096qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv16hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv16hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv32hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv32hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv64hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv64hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv128hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv128hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv256hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv256hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv512hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv512hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv1024hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv1024hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv2048hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv2048hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv16si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv16si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv32si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv32si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv64si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv64si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv128si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv128si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv256si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv256si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv512si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv512si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumv1024si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumuv1024si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0srvvm8qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0srvvm8qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0srvvm4qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0srvvm4qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0srvvm2qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0srvvm2qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0srvvm1qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0srvvm1qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0srvvmf2qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0srvvmf2qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0srvvmf4qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0srvvmf4qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0srvvmf8qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0srvvmf8qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0srvvm8hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0srvvm8hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0srvvm4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0srvvm4hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0srvvm2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0srvvm2hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0srvvm1hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0srvvm1hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0srvvmf2hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0srvvmf2hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0srvvmf4hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0srvvmf4hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0srvvm8si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0srvvm8si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0srvvm4si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0srvvm4si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0srvvm2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0srvvm2si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0srvvm1si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0srvvm1si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0srvvmf2si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0srvvmf2si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv1qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv1qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv2qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv4qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv8qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv16qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv16qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv32qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv32qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv64qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv64qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv128qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv128qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv256qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv256qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv512qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv512qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv1024qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv1024qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv2048qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv2048qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv4096qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv4096qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv1hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv1hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv2hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv4hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv8hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv8hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv16hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv16hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv32hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv32hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv64hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv64hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv128hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv128hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv256hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv256hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv512hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv512hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv1024hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv1024hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv2048hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv2048hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv1si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv1si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv2si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv4si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv4si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv8si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv8si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv16si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv16si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv32si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv32si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv64si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv64si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv128si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv128si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv256si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv256si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv512si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv512si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsum_vl0sv1024si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredsumu_vl0sv1024si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm8hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm8hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm4hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm4hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm2hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm2hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm1hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm1hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvmf2hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvmf2hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvmf4hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvmf4hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm8sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm8sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm4sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm4sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm2sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm2sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm1sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm1sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvmf2sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvmf2sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm8df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm8df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm4df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm4df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm2df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm2df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxrvvm1df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminrvvm1df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv1hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv1hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv2hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv2hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv4hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv4hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv8hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv8hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv16hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv16hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv32hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv32hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv64hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv64hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv128hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv128hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv256hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv256hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv512hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv512hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv1024hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv1024hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv2048hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv2048hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv1sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv1sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv2sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv2sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv4sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv4sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv8sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv8sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv16sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv16sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv32sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv32sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv64sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv64sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv128sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv128sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv256sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv256sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv512sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv512sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv1024sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv1024sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv1df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv1df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv2df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv2df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv4df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv4df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv8df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv8df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv16df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv16df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv32df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv32df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv64df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv64df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv128df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv128df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv256df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv256df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmaxv512df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redminv512df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm8hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm8hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm4hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm4hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm2hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm2hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm1hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm1hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvmf2hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvmf2hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvmf4hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvmf4hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm8sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm8sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm4sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm4sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm2sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm2sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm1sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm1sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvmf2sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvmf2sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm8df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm8df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm4df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm4df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm2df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm2df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0srvvm1df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0srvvm1df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv1hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv1hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv8hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv8hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv16hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv16hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv32hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv32hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv64hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv64hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv128hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv128hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv256hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv256hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv512hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv512hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv1024hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv1024hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv2048hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv2048hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv1sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv1sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv4sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv4sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv8sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv8sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv16sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv16sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv32sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv32sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv64sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv64sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv128sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv128sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv256sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv256sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv512sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv512sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv1024sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv1024sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv1df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv1df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv2df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv2df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv4df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv4df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv8df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv8df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv16df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv16df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv32df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv32df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv64df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv64df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv128df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv128df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv256df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv256df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmax_vl0sv512df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redmin_vl0sv512df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumrvvm8hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumrvvm8hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumrvvm4hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumrvvm4hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumrvvm2hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumrvvm2hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumrvvm1hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumrvvm1hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumrvvmf2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumrvvmf2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumrvvmf4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumrvvmf4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumrvvm8sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumrvvm8sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumrvvm4sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumrvvm4sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumrvvm2sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumrvvm2sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumrvvm1sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumrvvm1sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumrvvmf2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumrvvmf2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumrvvm8df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumrvvm8df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumrvvm4df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumrvvm4df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumrvvm2df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumrvvm2df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumrvvm1df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumrvvm1df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv1hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv1hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv8hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv8hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv16hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv16hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv32hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv32hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv64hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv64hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv128hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv128hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv256hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv256hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv512hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv512hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv1024hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv1024hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv2048hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv2048hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv1sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv1sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv4sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv4sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv8sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv8sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv16sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv16sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv32sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv32sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv64sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv64sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv128sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv128sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv256sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv256sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv512sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv512sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv1024sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv1024sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv1df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv1df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv2df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv2df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv4df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv4df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv8df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv8df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv16df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv16df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv32df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv32df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv64df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv64df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv128df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv128df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv256df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv256df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosumv512df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusumv512df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0srvvm8hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0srvvm8hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0srvvm4hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0srvvm4hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0srvvm2hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0srvvm2hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0srvvm1hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0srvvm1hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0srvvmf2hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0srvvmf2hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0srvvmf4hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0srvvmf4hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0srvvm8sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0srvvm8sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0srvvm4sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0srvvm4sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0srvvm2sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0srvvm2sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0srvvm1sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0srvvm1sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0srvvmf2sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0srvvmf2sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0srvvm8df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0srvvm8df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0srvvm4df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0srvvm4df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0srvvm2df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0srvvm2df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0srvvm1df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0srvvm1df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv1hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv1hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv2hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv2hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv4hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv4hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv8hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv8hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv16hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv16hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv32hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv32hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv64hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv64hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv128hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv128hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv256hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv256hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv512hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv512hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv1024hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv1024hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv2048hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv2048hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv1sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv1sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv2sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv2sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv4sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv4sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv8sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv8sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv16sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv16sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv32sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv32sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv64sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv64sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv128sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv128sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv256sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv256sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv512sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv512sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv1024sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv1024sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv1df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv1df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv2df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv2df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv4df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv4df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv8df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv8df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv16df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv16df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv32df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv32df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv64df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv64df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv128df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv128df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv256df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv256df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redosum_vl0sv512df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_redusum_vl0sv512df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumrvvm8hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumrvvm8hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumrvvm4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumrvvm4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumrvvm2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumrvvm2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumrvvm1hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumrvvm1hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumrvvmf2hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumrvvmf2hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumrvvmf4hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumrvvmf4hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumrvvm8sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumrvvm8sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumrvvm4sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumrvvm4sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumrvvm2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumrvvm2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumrvvm1sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumrvvm1sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumrvvmf2sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumrvvmf2sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumv1hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumv1hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumv2hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumv2hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumv4hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumv4hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumv8hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumv8hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumv16hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumv16hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumv32hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumv32hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumv64hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumv64hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumv128hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumv128hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumv256hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumv256hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumv512hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumv512hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumv1024hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumv1024hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumv2048hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumv2048hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumv1sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumv1sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumv2sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumv2sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumv4sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumv4sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumv8sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumv8sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumv16sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumv16sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumv32sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumv32sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumv64sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumv64sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumv128sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumv128sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumv256sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumv256sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumv512sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumv512sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosumv1024sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusumv1024sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0srvvm8hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0srvvm8hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0srvvm4hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0srvvm4hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0srvvm2hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0srvvm2hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0srvvm1hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0srvvm1hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0srvvmf2hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0srvvmf2hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0srvvmf4hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0srvvmf4hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0srvvm8sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0srvvm8sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0srvvm4sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0srvvm4sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0srvvm2sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0srvvm2sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0srvvm1sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0srvvm1sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0srvvmf2sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0srvvmf2sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0sv1hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0sv1hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0sv2hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0sv2hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0sv4hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0sv4hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0sv8hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0sv8hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0sv16hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0sv16hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0sv32hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0sv32hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0sv64hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0sv64hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0sv128hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0sv128hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0sv256hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0sv256hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0sv512hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0sv512hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0sv1024hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0sv1024hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0sv2048hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0sv2048hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0sv1sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0sv1sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0sv2sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0sv2sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0sv4sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0sv4sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0sv8sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0sv8sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0sv16sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0sv16sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0sv32sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0sv32sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0sv64sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0sv64sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0sv128sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0sv128sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0sv256sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0sv256sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0sv512sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0sv512sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredosum_vl0sv1024sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_wredusum_vl0sv1024sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extract_first_truncrvvm8di                (rtx, rtx);
extern rtx        gen_pred_extract_first_truncrvvm4di                (rtx, rtx);
extern rtx        gen_pred_extract_first_truncrvvm2di                (rtx, rtx);
extern rtx        gen_pred_extract_first_truncrvvm1di                (rtx, rtx);
extern rtx        gen_pred_extract_first_truncv1di                   (rtx, rtx);
extern rtx        gen_pred_extract_first_truncv2di                   (rtx, rtx);
extern rtx        gen_pred_extract_first_truncv4di                   (rtx, rtx);
extern rtx        gen_pred_extract_first_truncv8di                   (rtx, rtx);
extern rtx        gen_pred_extract_first_truncv16di                  (rtx, rtx);
extern rtx        gen_pred_extract_first_truncv32di                  (rtx, rtx);
extern rtx        gen_pred_extract_first_truncv64di                  (rtx, rtx);
extern rtx        gen_pred_extract_first_truncv128di                 (rtx, rtx);
extern rtx        gen_pred_extract_first_truncv256di                 (rtx, rtx);
extern rtx        gen_pred_extract_first_truncv512di                 (rtx, rtx);
extern rtx        gen_pred_slideuprvvm8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm1qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm8hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm1hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm8si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm4si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm1si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm8di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm4di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm2di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm1di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvmf2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvmf2qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvmf4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvmf4qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvmf8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvmf8qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvmf2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvmf2hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvmf4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvmf4hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvmf2si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm8hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm8hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm4hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm4hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm2hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm2hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm1hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm1hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvmf2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvmf2hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvmf4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvmf4hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm8sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm8sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm4sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm4sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm2sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm2sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm1sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm1sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvmf2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvmf2sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm8df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm8df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm4df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm4df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm2df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm2df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm1df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm1df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm8bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm8bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm4bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm4bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm2bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm2bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvm1bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvm1bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvmf2bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvmf2bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideuprvvmf4bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownrvvmf4bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv1qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv16qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv16qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv32qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv32qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv64qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv64qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv128qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv128qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv256qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv256qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv512qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv512qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv1024qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv1024qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv2048qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv2048qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv4096qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv4096qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv8hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv16hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv16hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv32hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv32hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv64hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv64hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv128hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv128hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv256hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv256hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv512hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv512hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv1024hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv1024hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv2048hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv2048hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv16si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv16si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv32si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv32si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv64si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv64si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv128si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv128si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv256si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv256si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv512si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv512si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv1024si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv1024si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv16di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv16di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv32di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv32di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv64di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv64di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv128di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv128di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv256di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv256di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv512di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv512di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv1hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv1hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv2hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv4hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv8hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv8hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv16hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv16hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv32hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv32hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv64hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv64hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv128hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv128hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv256hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv256hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv512hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv512hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv1024hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv1024hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv2048hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv2048hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv1sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv1sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv2sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv4sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv4sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv8sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv8sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv16sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv16sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv32sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv32sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv64sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv64sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv128sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv128sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv256sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv256sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv512sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv512sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv1024sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv1024sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv1df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv1df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv2df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv2df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv4df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv4df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv8df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv8df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv16df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv16df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv32df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv32df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv64df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv64df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv128df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv128df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv256df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv256df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv512df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv512df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv1bf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv1bf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv2bf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv2bf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv4bf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv4bf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv8bf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv8bf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv16bf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv16bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv32bf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv32bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv64bf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv64bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv128bf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv128bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv256bf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv256bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv512bf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv512bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv1024bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv1024bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slideupv2048bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slidedownv2048bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm8qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm4qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm2qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm1qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvmf2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvmf2qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvmf4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvmf4qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvmf8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvmf8qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm8hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm4hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm2hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm1hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvmf2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvmf2hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvmf4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvmf4hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm8si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm4si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm2si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm1si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvmf2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvmf2si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv16qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv16qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv32qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv32qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv64qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv64qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv128qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv128qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv256qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv256qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv512qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv512qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv1024qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv1024qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv2048qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv2048qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv4096qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv4096qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv16hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv16hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv32hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv32hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv64hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv64hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv128hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv128hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv256hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv256hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv512hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv512hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv1024hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv1024hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv2048hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv2048hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv16si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv16si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv32si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv32si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv64si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv64si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv128si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv128si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv256si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv256si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv512si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv512si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv1024si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv1024si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm8hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm8hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm4hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm2hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm1hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm1hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvmf2hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvmf2hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvmf4hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvmf4hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm8sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm8sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm4sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm4sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm2sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm1sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm1sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvmf2sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvmf2sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm8df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm8df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm4df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm4df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm2df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm2df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm1df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm1df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv1hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv1hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv2hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv2hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv4hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv4hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv8hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv8hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv16hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv16hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv32hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv32hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv64hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv64hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv128hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv128hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv256hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv256hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv512hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv512hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv1024hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv1024hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv2048hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv2048hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv1sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv1sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv2sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv2sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv4sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv4sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv8sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv8sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv16sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv16sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv32sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv32sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv64sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv64sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv128sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv128sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv256sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv256sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv512sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv512sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv1024sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv1024sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv1df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv1df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv2df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv2df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv4df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv4df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv8df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv8df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv16df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv16df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv32df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv32df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv64df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv64df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv128df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv128df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv256df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv256df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv512df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv512df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm1qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm8hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvmf2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvmf4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvmf8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvmf2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvmf4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvmf2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm8hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm4hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm2hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm1hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvmf2hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvmf4hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm8sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm4sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm2sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm1sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvmf2sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm8df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm4df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm2df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm1df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm8bf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm4bf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm2bf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm1bf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvmf2bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvmf4bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv16qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv32qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv64qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv128qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv256qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv512qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1024qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv2048qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv4096qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv16hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv32hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv64hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv128hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv256hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv512hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1024hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv2048hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv16si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv32si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv64si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv128si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv256si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv512si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1024si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv16di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv32di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv64di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv128di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv256di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv512di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv2hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv4hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv8hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv16hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv32hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv64hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv128hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv256hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv512hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1024hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv2048hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv2sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv4sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv8sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv16sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv32sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv64sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv128sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv256sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv512sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1024sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv2df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv4df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv8df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv16df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv32df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv64df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv128df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv256df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv512df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1bf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv2bf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv4bf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv8bf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv16bf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv32bf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv64bf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv128bf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv256bf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv512bf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1024bf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv2048bf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm8qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm4qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm2qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm1qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm8hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm4hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm2hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm1hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm8si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm4si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm2si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm1si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm8di_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm4di_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm2di_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm1di_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvmf2qi_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvmf4qi_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvmf8qi_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvmf2hi_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvmf4hi_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvmf2si_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm8hf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm4hf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm2hf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm1hf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvmf2hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvmf4hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm8sf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm4sf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm2sf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm1sf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvmf2sf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm8df_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm4df_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm2df_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm1df_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm8bf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm4bf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm2bf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvm1bf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvmf2bf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherrvvmf4bf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv2qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv4qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv8qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv16qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv32qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv64qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv128qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv256qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv512qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1024qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv2048qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv4096qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv2hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv4hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv8hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv16hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv32hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv64hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv128hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv256hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv512hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1024hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv2048hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv2si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv4si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv8si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv16si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv32si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv64si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv128si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv256si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv512si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1024si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv2di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv4di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv8di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv16di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv32di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv64di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv128di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv256di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv512di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv2hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv4hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv8hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv16hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv32hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv64hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv128hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv256hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv512hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1024hf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv2048hf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv2sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv4sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv8sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv16sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv32sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv64sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv128sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv256sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv512sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1024sf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv2df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv4df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv8df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv16df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv32df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv64df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv128df_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv256df_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv512df_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1bf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv2bf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv4bf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv8bf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv16bf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv32bf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv64bf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv128bf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv256bf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv512bf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv1024bf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherv2048bf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm4qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm2qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm1qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvmf2qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvmf4qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvmf8qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm8hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm4hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm2hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm1hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvmf2hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvmf4hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm8hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm4hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm2hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm1hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvmf2hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvmf4hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm8si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm4si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm2si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm1si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvmf2si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm8sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm4sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm2sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm1sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvmf2sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm8di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm4di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm2di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm1di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm8df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm4df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm2df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16rvvm1df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v16qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v32qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v64qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v128qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v256qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v512qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v1024qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v2048qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v16hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v32hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v64hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v128hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v256hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v512hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v1024hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v2048hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v16si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v32si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v64si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v128si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v256si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v512si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v1024si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v16di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v32di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v64di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v128di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v256di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v512di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v1hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v2hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v4hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v8hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v16hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v32hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v64hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v128hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v256hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v512hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v1024hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v2048hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v1sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v2sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v4sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v8sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v16sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v32sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v64sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v128sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v256sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v512sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v1024sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v1df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v2df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v4df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v8df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v16df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v32df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v64df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v128df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v256df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gatherei16v512df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvmf2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvmf4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvmf8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvmf2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvmf4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvmf2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm8hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm1hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvmf2hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvmf4hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm8sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm4sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm1sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvmf2sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm8df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm4df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm2df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm1df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm8bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm4bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm2bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvm1bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvmf2bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressrvvmf4bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv16qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv32qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv64qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv128qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv256qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv512qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv1024qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv2048qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv4096qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv16hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv32hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv64hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv128hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv256hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv512hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv1024hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv2048hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv16si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv32si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv64si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv128si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv256si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv512si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv1024si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv16di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv32di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv64di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv128di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv256di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv512di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv1hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv2hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv4hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv8hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv16hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv32hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv64hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv128hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv256hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv512hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv1024hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv2048hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv1sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv2sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv4sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv8sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv16sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv32sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv64sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv128sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv256sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv512sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv1024sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv1df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv2df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv4df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv8df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv16df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv32df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv64df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv128df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv256df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv512df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv1bf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv2bf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv4bf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv8bf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv16bf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv32bf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv64bf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv128bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv256bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv512bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv1024bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_compressv2048bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_read_vlsi                                      (rtx);
extern rtx        gen_read_vldi                                      (rtx);
extern rtx        gen_pred_fault_loadrvvm8qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm4qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm8hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm4hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm8si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm4si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm8di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm4di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf8qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm8hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm4hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm8sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm4sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm8df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm4df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm8bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm4bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv16qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv32qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv64qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv128qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv256qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv512qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv1024qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv2048qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv4096qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv16hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv32hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv64hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv128hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv256hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv512hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv1024hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv2048hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv16si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv32si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv64si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv128si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv256si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv512si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv1024si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv16di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv32di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv64di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv128di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv256di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv512di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv1hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv2hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv4hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv8hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv16hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv32hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv64hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv128hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv256hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv512hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv1024hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv2048hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv1sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv2sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv4sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv8sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv16sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv32sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv64sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv128sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv256sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv512sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv1024sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv1df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv2df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv4df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv8df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv16df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv32df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv64df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv128df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv256df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv512df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv1bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv2bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv4bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv8bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv16bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv32bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv64bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv128bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv256bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv512bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv1024bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadv2048bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm8qisi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm8qidi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4qisi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4qidi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2qisi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2qidi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1qisi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1qidi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm8hisi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm8hidi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4hisi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4hidi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2hisi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2hidi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1hisi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1hidi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm8sisi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm8sidi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4sisi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4sidi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2sisi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2sidi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1sisi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1sidi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm8disi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm8didi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4disi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4didi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2disi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2didi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1disi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1didi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2qisi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2qidi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4qisi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4qidi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf8qisi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf8qidi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2hisi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2hidi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4hisi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4hidi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2sisi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2sidi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm8hfsi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm8hfdi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4hfsi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4hfdi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2hfsi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2hfdi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1hfsi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1hfdi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2hfsi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2hfdi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4hfsi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4hfdi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm8sfsi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm8sfdi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4sfsi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4sfdi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2sfsi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2sfdi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1sfsi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1sfdi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2sfsi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2sfdi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm8dfsi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm8dfdi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4dfsi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4dfdi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2dfsi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2dfdi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1dfsi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1dfdi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm8bfsi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm8bfdi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4bfsi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4bfdi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2bfsi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2bfdi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1bfsi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1bfdi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2bfsi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2bfdi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4bfsi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4bfdi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1qisi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1qidi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv2qisi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv2qidi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv4qisi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv4qidi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv8qisi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv8qidi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv16qisi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv16qidi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv32qisi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv32qidi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv64qisi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv64qidi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv128qisi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv128qidi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv256qisi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv256qidi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv512qisi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv512qidi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1024qisi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1024qidi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv2048qisi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv2048qidi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv4096qisi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv4096qidi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1hisi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1hidi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv2hisi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv2hidi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv4hisi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv4hidi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv8hisi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv8hidi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv16hisi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv16hidi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv32hisi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv32hidi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv64hisi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv64hidi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv128hisi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv128hidi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv256hisi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv256hidi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv512hisi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv512hidi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1024hisi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1024hidi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv2048hisi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv2048hidi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1sisi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1sidi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv2sisi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv2sidi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv4sisi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv4sidi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv8sisi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv8sidi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv16sisi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv16sidi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv32sisi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv32sidi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv64sisi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv64sidi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv128sisi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv128sidi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv256sisi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv256sidi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv512sisi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv512sidi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1024sisi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1024sidi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1disi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1didi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv2disi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv2didi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv4disi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv4didi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv8disi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv8didi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv16disi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv16didi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv32disi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv32didi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv64disi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv64didi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv128disi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv128didi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv256disi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv256didi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv512disi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv512didi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1hfsi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1hfdi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv2hfsi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv2hfdi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv4hfsi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv4hfdi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv8hfsi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv8hfdi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv16hfsi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv16hfdi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv32hfsi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv32hfdi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv64hfsi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv64hfdi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv128hfsi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv128hfdi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv256hfsi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv256hfdi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv512hfsi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv512hfdi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1024hfsi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1024hfdi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv2048hfsi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv2048hfdi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1sfsi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1sfdi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv2sfsi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv2sfdi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv4sfsi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv4sfdi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv8sfsi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv8sfdi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv16sfsi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv16sfdi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv32sfsi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv32sfdi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv64sfsi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv64sfdi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv128sfsi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv128sfdi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv256sfsi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv256sfdi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv512sfsi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv512sfdi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1024sfsi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1024sfdi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1dfsi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1dfdi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv2dfsi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv2dfdi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv4dfsi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv4dfdi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv8dfsi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv8dfdi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv16dfsi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv16dfdi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv32dfsi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv32dfdi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv64dfsi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv64dfdi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv128dfsi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv128dfdi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv256dfsi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv256dfdi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv512dfsi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv512dfdi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1bfsi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1bfdi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv2bfsi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv2bfdi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv4bfsi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv4bfdi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv8bfsi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv8bfdi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv16bfsi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv16bfdi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv32bfsi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv32bfdi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv64bfsi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv64bfdi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv128bfsi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv128bfdi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv256bfsi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv256bfdi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv512bfsi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv512bfdi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1024bfsi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv1024bfdi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv2048bfsi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlv2048bfdi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf8x2qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf8x3qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf8x4qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf8x5qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf8x6qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf8x7qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf8x8qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x2hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x3hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x4hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x5hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x6hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x7hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x8hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x2si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x3si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x4si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x5si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x6si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x7si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x8si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x2di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x3di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x4di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x5di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x6di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x7di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x8di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x2bf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x3bf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x4bf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x5bf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x6bf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x7bf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x8bf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x2hf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x3hf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x4hf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x5hf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x6hf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x7hf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x8hf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x2sf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x3sf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x4sf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x5sf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x6sf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x7sf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x8sf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x2df                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x3df                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x4df                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x5df                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x6df                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x7df                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x8df                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x2qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x3qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x4qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x5qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x6qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x7qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf4x8qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x2hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x3hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x4hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x5hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x6hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x7hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x8hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x2si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x3si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x4si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x5si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x6si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x7si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x8si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm2x2di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm2x3di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm2x4di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x2bf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x3bf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x4bf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x5bf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x6bf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x7bf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x8bf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x2hf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x3hf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x4hf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x5hf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x6hf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x7hf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x8hf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x2sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x3sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x4sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x5sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x6sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x7sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x8sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm2x2df                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm2x3df                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm2x4df                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x2qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x3qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x4qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x5qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x6qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x7qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvmf2x8qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x2hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x3hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x4hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x5hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x6hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x7hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x8hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm2x2si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm2x3si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm2x4si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm4x2di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x2bf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x3bf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x4bf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x5bf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x6bf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x7bf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x8bf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x2hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x3hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x4hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x5hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x6hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x7hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x8hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm2x2sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm2x3sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm2x4sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm4x2df                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x2qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x3qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x4qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x5qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x6qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x7qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm1x8qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm2x2hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm2x3hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm2x4hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm4x2si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm2x2bf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm2x3bf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm2x4bf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm2x2hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm2x3hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm2x4hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm4x2sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm2x2qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm2x3qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm2x4qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm4x2hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm4x2bf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm4x2hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_loadrvvm4x2qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf8x2qi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf8x3qi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf8x4qi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf8x5qi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf8x6qi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf8x7qi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf8x8qi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x2hi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x3hi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x4hi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x5hi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x6hi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x7hi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x8hi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x2si              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x3si              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x4si              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x5si              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x6si              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x7si              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x8si              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x2di               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x3di               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x4di               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x5di               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x6di               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x7di               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x8di               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x2bf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x3bf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x4bf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x5bf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x6bf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x7bf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x8bf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x2hf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x3hf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x4hf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x5hf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x6hf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x7hf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x8hf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x2sf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x3sf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x4sf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x5sf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x6sf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x7sf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x8sf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x2df               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x3df               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x4df               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x5df               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x6df               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x7df               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x8df               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x2qi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x3qi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x4qi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x5qi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x6qi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x7qi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf4x8qi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x2hi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x3hi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x4hi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x5hi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x6hi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x7hi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x8hi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x2si               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x3si               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x4si               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x5si               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x6si               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x7si               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x8si               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm2x2di               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm2x3di               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm2x4di               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x2bf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x3bf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x4bf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x5bf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x6bf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x7bf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x8bf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x2hf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x3hf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x4hf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x5hf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x6hf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x7hf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x8hf              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x2sf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x3sf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x4sf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x5sf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x6sf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x7sf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x8sf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm2x2df               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm2x3df               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm2x4df               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x2qi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x3qi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x4qi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x5qi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x6qi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x7qi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvmf2x8qi              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x2hi               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x3hi               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x4hi               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x5hi               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x6hi               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x7hi               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x8hi               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm2x2si               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm2x3si               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm2x4si               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm4x2di               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x2bf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x3bf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x4bf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x5bf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x6bf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x7bf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x8bf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x2hf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x3hf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x4hf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x5hf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x6hf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x7hf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x8hf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm2x2sf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm2x3sf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm2x4sf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm4x2df               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x2qi               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x3qi               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x4qi               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x5qi               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x6qi               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x7qi               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm1x8qi               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm2x2hi               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm2x3hi               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm2x4hi               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm4x2si               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm2x2bf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm2x3bf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm2x4bf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm2x2hf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm2x3hf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm2x4hf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm4x2sf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm2x2qi               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm2x3qi               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm2x4qi               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm4x2hi               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm4x2bf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm4x2hf               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_unit_strided_storervvm4x2qi               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf8x2qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf8x3qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf8x4qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf8x5qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf8x6qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf8x7qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf8x8qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x2hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x3hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x4hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x5hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x6hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x7hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x8hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x2si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x3si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x4si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x5si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x6si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x7si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x8si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x2di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x3di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x4di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x5di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x6di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x7di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x8di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x2bf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x3bf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x4bf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x5bf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x6bf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x7bf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x8bf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x2hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x3hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x4hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x5hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x6hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x7hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x8hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x2sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x3sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x4sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x5sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x6sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x7sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x8sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x2df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x3df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x4df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x5df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x6df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x7df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x8df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x2qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x3qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x4qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x5qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x6qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x7qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf4x8qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x2hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x3hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x4hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x5hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x6hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x7hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x8hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x2si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x3si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x4si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x5si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x6si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x7si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x8si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2x2di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2x3di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2x4di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x2bf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x3bf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x4bf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x5bf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x6bf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x7bf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x8bf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x2hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x3hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x4hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x5hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x6hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x7hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x8hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x2sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x3sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x4sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x5sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x6sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x7sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x8sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2x2df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2x3df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2x4df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x2qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x3qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x4qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x5qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x6qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x7qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvmf2x8qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x2hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x3hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x4hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x5hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x6hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x7hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x8hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2x2si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2x3si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2x4si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm4x2di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x2bf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x3bf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x4bf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x5bf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x6bf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x7bf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x8bf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x2hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x3hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x4hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x5hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x6hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x7hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x8hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2x2sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2x3sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2x4sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm4x2df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x2qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x3qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x4qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x5qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x6qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x7qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm1x8qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2x2hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2x3hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2x4hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm4x2si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2x2bf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2x3bf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2x4bf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2x2hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2x3hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2x4hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm4x2sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2x2qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2x3qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm2x4qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm4x2hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm4x2bf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm4x2hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_loadrvvm4x2qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf8x2qi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf8x3qi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf8x4qi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf8x5qi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf8x6qi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf8x7qi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf8x8qi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x2hi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x3hi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x4hi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x5hi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x6hi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x7hi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x8hi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x2si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x3si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x4si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x5si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x6si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x7si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x8si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x2di                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x3di                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x4di                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x5di                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x6di                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x7di                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x8di                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x2bf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x3bf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x4bf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x5bf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x6bf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x7bf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x8bf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x2hf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x3hf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x4hf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x5hf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x6hf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x7hf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x8hf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x2sf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x3sf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x4sf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x5sf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x6sf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x7sf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x8sf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x2df                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x3df                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x4df                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x5df                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x6df                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x7df                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x8df                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x2qi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x3qi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x4qi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x5qi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x6qi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x7qi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf4x8qi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x2hi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x3hi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x4hi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x5hi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x6hi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x7hi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x8hi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x2si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x3si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x4si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x5si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x6si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x7si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x8si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2x2di                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2x3di                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2x4di                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x2bf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x3bf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x4bf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x5bf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x6bf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x7bf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x8bf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x2hf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x3hf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x4hf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x5hf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x6hf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x7hf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x8hf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x2sf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x3sf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x4sf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x5sf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x6sf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x7sf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x8sf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2x2df                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2x3df                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2x4df                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x2qi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x3qi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x4qi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x5qi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x6qi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x7qi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvmf2x8qi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x2hi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x3hi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x4hi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x5hi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x6hi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x7hi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x8hi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2x2si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2x3si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2x4si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm4x2di                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x2bf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x3bf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x4bf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x5bf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x6bf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x7bf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x8bf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x2hf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x3hf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x4hf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x5hf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x6hf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x7hf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x8hf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2x2sf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2x3sf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2x4sf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm4x2df                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x2qi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x3qi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x4qi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x5qi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x6qi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x7qi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm1x8qi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2x2hi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2x3hi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2x4hi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm4x2si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2x2bf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2x3bf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2x4bf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2x2hf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2x3hf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2x4hf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm4x2sf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2x2qi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2x3qi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm2x4qi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm4x2hi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm4x2bf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm4x2hf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_storervvm4x2qi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf8x2qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf8x3qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf8x4qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf8x5qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf8x6qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf8x7qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf8x8qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x2hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x3hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x4hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x5hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x6hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x7hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x8hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x2si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x3si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x4si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x5si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x6si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x7si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x8si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x2di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x3di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x4di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x5di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x6di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x7di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x8di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x2bf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x3bf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x4bf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x5bf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x6bf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x7bf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x8bf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x2hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x3hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x4hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x5hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x6hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x7hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x8hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x2sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x3sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x4sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x5sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x6sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x7sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x8sf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x2df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x3df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x4df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x5df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x6df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x7df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x8df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x2qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x3qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x4qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x5qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x6qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x7qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf4x8qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x2hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x3hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x4hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x5hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x6hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x7hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x8hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x3si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x4si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x5si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x6si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x7si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x8si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2x2di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2x3di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2x4di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x2bf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x3bf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x4bf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x5bf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x6bf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x7bf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x8bf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x2hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x3hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x4hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x5hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x6hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x7hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x8hf                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x2sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x3sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x4sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x5sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x6sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x7sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x8sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2x2df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2x3df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2x4df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x2qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x3qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x4qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x5qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x6qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x7qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvmf2x8qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x3hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x5hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x6hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x7hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x8hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2x2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2x3si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2x4si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm4x2di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x2bf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x3bf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x4bf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x5bf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x6bf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x7bf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x8bf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x2hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x3hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x4hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x5hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x6hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x7hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x8hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2x2sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2x3sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2x4sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm4x2df                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x2qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x3qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x4qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x5qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x6qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x7qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm1x8qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2x2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2x3hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2x4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm4x2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2x2bf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2x3bf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2x4bf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2x2hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2x3hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2x4hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm4x2sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2x2qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2x3qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm2x4qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm4x2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm4x2bf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm4x2hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_loadrvvm4x2qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf8x2qisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf8x2qidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf8x3qisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf8x3qidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf8x4qisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf8x4qidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf8x5qisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf8x5qidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf8x6qisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf8x6qidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf8x7qisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf8x7qidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf8x8qisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf8x8qidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x2hisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x2hidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x3hisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x3hidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x4hisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x4hidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x5hisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x5hidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x6hisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x6hidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x7hisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x7hidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x8hisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x8hidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x2sisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x2sidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x3sisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x3sidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x4sisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x4sidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x5sisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x5sidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x6sisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x6sidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x7sisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x7sidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x8sisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x8sidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x2disi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x2didi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x3disi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x3didi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x4disi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x4didi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x5disi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x5didi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x6disi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x6didi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x7disi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x7didi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x8disi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x8didi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x2bfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x2bfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x3bfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x3bfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x4bfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x4bfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x5bfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x5bfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x6bfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x6bfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x7bfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x7bfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x8bfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x8bfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x2hfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x2hfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x3hfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x3hfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x4hfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x4hfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x5hfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x5hfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x6hfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x6hfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x7hfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x7hfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x8hfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x8hfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x2sfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x2sfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x3sfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x3sfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x4sfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x4sfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x5sfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x5sfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x6sfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x6sfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x7sfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x7sfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x8sfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x8sfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x2dfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x2dfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x3dfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x3dfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x4dfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x4dfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x5dfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x5dfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x6dfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x6dfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x7dfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x7dfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x8dfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x8dfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x2qisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x2qidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x3qisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x3qidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x4qisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x4qidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x5qisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x5qidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x6qisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x6qidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x7qisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x7qidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x8qisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf4x8qidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x2hisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x2hidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x3hisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x3hidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x4hisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x4hidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x5hisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x5hidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x6hisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x6hidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x7hisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x7hidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x8hisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x8hidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x2sisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x2sidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x3sisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x3sidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x4sisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x4sidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x5sisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x5sidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x6sisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x6sidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x7sisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x7sidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x8sisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x8sidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x2disi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x2didi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x3disi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x3didi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x4disi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x4didi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x2bfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x2bfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x3bfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x3bfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x4bfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x4bfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x5bfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x5bfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x6bfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x6bfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x7bfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x7bfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x8bfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x8bfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x2hfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x2hfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x3hfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x3hfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x4hfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x4hfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x5hfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x5hfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x6hfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x6hfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x7hfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x7hfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x8hfsi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x8hfdi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x2sfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x2sfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x3sfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x3sfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x4sfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x4sfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x5sfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x5sfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x6sfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x6sfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x7sfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x7sfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x8sfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x8sfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x2dfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x2dfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x3dfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x3dfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x4dfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x4dfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x2qisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x2qidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x3qisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x3qidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x4qisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x4qidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x5qisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x5qidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x6qisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x6qidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x7qisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x7qidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x8qisi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvmf2x8qidi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x2hisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x2hidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x3hisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x3hidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x4hisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x4hidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x5hisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x5hidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x6hisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x6hidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x7hisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x7hidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x8hisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x8hidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x2sisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x2sidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x3sisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x3sidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x4sisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x4sidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4x2disi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4x2didi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x2bfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x2bfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x3bfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x3bfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x4bfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x4bfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x5bfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x5bfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x6bfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x6bfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x7bfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x7bfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x8bfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x8bfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x2hfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x2hfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x3hfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x3hfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x4hfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x4hfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x5hfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x5hfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x6hfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x6hfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x7hfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x7hfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x8hfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x8hfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x2sfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x2sfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x3sfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x3sfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x4sfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x4sfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4x2dfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4x2dfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x2qisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x2qidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x3qisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x3qidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x4qisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x4qidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x5qisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x5qidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x6qisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x6qidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x7qisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x7qidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x8qisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm1x8qidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x2hisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x2hidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x3hisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x3hidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x4hisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x4hidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4x2sisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4x2sidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x2bfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x2bfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x3bfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x3bfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x4bfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x4bfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x2hfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x2hfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x3hfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x3hfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x4hfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x4hfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4x2sfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4x2sfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x2qisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x2qidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x3qisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x3qidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x4qisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm2x4qidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4x2hisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4x2hidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4x2bfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4x2bfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4x2hfsi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4x2hfdi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4x2qisi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_fault_load_set_vlrvvm4x2qidi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x2qirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x2qirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x2qirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x2qirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x2qirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x2qirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x2qirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x2qirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x3qirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x3qirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x3qirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x3qirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x3qirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x3qirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x3qirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x3qirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x4qirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x4qirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x4qirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x4qirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x4qirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x4qirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x4qirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x4qirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x5qirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x5qirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x5qirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x5qirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x5qirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x5qirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x5qirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x5qirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x6qirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x6qirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x6qirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x6qirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x6qirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x6qirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x6qirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x6qirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x7qirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x7qirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x7qirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x7qirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x7qirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x7qirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x7qirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x7qirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x8qirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x8qirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x8qirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x8qirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x8qirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x8qirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf8x8qirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf8x8qirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x2hirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x2hirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x2hirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x2hirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x2hirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x2hirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x2hirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x2hirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x3hirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x3hirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x3hirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x3hirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x3hirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x3hirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x3hirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x3hirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x4hirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x4hirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x4hirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x4hirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x4hirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x4hirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x4hirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x4hirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x5hirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x5hirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x5hirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x5hirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x5hirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x5hirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x5hirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x5hirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x6hirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x6hirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x6hirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x6hirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x6hirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x6hirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x6hirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x6hirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x7hirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x7hirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x7hirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x7hirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x7hirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x7hirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x7hirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x7hirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x8hirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x8hirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x8hirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x8hirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x8hirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x8hirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x8hirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x8hirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x2sirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x2sirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x2sirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x2sirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x2sirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x2sirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x2sirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x2sirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x3sirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x3sirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x3sirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x3sirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x3sirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x3sirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x3sirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x3sirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x4sirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x4sirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x4sirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x4sirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x4sirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x4sirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x4sirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x4sirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x5sirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x5sirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x5sirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x5sirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x5sirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x5sirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x5sirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x5sirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x6sirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x6sirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x6sirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x6sirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x6sirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x6sirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x6sirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x6sirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x7sirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x7sirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x7sirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x7sirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x7sirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x7sirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x7sirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x7sirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x8sirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x8sirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x8sirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x8sirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x8sirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x8sirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x8sirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x8sirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2dirvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2dirvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2dirvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2dirvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2dirvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2dirvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2dirvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2dirvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3dirvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3dirvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3dirvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3dirvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3dirvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3dirvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3dirvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3dirvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4dirvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4dirvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4dirvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4dirvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4dirvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4dirvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4dirvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4dirvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5dirvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5dirvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5dirvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5dirvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5dirvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5dirvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5dirvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5dirvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6dirvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6dirvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6dirvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6dirvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6dirvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6dirvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6dirvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6dirvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7dirvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7dirvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7dirvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7dirvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7dirvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7dirvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7dirvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7dirvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8dirvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8dirvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8dirvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8dirvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8dirvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8dirvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8dirvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8dirvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x2bfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x2bfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x2bfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x2bfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x2bfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x2bfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x2bfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x2bfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x3bfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x3bfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x3bfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x3bfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x3bfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x3bfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x3bfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x3bfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x4bfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x4bfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x4bfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x4bfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x4bfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x4bfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x4bfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x4bfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x5bfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x5bfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x5bfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x5bfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x5bfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x5bfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x5bfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x5bfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x6bfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x6bfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x6bfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x6bfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x6bfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x6bfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x6bfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x6bfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x7bfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x7bfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x7bfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x7bfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x7bfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x7bfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x7bfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x7bfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x8bfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x8bfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x8bfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x8bfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x8bfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x8bfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x8bfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x8bfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x2hfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x2hfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x2hfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x2hfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x2hfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x2hfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x2hfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x2hfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x3hfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x3hfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x3hfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x3hfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x3hfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x3hfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x3hfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x3hfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x4hfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x4hfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x4hfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x4hfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x4hfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x4hfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x4hfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x4hfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x5hfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x5hfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x5hfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x5hfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x5hfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x5hfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x5hfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x5hfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x6hfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x6hfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x6hfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x6hfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x6hfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x6hfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x6hfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x6hfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x7hfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x7hfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x7hfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x7hfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x7hfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x7hfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x7hfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x7hfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x8hfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x8hfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x8hfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x8hfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x8hfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x8hfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x8hfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x8hfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x2sfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x2sfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x2sfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x2sfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x2sfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x2sfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x2sfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x2sfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x3sfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x3sfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x3sfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x3sfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x3sfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x3sfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x3sfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x3sfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x4sfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x4sfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x4sfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x4sfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x4sfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x4sfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x4sfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x4sfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x5sfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x5sfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x5sfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x5sfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x5sfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x5sfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x5sfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x5sfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x6sfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x6sfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x6sfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x6sfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x6sfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x6sfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x6sfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x6sfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x7sfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x7sfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x7sfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x7sfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x7sfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x7sfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x7sfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x7sfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x8sfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x8sfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x8sfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x8sfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x8sfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x8sfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x8sfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x8sfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2dfrvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2dfrvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2dfrvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2dfrvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2dfrvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2dfrvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2dfrvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2dfrvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3dfrvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3dfrvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3dfrvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3dfrvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3dfrvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3dfrvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3dfrvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3dfrvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4dfrvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4dfrvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4dfrvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4dfrvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4dfrvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4dfrvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4dfrvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4dfrvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5dfrvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5dfrvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5dfrvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5dfrvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5dfrvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5dfrvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5dfrvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5dfrvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6dfrvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6dfrvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6dfrvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6dfrvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6dfrvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6dfrvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6dfrvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6dfrvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7dfrvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7dfrvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7dfrvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7dfrvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7dfrvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7dfrvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7dfrvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7dfrvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8dfrvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8dfrvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8dfrvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8dfrvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8dfrvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8dfrvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8dfrvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8dfrvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x2qirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x2qirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x3qirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x3qirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x4qirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x4qirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x5qirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x5qirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x6qirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x6qirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x7qirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x7qirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x8qirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x8qirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x2hirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x2hirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x3hirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x3hirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x4hirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x4hirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x5hirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x5hirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x6hirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x6hirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x7hirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x7hirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x8hirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x8hirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2sirvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2sirvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3sirvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3sirvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4sirvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4sirvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5sirvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5sirvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6sirvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6sirvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7sirvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7sirvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8sirvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8sirvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2dirvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2dirvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3dirvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3dirvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4dirvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4dirvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x2bfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x2bfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x3bfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x3bfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x4bfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x4bfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x5bfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x5bfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x6bfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x6bfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x7bfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x7bfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x8bfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x8bfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x2hfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x2hfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x3hfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x3hfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x4hfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x4hfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x5hfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x5hfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x6hfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x6hfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x7hfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x7hfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x8hfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x8hfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2sfrvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2sfrvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3sfrvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3sfrvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4sfrvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4sfrvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5sfrvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5sfrvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6sfrvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6sfrvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7sfrvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7sfrvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8sfrvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8sfrvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2dfrvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2dfrvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3dfrvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3dfrvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4dfrvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4dfrvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x2qirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x2qirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x3qirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x3qirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x4qirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x4qirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x5qirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x5qirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x6qirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x6qirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x7qirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x7qirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x8qirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x8qirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x2hirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x2hirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x3hirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x3hirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x4hirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x4hirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x5hirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x5hirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x6hirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x6hirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x7hirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x7hirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x8hirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x8hirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2sirvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2sirvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3sirvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3sirvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4sirvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4sirvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5sirvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5sirvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6sirvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6sirvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7sirvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7sirvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8sirvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8sirvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2dirvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2dirvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3dirvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3dirvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4dirvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4dirvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x2bfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x2bfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x3bfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x3bfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x4bfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x4bfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x5bfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x5bfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x6bfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x6bfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x7bfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x7bfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x8bfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x8bfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x2hfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x2hfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x3hfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x3hfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x4hfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x4hfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x5hfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x5hfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x6hfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x6hfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x7hfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x7hfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x8hfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x8hfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2sfrvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2sfrvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3sfrvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3sfrvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4sfrvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4sfrvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5sfrvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5sfrvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6sfrvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6sfrvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7sfrvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7sfrvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8sfrvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8sfrvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2dfrvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2dfrvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3dfrvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3dfrvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4dfrvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4dfrvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x2qirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x2qirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x3qirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x3qirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x4qirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x4qirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x5qirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x5qirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x6qirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x6qirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x7qirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x7qirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x8qirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x8qirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x2hirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x2hirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x3hirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x3hirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x4hirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x4hirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x5hirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x5hirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x6hirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x6hirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x7hirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x7hirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x8hirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x8hirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2sirvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2sirvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3sirvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3sirvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4sirvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4sirvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5sirvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5sirvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6sirvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6sirvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7sirvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7sirvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8sirvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8sirvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2dirvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2dirvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3dirvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3dirvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4dirvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4dirvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x2bfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x2bfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x3bfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x3bfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x4bfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x4bfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x5bfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x5bfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x6bfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x6bfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x7bfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x7bfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x8bfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x8bfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x2hfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x2hfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x3hfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x3hfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x4hfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x4hfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x5hfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x5hfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x6hfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x6hfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x7hfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x7hfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x8hfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x8hfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2sfrvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2sfrvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3sfrvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3sfrvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4sfrvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4sfrvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5sfrvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5sfrvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6sfrvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6sfrvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7sfrvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7sfrvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8sfrvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8sfrvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2dfrvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2dfrvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3dfrvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3dfrvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4dfrvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4dfrvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x2qirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x2qirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x3qirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x3qirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x4qirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x4qirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x5qirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x5qirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x6qirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x6qirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x7qirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x7qirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf4x8qirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf4x8qirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x2hirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x2hirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x3hirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x3hirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x4hirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x4hirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x5hirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x5hirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x6hirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x6hirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x7hirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x7hirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x8hirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x8hirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2sirvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2sirvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3sirvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3sirvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4sirvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4sirvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5sirvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5sirvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6sirvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6sirvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7sirvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7sirvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8sirvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8sirvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2dirvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2dirvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3dirvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3dirvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4dirvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4dirvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x2bfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x2bfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x3bfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x3bfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x4bfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x4bfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x5bfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x5bfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x6bfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x6bfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x7bfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x7bfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x8bfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x8bfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x2hfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x2hfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x3hfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x3hfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x4hfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x4hfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x5hfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x5hfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x6hfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x6hfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x7hfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x7hfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x8hfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x8hfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2sfrvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2sfrvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3sfrvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3sfrvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4sfrvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4sfrvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5sfrvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5sfrvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6sfrvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6sfrvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7sfrvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7sfrvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8sfrvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8sfrvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2dfrvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2dfrvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3dfrvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3dfrvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4dfrvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4dfrvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x2qirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x2qirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x3qirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x3qirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x4qirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x4qirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x5qirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x5qirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x6qirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x6qirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x7qirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x7qirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x8qirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x8qirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2hirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2hirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3hirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3hirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4hirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4hirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5hirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5hirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6hirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6hirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7hirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7hirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8hirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8hirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2sirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2sirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3sirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3sirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4sirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4sirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2dirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2dirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2bfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2bfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3bfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3bfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4bfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4bfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5bfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5bfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6bfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6bfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7bfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7bfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8bfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8bfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2hfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2hfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3hfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3hfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4hfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4hfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5hfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5hfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6hfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6hfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7hfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7hfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8hfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8hfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2sfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2sfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3sfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3sfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4sfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4sfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2dfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2dfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x2qirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x2qirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x3qirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x3qirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x4qirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x4qirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x5qirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x5qirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x6qirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x6qirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x7qirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x7qirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x8qirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x8qirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2hirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2hirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3hirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3hirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4hirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4hirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5hirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5hirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6hirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6hirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7hirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7hirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8hirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8hirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2sirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2sirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3sirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3sirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4sirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4sirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2dirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2dirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2bfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2bfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3bfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3bfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4bfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4bfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5bfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5bfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6bfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6bfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7bfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7bfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8bfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8bfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2hfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2hfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3hfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3hfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4hfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4hfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5hfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5hfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6hfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6hfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7hfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7hfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8hfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8hfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2sfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2sfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3sfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3sfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4sfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4sfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2dfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2dfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x2qirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x2qirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x3qirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x3qirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x4qirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x4qirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x5qirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x5qirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x6qirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x6qirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x7qirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x7qirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x8qirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x8qirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2hirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2hirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3hirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3hirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4hirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4hirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5hirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5hirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6hirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6hirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7hirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7hirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8hirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8hirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2sirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2sirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3sirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3sirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4sirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4sirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2dirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2dirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2bfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2bfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3bfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3bfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4bfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4bfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5bfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5bfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6bfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6bfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7bfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7bfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8bfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8bfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2hfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2hfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3hfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3hfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4hfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4hfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5hfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5hfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6hfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6hfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7hfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7hfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8hfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8hfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2sfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2sfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3sfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3sfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4sfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4sfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2dfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2dfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x2qirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x2qirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x3qirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x3qirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x4qirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x4qirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x5qirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x5qirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x6qirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x6qirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x7qirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x7qirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvmf2x8qirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvmf2x8qirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2hirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2hirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3hirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3hirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4hirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4hirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5hirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5hirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6hirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6hirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7hirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7hirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8hirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8hirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2sirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2sirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3sirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3sirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4sirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4sirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2dirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2dirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2bfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2bfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3bfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3bfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4bfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4bfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5bfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5bfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6bfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6bfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7bfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7bfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8bfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8bfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2hfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2hfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3hfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3hfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4hfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4hfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5hfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5hfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6hfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6hfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7hfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7hfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8hfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8hfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2sfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2sfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3sfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3sfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4sfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4sfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2dfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2dfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2qirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2qirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2qirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2qirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2qirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2qirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x2qirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x2qirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3qirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3qirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3qirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3qirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3qirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3qirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x3qirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x3qirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4qirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4qirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4qirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4qirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4qirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4qirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x4qirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x4qirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5qirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5qirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5qirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5qirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5qirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5qirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x5qirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x5qirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6qirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6qirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6qirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6qirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6qirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6qirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x6qirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x6qirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7qirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7qirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7qirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7qirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7qirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7qirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x7qirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x7qirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8qirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8qirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8qirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8qirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8qirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8qirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm1x8qirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm1x8qirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2hirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2hirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2hirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2hirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2hirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2hirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2hirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2hirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3hirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3hirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3hirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3hirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3hirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3hirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3hirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3hirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4hirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4hirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4hirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4hirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4hirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4hirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4hirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4hirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2sirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2sirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2sirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2sirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2sirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2sirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2sirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2sirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2bfrvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2bfrvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2bfrvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2bfrvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2bfrvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2bfrvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2bfrvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2bfrvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3bfrvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3bfrvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3bfrvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3bfrvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3bfrvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3bfrvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3bfrvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3bfrvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4bfrvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4bfrvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4bfrvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4bfrvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4bfrvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4bfrvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4bfrvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4bfrvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2hfrvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2hfrvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2hfrvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2hfrvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2hfrvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2hfrvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2hfrvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2hfrvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3hfrvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3hfrvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3hfrvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3hfrvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3hfrvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3hfrvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3hfrvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3hfrvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4hfrvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4hfrvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4hfrvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4hfrvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4hfrvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4hfrvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4hfrvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4hfrvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2sfrvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2sfrvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2sfrvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2sfrvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2sfrvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2sfrvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2sfrvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2sfrvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2qirvvm2qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2qirvvm2qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2qirvvm4hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2qirvvm4hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x2qirvvm8si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x2qirvvm8si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3qirvvm2qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3qirvvm2qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3qirvvm4hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3qirvvm4hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x3qirvvm8si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x3qirvvm8si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4qirvvm2qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4qirvvm2qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4qirvvm4hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4qirvvm4hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm2x4qirvvm8si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm2x4qirvvm8si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2hirvvm2qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2hirvvm2qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2hirvvm4hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2hirvvm4hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2hirvvm8si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2hirvvm8si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2bfrvvm2qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2bfrvvm2qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2bfrvvm4hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2bfrvvm4hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2bfrvvm8si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2bfrvvm8si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2hfrvvm2qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2hfrvvm2qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2hfrvvm4hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2hfrvvm4hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2hfrvvm8si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2hfrvvm8si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2qirvvm4qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2qirvvm4qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_oloadrvvm4x2qirvvm8hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_uloadrvvm4x2qirvvm8hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x2qirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x2qirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x2qirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x2qirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x2qirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x2qirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x2qirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x2qirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x3qirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x3qirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x3qirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x3qirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x3qirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x3qirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x3qirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x3qirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x4qirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x4qirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x4qirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x4qirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x4qirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x4qirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x4qirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x4qirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x5qirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x5qirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x5qirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x5qirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x5qirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x5qirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x5qirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x5qirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x6qirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x6qirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x6qirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x6qirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x6qirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x6qirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x6qirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x6qirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x7qirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x7qirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x7qirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x7qirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x7qirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x7qirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x7qirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x7qirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x8qirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x8qirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x8qirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x8qirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x8qirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x8qirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf8x8qirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf8x8qirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x2hirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x2hirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x2hirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x2hirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x2hirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x2hirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x2hirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x2hirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x3hirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x3hirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x3hirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x3hirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x3hirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x3hirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x3hirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x3hirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x4hirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x4hirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x4hirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x4hirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x4hirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x4hirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x4hirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x4hirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x5hirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x5hirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x5hirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x5hirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x5hirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x5hirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x5hirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x5hirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x6hirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x6hirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x6hirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x6hirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x6hirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x6hirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x6hirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x6hirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x7hirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x7hirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x7hirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x7hirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x7hirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x7hirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x7hirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x7hirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x8hirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x8hirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x8hirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x8hirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x8hirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x8hirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x8hirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x8hirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x2sirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x2sirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x2sirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x2sirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x2sirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x2sirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x2sirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x2sirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x3sirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x3sirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x3sirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x3sirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x3sirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x3sirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x3sirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x3sirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x4sirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x4sirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x4sirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x4sirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x4sirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x4sirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x4sirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x4sirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x5sirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x5sirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x5sirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x5sirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x5sirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x5sirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x5sirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x5sirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x6sirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x6sirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x6sirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x6sirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x6sirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x6sirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x6sirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x6sirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x7sirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x7sirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x7sirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x7sirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x7sirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x7sirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x7sirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x7sirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x8sirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x8sirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x8sirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x8sirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x8sirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x8sirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x8sirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x8sirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2dirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2dirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2dirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2dirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2dirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2dirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2dirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2dirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3dirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3dirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3dirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3dirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3dirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3dirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3dirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3dirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4dirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4dirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4dirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4dirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4dirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4dirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4dirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4dirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5dirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5dirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5dirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5dirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5dirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5dirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5dirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5dirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6dirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6dirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6dirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6dirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6dirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6dirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6dirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6dirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7dirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7dirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7dirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7dirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7dirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7dirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7dirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7dirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8dirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8dirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8dirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8dirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8dirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8dirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8dirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8dirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x2bfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x2bfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x2bfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x2bfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x2bfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x2bfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x2bfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x2bfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x3bfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x3bfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x3bfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x3bfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x3bfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x3bfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x3bfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x3bfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x4bfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x4bfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x4bfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x4bfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x4bfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x4bfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x4bfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x4bfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x5bfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x5bfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x5bfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x5bfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x5bfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x5bfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x5bfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x5bfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x6bfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x6bfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x6bfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x6bfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x6bfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x6bfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x6bfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x6bfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x7bfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x7bfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x7bfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x7bfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x7bfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x7bfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x7bfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x7bfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x8bfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x8bfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x8bfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x8bfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x8bfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x8bfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x8bfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x8bfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x2hfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x2hfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x2hfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x2hfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x2hfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x2hfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x2hfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x2hfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x3hfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x3hfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x3hfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x3hfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x3hfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x3hfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x3hfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x3hfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x4hfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x4hfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x4hfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x4hfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x4hfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x4hfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x4hfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x4hfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x5hfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x5hfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x5hfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x5hfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x5hfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x5hfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x5hfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x5hfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x6hfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x6hfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x6hfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x6hfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x6hfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x6hfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x6hfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x6hfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x7hfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x7hfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x7hfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x7hfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x7hfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x7hfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x7hfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x7hfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x8hfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x8hfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x8hfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x8hfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x8hfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x8hfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x8hfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x8hfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x2sfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x2sfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x2sfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x2sfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x2sfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x2sfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x2sfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x2sfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x3sfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x3sfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x3sfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x3sfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x3sfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x3sfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x3sfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x3sfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x4sfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x4sfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x4sfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x4sfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x4sfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x4sfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x4sfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x4sfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x5sfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x5sfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x5sfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x5sfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x5sfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x5sfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x5sfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x5sfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x6sfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x6sfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x6sfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x6sfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x6sfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x6sfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x6sfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x6sfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x7sfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x7sfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x7sfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x7sfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x7sfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x7sfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x7sfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x7sfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x8sfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x8sfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x8sfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x8sfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x8sfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x8sfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x8sfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x8sfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2dfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2dfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2dfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2dfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2dfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2dfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2dfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2dfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3dfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3dfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3dfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3dfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3dfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3dfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3dfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3dfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4dfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4dfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4dfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4dfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4dfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4dfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4dfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4dfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5dfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5dfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5dfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5dfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5dfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5dfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5dfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5dfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6dfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6dfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6dfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6dfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6dfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6dfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6dfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6dfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7dfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7dfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7dfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7dfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7dfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7dfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7dfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7dfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8dfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8dfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8dfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8dfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8dfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8dfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8dfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8dfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x2qirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x2qirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x3qirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x3qirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x4qirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x4qirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x5qirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x5qirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x6qirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x6qirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x7qirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x7qirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x8qirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x8qirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x2hirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x2hirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x3hirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x3hirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x4hirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x4hirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x5hirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x5hirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x6hirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x6hirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x7hirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x7hirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x8hirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x8hirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2sirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2sirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3sirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3sirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4sirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4sirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5sirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5sirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6sirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6sirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7sirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7sirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8sirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8sirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2dirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2dirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3dirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3dirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4dirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4dirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x2bfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x2bfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x3bfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x3bfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x4bfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x4bfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x5bfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x5bfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x6bfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x6bfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x7bfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x7bfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x8bfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x8bfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x2hfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x2hfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x3hfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x3hfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x4hfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x4hfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x5hfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x5hfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x6hfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x6hfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x7hfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x7hfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x8hfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x8hfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2sfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2sfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3sfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3sfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4sfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4sfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5sfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5sfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6sfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6sfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7sfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7sfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8sfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8sfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2dfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2dfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3dfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3dfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4dfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4dfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x2qirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x2qirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x3qirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x3qirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x4qirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x4qirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x5qirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x5qirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x6qirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x6qirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x7qirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x7qirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x8qirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x8qirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x2hirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x2hirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x3hirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x3hirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x4hirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x4hirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x5hirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x5hirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x6hirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x6hirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x7hirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x7hirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x8hirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x8hirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2sirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2sirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3sirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3sirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4sirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4sirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5sirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5sirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6sirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6sirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7sirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7sirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8sirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8sirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2dirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2dirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3dirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3dirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4dirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4dirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x2bfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x2bfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x3bfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x3bfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x4bfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x4bfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x5bfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x5bfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x6bfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x6bfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x7bfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x7bfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x8bfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x8bfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x2hfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x2hfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x3hfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x3hfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x4hfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x4hfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x5hfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x5hfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x6hfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x6hfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x7hfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x7hfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x8hfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x8hfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2sfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2sfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3sfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3sfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4sfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4sfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5sfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5sfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6sfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6sfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7sfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7sfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8sfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8sfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2dfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2dfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3dfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3dfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4dfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4dfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x2qirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x2qirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x3qirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x3qirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x4qirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x4qirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x5qirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x5qirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x6qirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x6qirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x7qirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x7qirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x8qirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x8qirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x2hirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x2hirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x3hirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x3hirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x4hirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x4hirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x5hirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x5hirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x6hirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x6hirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x7hirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x7hirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x8hirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x8hirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2sirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2sirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3sirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3sirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4sirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4sirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5sirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5sirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6sirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6sirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7sirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7sirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8sirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8sirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2dirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2dirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3dirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3dirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4dirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4dirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x2bfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x2bfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x3bfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x3bfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x4bfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x4bfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x5bfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x5bfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x6bfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x6bfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x7bfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x7bfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x8bfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x8bfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x2hfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x2hfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x3hfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x3hfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x4hfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x4hfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x5hfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x5hfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x6hfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x6hfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x7hfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x7hfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x8hfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x8hfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2sfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2sfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3sfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3sfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4sfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4sfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5sfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5sfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6sfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6sfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7sfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7sfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8sfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8sfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2dfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2dfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3dfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3dfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4dfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4dfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x2qirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x2qirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x3qirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x3qirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x4qirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x4qirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x5qirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x5qirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x6qirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x6qirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x7qirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x7qirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf4x8qirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf4x8qirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x2hirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x2hirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x3hirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x3hirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x4hirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x4hirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x5hirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x5hirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x6hirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x6hirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x7hirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x7hirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x8hirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x8hirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2sirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2sirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3sirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3sirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4sirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4sirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5sirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5sirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6sirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6sirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7sirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7sirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8sirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8sirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2dirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2dirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3dirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3dirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4dirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4dirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x2bfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x2bfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x3bfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x3bfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x4bfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x4bfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x5bfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x5bfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x6bfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x6bfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x7bfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x7bfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x8bfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x8bfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x2hfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x2hfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x3hfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x3hfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x4hfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x4hfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x5hfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x5hfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x6hfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x6hfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x7hfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x7hfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x8hfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x8hfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2sfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2sfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3sfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3sfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4sfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4sfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5sfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5sfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6sfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6sfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7sfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7sfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8sfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8sfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2dfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2dfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3dfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3dfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4dfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4dfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x2qirvvmf2qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x2qirvvmf2qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x3qirvvmf2qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x3qirvvmf2qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x4qirvvmf2qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x4qirvvmf2qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x5qirvvmf2qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x5qirvvmf2qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x6qirvvmf2qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x6qirvvmf2qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x7qirvvmf2qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x7qirvvmf2qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x8qirvvmf2qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x8qirvvmf2qi          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2hirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2hirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3hirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3hirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4hirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4hirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5hirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5hirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6hirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6hirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7hirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7hirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8hirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8hirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2sirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2sirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3sirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3sirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4sirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4sirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2dirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2dirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2bfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2bfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3bfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3bfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4bfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4bfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5bfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5bfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6bfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6bfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7bfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7bfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8bfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8bfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2hfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2hfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3hfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3hfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4hfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4hfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5hfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5hfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6hfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6hfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7hfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7hfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8hfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8hfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2sfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2sfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3sfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3sfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4sfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4sfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2dfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2dfrvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x2qirvvm1hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x2qirvvm1hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x3qirvvm1hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x3qirvvm1hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x4qirvvm1hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x4qirvvm1hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x5qirvvm1hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x5qirvvm1hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x6qirvvm1hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x6qirvvm1hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x7qirvvm1hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x7qirvvm1hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x8qirvvm1hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x8qirvvm1hi           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2hirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2hirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3hirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3hirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4hirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4hirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5hirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5hirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6hirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6hirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7hirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7hirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8hirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8hirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2sirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2sirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3sirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3sirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4sirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4sirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2dirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2dirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2bfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2bfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3bfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3bfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4bfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4bfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5bfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5bfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6bfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6bfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7bfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7bfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8bfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8bfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2hfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2hfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3hfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3hfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4hfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4hfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5hfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5hfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6hfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6hfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7hfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7hfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8hfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8hfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2sfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2sfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3sfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3sfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4sfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4sfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2dfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2dfrvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x2qirvvm2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x2qirvvm2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x3qirvvm2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x3qirvvm2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x4qirvvm2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x4qirvvm2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x5qirvvm2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x5qirvvm2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x6qirvvm2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x6qirvvm2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x7qirvvm2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x7qirvvm2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x8qirvvm2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x8qirvvm2si           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2hirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2hirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3hirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3hirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4hirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4hirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5hirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5hirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6hirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6hirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7hirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7hirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8hirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8hirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2sirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2sirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3sirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3sirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4sirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4sirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2dirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2dirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2bfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2bfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3bfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3bfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4bfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4bfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5bfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5bfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6bfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6bfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7bfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7bfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8bfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8bfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2hfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2hfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3hfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3hfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4hfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4hfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5hfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5hfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6hfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6hfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7hfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7hfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8hfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8hfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2sfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2sfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3sfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3sfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4sfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4sfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2dfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2dfrvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x2qirvvm4di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x2qirvvm4di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x3qirvvm4di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x3qirvvm4di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x4qirvvm4di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x4qirvvm4di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x5qirvvm4di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x5qirvvm4di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x6qirvvm4di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x6qirvvm4di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x7qirvvm4di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x7qirvvm4di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvmf2x8qirvvm4di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvmf2x8qirvvm4di           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2hirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2hirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3hirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3hirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4hirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4hirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5hirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5hirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6hirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6hirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7hirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7hirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8hirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8hirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2sirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2sirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3sirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3sirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4sirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4sirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2dirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2dirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2bfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2bfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3bfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3bfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4bfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4bfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5bfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5bfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6bfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6bfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7bfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7bfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8bfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8bfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2hfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2hfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3hfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3hfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4hfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4hfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5hfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5hfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6hfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6hfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7hfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7hfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8hfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8hfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2sfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2sfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3sfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3sfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4sfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4sfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2dfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2dfrvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2qirvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2qirvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2qirvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2qirvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2qirvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2qirvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x2qirvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x2qirvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3qirvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3qirvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3qirvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3qirvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3qirvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3qirvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x3qirvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x3qirvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4qirvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4qirvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4qirvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4qirvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4qirvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4qirvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x4qirvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x4qirvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5qirvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5qirvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5qirvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5qirvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5qirvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5qirvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x5qirvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x5qirvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6qirvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6qirvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6qirvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6qirvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6qirvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6qirvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x6qirvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x6qirvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7qirvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7qirvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7qirvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7qirvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7qirvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7qirvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x7qirvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x7qirvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8qirvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8qirvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8qirvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8qirvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8qirvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8qirvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm1x8qirvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm1x8qirvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2hirvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2hirvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2hirvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2hirvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2hirvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2hirvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2hirvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2hirvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3hirvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3hirvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3hirvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3hirvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3hirvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3hirvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3hirvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3hirvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4hirvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4hirvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4hirvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4hirvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4hirvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4hirvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4hirvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4hirvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2sirvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2sirvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2sirvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2sirvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2sirvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2sirvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2sirvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2sirvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2bfrvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2bfrvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2bfrvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2bfrvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2bfrvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2bfrvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2bfrvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2bfrvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3bfrvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3bfrvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3bfrvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3bfrvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3bfrvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3bfrvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3bfrvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3bfrvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4bfrvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4bfrvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4bfrvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4bfrvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4bfrvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4bfrvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4bfrvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4bfrvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2hfrvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2hfrvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2hfrvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2hfrvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2hfrvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2hfrvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2hfrvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2hfrvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3hfrvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3hfrvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3hfrvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3hfrvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3hfrvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3hfrvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3hfrvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3hfrvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4hfrvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4hfrvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4hfrvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4hfrvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4hfrvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4hfrvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4hfrvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4hfrvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2sfrvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2sfrvvm1qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2sfrvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2sfrvvm2hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2sfrvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2sfrvvm4si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2sfrvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2sfrvvm8di            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2qirvvm2qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2qirvvm2qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2qirvvm4hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2qirvvm4hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x2qirvvm8si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x2qirvvm8si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3qirvvm2qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3qirvvm2qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3qirvvm4hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3qirvvm4hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x3qirvvm8si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x3qirvvm8si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4qirvvm2qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4qirvvm2qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4qirvvm4hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4qirvvm4hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm2x4qirvvm8si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm2x4qirvvm8si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2hirvvm2qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2hirvvm2qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2hirvvm4hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2hirvvm4hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2hirvvm8si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2hirvvm8si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2bfrvvm2qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2bfrvvm2qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2bfrvvm4hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2bfrvvm4hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2bfrvvm8si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2bfrvvm8si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2hfrvvm2qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2hfrvvm2qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2hfrvvm4hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2hfrvvm4hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2hfrvvm8si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2hfrvvm8si            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2qirvvm4qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2qirvvm4qi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ostorervvm4x2qirvvm8hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_indexed_ustorervvm4x2qirvvm8hi            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_addrvvm8qi3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm8qi3                                    (rtx, rtx, rtx);
extern rtx        gen_andrvvm8qi3                                    (rtx, rtx, rtx);
extern rtx        gen_iorrvvm8qi3                                    (rtx, rtx, rtx);
extern rtx        gen_xorrvvm8qi3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm8qi3                                   (rtx, rtx, rtx);
extern rtx        gen_umaxrvvm8qi3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm8qi3                                   (rtx, rtx, rtx);
extern rtx        gen_uminrvvm8qi3                                   (rtx, rtx, rtx);
extern rtx        gen_mulrvvm8qi3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm8qi3                                    (rtx, rtx, rtx);
extern rtx        gen_udivrvvm8qi3                                   (rtx, rtx, rtx);
extern rtx        gen_modrvvm8qi3                                    (rtx, rtx, rtx);
extern rtx        gen_umodrvvm8qi3                                   (rtx, rtx, rtx);
extern rtx        gen_addrvvm4qi3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm4qi3                                    (rtx, rtx, rtx);
extern rtx        gen_andrvvm4qi3                                    (rtx, rtx, rtx);
extern rtx        gen_iorrvvm4qi3                                    (rtx, rtx, rtx);
extern rtx        gen_xorrvvm4qi3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm4qi3                                   (rtx, rtx, rtx);
extern rtx        gen_umaxrvvm4qi3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm4qi3                                   (rtx, rtx, rtx);
extern rtx        gen_uminrvvm4qi3                                   (rtx, rtx, rtx);
extern rtx        gen_mulrvvm4qi3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm4qi3                                    (rtx, rtx, rtx);
extern rtx        gen_udivrvvm4qi3                                   (rtx, rtx, rtx);
extern rtx        gen_modrvvm4qi3                                    (rtx, rtx, rtx);
extern rtx        gen_umodrvvm4qi3                                   (rtx, rtx, rtx);
extern rtx        gen_addrvvm2qi3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm2qi3                                    (rtx, rtx, rtx);
extern rtx        gen_andrvvm2qi3                                    (rtx, rtx, rtx);
extern rtx        gen_iorrvvm2qi3                                    (rtx, rtx, rtx);
extern rtx        gen_xorrvvm2qi3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm2qi3                                   (rtx, rtx, rtx);
extern rtx        gen_umaxrvvm2qi3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm2qi3                                   (rtx, rtx, rtx);
extern rtx        gen_uminrvvm2qi3                                   (rtx, rtx, rtx);
extern rtx        gen_mulrvvm2qi3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm2qi3                                    (rtx, rtx, rtx);
extern rtx        gen_udivrvvm2qi3                                   (rtx, rtx, rtx);
extern rtx        gen_modrvvm2qi3                                    (rtx, rtx, rtx);
extern rtx        gen_umodrvvm2qi3                                   (rtx, rtx, rtx);
extern rtx        gen_addrvvm1qi3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm1qi3                                    (rtx, rtx, rtx);
extern rtx        gen_andrvvm1qi3                                    (rtx, rtx, rtx);
extern rtx        gen_iorrvvm1qi3                                    (rtx, rtx, rtx);
extern rtx        gen_xorrvvm1qi3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm1qi3                                   (rtx, rtx, rtx);
extern rtx        gen_umaxrvvm1qi3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm1qi3                                   (rtx, rtx, rtx);
extern rtx        gen_uminrvvm1qi3                                   (rtx, rtx, rtx);
extern rtx        gen_mulrvvm1qi3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm1qi3                                    (rtx, rtx, rtx);
extern rtx        gen_udivrvvm1qi3                                   (rtx, rtx, rtx);
extern rtx        gen_modrvvm1qi3                                    (rtx, rtx, rtx);
extern rtx        gen_umodrvvm1qi3                                   (rtx, rtx, rtx);
extern rtx        gen_addrvvm8hi3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm8hi3                                    (rtx, rtx, rtx);
extern rtx        gen_andrvvm8hi3                                    (rtx, rtx, rtx);
extern rtx        gen_iorrvvm8hi3                                    (rtx, rtx, rtx);
extern rtx        gen_xorrvvm8hi3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm8hi3                                   (rtx, rtx, rtx);
extern rtx        gen_umaxrvvm8hi3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm8hi3                                   (rtx, rtx, rtx);
extern rtx        gen_uminrvvm8hi3                                   (rtx, rtx, rtx);
extern rtx        gen_mulrvvm8hi3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm8hi3                                    (rtx, rtx, rtx);
extern rtx        gen_udivrvvm8hi3                                   (rtx, rtx, rtx);
extern rtx        gen_modrvvm8hi3                                    (rtx, rtx, rtx);
extern rtx        gen_umodrvvm8hi3                                   (rtx, rtx, rtx);
extern rtx        gen_addrvvm4hi3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm4hi3                                    (rtx, rtx, rtx);
extern rtx        gen_andrvvm4hi3                                    (rtx, rtx, rtx);
extern rtx        gen_iorrvvm4hi3                                    (rtx, rtx, rtx);
extern rtx        gen_xorrvvm4hi3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm4hi3                                   (rtx, rtx, rtx);
extern rtx        gen_umaxrvvm4hi3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm4hi3                                   (rtx, rtx, rtx);
extern rtx        gen_uminrvvm4hi3                                   (rtx, rtx, rtx);
extern rtx        gen_mulrvvm4hi3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm4hi3                                    (rtx, rtx, rtx);
extern rtx        gen_udivrvvm4hi3                                   (rtx, rtx, rtx);
extern rtx        gen_modrvvm4hi3                                    (rtx, rtx, rtx);
extern rtx        gen_umodrvvm4hi3                                   (rtx, rtx, rtx);
extern rtx        gen_addrvvm2hi3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm2hi3                                    (rtx, rtx, rtx);
extern rtx        gen_andrvvm2hi3                                    (rtx, rtx, rtx);
extern rtx        gen_iorrvvm2hi3                                    (rtx, rtx, rtx);
extern rtx        gen_xorrvvm2hi3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm2hi3                                   (rtx, rtx, rtx);
extern rtx        gen_umaxrvvm2hi3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm2hi3                                   (rtx, rtx, rtx);
extern rtx        gen_uminrvvm2hi3                                   (rtx, rtx, rtx);
extern rtx        gen_mulrvvm2hi3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm2hi3                                    (rtx, rtx, rtx);
extern rtx        gen_udivrvvm2hi3                                   (rtx, rtx, rtx);
extern rtx        gen_modrvvm2hi3                                    (rtx, rtx, rtx);
extern rtx        gen_umodrvvm2hi3                                   (rtx, rtx, rtx);
extern rtx        gen_addrvvm1hi3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm1hi3                                    (rtx, rtx, rtx);
extern rtx        gen_andrvvm1hi3                                    (rtx, rtx, rtx);
extern rtx        gen_iorrvvm1hi3                                    (rtx, rtx, rtx);
extern rtx        gen_xorrvvm1hi3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm1hi3                                   (rtx, rtx, rtx);
extern rtx        gen_umaxrvvm1hi3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm1hi3                                   (rtx, rtx, rtx);
extern rtx        gen_uminrvvm1hi3                                   (rtx, rtx, rtx);
extern rtx        gen_mulrvvm1hi3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm1hi3                                    (rtx, rtx, rtx);
extern rtx        gen_udivrvvm1hi3                                   (rtx, rtx, rtx);
extern rtx        gen_modrvvm1hi3                                    (rtx, rtx, rtx);
extern rtx        gen_umodrvvm1hi3                                   (rtx, rtx, rtx);
extern rtx        gen_addrvvm8si3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm8si3                                    (rtx, rtx, rtx);
extern rtx        gen_andrvvm8si3                                    (rtx, rtx, rtx);
extern rtx        gen_iorrvvm8si3                                    (rtx, rtx, rtx);
extern rtx        gen_xorrvvm8si3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm8si3                                   (rtx, rtx, rtx);
extern rtx        gen_umaxrvvm8si3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm8si3                                   (rtx, rtx, rtx);
extern rtx        gen_uminrvvm8si3                                   (rtx, rtx, rtx);
extern rtx        gen_mulrvvm8si3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm8si3                                    (rtx, rtx, rtx);
extern rtx        gen_udivrvvm8si3                                   (rtx, rtx, rtx);
extern rtx        gen_modrvvm8si3                                    (rtx, rtx, rtx);
extern rtx        gen_umodrvvm8si3                                   (rtx, rtx, rtx);
extern rtx        gen_addrvvm4si3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm4si3                                    (rtx, rtx, rtx);
extern rtx        gen_andrvvm4si3                                    (rtx, rtx, rtx);
extern rtx        gen_iorrvvm4si3                                    (rtx, rtx, rtx);
extern rtx        gen_xorrvvm4si3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm4si3                                   (rtx, rtx, rtx);
extern rtx        gen_umaxrvvm4si3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm4si3                                   (rtx, rtx, rtx);
extern rtx        gen_uminrvvm4si3                                   (rtx, rtx, rtx);
extern rtx        gen_mulrvvm4si3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm4si3                                    (rtx, rtx, rtx);
extern rtx        gen_udivrvvm4si3                                   (rtx, rtx, rtx);
extern rtx        gen_modrvvm4si3                                    (rtx, rtx, rtx);
extern rtx        gen_umodrvvm4si3                                   (rtx, rtx, rtx);
extern rtx        gen_addrvvm2si3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm2si3                                    (rtx, rtx, rtx);
extern rtx        gen_andrvvm2si3                                    (rtx, rtx, rtx);
extern rtx        gen_iorrvvm2si3                                    (rtx, rtx, rtx);
extern rtx        gen_xorrvvm2si3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm2si3                                   (rtx, rtx, rtx);
extern rtx        gen_umaxrvvm2si3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm2si3                                   (rtx, rtx, rtx);
extern rtx        gen_uminrvvm2si3                                   (rtx, rtx, rtx);
extern rtx        gen_mulrvvm2si3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm2si3                                    (rtx, rtx, rtx);
extern rtx        gen_udivrvvm2si3                                   (rtx, rtx, rtx);
extern rtx        gen_modrvvm2si3                                    (rtx, rtx, rtx);
extern rtx        gen_umodrvvm2si3                                   (rtx, rtx, rtx);
extern rtx        gen_addrvvm1si3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm1si3                                    (rtx, rtx, rtx);
extern rtx        gen_andrvvm1si3                                    (rtx, rtx, rtx);
extern rtx        gen_iorrvvm1si3                                    (rtx, rtx, rtx);
extern rtx        gen_xorrvvm1si3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm1si3                                   (rtx, rtx, rtx);
extern rtx        gen_umaxrvvm1si3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm1si3                                   (rtx, rtx, rtx);
extern rtx        gen_uminrvvm1si3                                   (rtx, rtx, rtx);
extern rtx        gen_mulrvvm1si3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm1si3                                    (rtx, rtx, rtx);
extern rtx        gen_udivrvvm1si3                                   (rtx, rtx, rtx);
extern rtx        gen_modrvvm1si3                                    (rtx, rtx, rtx);
extern rtx        gen_umodrvvm1si3                                   (rtx, rtx, rtx);
extern rtx        gen_addrvvm8di3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm8di3                                    (rtx, rtx, rtx);
extern rtx        gen_andrvvm8di3                                    (rtx, rtx, rtx);
extern rtx        gen_iorrvvm8di3                                    (rtx, rtx, rtx);
extern rtx        gen_xorrvvm8di3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm8di3                                   (rtx, rtx, rtx);
extern rtx        gen_umaxrvvm8di3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm8di3                                   (rtx, rtx, rtx);
extern rtx        gen_uminrvvm8di3                                   (rtx, rtx, rtx);
extern rtx        gen_mulrvvm8di3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm8di3                                    (rtx, rtx, rtx);
extern rtx        gen_udivrvvm8di3                                   (rtx, rtx, rtx);
extern rtx        gen_modrvvm8di3                                    (rtx, rtx, rtx);
extern rtx        gen_umodrvvm8di3                                   (rtx, rtx, rtx);
extern rtx        gen_addrvvm4di3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm4di3                                    (rtx, rtx, rtx);
extern rtx        gen_andrvvm4di3                                    (rtx, rtx, rtx);
extern rtx        gen_iorrvvm4di3                                    (rtx, rtx, rtx);
extern rtx        gen_xorrvvm4di3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm4di3                                   (rtx, rtx, rtx);
extern rtx        gen_umaxrvvm4di3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm4di3                                   (rtx, rtx, rtx);
extern rtx        gen_uminrvvm4di3                                   (rtx, rtx, rtx);
extern rtx        gen_mulrvvm4di3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm4di3                                    (rtx, rtx, rtx);
extern rtx        gen_udivrvvm4di3                                   (rtx, rtx, rtx);
extern rtx        gen_modrvvm4di3                                    (rtx, rtx, rtx);
extern rtx        gen_umodrvvm4di3                                   (rtx, rtx, rtx);
extern rtx        gen_addrvvm2di3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm2di3                                    (rtx, rtx, rtx);
extern rtx        gen_andrvvm2di3                                    (rtx, rtx, rtx);
extern rtx        gen_iorrvvm2di3                                    (rtx, rtx, rtx);
extern rtx        gen_xorrvvm2di3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm2di3                                   (rtx, rtx, rtx);
extern rtx        gen_umaxrvvm2di3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm2di3                                   (rtx, rtx, rtx);
extern rtx        gen_uminrvvm2di3                                   (rtx, rtx, rtx);
extern rtx        gen_mulrvvm2di3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm2di3                                    (rtx, rtx, rtx);
extern rtx        gen_udivrvvm2di3                                   (rtx, rtx, rtx);
extern rtx        gen_modrvvm2di3                                    (rtx, rtx, rtx);
extern rtx        gen_umodrvvm2di3                                   (rtx, rtx, rtx);
extern rtx        gen_addrvvm1di3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm1di3                                    (rtx, rtx, rtx);
extern rtx        gen_andrvvm1di3                                    (rtx, rtx, rtx);
extern rtx        gen_iorrvvm1di3                                    (rtx, rtx, rtx);
extern rtx        gen_xorrvvm1di3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm1di3                                   (rtx, rtx, rtx);
extern rtx        gen_umaxrvvm1di3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm1di3                                   (rtx, rtx, rtx);
extern rtx        gen_uminrvvm1di3                                   (rtx, rtx, rtx);
extern rtx        gen_mulrvvm1di3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm1di3                                    (rtx, rtx, rtx);
extern rtx        gen_udivrvvm1di3                                   (rtx, rtx, rtx);
extern rtx        gen_modrvvm1di3                                    (rtx, rtx, rtx);
extern rtx        gen_umodrvvm1di3                                   (rtx, rtx, rtx);
extern rtx        gen_addrvvmf2qi3                                   (rtx, rtx, rtx);
extern rtx        gen_subrvvmf2qi3                                   (rtx, rtx, rtx);
extern rtx        gen_andrvvmf2qi3                                   (rtx, rtx, rtx);
extern rtx        gen_iorrvvmf2qi3                                   (rtx, rtx, rtx);
extern rtx        gen_xorrvvmf2qi3                                   (rtx, rtx, rtx);
extern rtx        gen_smaxrvvmf2qi3                                  (rtx, rtx, rtx);
extern rtx        gen_umaxrvvmf2qi3                                  (rtx, rtx, rtx);
extern rtx        gen_sminrvvmf2qi3                                  (rtx, rtx, rtx);
extern rtx        gen_uminrvvmf2qi3                                  (rtx, rtx, rtx);
extern rtx        gen_mulrvvmf2qi3                                   (rtx, rtx, rtx);
extern rtx        gen_divrvvmf2qi3                                   (rtx, rtx, rtx);
extern rtx        gen_udivrvvmf2qi3                                  (rtx, rtx, rtx);
extern rtx        gen_modrvvmf2qi3                                   (rtx, rtx, rtx);
extern rtx        gen_umodrvvmf2qi3                                  (rtx, rtx, rtx);
extern rtx        gen_addrvvmf4qi3                                   (rtx, rtx, rtx);
extern rtx        gen_subrvvmf4qi3                                   (rtx, rtx, rtx);
extern rtx        gen_andrvvmf4qi3                                   (rtx, rtx, rtx);
extern rtx        gen_iorrvvmf4qi3                                   (rtx, rtx, rtx);
extern rtx        gen_xorrvvmf4qi3                                   (rtx, rtx, rtx);
extern rtx        gen_smaxrvvmf4qi3                                  (rtx, rtx, rtx);
extern rtx        gen_umaxrvvmf4qi3                                  (rtx, rtx, rtx);
extern rtx        gen_sminrvvmf4qi3                                  (rtx, rtx, rtx);
extern rtx        gen_uminrvvmf4qi3                                  (rtx, rtx, rtx);
extern rtx        gen_mulrvvmf4qi3                                   (rtx, rtx, rtx);
extern rtx        gen_divrvvmf4qi3                                   (rtx, rtx, rtx);
extern rtx        gen_udivrvvmf4qi3                                  (rtx, rtx, rtx);
extern rtx        gen_modrvvmf4qi3                                   (rtx, rtx, rtx);
extern rtx        gen_umodrvvmf4qi3                                  (rtx, rtx, rtx);
extern rtx        gen_addrvvmf8qi3                                   (rtx, rtx, rtx);
extern rtx        gen_subrvvmf8qi3                                   (rtx, rtx, rtx);
extern rtx        gen_andrvvmf8qi3                                   (rtx, rtx, rtx);
extern rtx        gen_iorrvvmf8qi3                                   (rtx, rtx, rtx);
extern rtx        gen_xorrvvmf8qi3                                   (rtx, rtx, rtx);
extern rtx        gen_smaxrvvmf8qi3                                  (rtx, rtx, rtx);
extern rtx        gen_umaxrvvmf8qi3                                  (rtx, rtx, rtx);
extern rtx        gen_sminrvvmf8qi3                                  (rtx, rtx, rtx);
extern rtx        gen_uminrvvmf8qi3                                  (rtx, rtx, rtx);
extern rtx        gen_mulrvvmf8qi3                                   (rtx, rtx, rtx);
extern rtx        gen_divrvvmf8qi3                                   (rtx, rtx, rtx);
extern rtx        gen_udivrvvmf8qi3                                  (rtx, rtx, rtx);
extern rtx        gen_modrvvmf8qi3                                   (rtx, rtx, rtx);
extern rtx        gen_umodrvvmf8qi3                                  (rtx, rtx, rtx);
extern rtx        gen_addrvvmf2hi3                                   (rtx, rtx, rtx);
extern rtx        gen_subrvvmf2hi3                                   (rtx, rtx, rtx);
extern rtx        gen_andrvvmf2hi3                                   (rtx, rtx, rtx);
extern rtx        gen_iorrvvmf2hi3                                   (rtx, rtx, rtx);
extern rtx        gen_xorrvvmf2hi3                                   (rtx, rtx, rtx);
extern rtx        gen_smaxrvvmf2hi3                                  (rtx, rtx, rtx);
extern rtx        gen_umaxrvvmf2hi3                                  (rtx, rtx, rtx);
extern rtx        gen_sminrvvmf2hi3                                  (rtx, rtx, rtx);
extern rtx        gen_uminrvvmf2hi3                                  (rtx, rtx, rtx);
extern rtx        gen_mulrvvmf2hi3                                   (rtx, rtx, rtx);
extern rtx        gen_divrvvmf2hi3                                   (rtx, rtx, rtx);
extern rtx        gen_udivrvvmf2hi3                                  (rtx, rtx, rtx);
extern rtx        gen_modrvvmf2hi3                                   (rtx, rtx, rtx);
extern rtx        gen_umodrvvmf2hi3                                  (rtx, rtx, rtx);
extern rtx        gen_addrvvmf4hi3                                   (rtx, rtx, rtx);
extern rtx        gen_subrvvmf4hi3                                   (rtx, rtx, rtx);
extern rtx        gen_andrvvmf4hi3                                   (rtx, rtx, rtx);
extern rtx        gen_iorrvvmf4hi3                                   (rtx, rtx, rtx);
extern rtx        gen_xorrvvmf4hi3                                   (rtx, rtx, rtx);
extern rtx        gen_smaxrvvmf4hi3                                  (rtx, rtx, rtx);
extern rtx        gen_umaxrvvmf4hi3                                  (rtx, rtx, rtx);
extern rtx        gen_sminrvvmf4hi3                                  (rtx, rtx, rtx);
extern rtx        gen_uminrvvmf4hi3                                  (rtx, rtx, rtx);
extern rtx        gen_mulrvvmf4hi3                                   (rtx, rtx, rtx);
extern rtx        gen_divrvvmf4hi3                                   (rtx, rtx, rtx);
extern rtx        gen_udivrvvmf4hi3                                  (rtx, rtx, rtx);
extern rtx        gen_modrvvmf4hi3                                   (rtx, rtx, rtx);
extern rtx        gen_umodrvvmf4hi3                                  (rtx, rtx, rtx);
extern rtx        gen_addrvvmf2si3                                   (rtx, rtx, rtx);
extern rtx        gen_subrvvmf2si3                                   (rtx, rtx, rtx);
extern rtx        gen_andrvvmf2si3                                   (rtx, rtx, rtx);
extern rtx        gen_iorrvvmf2si3                                   (rtx, rtx, rtx);
extern rtx        gen_xorrvvmf2si3                                   (rtx, rtx, rtx);
extern rtx        gen_smaxrvvmf2si3                                  (rtx, rtx, rtx);
extern rtx        gen_umaxrvvmf2si3                                  (rtx, rtx, rtx);
extern rtx        gen_sminrvvmf2si3                                  (rtx, rtx, rtx);
extern rtx        gen_uminrvvmf2si3                                  (rtx, rtx, rtx);
extern rtx        gen_mulrvvmf2si3                                   (rtx, rtx, rtx);
extern rtx        gen_divrvvmf2si3                                   (rtx, rtx, rtx);
extern rtx        gen_udivrvvmf2si3                                  (rtx, rtx, rtx);
extern rtx        gen_modrvvmf2si3                                   (rtx, rtx, rtx);
extern rtx        gen_umodrvvmf2si3                                  (rtx, rtx, rtx);
extern rtx        gen_addv1qi3                                       (rtx, rtx, rtx);
extern rtx        gen_subv1qi3                                       (rtx, rtx, rtx);
extern rtx        gen_andv1qi3                                       (rtx, rtx, rtx);
extern rtx        gen_iorv1qi3                                       (rtx, rtx, rtx);
extern rtx        gen_xorv1qi3                                       (rtx, rtx, rtx);
extern rtx        gen_smaxv1qi3                                      (rtx, rtx, rtx);
extern rtx        gen_umaxv1qi3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv1qi3                                      (rtx, rtx, rtx);
extern rtx        gen_uminv1qi3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv1qi3                                       (rtx, rtx, rtx);
extern rtx        gen_divv1qi3                                       (rtx, rtx, rtx);
extern rtx        gen_udivv1qi3                                      (rtx, rtx, rtx);
extern rtx        gen_modv1qi3                                       (rtx, rtx, rtx);
extern rtx        gen_umodv1qi3                                      (rtx, rtx, rtx);
extern rtx        gen_addv2qi3                                       (rtx, rtx, rtx);
extern rtx        gen_subv2qi3                                       (rtx, rtx, rtx);
extern rtx        gen_andv2qi3                                       (rtx, rtx, rtx);
extern rtx        gen_iorv2qi3                                       (rtx, rtx, rtx);
extern rtx        gen_xorv2qi3                                       (rtx, rtx, rtx);
extern rtx        gen_smaxv2qi3                                      (rtx, rtx, rtx);
extern rtx        gen_umaxv2qi3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv2qi3                                      (rtx, rtx, rtx);
extern rtx        gen_uminv2qi3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv2qi3                                       (rtx, rtx, rtx);
extern rtx        gen_divv2qi3                                       (rtx, rtx, rtx);
extern rtx        gen_udivv2qi3                                      (rtx, rtx, rtx);
extern rtx        gen_modv2qi3                                       (rtx, rtx, rtx);
extern rtx        gen_umodv2qi3                                      (rtx, rtx, rtx);
extern rtx        gen_addv4qi3                                       (rtx, rtx, rtx);
extern rtx        gen_subv4qi3                                       (rtx, rtx, rtx);
extern rtx        gen_andv4qi3                                       (rtx, rtx, rtx);
extern rtx        gen_iorv4qi3                                       (rtx, rtx, rtx);
extern rtx        gen_xorv4qi3                                       (rtx, rtx, rtx);
extern rtx        gen_smaxv4qi3                                      (rtx, rtx, rtx);
extern rtx        gen_umaxv4qi3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv4qi3                                      (rtx, rtx, rtx);
extern rtx        gen_uminv4qi3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv4qi3                                       (rtx, rtx, rtx);
extern rtx        gen_divv4qi3                                       (rtx, rtx, rtx);
extern rtx        gen_udivv4qi3                                      (rtx, rtx, rtx);
extern rtx        gen_modv4qi3                                       (rtx, rtx, rtx);
extern rtx        gen_umodv4qi3                                      (rtx, rtx, rtx);
extern rtx        gen_addv8qi3                                       (rtx, rtx, rtx);
extern rtx        gen_subv8qi3                                       (rtx, rtx, rtx);
extern rtx        gen_andv8qi3                                       (rtx, rtx, rtx);
extern rtx        gen_iorv8qi3                                       (rtx, rtx, rtx);
extern rtx        gen_xorv8qi3                                       (rtx, rtx, rtx);
extern rtx        gen_smaxv8qi3                                      (rtx, rtx, rtx);
extern rtx        gen_umaxv8qi3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv8qi3                                      (rtx, rtx, rtx);
extern rtx        gen_uminv8qi3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv8qi3                                       (rtx, rtx, rtx);
extern rtx        gen_divv8qi3                                       (rtx, rtx, rtx);
extern rtx        gen_udivv8qi3                                      (rtx, rtx, rtx);
extern rtx        gen_modv8qi3                                       (rtx, rtx, rtx);
extern rtx        gen_umodv8qi3                                      (rtx, rtx, rtx);
extern rtx        gen_addv16qi3                                      (rtx, rtx, rtx);
extern rtx        gen_subv16qi3                                      (rtx, rtx, rtx);
extern rtx        gen_andv16qi3                                      (rtx, rtx, rtx);
extern rtx        gen_iorv16qi3                                      (rtx, rtx, rtx);
extern rtx        gen_xorv16qi3                                      (rtx, rtx, rtx);
extern rtx        gen_smaxv16qi3                                     (rtx, rtx, rtx);
extern rtx        gen_umaxv16qi3                                     (rtx, rtx, rtx);
extern rtx        gen_sminv16qi3                                     (rtx, rtx, rtx);
extern rtx        gen_uminv16qi3                                     (rtx, rtx, rtx);
extern rtx        gen_mulv16qi3                                      (rtx, rtx, rtx);
extern rtx        gen_divv16qi3                                      (rtx, rtx, rtx);
extern rtx        gen_udivv16qi3                                     (rtx, rtx, rtx);
extern rtx        gen_modv16qi3                                      (rtx, rtx, rtx);
extern rtx        gen_umodv16qi3                                     (rtx, rtx, rtx);
extern rtx        gen_addv32qi3                                      (rtx, rtx, rtx);
extern rtx        gen_subv32qi3                                      (rtx, rtx, rtx);
extern rtx        gen_andv32qi3                                      (rtx, rtx, rtx);
extern rtx        gen_iorv32qi3                                      (rtx, rtx, rtx);
extern rtx        gen_xorv32qi3                                      (rtx, rtx, rtx);
extern rtx        gen_smaxv32qi3                                     (rtx, rtx, rtx);
extern rtx        gen_umaxv32qi3                                     (rtx, rtx, rtx);
extern rtx        gen_sminv32qi3                                     (rtx, rtx, rtx);
extern rtx        gen_uminv32qi3                                     (rtx, rtx, rtx);
extern rtx        gen_mulv32qi3                                      (rtx, rtx, rtx);
extern rtx        gen_divv32qi3                                      (rtx, rtx, rtx);
extern rtx        gen_udivv32qi3                                     (rtx, rtx, rtx);
extern rtx        gen_modv32qi3                                      (rtx, rtx, rtx);
extern rtx        gen_umodv32qi3                                     (rtx, rtx, rtx);
extern rtx        gen_addv64qi3                                      (rtx, rtx, rtx);
extern rtx        gen_subv64qi3                                      (rtx, rtx, rtx);
extern rtx        gen_andv64qi3                                      (rtx, rtx, rtx);
extern rtx        gen_iorv64qi3                                      (rtx, rtx, rtx);
extern rtx        gen_xorv64qi3                                      (rtx, rtx, rtx);
extern rtx        gen_smaxv64qi3                                     (rtx, rtx, rtx);
extern rtx        gen_umaxv64qi3                                     (rtx, rtx, rtx);
extern rtx        gen_sminv64qi3                                     (rtx, rtx, rtx);
extern rtx        gen_uminv64qi3                                     (rtx, rtx, rtx);
extern rtx        gen_mulv64qi3                                      (rtx, rtx, rtx);
extern rtx        gen_divv64qi3                                      (rtx, rtx, rtx);
extern rtx        gen_udivv64qi3                                     (rtx, rtx, rtx);
extern rtx        gen_modv64qi3                                      (rtx, rtx, rtx);
extern rtx        gen_umodv64qi3                                     (rtx, rtx, rtx);
extern rtx        gen_addv128qi3                                     (rtx, rtx, rtx);
extern rtx        gen_subv128qi3                                     (rtx, rtx, rtx);
extern rtx        gen_andv128qi3                                     (rtx, rtx, rtx);
extern rtx        gen_iorv128qi3                                     (rtx, rtx, rtx);
extern rtx        gen_xorv128qi3                                     (rtx, rtx, rtx);
extern rtx        gen_smaxv128qi3                                    (rtx, rtx, rtx);
extern rtx        gen_umaxv128qi3                                    (rtx, rtx, rtx);
extern rtx        gen_sminv128qi3                                    (rtx, rtx, rtx);
extern rtx        gen_uminv128qi3                                    (rtx, rtx, rtx);
extern rtx        gen_mulv128qi3                                     (rtx, rtx, rtx);
extern rtx        gen_divv128qi3                                     (rtx, rtx, rtx);
extern rtx        gen_udivv128qi3                                    (rtx, rtx, rtx);
extern rtx        gen_modv128qi3                                     (rtx, rtx, rtx);
extern rtx        gen_umodv128qi3                                    (rtx, rtx, rtx);
extern rtx        gen_addv256qi3                                     (rtx, rtx, rtx);
extern rtx        gen_subv256qi3                                     (rtx, rtx, rtx);
extern rtx        gen_andv256qi3                                     (rtx, rtx, rtx);
extern rtx        gen_iorv256qi3                                     (rtx, rtx, rtx);
extern rtx        gen_xorv256qi3                                     (rtx, rtx, rtx);
extern rtx        gen_smaxv256qi3                                    (rtx, rtx, rtx);
extern rtx        gen_umaxv256qi3                                    (rtx, rtx, rtx);
extern rtx        gen_sminv256qi3                                    (rtx, rtx, rtx);
extern rtx        gen_uminv256qi3                                    (rtx, rtx, rtx);
extern rtx        gen_mulv256qi3                                     (rtx, rtx, rtx);
extern rtx        gen_divv256qi3                                     (rtx, rtx, rtx);
extern rtx        gen_udivv256qi3                                    (rtx, rtx, rtx);
extern rtx        gen_modv256qi3                                     (rtx, rtx, rtx);
extern rtx        gen_umodv256qi3                                    (rtx, rtx, rtx);
extern rtx        gen_addv512qi3                                     (rtx, rtx, rtx);
extern rtx        gen_subv512qi3                                     (rtx, rtx, rtx);
extern rtx        gen_andv512qi3                                     (rtx, rtx, rtx);
extern rtx        gen_iorv512qi3                                     (rtx, rtx, rtx);
extern rtx        gen_xorv512qi3                                     (rtx, rtx, rtx);
extern rtx        gen_smaxv512qi3                                    (rtx, rtx, rtx);
extern rtx        gen_umaxv512qi3                                    (rtx, rtx, rtx);
extern rtx        gen_sminv512qi3                                    (rtx, rtx, rtx);
extern rtx        gen_uminv512qi3                                    (rtx, rtx, rtx);
extern rtx        gen_mulv512qi3                                     (rtx, rtx, rtx);
extern rtx        gen_divv512qi3                                     (rtx, rtx, rtx);
extern rtx        gen_udivv512qi3                                    (rtx, rtx, rtx);
extern rtx        gen_modv512qi3                                     (rtx, rtx, rtx);
extern rtx        gen_umodv512qi3                                    (rtx, rtx, rtx);
extern rtx        gen_addv1024qi3                                    (rtx, rtx, rtx);
extern rtx        gen_subv1024qi3                                    (rtx, rtx, rtx);
extern rtx        gen_andv1024qi3                                    (rtx, rtx, rtx);
extern rtx        gen_iorv1024qi3                                    (rtx, rtx, rtx);
extern rtx        gen_xorv1024qi3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxv1024qi3                                   (rtx, rtx, rtx);
extern rtx        gen_umaxv1024qi3                                   (rtx, rtx, rtx);
extern rtx        gen_sminv1024qi3                                   (rtx, rtx, rtx);
extern rtx        gen_uminv1024qi3                                   (rtx, rtx, rtx);
extern rtx        gen_mulv1024qi3                                    (rtx, rtx, rtx);
extern rtx        gen_divv1024qi3                                    (rtx, rtx, rtx);
extern rtx        gen_udivv1024qi3                                   (rtx, rtx, rtx);
extern rtx        gen_modv1024qi3                                    (rtx, rtx, rtx);
extern rtx        gen_umodv1024qi3                                   (rtx, rtx, rtx);
extern rtx        gen_addv2048qi3                                    (rtx, rtx, rtx);
extern rtx        gen_subv2048qi3                                    (rtx, rtx, rtx);
extern rtx        gen_andv2048qi3                                    (rtx, rtx, rtx);
extern rtx        gen_iorv2048qi3                                    (rtx, rtx, rtx);
extern rtx        gen_xorv2048qi3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxv2048qi3                                   (rtx, rtx, rtx);
extern rtx        gen_umaxv2048qi3                                   (rtx, rtx, rtx);
extern rtx        gen_sminv2048qi3                                   (rtx, rtx, rtx);
extern rtx        gen_uminv2048qi3                                   (rtx, rtx, rtx);
extern rtx        gen_mulv2048qi3                                    (rtx, rtx, rtx);
extern rtx        gen_divv2048qi3                                    (rtx, rtx, rtx);
extern rtx        gen_udivv2048qi3                                   (rtx, rtx, rtx);
extern rtx        gen_modv2048qi3                                    (rtx, rtx, rtx);
extern rtx        gen_umodv2048qi3                                   (rtx, rtx, rtx);
extern rtx        gen_addv4096qi3                                    (rtx, rtx, rtx);
extern rtx        gen_subv4096qi3                                    (rtx, rtx, rtx);
extern rtx        gen_andv4096qi3                                    (rtx, rtx, rtx);
extern rtx        gen_iorv4096qi3                                    (rtx, rtx, rtx);
extern rtx        gen_xorv4096qi3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxv4096qi3                                   (rtx, rtx, rtx);
extern rtx        gen_umaxv4096qi3                                   (rtx, rtx, rtx);
extern rtx        gen_sminv4096qi3                                   (rtx, rtx, rtx);
extern rtx        gen_uminv4096qi3                                   (rtx, rtx, rtx);
extern rtx        gen_mulv4096qi3                                    (rtx, rtx, rtx);
extern rtx        gen_divv4096qi3                                    (rtx, rtx, rtx);
extern rtx        gen_udivv4096qi3                                   (rtx, rtx, rtx);
extern rtx        gen_modv4096qi3                                    (rtx, rtx, rtx);
extern rtx        gen_umodv4096qi3                                   (rtx, rtx, rtx);
extern rtx        gen_addv1hi3                                       (rtx, rtx, rtx);
extern rtx        gen_subv1hi3                                       (rtx, rtx, rtx);
extern rtx        gen_andv1hi3                                       (rtx, rtx, rtx);
extern rtx        gen_iorv1hi3                                       (rtx, rtx, rtx);
extern rtx        gen_xorv1hi3                                       (rtx, rtx, rtx);
extern rtx        gen_smaxv1hi3                                      (rtx, rtx, rtx);
extern rtx        gen_umaxv1hi3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv1hi3                                      (rtx, rtx, rtx);
extern rtx        gen_uminv1hi3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv1hi3                                       (rtx, rtx, rtx);
extern rtx        gen_divv1hi3                                       (rtx, rtx, rtx);
extern rtx        gen_udivv1hi3                                      (rtx, rtx, rtx);
extern rtx        gen_modv1hi3                                       (rtx, rtx, rtx);
extern rtx        gen_umodv1hi3                                      (rtx, rtx, rtx);
extern rtx        gen_addv2hi3                                       (rtx, rtx, rtx);
extern rtx        gen_subv2hi3                                       (rtx, rtx, rtx);
extern rtx        gen_andv2hi3                                       (rtx, rtx, rtx);
extern rtx        gen_iorv2hi3                                       (rtx, rtx, rtx);
extern rtx        gen_xorv2hi3                                       (rtx, rtx, rtx);
extern rtx        gen_smaxv2hi3                                      (rtx, rtx, rtx);
extern rtx        gen_umaxv2hi3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv2hi3                                      (rtx, rtx, rtx);
extern rtx        gen_uminv2hi3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv2hi3                                       (rtx, rtx, rtx);
extern rtx        gen_divv2hi3                                       (rtx, rtx, rtx);
extern rtx        gen_udivv2hi3                                      (rtx, rtx, rtx);
extern rtx        gen_modv2hi3                                       (rtx, rtx, rtx);
extern rtx        gen_umodv2hi3                                      (rtx, rtx, rtx);
extern rtx        gen_addv4hi3                                       (rtx, rtx, rtx);
extern rtx        gen_subv4hi3                                       (rtx, rtx, rtx);
extern rtx        gen_andv4hi3                                       (rtx, rtx, rtx);
extern rtx        gen_iorv4hi3                                       (rtx, rtx, rtx);
extern rtx        gen_xorv4hi3                                       (rtx, rtx, rtx);
extern rtx        gen_smaxv4hi3                                      (rtx, rtx, rtx);
extern rtx        gen_umaxv4hi3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv4hi3                                      (rtx, rtx, rtx);
extern rtx        gen_uminv4hi3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv4hi3                                       (rtx, rtx, rtx);
extern rtx        gen_divv4hi3                                       (rtx, rtx, rtx);
extern rtx        gen_udivv4hi3                                      (rtx, rtx, rtx);
extern rtx        gen_modv4hi3                                       (rtx, rtx, rtx);
extern rtx        gen_umodv4hi3                                      (rtx, rtx, rtx);
extern rtx        gen_addv8hi3                                       (rtx, rtx, rtx);
extern rtx        gen_subv8hi3                                       (rtx, rtx, rtx);
extern rtx        gen_andv8hi3                                       (rtx, rtx, rtx);
extern rtx        gen_iorv8hi3                                       (rtx, rtx, rtx);
extern rtx        gen_xorv8hi3                                       (rtx, rtx, rtx);
extern rtx        gen_smaxv8hi3                                      (rtx, rtx, rtx);
extern rtx        gen_umaxv8hi3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv8hi3                                      (rtx, rtx, rtx);
extern rtx        gen_uminv8hi3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv8hi3                                       (rtx, rtx, rtx);
extern rtx        gen_divv8hi3                                       (rtx, rtx, rtx);
extern rtx        gen_udivv8hi3                                      (rtx, rtx, rtx);
extern rtx        gen_modv8hi3                                       (rtx, rtx, rtx);
extern rtx        gen_umodv8hi3                                      (rtx, rtx, rtx);
extern rtx        gen_addv16hi3                                      (rtx, rtx, rtx);
extern rtx        gen_subv16hi3                                      (rtx, rtx, rtx);
extern rtx        gen_andv16hi3                                      (rtx, rtx, rtx);
extern rtx        gen_iorv16hi3                                      (rtx, rtx, rtx);
extern rtx        gen_xorv16hi3                                      (rtx, rtx, rtx);
extern rtx        gen_smaxv16hi3                                     (rtx, rtx, rtx);
extern rtx        gen_umaxv16hi3                                     (rtx, rtx, rtx);
extern rtx        gen_sminv16hi3                                     (rtx, rtx, rtx);
extern rtx        gen_uminv16hi3                                     (rtx, rtx, rtx);
extern rtx        gen_mulv16hi3                                      (rtx, rtx, rtx);
extern rtx        gen_divv16hi3                                      (rtx, rtx, rtx);
extern rtx        gen_udivv16hi3                                     (rtx, rtx, rtx);
extern rtx        gen_modv16hi3                                      (rtx, rtx, rtx);
extern rtx        gen_umodv16hi3                                     (rtx, rtx, rtx);
extern rtx        gen_addv32hi3                                      (rtx, rtx, rtx);
extern rtx        gen_subv32hi3                                      (rtx, rtx, rtx);
extern rtx        gen_andv32hi3                                      (rtx, rtx, rtx);
extern rtx        gen_iorv32hi3                                      (rtx, rtx, rtx);
extern rtx        gen_xorv32hi3                                      (rtx, rtx, rtx);
extern rtx        gen_smaxv32hi3                                     (rtx, rtx, rtx);
extern rtx        gen_umaxv32hi3                                     (rtx, rtx, rtx);
extern rtx        gen_sminv32hi3                                     (rtx, rtx, rtx);
extern rtx        gen_uminv32hi3                                     (rtx, rtx, rtx);
extern rtx        gen_mulv32hi3                                      (rtx, rtx, rtx);
extern rtx        gen_divv32hi3                                      (rtx, rtx, rtx);
extern rtx        gen_udivv32hi3                                     (rtx, rtx, rtx);
extern rtx        gen_modv32hi3                                      (rtx, rtx, rtx);
extern rtx        gen_umodv32hi3                                     (rtx, rtx, rtx);
extern rtx        gen_addv64hi3                                      (rtx, rtx, rtx);
extern rtx        gen_subv64hi3                                      (rtx, rtx, rtx);
extern rtx        gen_andv64hi3                                      (rtx, rtx, rtx);
extern rtx        gen_iorv64hi3                                      (rtx, rtx, rtx);
extern rtx        gen_xorv64hi3                                      (rtx, rtx, rtx);
extern rtx        gen_smaxv64hi3                                     (rtx, rtx, rtx);
extern rtx        gen_umaxv64hi3                                     (rtx, rtx, rtx);
extern rtx        gen_sminv64hi3                                     (rtx, rtx, rtx);
extern rtx        gen_uminv64hi3                                     (rtx, rtx, rtx);
extern rtx        gen_mulv64hi3                                      (rtx, rtx, rtx);
extern rtx        gen_divv64hi3                                      (rtx, rtx, rtx);
extern rtx        gen_udivv64hi3                                     (rtx, rtx, rtx);
extern rtx        gen_modv64hi3                                      (rtx, rtx, rtx);
extern rtx        gen_umodv64hi3                                     (rtx, rtx, rtx);
extern rtx        gen_addv128hi3                                     (rtx, rtx, rtx);
extern rtx        gen_subv128hi3                                     (rtx, rtx, rtx);
extern rtx        gen_andv128hi3                                     (rtx, rtx, rtx);
extern rtx        gen_iorv128hi3                                     (rtx, rtx, rtx);
extern rtx        gen_xorv128hi3                                     (rtx, rtx, rtx);
extern rtx        gen_smaxv128hi3                                    (rtx, rtx, rtx);
extern rtx        gen_umaxv128hi3                                    (rtx, rtx, rtx);
extern rtx        gen_sminv128hi3                                    (rtx, rtx, rtx);
extern rtx        gen_uminv128hi3                                    (rtx, rtx, rtx);
extern rtx        gen_mulv128hi3                                     (rtx, rtx, rtx);
extern rtx        gen_divv128hi3                                     (rtx, rtx, rtx);
extern rtx        gen_udivv128hi3                                    (rtx, rtx, rtx);
extern rtx        gen_modv128hi3                                     (rtx, rtx, rtx);
extern rtx        gen_umodv128hi3                                    (rtx, rtx, rtx);
extern rtx        gen_addv256hi3                                     (rtx, rtx, rtx);
extern rtx        gen_subv256hi3                                     (rtx, rtx, rtx);
extern rtx        gen_andv256hi3                                     (rtx, rtx, rtx);
extern rtx        gen_iorv256hi3                                     (rtx, rtx, rtx);
extern rtx        gen_xorv256hi3                                     (rtx, rtx, rtx);
extern rtx        gen_smaxv256hi3                                    (rtx, rtx, rtx);
extern rtx        gen_umaxv256hi3                                    (rtx, rtx, rtx);
extern rtx        gen_sminv256hi3                                    (rtx, rtx, rtx);
extern rtx        gen_uminv256hi3                                    (rtx, rtx, rtx);
extern rtx        gen_mulv256hi3                                     (rtx, rtx, rtx);
extern rtx        gen_divv256hi3                                     (rtx, rtx, rtx);
extern rtx        gen_udivv256hi3                                    (rtx, rtx, rtx);
extern rtx        gen_modv256hi3                                     (rtx, rtx, rtx);
extern rtx        gen_umodv256hi3                                    (rtx, rtx, rtx);
extern rtx        gen_addv512hi3                                     (rtx, rtx, rtx);
extern rtx        gen_subv512hi3                                     (rtx, rtx, rtx);
extern rtx        gen_andv512hi3                                     (rtx, rtx, rtx);
extern rtx        gen_iorv512hi3                                     (rtx, rtx, rtx);
extern rtx        gen_xorv512hi3                                     (rtx, rtx, rtx);
extern rtx        gen_smaxv512hi3                                    (rtx, rtx, rtx);
extern rtx        gen_umaxv512hi3                                    (rtx, rtx, rtx);
extern rtx        gen_sminv512hi3                                    (rtx, rtx, rtx);
extern rtx        gen_uminv512hi3                                    (rtx, rtx, rtx);
extern rtx        gen_mulv512hi3                                     (rtx, rtx, rtx);
extern rtx        gen_divv512hi3                                     (rtx, rtx, rtx);
extern rtx        gen_udivv512hi3                                    (rtx, rtx, rtx);
extern rtx        gen_modv512hi3                                     (rtx, rtx, rtx);
extern rtx        gen_umodv512hi3                                    (rtx, rtx, rtx);
extern rtx        gen_addv1024hi3                                    (rtx, rtx, rtx);
extern rtx        gen_subv1024hi3                                    (rtx, rtx, rtx);
extern rtx        gen_andv1024hi3                                    (rtx, rtx, rtx);
extern rtx        gen_iorv1024hi3                                    (rtx, rtx, rtx);
extern rtx        gen_xorv1024hi3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxv1024hi3                                   (rtx, rtx, rtx);
extern rtx        gen_umaxv1024hi3                                   (rtx, rtx, rtx);
extern rtx        gen_sminv1024hi3                                   (rtx, rtx, rtx);
extern rtx        gen_uminv1024hi3                                   (rtx, rtx, rtx);
extern rtx        gen_mulv1024hi3                                    (rtx, rtx, rtx);
extern rtx        gen_divv1024hi3                                    (rtx, rtx, rtx);
extern rtx        gen_udivv1024hi3                                   (rtx, rtx, rtx);
extern rtx        gen_modv1024hi3                                    (rtx, rtx, rtx);
extern rtx        gen_umodv1024hi3                                   (rtx, rtx, rtx);
extern rtx        gen_addv2048hi3                                    (rtx, rtx, rtx);
extern rtx        gen_subv2048hi3                                    (rtx, rtx, rtx);
extern rtx        gen_andv2048hi3                                    (rtx, rtx, rtx);
extern rtx        gen_iorv2048hi3                                    (rtx, rtx, rtx);
extern rtx        gen_xorv2048hi3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxv2048hi3                                   (rtx, rtx, rtx);
extern rtx        gen_umaxv2048hi3                                   (rtx, rtx, rtx);
extern rtx        gen_sminv2048hi3                                   (rtx, rtx, rtx);
extern rtx        gen_uminv2048hi3                                   (rtx, rtx, rtx);
extern rtx        gen_mulv2048hi3                                    (rtx, rtx, rtx);
extern rtx        gen_divv2048hi3                                    (rtx, rtx, rtx);
extern rtx        gen_udivv2048hi3                                   (rtx, rtx, rtx);
extern rtx        gen_modv2048hi3                                    (rtx, rtx, rtx);
extern rtx        gen_umodv2048hi3                                   (rtx, rtx, rtx);
extern rtx        gen_addv1si3                                       (rtx, rtx, rtx);
extern rtx        gen_subv1si3                                       (rtx, rtx, rtx);
extern rtx        gen_andv1si3                                       (rtx, rtx, rtx);
extern rtx        gen_iorv1si3                                       (rtx, rtx, rtx);
extern rtx        gen_xorv1si3                                       (rtx, rtx, rtx);
extern rtx        gen_smaxv1si3                                      (rtx, rtx, rtx);
extern rtx        gen_umaxv1si3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv1si3                                      (rtx, rtx, rtx);
extern rtx        gen_uminv1si3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv1si3                                       (rtx, rtx, rtx);
extern rtx        gen_divv1si3                                       (rtx, rtx, rtx);
extern rtx        gen_udivv1si3                                      (rtx, rtx, rtx);
extern rtx        gen_modv1si3                                       (rtx, rtx, rtx);
extern rtx        gen_umodv1si3                                      (rtx, rtx, rtx);
extern rtx        gen_addv2si3                                       (rtx, rtx, rtx);
extern rtx        gen_subv2si3                                       (rtx, rtx, rtx);
extern rtx        gen_andv2si3                                       (rtx, rtx, rtx);
extern rtx        gen_iorv2si3                                       (rtx, rtx, rtx);
extern rtx        gen_xorv2si3                                       (rtx, rtx, rtx);
extern rtx        gen_smaxv2si3                                      (rtx, rtx, rtx);
extern rtx        gen_umaxv2si3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv2si3                                      (rtx, rtx, rtx);
extern rtx        gen_uminv2si3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv2si3                                       (rtx, rtx, rtx);
extern rtx        gen_divv2si3                                       (rtx, rtx, rtx);
extern rtx        gen_udivv2si3                                      (rtx, rtx, rtx);
extern rtx        gen_modv2si3                                       (rtx, rtx, rtx);
extern rtx        gen_umodv2si3                                      (rtx, rtx, rtx);
extern rtx        gen_addv4si3                                       (rtx, rtx, rtx);
extern rtx        gen_subv4si3                                       (rtx, rtx, rtx);
extern rtx        gen_andv4si3                                       (rtx, rtx, rtx);
extern rtx        gen_iorv4si3                                       (rtx, rtx, rtx);
extern rtx        gen_xorv4si3                                       (rtx, rtx, rtx);
extern rtx        gen_smaxv4si3                                      (rtx, rtx, rtx);
extern rtx        gen_umaxv4si3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv4si3                                      (rtx, rtx, rtx);
extern rtx        gen_uminv4si3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv4si3                                       (rtx, rtx, rtx);
extern rtx        gen_divv4si3                                       (rtx, rtx, rtx);
extern rtx        gen_udivv4si3                                      (rtx, rtx, rtx);
extern rtx        gen_modv4si3                                       (rtx, rtx, rtx);
extern rtx        gen_umodv4si3                                      (rtx, rtx, rtx);
extern rtx        gen_addv8si3                                       (rtx, rtx, rtx);
extern rtx        gen_subv8si3                                       (rtx, rtx, rtx);
extern rtx        gen_andv8si3                                       (rtx, rtx, rtx);
extern rtx        gen_iorv8si3                                       (rtx, rtx, rtx);
extern rtx        gen_xorv8si3                                       (rtx, rtx, rtx);
extern rtx        gen_smaxv8si3                                      (rtx, rtx, rtx);
extern rtx        gen_umaxv8si3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv8si3                                      (rtx, rtx, rtx);
extern rtx        gen_uminv8si3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv8si3                                       (rtx, rtx, rtx);
extern rtx        gen_divv8si3                                       (rtx, rtx, rtx);
extern rtx        gen_udivv8si3                                      (rtx, rtx, rtx);
extern rtx        gen_modv8si3                                       (rtx, rtx, rtx);
extern rtx        gen_umodv8si3                                      (rtx, rtx, rtx);
extern rtx        gen_addv16si3                                      (rtx, rtx, rtx);
extern rtx        gen_subv16si3                                      (rtx, rtx, rtx);
extern rtx        gen_andv16si3                                      (rtx, rtx, rtx);
extern rtx        gen_iorv16si3                                      (rtx, rtx, rtx);
extern rtx        gen_xorv16si3                                      (rtx, rtx, rtx);
extern rtx        gen_smaxv16si3                                     (rtx, rtx, rtx);
extern rtx        gen_umaxv16si3                                     (rtx, rtx, rtx);
extern rtx        gen_sminv16si3                                     (rtx, rtx, rtx);
extern rtx        gen_uminv16si3                                     (rtx, rtx, rtx);
extern rtx        gen_mulv16si3                                      (rtx, rtx, rtx);
extern rtx        gen_divv16si3                                      (rtx, rtx, rtx);
extern rtx        gen_udivv16si3                                     (rtx, rtx, rtx);
extern rtx        gen_modv16si3                                      (rtx, rtx, rtx);
extern rtx        gen_umodv16si3                                     (rtx, rtx, rtx);
extern rtx        gen_addv32si3                                      (rtx, rtx, rtx);
extern rtx        gen_subv32si3                                      (rtx, rtx, rtx);
extern rtx        gen_andv32si3                                      (rtx, rtx, rtx);
extern rtx        gen_iorv32si3                                      (rtx, rtx, rtx);
extern rtx        gen_xorv32si3                                      (rtx, rtx, rtx);
extern rtx        gen_smaxv32si3                                     (rtx, rtx, rtx);
extern rtx        gen_umaxv32si3                                     (rtx, rtx, rtx);
extern rtx        gen_sminv32si3                                     (rtx, rtx, rtx);
extern rtx        gen_uminv32si3                                     (rtx, rtx, rtx);
extern rtx        gen_mulv32si3                                      (rtx, rtx, rtx);
extern rtx        gen_divv32si3                                      (rtx, rtx, rtx);
extern rtx        gen_udivv32si3                                     (rtx, rtx, rtx);
extern rtx        gen_modv32si3                                      (rtx, rtx, rtx);
extern rtx        gen_umodv32si3                                     (rtx, rtx, rtx);
extern rtx        gen_addv64si3                                      (rtx, rtx, rtx);
extern rtx        gen_subv64si3                                      (rtx, rtx, rtx);
extern rtx        gen_andv64si3                                      (rtx, rtx, rtx);
extern rtx        gen_iorv64si3                                      (rtx, rtx, rtx);
extern rtx        gen_xorv64si3                                      (rtx, rtx, rtx);
extern rtx        gen_smaxv64si3                                     (rtx, rtx, rtx);
extern rtx        gen_umaxv64si3                                     (rtx, rtx, rtx);
extern rtx        gen_sminv64si3                                     (rtx, rtx, rtx);
extern rtx        gen_uminv64si3                                     (rtx, rtx, rtx);
extern rtx        gen_mulv64si3                                      (rtx, rtx, rtx);
extern rtx        gen_divv64si3                                      (rtx, rtx, rtx);
extern rtx        gen_udivv64si3                                     (rtx, rtx, rtx);
extern rtx        gen_modv64si3                                      (rtx, rtx, rtx);
extern rtx        gen_umodv64si3                                     (rtx, rtx, rtx);
extern rtx        gen_addv128si3                                     (rtx, rtx, rtx);
extern rtx        gen_subv128si3                                     (rtx, rtx, rtx);
extern rtx        gen_andv128si3                                     (rtx, rtx, rtx);
extern rtx        gen_iorv128si3                                     (rtx, rtx, rtx);
extern rtx        gen_xorv128si3                                     (rtx, rtx, rtx);
extern rtx        gen_smaxv128si3                                    (rtx, rtx, rtx);
extern rtx        gen_umaxv128si3                                    (rtx, rtx, rtx);
extern rtx        gen_sminv128si3                                    (rtx, rtx, rtx);
extern rtx        gen_uminv128si3                                    (rtx, rtx, rtx);
extern rtx        gen_mulv128si3                                     (rtx, rtx, rtx);
extern rtx        gen_divv128si3                                     (rtx, rtx, rtx);
extern rtx        gen_udivv128si3                                    (rtx, rtx, rtx);
extern rtx        gen_modv128si3                                     (rtx, rtx, rtx);
extern rtx        gen_umodv128si3                                    (rtx, rtx, rtx);
extern rtx        gen_addv256si3                                     (rtx, rtx, rtx);
extern rtx        gen_subv256si3                                     (rtx, rtx, rtx);
extern rtx        gen_andv256si3                                     (rtx, rtx, rtx);
extern rtx        gen_iorv256si3                                     (rtx, rtx, rtx);
extern rtx        gen_xorv256si3                                     (rtx, rtx, rtx);
extern rtx        gen_smaxv256si3                                    (rtx, rtx, rtx);
extern rtx        gen_umaxv256si3                                    (rtx, rtx, rtx);
extern rtx        gen_sminv256si3                                    (rtx, rtx, rtx);
extern rtx        gen_uminv256si3                                    (rtx, rtx, rtx);
extern rtx        gen_mulv256si3                                     (rtx, rtx, rtx);
extern rtx        gen_divv256si3                                     (rtx, rtx, rtx);
extern rtx        gen_udivv256si3                                    (rtx, rtx, rtx);
extern rtx        gen_modv256si3                                     (rtx, rtx, rtx);
extern rtx        gen_umodv256si3                                    (rtx, rtx, rtx);
extern rtx        gen_addv512si3                                     (rtx, rtx, rtx);
extern rtx        gen_subv512si3                                     (rtx, rtx, rtx);
extern rtx        gen_andv512si3                                     (rtx, rtx, rtx);
extern rtx        gen_iorv512si3                                     (rtx, rtx, rtx);
extern rtx        gen_xorv512si3                                     (rtx, rtx, rtx);
extern rtx        gen_smaxv512si3                                    (rtx, rtx, rtx);
extern rtx        gen_umaxv512si3                                    (rtx, rtx, rtx);
extern rtx        gen_sminv512si3                                    (rtx, rtx, rtx);
extern rtx        gen_uminv512si3                                    (rtx, rtx, rtx);
extern rtx        gen_mulv512si3                                     (rtx, rtx, rtx);
extern rtx        gen_divv512si3                                     (rtx, rtx, rtx);
extern rtx        gen_udivv512si3                                    (rtx, rtx, rtx);
extern rtx        gen_modv512si3                                     (rtx, rtx, rtx);
extern rtx        gen_umodv512si3                                    (rtx, rtx, rtx);
extern rtx        gen_addv1024si3                                    (rtx, rtx, rtx);
extern rtx        gen_subv1024si3                                    (rtx, rtx, rtx);
extern rtx        gen_andv1024si3                                    (rtx, rtx, rtx);
extern rtx        gen_iorv1024si3                                    (rtx, rtx, rtx);
extern rtx        gen_xorv1024si3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxv1024si3                                   (rtx, rtx, rtx);
extern rtx        gen_umaxv1024si3                                   (rtx, rtx, rtx);
extern rtx        gen_sminv1024si3                                   (rtx, rtx, rtx);
extern rtx        gen_uminv1024si3                                   (rtx, rtx, rtx);
extern rtx        gen_mulv1024si3                                    (rtx, rtx, rtx);
extern rtx        gen_divv1024si3                                    (rtx, rtx, rtx);
extern rtx        gen_udivv1024si3                                   (rtx, rtx, rtx);
extern rtx        gen_modv1024si3                                    (rtx, rtx, rtx);
extern rtx        gen_umodv1024si3                                   (rtx, rtx, rtx);
extern rtx        gen_addv1di3                                       (rtx, rtx, rtx);
extern rtx        gen_subv1di3                                       (rtx, rtx, rtx);
extern rtx        gen_andv1di3                                       (rtx, rtx, rtx);
extern rtx        gen_iorv1di3                                       (rtx, rtx, rtx);
extern rtx        gen_xorv1di3                                       (rtx, rtx, rtx);
extern rtx        gen_smaxv1di3                                      (rtx, rtx, rtx);
extern rtx        gen_umaxv1di3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv1di3                                      (rtx, rtx, rtx);
extern rtx        gen_uminv1di3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv1di3                                       (rtx, rtx, rtx);
extern rtx        gen_divv1di3                                       (rtx, rtx, rtx);
extern rtx        gen_udivv1di3                                      (rtx, rtx, rtx);
extern rtx        gen_modv1di3                                       (rtx, rtx, rtx);
extern rtx        gen_umodv1di3                                      (rtx, rtx, rtx);
extern rtx        gen_addv2di3                                       (rtx, rtx, rtx);
extern rtx        gen_subv2di3                                       (rtx, rtx, rtx);
extern rtx        gen_andv2di3                                       (rtx, rtx, rtx);
extern rtx        gen_iorv2di3                                       (rtx, rtx, rtx);
extern rtx        gen_xorv2di3                                       (rtx, rtx, rtx);
extern rtx        gen_smaxv2di3                                      (rtx, rtx, rtx);
extern rtx        gen_umaxv2di3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv2di3                                      (rtx, rtx, rtx);
extern rtx        gen_uminv2di3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv2di3                                       (rtx, rtx, rtx);
extern rtx        gen_divv2di3                                       (rtx, rtx, rtx);
extern rtx        gen_udivv2di3                                      (rtx, rtx, rtx);
extern rtx        gen_modv2di3                                       (rtx, rtx, rtx);
extern rtx        gen_umodv2di3                                      (rtx, rtx, rtx);
extern rtx        gen_addv4di3                                       (rtx, rtx, rtx);
extern rtx        gen_subv4di3                                       (rtx, rtx, rtx);
extern rtx        gen_andv4di3                                       (rtx, rtx, rtx);
extern rtx        gen_iorv4di3                                       (rtx, rtx, rtx);
extern rtx        gen_xorv4di3                                       (rtx, rtx, rtx);
extern rtx        gen_smaxv4di3                                      (rtx, rtx, rtx);
extern rtx        gen_umaxv4di3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv4di3                                      (rtx, rtx, rtx);
extern rtx        gen_uminv4di3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv4di3                                       (rtx, rtx, rtx);
extern rtx        gen_divv4di3                                       (rtx, rtx, rtx);
extern rtx        gen_udivv4di3                                      (rtx, rtx, rtx);
extern rtx        gen_modv4di3                                       (rtx, rtx, rtx);
extern rtx        gen_umodv4di3                                      (rtx, rtx, rtx);
extern rtx        gen_addv8di3                                       (rtx, rtx, rtx);
extern rtx        gen_subv8di3                                       (rtx, rtx, rtx);
extern rtx        gen_andv8di3                                       (rtx, rtx, rtx);
extern rtx        gen_iorv8di3                                       (rtx, rtx, rtx);
extern rtx        gen_xorv8di3                                       (rtx, rtx, rtx);
extern rtx        gen_smaxv8di3                                      (rtx, rtx, rtx);
extern rtx        gen_umaxv8di3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv8di3                                      (rtx, rtx, rtx);
extern rtx        gen_uminv8di3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv8di3                                       (rtx, rtx, rtx);
extern rtx        gen_divv8di3                                       (rtx, rtx, rtx);
extern rtx        gen_udivv8di3                                      (rtx, rtx, rtx);
extern rtx        gen_modv8di3                                       (rtx, rtx, rtx);
extern rtx        gen_umodv8di3                                      (rtx, rtx, rtx);
extern rtx        gen_addv16di3                                      (rtx, rtx, rtx);
extern rtx        gen_subv16di3                                      (rtx, rtx, rtx);
extern rtx        gen_andv16di3                                      (rtx, rtx, rtx);
extern rtx        gen_iorv16di3                                      (rtx, rtx, rtx);
extern rtx        gen_xorv16di3                                      (rtx, rtx, rtx);
extern rtx        gen_smaxv16di3                                     (rtx, rtx, rtx);
extern rtx        gen_umaxv16di3                                     (rtx, rtx, rtx);
extern rtx        gen_sminv16di3                                     (rtx, rtx, rtx);
extern rtx        gen_uminv16di3                                     (rtx, rtx, rtx);
extern rtx        gen_mulv16di3                                      (rtx, rtx, rtx);
extern rtx        gen_divv16di3                                      (rtx, rtx, rtx);
extern rtx        gen_udivv16di3                                     (rtx, rtx, rtx);
extern rtx        gen_modv16di3                                      (rtx, rtx, rtx);
extern rtx        gen_umodv16di3                                     (rtx, rtx, rtx);
extern rtx        gen_addv32di3                                      (rtx, rtx, rtx);
extern rtx        gen_subv32di3                                      (rtx, rtx, rtx);
extern rtx        gen_andv32di3                                      (rtx, rtx, rtx);
extern rtx        gen_iorv32di3                                      (rtx, rtx, rtx);
extern rtx        gen_xorv32di3                                      (rtx, rtx, rtx);
extern rtx        gen_smaxv32di3                                     (rtx, rtx, rtx);
extern rtx        gen_umaxv32di3                                     (rtx, rtx, rtx);
extern rtx        gen_sminv32di3                                     (rtx, rtx, rtx);
extern rtx        gen_uminv32di3                                     (rtx, rtx, rtx);
extern rtx        gen_mulv32di3                                      (rtx, rtx, rtx);
extern rtx        gen_divv32di3                                      (rtx, rtx, rtx);
extern rtx        gen_udivv32di3                                     (rtx, rtx, rtx);
extern rtx        gen_modv32di3                                      (rtx, rtx, rtx);
extern rtx        gen_umodv32di3                                     (rtx, rtx, rtx);
extern rtx        gen_addv64di3                                      (rtx, rtx, rtx);
extern rtx        gen_subv64di3                                      (rtx, rtx, rtx);
extern rtx        gen_andv64di3                                      (rtx, rtx, rtx);
extern rtx        gen_iorv64di3                                      (rtx, rtx, rtx);
extern rtx        gen_xorv64di3                                      (rtx, rtx, rtx);
extern rtx        gen_smaxv64di3                                     (rtx, rtx, rtx);
extern rtx        gen_umaxv64di3                                     (rtx, rtx, rtx);
extern rtx        gen_sminv64di3                                     (rtx, rtx, rtx);
extern rtx        gen_uminv64di3                                     (rtx, rtx, rtx);
extern rtx        gen_mulv64di3                                      (rtx, rtx, rtx);
extern rtx        gen_divv64di3                                      (rtx, rtx, rtx);
extern rtx        gen_udivv64di3                                     (rtx, rtx, rtx);
extern rtx        gen_modv64di3                                      (rtx, rtx, rtx);
extern rtx        gen_umodv64di3                                     (rtx, rtx, rtx);
extern rtx        gen_addv128di3                                     (rtx, rtx, rtx);
extern rtx        gen_subv128di3                                     (rtx, rtx, rtx);
extern rtx        gen_andv128di3                                     (rtx, rtx, rtx);
extern rtx        gen_iorv128di3                                     (rtx, rtx, rtx);
extern rtx        gen_xorv128di3                                     (rtx, rtx, rtx);
extern rtx        gen_smaxv128di3                                    (rtx, rtx, rtx);
extern rtx        gen_umaxv128di3                                    (rtx, rtx, rtx);
extern rtx        gen_sminv128di3                                    (rtx, rtx, rtx);
extern rtx        gen_uminv128di3                                    (rtx, rtx, rtx);
extern rtx        gen_mulv128di3                                     (rtx, rtx, rtx);
extern rtx        gen_divv128di3                                     (rtx, rtx, rtx);
extern rtx        gen_udivv128di3                                    (rtx, rtx, rtx);
extern rtx        gen_modv128di3                                     (rtx, rtx, rtx);
extern rtx        gen_umodv128di3                                    (rtx, rtx, rtx);
extern rtx        gen_addv256di3                                     (rtx, rtx, rtx);
extern rtx        gen_subv256di3                                     (rtx, rtx, rtx);
extern rtx        gen_andv256di3                                     (rtx, rtx, rtx);
extern rtx        gen_iorv256di3                                     (rtx, rtx, rtx);
extern rtx        gen_xorv256di3                                     (rtx, rtx, rtx);
extern rtx        gen_smaxv256di3                                    (rtx, rtx, rtx);
extern rtx        gen_umaxv256di3                                    (rtx, rtx, rtx);
extern rtx        gen_sminv256di3                                    (rtx, rtx, rtx);
extern rtx        gen_uminv256di3                                    (rtx, rtx, rtx);
extern rtx        gen_mulv256di3                                     (rtx, rtx, rtx);
extern rtx        gen_divv256di3                                     (rtx, rtx, rtx);
extern rtx        gen_udivv256di3                                    (rtx, rtx, rtx);
extern rtx        gen_modv256di3                                     (rtx, rtx, rtx);
extern rtx        gen_umodv256di3                                    (rtx, rtx, rtx);
extern rtx        gen_addv512di3                                     (rtx, rtx, rtx);
extern rtx        gen_subv512di3                                     (rtx, rtx, rtx);
extern rtx        gen_andv512di3                                     (rtx, rtx, rtx);
extern rtx        gen_iorv512di3                                     (rtx, rtx, rtx);
extern rtx        gen_xorv512di3                                     (rtx, rtx, rtx);
extern rtx        gen_smaxv512di3                                    (rtx, rtx, rtx);
extern rtx        gen_umaxv512di3                                    (rtx, rtx, rtx);
extern rtx        gen_sminv512di3                                    (rtx, rtx, rtx);
extern rtx        gen_uminv512di3                                    (rtx, rtx, rtx);
extern rtx        gen_mulv512di3                                     (rtx, rtx, rtx);
extern rtx        gen_divv512di3                                     (rtx, rtx, rtx);
extern rtx        gen_udivv512di3                                    (rtx, rtx, rtx);
extern rtx        gen_modv512di3                                     (rtx, rtx, rtx);
extern rtx        gen_umodv512di3                                    (rtx, rtx, rtx);
extern rtx        gen_ashlrvvm8qi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashrrvvm8qi3                                   (rtx, rtx, rtx);
extern rtx        gen_lshrrvvm8qi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashlrvvm4qi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashrrvvm4qi3                                   (rtx, rtx, rtx);
extern rtx        gen_lshrrvvm4qi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashlrvvm2qi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashrrvvm2qi3                                   (rtx, rtx, rtx);
extern rtx        gen_lshrrvvm2qi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashlrvvm1qi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashrrvvm1qi3                                   (rtx, rtx, rtx);
extern rtx        gen_lshrrvvm1qi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashlrvvm8hi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashrrvvm8hi3                                   (rtx, rtx, rtx);
extern rtx        gen_lshrrvvm8hi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashlrvvm4hi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashrrvvm4hi3                                   (rtx, rtx, rtx);
extern rtx        gen_lshrrvvm4hi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashlrvvm2hi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashrrvvm2hi3                                   (rtx, rtx, rtx);
extern rtx        gen_lshrrvvm2hi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashlrvvm1hi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashrrvvm1hi3                                   (rtx, rtx, rtx);
extern rtx        gen_lshrrvvm1hi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashlrvvm8si3                                   (rtx, rtx, rtx);
extern rtx        gen_ashrrvvm8si3                                   (rtx, rtx, rtx);
extern rtx        gen_lshrrvvm8si3                                   (rtx, rtx, rtx);
extern rtx        gen_ashlrvvm4si3                                   (rtx, rtx, rtx);
extern rtx        gen_ashrrvvm4si3                                   (rtx, rtx, rtx);
extern rtx        gen_lshrrvvm4si3                                   (rtx, rtx, rtx);
extern rtx        gen_ashlrvvm2si3                                   (rtx, rtx, rtx);
extern rtx        gen_ashrrvvm2si3                                   (rtx, rtx, rtx);
extern rtx        gen_lshrrvvm2si3                                   (rtx, rtx, rtx);
extern rtx        gen_ashlrvvm1si3                                   (rtx, rtx, rtx);
extern rtx        gen_ashrrvvm1si3                                   (rtx, rtx, rtx);
extern rtx        gen_lshrrvvm1si3                                   (rtx, rtx, rtx);
extern rtx        gen_ashlrvvm8di3                                   (rtx, rtx, rtx);
extern rtx        gen_ashrrvvm8di3                                   (rtx, rtx, rtx);
extern rtx        gen_lshrrvvm8di3                                   (rtx, rtx, rtx);
extern rtx        gen_ashlrvvm4di3                                   (rtx, rtx, rtx);
extern rtx        gen_ashrrvvm4di3                                   (rtx, rtx, rtx);
extern rtx        gen_lshrrvvm4di3                                   (rtx, rtx, rtx);
extern rtx        gen_ashlrvvm2di3                                   (rtx, rtx, rtx);
extern rtx        gen_ashrrvvm2di3                                   (rtx, rtx, rtx);
extern rtx        gen_lshrrvvm2di3                                   (rtx, rtx, rtx);
extern rtx        gen_ashlrvvm1di3                                   (rtx, rtx, rtx);
extern rtx        gen_ashrrvvm1di3                                   (rtx, rtx, rtx);
extern rtx        gen_lshrrvvm1di3                                   (rtx, rtx, rtx);
extern rtx        gen_ashlrvvmf2qi3                                  (rtx, rtx, rtx);
extern rtx        gen_ashrrvvmf2qi3                                  (rtx, rtx, rtx);
extern rtx        gen_lshrrvvmf2qi3                                  (rtx, rtx, rtx);
extern rtx        gen_ashlrvvmf4qi3                                  (rtx, rtx, rtx);
extern rtx        gen_ashrrvvmf4qi3                                  (rtx, rtx, rtx);
extern rtx        gen_lshrrvvmf4qi3                                  (rtx, rtx, rtx);
extern rtx        gen_ashlrvvmf8qi3                                  (rtx, rtx, rtx);
extern rtx        gen_ashrrvvmf8qi3                                  (rtx, rtx, rtx);
extern rtx        gen_lshrrvvmf8qi3                                  (rtx, rtx, rtx);
extern rtx        gen_ashlrvvmf2hi3                                  (rtx, rtx, rtx);
extern rtx        gen_ashrrvvmf2hi3                                  (rtx, rtx, rtx);
extern rtx        gen_lshrrvvmf2hi3                                  (rtx, rtx, rtx);
extern rtx        gen_ashlrvvmf4hi3                                  (rtx, rtx, rtx);
extern rtx        gen_ashrrvvmf4hi3                                  (rtx, rtx, rtx);
extern rtx        gen_lshrrvvmf4hi3                                  (rtx, rtx, rtx);
extern rtx        gen_ashlrvvmf2si3                                  (rtx, rtx, rtx);
extern rtx        gen_ashrrvvmf2si3                                  (rtx, rtx, rtx);
extern rtx        gen_lshrrvvmf2si3                                  (rtx, rtx, rtx);
extern rtx        gen_ashlv1qi3                                      (rtx, rtx, rtx);
extern rtx        gen_ashrv1qi3                                      (rtx, rtx, rtx);
extern rtx        gen_lshrv1qi3                                      (rtx, rtx, rtx);
extern rtx        gen_ashlv2qi3                                      (rtx, rtx, rtx);
extern rtx        gen_ashrv2qi3                                      (rtx, rtx, rtx);
extern rtx        gen_lshrv2qi3                                      (rtx, rtx, rtx);
extern rtx        gen_ashlv4qi3                                      (rtx, rtx, rtx);
extern rtx        gen_ashrv4qi3                                      (rtx, rtx, rtx);
extern rtx        gen_lshrv4qi3                                      (rtx, rtx, rtx);
extern rtx        gen_ashlv8qi3                                      (rtx, rtx, rtx);
extern rtx        gen_ashrv8qi3                                      (rtx, rtx, rtx);
extern rtx        gen_lshrv8qi3                                      (rtx, rtx, rtx);
extern rtx        gen_ashlv16qi3                                     (rtx, rtx, rtx);
extern rtx        gen_ashrv16qi3                                     (rtx, rtx, rtx);
extern rtx        gen_lshrv16qi3                                     (rtx, rtx, rtx);
extern rtx        gen_ashlv32qi3                                     (rtx, rtx, rtx);
extern rtx        gen_ashrv32qi3                                     (rtx, rtx, rtx);
extern rtx        gen_lshrv32qi3                                     (rtx, rtx, rtx);
extern rtx        gen_ashlv64qi3                                     (rtx, rtx, rtx);
extern rtx        gen_ashrv64qi3                                     (rtx, rtx, rtx);
extern rtx        gen_lshrv64qi3                                     (rtx, rtx, rtx);
extern rtx        gen_ashlv128qi3                                    (rtx, rtx, rtx);
extern rtx        gen_ashrv128qi3                                    (rtx, rtx, rtx);
extern rtx        gen_lshrv128qi3                                    (rtx, rtx, rtx);
extern rtx        gen_ashlv256qi3                                    (rtx, rtx, rtx);
extern rtx        gen_ashrv256qi3                                    (rtx, rtx, rtx);
extern rtx        gen_lshrv256qi3                                    (rtx, rtx, rtx);
extern rtx        gen_ashlv512qi3                                    (rtx, rtx, rtx);
extern rtx        gen_ashrv512qi3                                    (rtx, rtx, rtx);
extern rtx        gen_lshrv512qi3                                    (rtx, rtx, rtx);
extern rtx        gen_ashlv1024qi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashrv1024qi3                                   (rtx, rtx, rtx);
extern rtx        gen_lshrv1024qi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashlv2048qi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashrv2048qi3                                   (rtx, rtx, rtx);
extern rtx        gen_lshrv2048qi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashlv4096qi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashrv4096qi3                                   (rtx, rtx, rtx);
extern rtx        gen_lshrv4096qi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashlv1hi3                                      (rtx, rtx, rtx);
extern rtx        gen_ashrv1hi3                                      (rtx, rtx, rtx);
extern rtx        gen_lshrv1hi3                                      (rtx, rtx, rtx);
extern rtx        gen_ashlv2hi3                                      (rtx, rtx, rtx);
extern rtx        gen_ashrv2hi3                                      (rtx, rtx, rtx);
extern rtx        gen_lshrv2hi3                                      (rtx, rtx, rtx);
extern rtx        gen_ashlv4hi3                                      (rtx, rtx, rtx);
extern rtx        gen_ashrv4hi3                                      (rtx, rtx, rtx);
extern rtx        gen_lshrv4hi3                                      (rtx, rtx, rtx);
extern rtx        gen_ashlv8hi3                                      (rtx, rtx, rtx);
extern rtx        gen_ashrv8hi3                                      (rtx, rtx, rtx);
extern rtx        gen_lshrv8hi3                                      (rtx, rtx, rtx);
extern rtx        gen_ashlv16hi3                                     (rtx, rtx, rtx);
extern rtx        gen_ashrv16hi3                                     (rtx, rtx, rtx);
extern rtx        gen_lshrv16hi3                                     (rtx, rtx, rtx);
extern rtx        gen_ashlv32hi3                                     (rtx, rtx, rtx);
extern rtx        gen_ashrv32hi3                                     (rtx, rtx, rtx);
extern rtx        gen_lshrv32hi3                                     (rtx, rtx, rtx);
extern rtx        gen_ashlv64hi3                                     (rtx, rtx, rtx);
extern rtx        gen_ashrv64hi3                                     (rtx, rtx, rtx);
extern rtx        gen_lshrv64hi3                                     (rtx, rtx, rtx);
extern rtx        gen_ashlv128hi3                                    (rtx, rtx, rtx);
extern rtx        gen_ashrv128hi3                                    (rtx, rtx, rtx);
extern rtx        gen_lshrv128hi3                                    (rtx, rtx, rtx);
extern rtx        gen_ashlv256hi3                                    (rtx, rtx, rtx);
extern rtx        gen_ashrv256hi3                                    (rtx, rtx, rtx);
extern rtx        gen_lshrv256hi3                                    (rtx, rtx, rtx);
extern rtx        gen_ashlv512hi3                                    (rtx, rtx, rtx);
extern rtx        gen_ashrv512hi3                                    (rtx, rtx, rtx);
extern rtx        gen_lshrv512hi3                                    (rtx, rtx, rtx);
extern rtx        gen_ashlv1024hi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashrv1024hi3                                   (rtx, rtx, rtx);
extern rtx        gen_lshrv1024hi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashlv2048hi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashrv2048hi3                                   (rtx, rtx, rtx);
extern rtx        gen_lshrv2048hi3                                   (rtx, rtx, rtx);
extern rtx        gen_ashlv1si3                                      (rtx, rtx, rtx);
extern rtx        gen_ashrv1si3                                      (rtx, rtx, rtx);
extern rtx        gen_lshrv1si3                                      (rtx, rtx, rtx);
extern rtx        gen_ashlv2si3                                      (rtx, rtx, rtx);
extern rtx        gen_ashrv2si3                                      (rtx, rtx, rtx);
extern rtx        gen_lshrv2si3                                      (rtx, rtx, rtx);
extern rtx        gen_ashlv4si3                                      (rtx, rtx, rtx);
extern rtx        gen_ashrv4si3                                      (rtx, rtx, rtx);
extern rtx        gen_lshrv4si3                                      (rtx, rtx, rtx);
extern rtx        gen_ashlv8si3                                      (rtx, rtx, rtx);
extern rtx        gen_ashrv8si3                                      (rtx, rtx, rtx);
extern rtx        gen_lshrv8si3                                      (rtx, rtx, rtx);
extern rtx        gen_ashlv16si3                                     (rtx, rtx, rtx);
extern rtx        gen_ashrv16si3                                     (rtx, rtx, rtx);
extern rtx        gen_lshrv16si3                                     (rtx, rtx, rtx);
extern rtx        gen_ashlv32si3                                     (rtx, rtx, rtx);
extern rtx        gen_ashrv32si3                                     (rtx, rtx, rtx);
extern rtx        gen_lshrv32si3                                     (rtx, rtx, rtx);
extern rtx        gen_ashlv64si3                                     (rtx, rtx, rtx);
extern rtx        gen_ashrv64si3                                     (rtx, rtx, rtx);
extern rtx        gen_lshrv64si3                                     (rtx, rtx, rtx);
extern rtx        gen_ashlv128si3                                    (rtx, rtx, rtx);
extern rtx        gen_ashrv128si3                                    (rtx, rtx, rtx);
extern rtx        gen_lshrv128si3                                    (rtx, rtx, rtx);
extern rtx        gen_ashlv256si3                                    (rtx, rtx, rtx);
extern rtx        gen_ashrv256si3                                    (rtx, rtx, rtx);
extern rtx        gen_lshrv256si3                                    (rtx, rtx, rtx);
extern rtx        gen_ashlv512si3                                    (rtx, rtx, rtx);
extern rtx        gen_ashrv512si3                                    (rtx, rtx, rtx);
extern rtx        gen_lshrv512si3                                    (rtx, rtx, rtx);
extern rtx        gen_ashlv1024si3                                   (rtx, rtx, rtx);
extern rtx        gen_ashrv1024si3                                   (rtx, rtx, rtx);
extern rtx        gen_lshrv1024si3                                   (rtx, rtx, rtx);
extern rtx        gen_ashlv1di3                                      (rtx, rtx, rtx);
extern rtx        gen_ashrv1di3                                      (rtx, rtx, rtx);
extern rtx        gen_lshrv1di3                                      (rtx, rtx, rtx);
extern rtx        gen_ashlv2di3                                      (rtx, rtx, rtx);
extern rtx        gen_ashrv2di3                                      (rtx, rtx, rtx);
extern rtx        gen_lshrv2di3                                      (rtx, rtx, rtx);
extern rtx        gen_ashlv4di3                                      (rtx, rtx, rtx);
extern rtx        gen_ashrv4di3                                      (rtx, rtx, rtx);
extern rtx        gen_lshrv4di3                                      (rtx, rtx, rtx);
extern rtx        gen_ashlv8di3                                      (rtx, rtx, rtx);
extern rtx        gen_ashrv8di3                                      (rtx, rtx, rtx);
extern rtx        gen_lshrv8di3                                      (rtx, rtx, rtx);
extern rtx        gen_ashlv16di3                                     (rtx, rtx, rtx);
extern rtx        gen_ashrv16di3                                     (rtx, rtx, rtx);
extern rtx        gen_lshrv16di3                                     (rtx, rtx, rtx);
extern rtx        gen_ashlv32di3                                     (rtx, rtx, rtx);
extern rtx        gen_ashrv32di3                                     (rtx, rtx, rtx);
extern rtx        gen_lshrv32di3                                     (rtx, rtx, rtx);
extern rtx        gen_ashlv64di3                                     (rtx, rtx, rtx);
extern rtx        gen_ashrv64di3                                     (rtx, rtx, rtx);
extern rtx        gen_lshrv64di3                                     (rtx, rtx, rtx);
extern rtx        gen_ashlv128di3                                    (rtx, rtx, rtx);
extern rtx        gen_ashrv128di3                                    (rtx, rtx, rtx);
extern rtx        gen_lshrv128di3                                    (rtx, rtx, rtx);
extern rtx        gen_ashlv256di3                                    (rtx, rtx, rtx);
extern rtx        gen_ashrv256di3                                    (rtx, rtx, rtx);
extern rtx        gen_lshrv256di3                                    (rtx, rtx, rtx);
extern rtx        gen_ashlv512di3                                    (rtx, rtx, rtx);
extern rtx        gen_ashrv512di3                                    (rtx, rtx, rtx);
extern rtx        gen_lshrv512di3                                    (rtx, rtx, rtx);
extern rtx        gen_vashlrvvm8qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashrrvvm8qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vlshrrvvm8qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashlrvvm4qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashrrvvm4qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vlshrrvvm4qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashlrvvm2qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashrrvvm2qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vlshrrvvm2qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashlrvvm1qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashrrvvm1qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vlshrrvvm1qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashlrvvm8hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashrrvvm8hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vlshrrvvm8hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashlrvvm4hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashrrvvm4hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vlshrrvvm4hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashlrvvm2hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashrrvvm2hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vlshrrvvm2hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashlrvvm1hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashrrvvm1hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vlshrrvvm1hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashlrvvm8si3                                  (rtx, rtx, rtx);
extern rtx        gen_vashrrvvm8si3                                  (rtx, rtx, rtx);
extern rtx        gen_vlshrrvvm8si3                                  (rtx, rtx, rtx);
extern rtx        gen_vashlrvvm4si3                                  (rtx, rtx, rtx);
extern rtx        gen_vashrrvvm4si3                                  (rtx, rtx, rtx);
extern rtx        gen_vlshrrvvm4si3                                  (rtx, rtx, rtx);
extern rtx        gen_vashlrvvm2si3                                  (rtx, rtx, rtx);
extern rtx        gen_vashrrvvm2si3                                  (rtx, rtx, rtx);
extern rtx        gen_vlshrrvvm2si3                                  (rtx, rtx, rtx);
extern rtx        gen_vashlrvvm1si3                                  (rtx, rtx, rtx);
extern rtx        gen_vashrrvvm1si3                                  (rtx, rtx, rtx);
extern rtx        gen_vlshrrvvm1si3                                  (rtx, rtx, rtx);
extern rtx        gen_vashlrvvm8di3                                  (rtx, rtx, rtx);
extern rtx        gen_vashrrvvm8di3                                  (rtx, rtx, rtx);
extern rtx        gen_vlshrrvvm8di3                                  (rtx, rtx, rtx);
extern rtx        gen_vashlrvvm4di3                                  (rtx, rtx, rtx);
extern rtx        gen_vashrrvvm4di3                                  (rtx, rtx, rtx);
extern rtx        gen_vlshrrvvm4di3                                  (rtx, rtx, rtx);
extern rtx        gen_vashlrvvm2di3                                  (rtx, rtx, rtx);
extern rtx        gen_vashrrvvm2di3                                  (rtx, rtx, rtx);
extern rtx        gen_vlshrrvvm2di3                                  (rtx, rtx, rtx);
extern rtx        gen_vashlrvvm1di3                                  (rtx, rtx, rtx);
extern rtx        gen_vashrrvvm1di3                                  (rtx, rtx, rtx);
extern rtx        gen_vlshrrvvm1di3                                  (rtx, rtx, rtx);
extern rtx        gen_vashlrvvmf2qi3                                 (rtx, rtx, rtx);
extern rtx        gen_vashrrvvmf2qi3                                 (rtx, rtx, rtx);
extern rtx        gen_vlshrrvvmf2qi3                                 (rtx, rtx, rtx);
extern rtx        gen_vashlrvvmf4qi3                                 (rtx, rtx, rtx);
extern rtx        gen_vashrrvvmf4qi3                                 (rtx, rtx, rtx);
extern rtx        gen_vlshrrvvmf4qi3                                 (rtx, rtx, rtx);
extern rtx        gen_vashlrvvmf8qi3                                 (rtx, rtx, rtx);
extern rtx        gen_vashrrvvmf8qi3                                 (rtx, rtx, rtx);
extern rtx        gen_vlshrrvvmf8qi3                                 (rtx, rtx, rtx);
extern rtx        gen_vashlrvvmf2hi3                                 (rtx, rtx, rtx);
extern rtx        gen_vashrrvvmf2hi3                                 (rtx, rtx, rtx);
extern rtx        gen_vlshrrvvmf2hi3                                 (rtx, rtx, rtx);
extern rtx        gen_vashlrvvmf4hi3                                 (rtx, rtx, rtx);
extern rtx        gen_vashrrvvmf4hi3                                 (rtx, rtx, rtx);
extern rtx        gen_vlshrrvvmf4hi3                                 (rtx, rtx, rtx);
extern rtx        gen_vashlrvvmf2si3                                 (rtx, rtx, rtx);
extern rtx        gen_vashrrvvmf2si3                                 (rtx, rtx, rtx);
extern rtx        gen_vlshrrvvmf2si3                                 (rtx, rtx, rtx);
extern rtx        gen_vashlv1qi3                                     (rtx, rtx, rtx);
extern rtx        gen_vashrv1qi3                                     (rtx, rtx, rtx);
extern rtx        gen_vlshrv1qi3                                     (rtx, rtx, rtx);
extern rtx        gen_vashlv2qi3                                     (rtx, rtx, rtx);
extern rtx        gen_vashrv2qi3                                     (rtx, rtx, rtx);
extern rtx        gen_vlshrv2qi3                                     (rtx, rtx, rtx);
extern rtx        gen_vashlv4qi3                                     (rtx, rtx, rtx);
extern rtx        gen_vashrv4qi3                                     (rtx, rtx, rtx);
extern rtx        gen_vlshrv4qi3                                     (rtx, rtx, rtx);
extern rtx        gen_vashlv8qi3                                     (rtx, rtx, rtx);
extern rtx        gen_vashrv8qi3                                     (rtx, rtx, rtx);
extern rtx        gen_vlshrv8qi3                                     (rtx, rtx, rtx);
extern rtx        gen_vashlv16qi3                                    (rtx, rtx, rtx);
extern rtx        gen_vashrv16qi3                                    (rtx, rtx, rtx);
extern rtx        gen_vlshrv16qi3                                    (rtx, rtx, rtx);
extern rtx        gen_vashlv32qi3                                    (rtx, rtx, rtx);
extern rtx        gen_vashrv32qi3                                    (rtx, rtx, rtx);
extern rtx        gen_vlshrv32qi3                                    (rtx, rtx, rtx);
extern rtx        gen_vashlv64qi3                                    (rtx, rtx, rtx);
extern rtx        gen_vashrv64qi3                                    (rtx, rtx, rtx);
extern rtx        gen_vlshrv64qi3                                    (rtx, rtx, rtx);
extern rtx        gen_vashlv128qi3                                   (rtx, rtx, rtx);
extern rtx        gen_vashrv128qi3                                   (rtx, rtx, rtx);
extern rtx        gen_vlshrv128qi3                                   (rtx, rtx, rtx);
extern rtx        gen_vashlv256qi3                                   (rtx, rtx, rtx);
extern rtx        gen_vashrv256qi3                                   (rtx, rtx, rtx);
extern rtx        gen_vlshrv256qi3                                   (rtx, rtx, rtx);
extern rtx        gen_vashlv512qi3                                   (rtx, rtx, rtx);
extern rtx        gen_vashrv512qi3                                   (rtx, rtx, rtx);
extern rtx        gen_vlshrv512qi3                                   (rtx, rtx, rtx);
extern rtx        gen_vashlv1024qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashrv1024qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vlshrv1024qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashlv2048qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashrv2048qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vlshrv2048qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashlv4096qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashrv4096qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vlshrv4096qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashlv1hi3                                     (rtx, rtx, rtx);
extern rtx        gen_vashrv1hi3                                     (rtx, rtx, rtx);
extern rtx        gen_vlshrv1hi3                                     (rtx, rtx, rtx);
extern rtx        gen_vashlv2hi3                                     (rtx, rtx, rtx);
extern rtx        gen_vashrv2hi3                                     (rtx, rtx, rtx);
extern rtx        gen_vlshrv2hi3                                     (rtx, rtx, rtx);
extern rtx        gen_vashlv4hi3                                     (rtx, rtx, rtx);
extern rtx        gen_vashrv4hi3                                     (rtx, rtx, rtx);
extern rtx        gen_vlshrv4hi3                                     (rtx, rtx, rtx);
extern rtx        gen_vashlv8hi3                                     (rtx, rtx, rtx);
extern rtx        gen_vashrv8hi3                                     (rtx, rtx, rtx);
extern rtx        gen_vlshrv8hi3                                     (rtx, rtx, rtx);
extern rtx        gen_vashlv16hi3                                    (rtx, rtx, rtx);
extern rtx        gen_vashrv16hi3                                    (rtx, rtx, rtx);
extern rtx        gen_vlshrv16hi3                                    (rtx, rtx, rtx);
extern rtx        gen_vashlv32hi3                                    (rtx, rtx, rtx);
extern rtx        gen_vashrv32hi3                                    (rtx, rtx, rtx);
extern rtx        gen_vlshrv32hi3                                    (rtx, rtx, rtx);
extern rtx        gen_vashlv64hi3                                    (rtx, rtx, rtx);
extern rtx        gen_vashrv64hi3                                    (rtx, rtx, rtx);
extern rtx        gen_vlshrv64hi3                                    (rtx, rtx, rtx);
extern rtx        gen_vashlv128hi3                                   (rtx, rtx, rtx);
extern rtx        gen_vashrv128hi3                                   (rtx, rtx, rtx);
extern rtx        gen_vlshrv128hi3                                   (rtx, rtx, rtx);
extern rtx        gen_vashlv256hi3                                   (rtx, rtx, rtx);
extern rtx        gen_vashrv256hi3                                   (rtx, rtx, rtx);
extern rtx        gen_vlshrv256hi3                                   (rtx, rtx, rtx);
extern rtx        gen_vashlv512hi3                                   (rtx, rtx, rtx);
extern rtx        gen_vashrv512hi3                                   (rtx, rtx, rtx);
extern rtx        gen_vlshrv512hi3                                   (rtx, rtx, rtx);
extern rtx        gen_vashlv1024hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashrv1024hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vlshrv1024hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashlv2048hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashrv2048hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vlshrv2048hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vashlv1si3                                     (rtx, rtx, rtx);
extern rtx        gen_vashrv1si3                                     (rtx, rtx, rtx);
extern rtx        gen_vlshrv1si3                                     (rtx, rtx, rtx);
extern rtx        gen_vashlv2si3                                     (rtx, rtx, rtx);
extern rtx        gen_vashrv2si3                                     (rtx, rtx, rtx);
extern rtx        gen_vlshrv2si3                                     (rtx, rtx, rtx);
extern rtx        gen_vashlv4si3                                     (rtx, rtx, rtx);
extern rtx        gen_vashrv4si3                                     (rtx, rtx, rtx);
extern rtx        gen_vlshrv4si3                                     (rtx, rtx, rtx);
extern rtx        gen_vashlv8si3                                     (rtx, rtx, rtx);
extern rtx        gen_vashrv8si3                                     (rtx, rtx, rtx);
extern rtx        gen_vlshrv8si3                                     (rtx, rtx, rtx);
extern rtx        gen_vashlv16si3                                    (rtx, rtx, rtx);
extern rtx        gen_vashrv16si3                                    (rtx, rtx, rtx);
extern rtx        gen_vlshrv16si3                                    (rtx, rtx, rtx);
extern rtx        gen_vashlv32si3                                    (rtx, rtx, rtx);
extern rtx        gen_vashrv32si3                                    (rtx, rtx, rtx);
extern rtx        gen_vlshrv32si3                                    (rtx, rtx, rtx);
extern rtx        gen_vashlv64si3                                    (rtx, rtx, rtx);
extern rtx        gen_vashrv64si3                                    (rtx, rtx, rtx);
extern rtx        gen_vlshrv64si3                                    (rtx, rtx, rtx);
extern rtx        gen_vashlv128si3                                   (rtx, rtx, rtx);
extern rtx        gen_vashrv128si3                                   (rtx, rtx, rtx);
extern rtx        gen_vlshrv128si3                                   (rtx, rtx, rtx);
extern rtx        gen_vashlv256si3                                   (rtx, rtx, rtx);
extern rtx        gen_vashrv256si3                                   (rtx, rtx, rtx);
extern rtx        gen_vlshrv256si3                                   (rtx, rtx, rtx);
extern rtx        gen_vashlv512si3                                   (rtx, rtx, rtx);
extern rtx        gen_vashrv512si3                                   (rtx, rtx, rtx);
extern rtx        gen_vlshrv512si3                                   (rtx, rtx, rtx);
extern rtx        gen_vashlv1024si3                                  (rtx, rtx, rtx);
extern rtx        gen_vashrv1024si3                                  (rtx, rtx, rtx);
extern rtx        gen_vlshrv1024si3                                  (rtx, rtx, rtx);
extern rtx        gen_vashlv1di3                                     (rtx, rtx, rtx);
extern rtx        gen_vashrv1di3                                     (rtx, rtx, rtx);
extern rtx        gen_vlshrv1di3                                     (rtx, rtx, rtx);
extern rtx        gen_vashlv2di3                                     (rtx, rtx, rtx);
extern rtx        gen_vashrv2di3                                     (rtx, rtx, rtx);
extern rtx        gen_vlshrv2di3                                     (rtx, rtx, rtx);
extern rtx        gen_vashlv4di3                                     (rtx, rtx, rtx);
extern rtx        gen_vashrv4di3                                     (rtx, rtx, rtx);
extern rtx        gen_vlshrv4di3                                     (rtx, rtx, rtx);
extern rtx        gen_vashlv8di3                                     (rtx, rtx, rtx);
extern rtx        gen_vashrv8di3                                     (rtx, rtx, rtx);
extern rtx        gen_vlshrv8di3                                     (rtx, rtx, rtx);
extern rtx        gen_vashlv16di3                                    (rtx, rtx, rtx);
extern rtx        gen_vashrv16di3                                    (rtx, rtx, rtx);
extern rtx        gen_vlshrv16di3                                    (rtx, rtx, rtx);
extern rtx        gen_vashlv32di3                                    (rtx, rtx, rtx);
extern rtx        gen_vashrv32di3                                    (rtx, rtx, rtx);
extern rtx        gen_vlshrv32di3                                    (rtx, rtx, rtx);
extern rtx        gen_vashlv64di3                                    (rtx, rtx, rtx);
extern rtx        gen_vashrv64di3                                    (rtx, rtx, rtx);
extern rtx        gen_vlshrv64di3                                    (rtx, rtx, rtx);
extern rtx        gen_vashlv128di3                                   (rtx, rtx, rtx);
extern rtx        gen_vashrv128di3                                   (rtx, rtx, rtx);
extern rtx        gen_vlshrv128di3                                   (rtx, rtx, rtx);
extern rtx        gen_vashlv256di3                                   (rtx, rtx, rtx);
extern rtx        gen_vashrv256di3                                   (rtx, rtx, rtx);
extern rtx        gen_vlshrv256di3                                   (rtx, rtx, rtx);
extern rtx        gen_vashlv512di3                                   (rtx, rtx, rtx);
extern rtx        gen_vashrv512di3                                   (rtx, rtx, rtx);
extern rtx        gen_vlshrv512di3                                   (rtx, rtx, rtx);
extern rtx        gen_andrvvmf64bi3                                  (rtx, rtx, rtx);
extern rtx        gen_iorrvvmf64bi3                                  (rtx, rtx, rtx);
extern rtx        gen_xorrvvmf64bi3                                  (rtx, rtx, rtx);
extern rtx        gen_andrvvmf32bi3                                  (rtx, rtx, rtx);
extern rtx        gen_iorrvvmf32bi3                                  (rtx, rtx, rtx);
extern rtx        gen_xorrvvmf32bi3                                  (rtx, rtx, rtx);
extern rtx        gen_andrvvmf16bi3                                  (rtx, rtx, rtx);
extern rtx        gen_iorrvvmf16bi3                                  (rtx, rtx, rtx);
extern rtx        gen_xorrvvmf16bi3                                  (rtx, rtx, rtx);
extern rtx        gen_andrvvmf8bi3                                   (rtx, rtx, rtx);
extern rtx        gen_iorrvvmf8bi3                                   (rtx, rtx, rtx);
extern rtx        gen_xorrvvmf8bi3                                   (rtx, rtx, rtx);
extern rtx        gen_andrvvmf4bi3                                   (rtx, rtx, rtx);
extern rtx        gen_iorrvvmf4bi3                                   (rtx, rtx, rtx);
extern rtx        gen_xorrvvmf4bi3                                   (rtx, rtx, rtx);
extern rtx        gen_andrvvmf2bi3                                   (rtx, rtx, rtx);
extern rtx        gen_iorrvvmf2bi3                                   (rtx, rtx, rtx);
extern rtx        gen_xorrvvmf2bi3                                   (rtx, rtx, rtx);
extern rtx        gen_andrvvm1bi3                                    (rtx, rtx, rtx);
extern rtx        gen_iorrvvm1bi3                                    (rtx, rtx, rtx);
extern rtx        gen_xorrvvm1bi3                                    (rtx, rtx, rtx);
extern rtx        gen_andv1bi3                                       (rtx, rtx, rtx);
extern rtx        gen_iorv1bi3                                       (rtx, rtx, rtx);
extern rtx        gen_xorv1bi3                                       (rtx, rtx, rtx);
extern rtx        gen_andv2bi3                                       (rtx, rtx, rtx);
extern rtx        gen_iorv2bi3                                       (rtx, rtx, rtx);
extern rtx        gen_xorv2bi3                                       (rtx, rtx, rtx);
extern rtx        gen_andv4bi3                                       (rtx, rtx, rtx);
extern rtx        gen_iorv4bi3                                       (rtx, rtx, rtx);
extern rtx        gen_xorv4bi3                                       (rtx, rtx, rtx);
extern rtx        gen_andv8bi3                                       (rtx, rtx, rtx);
extern rtx        gen_iorv8bi3                                       (rtx, rtx, rtx);
extern rtx        gen_xorv8bi3                                       (rtx, rtx, rtx);
extern rtx        gen_andv16bi3                                      (rtx, rtx, rtx);
extern rtx        gen_iorv16bi3                                      (rtx, rtx, rtx);
extern rtx        gen_xorv16bi3                                      (rtx, rtx, rtx);
extern rtx        gen_andv32bi3                                      (rtx, rtx, rtx);
extern rtx        gen_iorv32bi3                                      (rtx, rtx, rtx);
extern rtx        gen_xorv32bi3                                      (rtx, rtx, rtx);
extern rtx        gen_andv64bi3                                      (rtx, rtx, rtx);
extern rtx        gen_iorv64bi3                                      (rtx, rtx, rtx);
extern rtx        gen_xorv64bi3                                      (rtx, rtx, rtx);
extern rtx        gen_andv128bi3                                     (rtx, rtx, rtx);
extern rtx        gen_iorv128bi3                                     (rtx, rtx, rtx);
extern rtx        gen_xorv128bi3                                     (rtx, rtx, rtx);
extern rtx        gen_andv256bi3                                     (rtx, rtx, rtx);
extern rtx        gen_iorv256bi3                                     (rtx, rtx, rtx);
extern rtx        gen_xorv256bi3                                     (rtx, rtx, rtx);
extern rtx        gen_andv512bi3                                     (rtx, rtx, rtx);
extern rtx        gen_iorv512bi3                                     (rtx, rtx, rtx);
extern rtx        gen_xorv512bi3                                     (rtx, rtx, rtx);
extern rtx        gen_andv1024bi3                                    (rtx, rtx, rtx);
extern rtx        gen_iorv1024bi3                                    (rtx, rtx, rtx);
extern rtx        gen_xorv1024bi3                                    (rtx, rtx, rtx);
extern rtx        gen_andv2048bi3                                    (rtx, rtx, rtx);
extern rtx        gen_iorv2048bi3                                    (rtx, rtx, rtx);
extern rtx        gen_xorv2048bi3                                    (rtx, rtx, rtx);
extern rtx        gen_andv4096bi3                                    (rtx, rtx, rtx);
extern rtx        gen_iorv4096bi3                                    (rtx, rtx, rtx);
extern rtx        gen_xorv4096bi3                                    (rtx, rtx, rtx);
extern rtx        gen_one_cmplrvvmf64bi2                             (rtx, rtx);
extern rtx        gen_one_cmplrvvmf32bi2                             (rtx, rtx);
extern rtx        gen_one_cmplrvvmf16bi2                             (rtx, rtx);
extern rtx        gen_one_cmplrvvmf8bi2                              (rtx, rtx);
extern rtx        gen_one_cmplrvvmf4bi2                              (rtx, rtx);
extern rtx        gen_one_cmplrvvmf2bi2                              (rtx, rtx);
extern rtx        gen_one_cmplrvvm1bi2                               (rtx, rtx);
extern rtx        gen_one_cmplv1bi2                                  (rtx, rtx);
extern rtx        gen_one_cmplv2bi2                                  (rtx, rtx);
extern rtx        gen_one_cmplv4bi2                                  (rtx, rtx);
extern rtx        gen_one_cmplv8bi2                                  (rtx, rtx);
extern rtx        gen_one_cmplv16bi2                                 (rtx, rtx);
extern rtx        gen_one_cmplv32bi2                                 (rtx, rtx);
extern rtx        gen_one_cmplv64bi2                                 (rtx, rtx);
extern rtx        gen_one_cmplv128bi2                                (rtx, rtx);
extern rtx        gen_one_cmplv256bi2                                (rtx, rtx);
extern rtx        gen_one_cmplv512bi2                                (rtx, rtx);
extern rtx        gen_one_cmplv1024bi2                               (rtx, rtx);
extern rtx        gen_one_cmplv2048bi2                               (rtx, rtx);
extern rtx        gen_one_cmplv4096bi2                               (rtx, rtx);
extern rtx        gen_vcond_mask_rvvm8qirvvm1bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm4qirvvmf2bi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm2qirvvmf4bi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm1qirvvmf8bi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm8hirvvmf2bi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm4hirvvmf4bi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm2hirvvmf8bi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm1hirvvmf16bi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm8sirvvmf4bi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm4sirvvmf8bi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm2sirvvmf16bi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm1sirvvmf32bi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm8dirvvmf8bi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm4dirvvmf16bi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm2dirvvmf32bi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm1dirvvmf64bi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvmf2qirvvmf16bi                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvmf4qirvvmf32bi                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvmf8qirvvmf64bi                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvmf2hirvvmf32bi                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvmf4hirvvmf64bi                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvmf2sirvvmf64bi                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm8hfrvvmf2bi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm4hfrvvmf4bi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm2hfrvvmf8bi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm1hfrvvmf16bi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvmf2hfrvvmf32bi                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvmf4hfrvvmf64bi                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm8sfrvvmf4bi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm4sfrvvmf8bi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm2sfrvvmf16bi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm1sfrvvmf32bi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvmf2sfrvvmf64bi                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm8dfrvvmf8bi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm4dfrvvmf16bi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm2dfrvvmf32bi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm1dfrvvmf64bi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm8bfrvvmf2bi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm4bfrvvmf4bi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm2bfrvvmf8bi                     (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm1bfrvvmf16bi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvmf2bfrvvmf32bi                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvmf4bfrvvmf64bi                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v1qiv1bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v2qiv2bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v4qiv4bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v8qiv8bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v16qiv16bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v32qiv32bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v64qiv64bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v128qiv128bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v256qiv256bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v512qiv512bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v1024qiv1024bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v2048qiv2048bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v4096qiv4096bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v1hiv1bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v2hiv2bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v4hiv4bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v8hiv8bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v16hiv16bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v32hiv32bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v64hiv64bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v128hiv128bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v256hiv256bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v512hiv512bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v1024hiv1024bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v2048hiv2048bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v1siv1bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v2siv2bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v4siv4bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v8siv8bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v16siv16bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v32siv32bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v64siv64bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v128siv128bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v256siv256bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v512siv512bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v1024siv1024bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v1div1bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v2div2bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v4div4bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v8div8bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v16div16bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v32div32bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v64div64bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v128div128bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v256div256bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v512div512bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v1hfv1bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v2hfv2bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v4hfv4bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v8hfv8bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v16hfv16bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v32hfv32bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v64hfv64bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v128hfv128bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v256hfv256bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v512hfv512bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v1024hfv1024bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v2048hfv2048bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v1sfv1bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v2sfv2bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v4sfv4bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v8sfv8bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v16sfv16bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v32sfv32bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v64sfv64bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v128sfv128bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v256sfv256bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v512sfv512bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v1024sfv1024bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v1dfv1bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v2dfv2bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v4dfv4bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v8dfv8bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v16dfv16bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v32dfv32bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v64dfv64bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v128dfv128bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v256dfv256bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v512dfv512bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v1bfv1bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v2bfv2bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v4bfv4bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v8bfv8bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v16bfv16bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v32bfv32bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v64bfv64bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v128bfv128bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v256bfv256bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v512bfv512bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v1024bfv1024bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v2048bfv2048bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_extendrvvm4qirvvm8hi2                          (rtx, rtx);
extern rtx        gen_zero_extendrvvm4qirvvm8hi2                     (rtx, rtx);
extern rtx        gen_extendrvvm2qirvvm4hi2                          (rtx, rtx);
extern rtx        gen_zero_extendrvvm2qirvvm4hi2                     (rtx, rtx);
extern rtx        gen_extendrvvm1qirvvm2hi2                          (rtx, rtx);
extern rtx        gen_zero_extendrvvm1qirvvm2hi2                     (rtx, rtx);
extern rtx        gen_extendrvvmf2qirvvm1hi2                         (rtx, rtx);
extern rtx        gen_zero_extendrvvmf2qirvvm1hi2                    (rtx, rtx);
extern rtx        gen_extendrvvmf4qirvvmf2hi2                        (rtx, rtx);
extern rtx        gen_zero_extendrvvmf4qirvvmf2hi2                   (rtx, rtx);
extern rtx        gen_extendrvvmf8qirvvmf4hi2                        (rtx, rtx);
extern rtx        gen_zero_extendrvvmf8qirvvmf4hi2                   (rtx, rtx);
extern rtx        gen_extendrvvm4hirvvm8si2                          (rtx, rtx);
extern rtx        gen_zero_extendrvvm4hirvvm8si2                     (rtx, rtx);
extern rtx        gen_extendrvvm2hirvvm4si2                          (rtx, rtx);
extern rtx        gen_zero_extendrvvm2hirvvm4si2                     (rtx, rtx);
extern rtx        gen_extendrvvm1hirvvm2si2                          (rtx, rtx);
extern rtx        gen_zero_extendrvvm1hirvvm2si2                     (rtx, rtx);
extern rtx        gen_extendrvvmf2hirvvm1si2                         (rtx, rtx);
extern rtx        gen_zero_extendrvvmf2hirvvm1si2                    (rtx, rtx);
extern rtx        gen_extendrvvmf4hirvvmf2si2                        (rtx, rtx);
extern rtx        gen_zero_extendrvvmf4hirvvmf2si2                   (rtx, rtx);
extern rtx        gen_extendrvvm4sirvvm8di2                          (rtx, rtx);
extern rtx        gen_zero_extendrvvm4sirvvm8di2                     (rtx, rtx);
extern rtx        gen_extendrvvm2sirvvm4di2                          (rtx, rtx);
extern rtx        gen_zero_extendrvvm2sirvvm4di2                     (rtx, rtx);
extern rtx        gen_extendrvvm1sirvvm2di2                          (rtx, rtx);
extern rtx        gen_zero_extendrvvm1sirvvm2di2                     (rtx, rtx);
extern rtx        gen_extendrvvmf2sirvvm1di2                         (rtx, rtx);
extern rtx        gen_zero_extendrvvmf2sirvvm1di2                    (rtx, rtx);
extern rtx        gen_extendv1qiv1hi2                                (rtx, rtx);
extern rtx        gen_zero_extendv1qiv1hi2                           (rtx, rtx);
extern rtx        gen_extendv2qiv2hi2                                (rtx, rtx);
extern rtx        gen_zero_extendv2qiv2hi2                           (rtx, rtx);
extern rtx        gen_extendv4qiv4hi2                                (rtx, rtx);
extern rtx        gen_zero_extendv4qiv4hi2                           (rtx, rtx);
extern rtx        gen_extendv8qiv8hi2                                (rtx, rtx);
extern rtx        gen_zero_extendv8qiv8hi2                           (rtx, rtx);
extern rtx        gen_extendv16qiv16hi2                              (rtx, rtx);
extern rtx        gen_zero_extendv16qiv16hi2                         (rtx, rtx);
extern rtx        gen_extendv32qiv32hi2                              (rtx, rtx);
extern rtx        gen_zero_extendv32qiv32hi2                         (rtx, rtx);
extern rtx        gen_extendv64qiv64hi2                              (rtx, rtx);
extern rtx        gen_zero_extendv64qiv64hi2                         (rtx, rtx);
extern rtx        gen_extendv128qiv128hi2                            (rtx, rtx);
extern rtx        gen_zero_extendv128qiv128hi2                       (rtx, rtx);
extern rtx        gen_extendv256qiv256hi2                            (rtx, rtx);
extern rtx        gen_zero_extendv256qiv256hi2                       (rtx, rtx);
extern rtx        gen_extendv512qiv512hi2                            (rtx, rtx);
extern rtx        gen_zero_extendv512qiv512hi2                       (rtx, rtx);
extern rtx        gen_extendv1024qiv1024hi2                          (rtx, rtx);
extern rtx        gen_zero_extendv1024qiv1024hi2                     (rtx, rtx);
extern rtx        gen_extendv2048qiv2048hi2                          (rtx, rtx);
extern rtx        gen_zero_extendv2048qiv2048hi2                     (rtx, rtx);
extern rtx        gen_extendv1hiv1si2                                (rtx, rtx);
extern rtx        gen_zero_extendv1hiv1si2                           (rtx, rtx);
extern rtx        gen_extendv2hiv2si2                                (rtx, rtx);
extern rtx        gen_zero_extendv2hiv2si2                           (rtx, rtx);
extern rtx        gen_extendv4hiv4si2                                (rtx, rtx);
extern rtx        gen_zero_extendv4hiv4si2                           (rtx, rtx);
extern rtx        gen_extendv8hiv8si2                                (rtx, rtx);
extern rtx        gen_zero_extendv8hiv8si2                           (rtx, rtx);
extern rtx        gen_extendv16hiv16si2                              (rtx, rtx);
extern rtx        gen_zero_extendv16hiv16si2                         (rtx, rtx);
extern rtx        gen_extendv32hiv32si2                              (rtx, rtx);
extern rtx        gen_zero_extendv32hiv32si2                         (rtx, rtx);
extern rtx        gen_extendv64hiv64si2                              (rtx, rtx);
extern rtx        gen_zero_extendv64hiv64si2                         (rtx, rtx);
extern rtx        gen_extendv128hiv128si2                            (rtx, rtx);
extern rtx        gen_zero_extendv128hiv128si2                       (rtx, rtx);
extern rtx        gen_extendv256hiv256si2                            (rtx, rtx);
extern rtx        gen_zero_extendv256hiv256si2                       (rtx, rtx);
extern rtx        gen_extendv512hiv512si2                            (rtx, rtx);
extern rtx        gen_zero_extendv512hiv512si2                       (rtx, rtx);
extern rtx        gen_extendv1024hiv1024si2                          (rtx, rtx);
extern rtx        gen_zero_extendv1024hiv1024si2                     (rtx, rtx);
extern rtx        gen_extendv1siv1di2                                (rtx, rtx);
extern rtx        gen_zero_extendv1siv1di2                           (rtx, rtx);
extern rtx        gen_extendv2siv2di2                                (rtx, rtx);
extern rtx        gen_zero_extendv2siv2di2                           (rtx, rtx);
extern rtx        gen_extendv4siv4di2                                (rtx, rtx);
extern rtx        gen_zero_extendv4siv4di2                           (rtx, rtx);
extern rtx        gen_extendv8siv8di2                                (rtx, rtx);
extern rtx        gen_zero_extendv8siv8di2                           (rtx, rtx);
extern rtx        gen_extendv16siv16di2                              (rtx, rtx);
extern rtx        gen_zero_extendv16siv16di2                         (rtx, rtx);
extern rtx        gen_extendv32siv32di2                              (rtx, rtx);
extern rtx        gen_zero_extendv32siv32di2                         (rtx, rtx);
extern rtx        gen_extendv64siv64di2                              (rtx, rtx);
extern rtx        gen_zero_extendv64siv64di2                         (rtx, rtx);
extern rtx        gen_extendv128siv128di2                            (rtx, rtx);
extern rtx        gen_zero_extendv128siv128di2                       (rtx, rtx);
extern rtx        gen_extendv256siv256di2                            (rtx, rtx);
extern rtx        gen_zero_extendv256siv256di2                       (rtx, rtx);
extern rtx        gen_extendv512siv512di2                            (rtx, rtx);
extern rtx        gen_zero_extendv512siv512di2                       (rtx, rtx);
extern rtx        gen_extendrvvm2qirvvm8si2                          (rtx, rtx);
extern rtx        gen_zero_extendrvvm2qirvvm8si2                     (rtx, rtx);
extern rtx        gen_extendrvvm1qirvvm4si2                          (rtx, rtx);
extern rtx        gen_zero_extendrvvm1qirvvm4si2                     (rtx, rtx);
extern rtx        gen_extendrvvmf2qirvvm2si2                         (rtx, rtx);
extern rtx        gen_zero_extendrvvmf2qirvvm2si2                    (rtx, rtx);
extern rtx        gen_extendrvvmf4qirvvm1si2                         (rtx, rtx);
extern rtx        gen_zero_extendrvvmf4qirvvm1si2                    (rtx, rtx);
extern rtx        gen_extendrvvmf8qirvvmf2si2                        (rtx, rtx);
extern rtx        gen_zero_extendrvvmf8qirvvmf2si2                   (rtx, rtx);
extern rtx        gen_extendrvvm2hirvvm8di2                          (rtx, rtx);
extern rtx        gen_zero_extendrvvm2hirvvm8di2                     (rtx, rtx);
extern rtx        gen_extendrvvm1hirvvm4di2                          (rtx, rtx);
extern rtx        gen_zero_extendrvvm1hirvvm4di2                     (rtx, rtx);
extern rtx        gen_extendrvvmf2hirvvm2di2                         (rtx, rtx);
extern rtx        gen_zero_extendrvvmf2hirvvm2di2                    (rtx, rtx);
extern rtx        gen_extendrvvmf4hirvvm1di2                         (rtx, rtx);
extern rtx        gen_zero_extendrvvmf4hirvvm1di2                    (rtx, rtx);
extern rtx        gen_extendv1qiv1si2                                (rtx, rtx);
extern rtx        gen_zero_extendv1qiv1si2                           (rtx, rtx);
extern rtx        gen_extendv2qiv2si2                                (rtx, rtx);
extern rtx        gen_zero_extendv2qiv2si2                           (rtx, rtx);
extern rtx        gen_extendv4qiv4si2                                (rtx, rtx);
extern rtx        gen_zero_extendv4qiv4si2                           (rtx, rtx);
extern rtx        gen_extendv8qiv8si2                                (rtx, rtx);
extern rtx        gen_zero_extendv8qiv8si2                           (rtx, rtx);
extern rtx        gen_extendv16qiv16si2                              (rtx, rtx);
extern rtx        gen_zero_extendv16qiv16si2                         (rtx, rtx);
extern rtx        gen_extendv32qiv32si2                              (rtx, rtx);
extern rtx        gen_zero_extendv32qiv32si2                         (rtx, rtx);
extern rtx        gen_extendv64qiv64si2                              (rtx, rtx);
extern rtx        gen_zero_extendv64qiv64si2                         (rtx, rtx);
extern rtx        gen_extendv128qiv128si2                            (rtx, rtx);
extern rtx        gen_zero_extendv128qiv128si2                       (rtx, rtx);
extern rtx        gen_extendv256qiv256si2                            (rtx, rtx);
extern rtx        gen_zero_extendv256qiv256si2                       (rtx, rtx);
extern rtx        gen_extendv512qiv512si2                            (rtx, rtx);
extern rtx        gen_zero_extendv512qiv512si2                       (rtx, rtx);
extern rtx        gen_extendv1024qiv1024si2                          (rtx, rtx);
extern rtx        gen_zero_extendv1024qiv1024si2                     (rtx, rtx);
extern rtx        gen_extendv1hiv1di2                                (rtx, rtx);
extern rtx        gen_zero_extendv1hiv1di2                           (rtx, rtx);
extern rtx        gen_extendv2hiv2di2                                (rtx, rtx);
extern rtx        gen_zero_extendv2hiv2di2                           (rtx, rtx);
extern rtx        gen_extendv4hiv4di2                                (rtx, rtx);
extern rtx        gen_zero_extendv4hiv4di2                           (rtx, rtx);
extern rtx        gen_extendv8hiv8di2                                (rtx, rtx);
extern rtx        gen_zero_extendv8hiv8di2                           (rtx, rtx);
extern rtx        gen_extendv16hiv16di2                              (rtx, rtx);
extern rtx        gen_zero_extendv16hiv16di2                         (rtx, rtx);
extern rtx        gen_extendv32hiv32di2                              (rtx, rtx);
extern rtx        gen_zero_extendv32hiv32di2                         (rtx, rtx);
extern rtx        gen_extendv64hiv64di2                              (rtx, rtx);
extern rtx        gen_zero_extendv64hiv64di2                         (rtx, rtx);
extern rtx        gen_extendv128hiv128di2                            (rtx, rtx);
extern rtx        gen_zero_extendv128hiv128di2                       (rtx, rtx);
extern rtx        gen_extendv256hiv256di2                            (rtx, rtx);
extern rtx        gen_zero_extendv256hiv256di2                       (rtx, rtx);
extern rtx        gen_extendv512hiv512di2                            (rtx, rtx);
extern rtx        gen_zero_extendv512hiv512di2                       (rtx, rtx);
extern rtx        gen_extendrvvm1qirvvm8di2                          (rtx, rtx);
extern rtx        gen_zero_extendrvvm1qirvvm8di2                     (rtx, rtx);
extern rtx        gen_extendrvvmf2qirvvm4di2                         (rtx, rtx);
extern rtx        gen_zero_extendrvvmf2qirvvm4di2                    (rtx, rtx);
extern rtx        gen_extendrvvmf4qirvvm2di2                         (rtx, rtx);
extern rtx        gen_zero_extendrvvmf4qirvvm2di2                    (rtx, rtx);
extern rtx        gen_extendrvvmf8qirvvm1di2                         (rtx, rtx);
extern rtx        gen_zero_extendrvvmf8qirvvm1di2                    (rtx, rtx);
extern rtx        gen_extendv1qiv1di2                                (rtx, rtx);
extern rtx        gen_zero_extendv1qiv1di2                           (rtx, rtx);
extern rtx        gen_extendv2qiv2di2                                (rtx, rtx);
extern rtx        gen_zero_extendv2qiv2di2                           (rtx, rtx);
extern rtx        gen_extendv4qiv4di2                                (rtx, rtx);
extern rtx        gen_zero_extendv4qiv4di2                           (rtx, rtx);
extern rtx        gen_extendv8qiv8di2                                (rtx, rtx);
extern rtx        gen_zero_extendv8qiv8di2                           (rtx, rtx);
extern rtx        gen_extendv16qiv16di2                              (rtx, rtx);
extern rtx        gen_zero_extendv16qiv16di2                         (rtx, rtx);
extern rtx        gen_extendv32qiv32di2                              (rtx, rtx);
extern rtx        gen_zero_extendv32qiv32di2                         (rtx, rtx);
extern rtx        gen_extendv64qiv64di2                              (rtx, rtx);
extern rtx        gen_zero_extendv64qiv64di2                         (rtx, rtx);
extern rtx        gen_extendv128qiv128di2                            (rtx, rtx);
extern rtx        gen_zero_extendv128qiv128di2                       (rtx, rtx);
extern rtx        gen_extendv256qiv256di2                            (rtx, rtx);
extern rtx        gen_zero_extendv256qiv256di2                       (rtx, rtx);
extern rtx        gen_extendv512qiv512di2                            (rtx, rtx);
extern rtx        gen_zero_extendv512qiv512di2                       (rtx, rtx);
extern rtx        gen_truncrvvm8hirvvm4qi2                           (rtx, rtx);
extern rtx        gen_truncrvvm4hirvvm2qi2                           (rtx, rtx);
extern rtx        gen_truncrvvm2hirvvm1qi2                           (rtx, rtx);
extern rtx        gen_truncrvvm1hirvvmf2qi2                          (rtx, rtx);
extern rtx        gen_truncrvvmf2hirvvmf4qi2                         (rtx, rtx);
extern rtx        gen_truncrvvmf4hirvvmf8qi2                         (rtx, rtx);
extern rtx        gen_truncrvvm8sirvvm4hi2                           (rtx, rtx);
extern rtx        gen_truncrvvm4sirvvm2hi2                           (rtx, rtx);
extern rtx        gen_truncrvvm2sirvvm1hi2                           (rtx, rtx);
extern rtx        gen_truncrvvm1sirvvmf2hi2                          (rtx, rtx);
extern rtx        gen_truncrvvmf2sirvvmf4hi2                         (rtx, rtx);
extern rtx        gen_truncrvvm8dirvvm4si2                           (rtx, rtx);
extern rtx        gen_truncrvvm4dirvvm2si2                           (rtx, rtx);
extern rtx        gen_truncrvvm2dirvvm1si2                           (rtx, rtx);
extern rtx        gen_truncrvvm1dirvvmf2si2                          (rtx, rtx);
extern rtx        gen_truncv1hiv1qi2                                 (rtx, rtx);
extern rtx        gen_truncv2hiv2qi2                                 (rtx, rtx);
extern rtx        gen_truncv4hiv4qi2                                 (rtx, rtx);
extern rtx        gen_truncv8hiv8qi2                                 (rtx, rtx);
extern rtx        gen_truncv16hiv16qi2                               (rtx, rtx);
extern rtx        gen_truncv32hiv32qi2                               (rtx, rtx);
extern rtx        gen_truncv64hiv64qi2                               (rtx, rtx);
extern rtx        gen_truncv128hiv128qi2                             (rtx, rtx);
extern rtx        gen_truncv256hiv256qi2                             (rtx, rtx);
extern rtx        gen_truncv512hiv512qi2                             (rtx, rtx);
extern rtx        gen_truncv1024hiv1024qi2                           (rtx, rtx);
extern rtx        gen_truncv2048hiv2048qi2                           (rtx, rtx);
extern rtx        gen_truncv1siv1hi2                                 (rtx, rtx);
extern rtx        gen_truncv2siv2hi2                                 (rtx, rtx);
extern rtx        gen_truncv4siv4hi2                                 (rtx, rtx);
extern rtx        gen_truncv8siv8hi2                                 (rtx, rtx);
extern rtx        gen_truncv16siv16hi2                               (rtx, rtx);
extern rtx        gen_truncv32siv32hi2                               (rtx, rtx);
extern rtx        gen_truncv64siv64hi2                               (rtx, rtx);
extern rtx        gen_truncv128siv128hi2                             (rtx, rtx);
extern rtx        gen_truncv256siv256hi2                             (rtx, rtx);
extern rtx        gen_truncv512siv512hi2                             (rtx, rtx);
extern rtx        gen_truncv1024siv1024hi2                           (rtx, rtx);
extern rtx        gen_truncv1div1si2                                 (rtx, rtx);
extern rtx        gen_truncv2div2si2                                 (rtx, rtx);
extern rtx        gen_truncv4div4si2                                 (rtx, rtx);
extern rtx        gen_truncv8div8si2                                 (rtx, rtx);
extern rtx        gen_truncv16div16si2                               (rtx, rtx);
extern rtx        gen_truncv32div32si2                               (rtx, rtx);
extern rtx        gen_truncv64div64si2                               (rtx, rtx);
extern rtx        gen_truncv128div128si2                             (rtx, rtx);
extern rtx        gen_truncv256div256si2                             (rtx, rtx);
extern rtx        gen_truncv512div512si2                             (rtx, rtx);
extern rtx        gen_extendrvvm4hfrvvm8sf2                          (rtx, rtx);
extern rtx        gen_extendrvvm2hfrvvm4sf2                          (rtx, rtx);
extern rtx        gen_extendrvvm1hfrvvm2sf2                          (rtx, rtx);
extern rtx        gen_extendrvvmf2hfrvvm1sf2                         (rtx, rtx);
extern rtx        gen_extendrvvmf4hfrvvmf2sf2                        (rtx, rtx);
extern rtx        gen_extendrvvm4sfrvvm8df2                          (rtx, rtx);
extern rtx        gen_extendrvvm2sfrvvm4df2                          (rtx, rtx);
extern rtx        gen_extendrvvm1sfrvvm2df2                          (rtx, rtx);
extern rtx        gen_extendrvvmf2sfrvvm1df2                         (rtx, rtx);
extern rtx        gen_extendv1hfv1sf2                                (rtx, rtx);
extern rtx        gen_extendv2hfv2sf2                                (rtx, rtx);
extern rtx        gen_extendv4hfv4sf2                                (rtx, rtx);
extern rtx        gen_extendv8hfv8sf2                                (rtx, rtx);
extern rtx        gen_extendv16hfv16sf2                              (rtx, rtx);
extern rtx        gen_extendv32hfv32sf2                              (rtx, rtx);
extern rtx        gen_extendv64hfv64sf2                              (rtx, rtx);
extern rtx        gen_extendv128hfv128sf2                            (rtx, rtx);
extern rtx        gen_extendv256hfv256sf2                            (rtx, rtx);
extern rtx        gen_extendv512hfv512sf2                            (rtx, rtx);
extern rtx        gen_extendv1024hfv1024sf2                          (rtx, rtx);
extern rtx        gen_extendv1sfv1df2                                (rtx, rtx);
extern rtx        gen_extendv2sfv2df2                                (rtx, rtx);
extern rtx        gen_extendv4sfv4df2                                (rtx, rtx);
extern rtx        gen_extendv8sfv8df2                                (rtx, rtx);
extern rtx        gen_extendv16sfv16df2                              (rtx, rtx);
extern rtx        gen_extendv32sfv32df2                              (rtx, rtx);
extern rtx        gen_extendv64sfv64df2                              (rtx, rtx);
extern rtx        gen_extendv128sfv128df2                            (rtx, rtx);
extern rtx        gen_extendv256sfv256df2                            (rtx, rtx);
extern rtx        gen_extendv512sfv512df2                            (rtx, rtx);
extern rtx        gen_truncrvvm8sfrvvm4hf2                           (rtx, rtx);
extern rtx        gen_truncrvvm4sfrvvm2hf2                           (rtx, rtx);
extern rtx        gen_truncrvvm2sfrvvm1hf2                           (rtx, rtx);
extern rtx        gen_truncrvvm1sfrvvmf2hf2                          (rtx, rtx);
extern rtx        gen_truncrvvmf2sfrvvmf4hf2                         (rtx, rtx);
extern rtx        gen_truncrvvm8dfrvvm4sf2                           (rtx, rtx);
extern rtx        gen_truncrvvm4dfrvvm2sf2                           (rtx, rtx);
extern rtx        gen_truncrvvm2dfrvvm1sf2                           (rtx, rtx);
extern rtx        gen_truncrvvm1dfrvvmf2sf2                          (rtx, rtx);
extern rtx        gen_truncv1sfv1hf2                                 (rtx, rtx);
extern rtx        gen_truncv2sfv2hf2                                 (rtx, rtx);
extern rtx        gen_truncv4sfv4hf2                                 (rtx, rtx);
extern rtx        gen_truncv8sfv8hf2                                 (rtx, rtx);
extern rtx        gen_truncv16sfv16hf2                               (rtx, rtx);
extern rtx        gen_truncv32sfv32hf2                               (rtx, rtx);
extern rtx        gen_truncv64sfv64hf2                               (rtx, rtx);
extern rtx        gen_truncv128sfv128hf2                             (rtx, rtx);
extern rtx        gen_truncv256sfv256hf2                             (rtx, rtx);
extern rtx        gen_truncv512sfv512hf2                             (rtx, rtx);
extern rtx        gen_truncv1024sfv1024hf2                           (rtx, rtx);
extern rtx        gen_truncv1dfv1sf2                                 (rtx, rtx);
extern rtx        gen_truncv2dfv2sf2                                 (rtx, rtx);
extern rtx        gen_truncv4dfv4sf2                                 (rtx, rtx);
extern rtx        gen_truncv8dfv8sf2                                 (rtx, rtx);
extern rtx        gen_truncv16dfv16sf2                               (rtx, rtx);
extern rtx        gen_truncv32dfv32sf2                               (rtx, rtx);
extern rtx        gen_truncv64dfv64sf2                               (rtx, rtx);
extern rtx        gen_truncv128dfv128sf2                             (rtx, rtx);
extern rtx        gen_truncv256dfv256sf2                             (rtx, rtx);
extern rtx        gen_truncv512dfv512sf2                             (rtx, rtx);
extern rtx        gen_fix_truncrvvm8hfrvvm8hi2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm8hfrvvm8hi2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvm4hfrvvm4hi2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm4hfrvvm4hi2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvm2hfrvvm2hi2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm2hfrvvm2hi2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvm1hfrvvm1hi2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm1hfrvvm1hi2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvmf2hfrvvmf2hi2                     (rtx, rtx);
extern rtx        gen_fixuns_truncrvvmf2hfrvvmf2hi2                  (rtx, rtx);
extern rtx        gen_fix_truncrvvmf4hfrvvmf4hi2                     (rtx, rtx);
extern rtx        gen_fixuns_truncrvvmf4hfrvvmf4hi2                  (rtx, rtx);
extern rtx        gen_fix_truncrvvm8sfrvvm8si2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm8sfrvvm8si2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvm4sfrvvm4si2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm4sfrvvm4si2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvm2sfrvvm2si2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm2sfrvvm2si2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvm1sfrvvm1si2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm1sfrvvm1si2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvmf2sfrvvmf2si2                     (rtx, rtx);
extern rtx        gen_fixuns_truncrvvmf2sfrvvmf2si2                  (rtx, rtx);
extern rtx        gen_fix_truncrvvm8dfrvvm8di2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm8dfrvvm8di2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvm4dfrvvm4di2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm4dfrvvm4di2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvm2dfrvvm2di2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm2dfrvvm2di2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvm1dfrvvm1di2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm1dfrvvm1di2                    (rtx, rtx);
extern rtx        gen_fix_truncv1hfv1hi2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv1hfv1hi2                          (rtx, rtx);
extern rtx        gen_fix_truncv2hfv2hi2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv2hfv2hi2                          (rtx, rtx);
extern rtx        gen_fix_truncv4hfv4hi2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv4hfv4hi2                          (rtx, rtx);
extern rtx        gen_fix_truncv8hfv8hi2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv8hfv8hi2                          (rtx, rtx);
extern rtx        gen_fix_truncv16hfv16hi2                           (rtx, rtx);
extern rtx        gen_fixuns_truncv16hfv16hi2                        (rtx, rtx);
extern rtx        gen_fix_truncv32hfv32hi2                           (rtx, rtx);
extern rtx        gen_fixuns_truncv32hfv32hi2                        (rtx, rtx);
extern rtx        gen_fix_truncv64hfv64hi2                           (rtx, rtx);
extern rtx        gen_fixuns_truncv64hfv64hi2                        (rtx, rtx);
extern rtx        gen_fix_truncv128hfv128hi2                         (rtx, rtx);
extern rtx        gen_fixuns_truncv128hfv128hi2                      (rtx, rtx);
extern rtx        gen_fix_truncv256hfv256hi2                         (rtx, rtx);
extern rtx        gen_fixuns_truncv256hfv256hi2                      (rtx, rtx);
extern rtx        gen_fix_truncv512hfv512hi2                         (rtx, rtx);
extern rtx        gen_fixuns_truncv512hfv512hi2                      (rtx, rtx);
extern rtx        gen_fix_truncv1024hfv1024hi2                       (rtx, rtx);
extern rtx        gen_fixuns_truncv1024hfv1024hi2                    (rtx, rtx);
extern rtx        gen_fix_truncv2048hfv2048hi2                       (rtx, rtx);
extern rtx        gen_fixuns_truncv2048hfv2048hi2                    (rtx, rtx);
extern rtx        gen_fix_truncv1sfv1si2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv1sfv1si2                          (rtx, rtx);
extern rtx        gen_fix_truncv2sfv2si2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv2sfv2si2                          (rtx, rtx);
extern rtx        gen_fix_truncv4sfv4si2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv4sfv4si2                          (rtx, rtx);
extern rtx        gen_fix_truncv8sfv8si2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv8sfv8si2                          (rtx, rtx);
extern rtx        gen_fix_truncv16sfv16si2                           (rtx, rtx);
extern rtx        gen_fixuns_truncv16sfv16si2                        (rtx, rtx);
extern rtx        gen_fix_truncv32sfv32si2                           (rtx, rtx);
extern rtx        gen_fixuns_truncv32sfv32si2                        (rtx, rtx);
extern rtx        gen_fix_truncv64sfv64si2                           (rtx, rtx);
extern rtx        gen_fixuns_truncv64sfv64si2                        (rtx, rtx);
extern rtx        gen_fix_truncv128sfv128si2                         (rtx, rtx);
extern rtx        gen_fixuns_truncv128sfv128si2                      (rtx, rtx);
extern rtx        gen_fix_truncv256sfv256si2                         (rtx, rtx);
extern rtx        gen_fixuns_truncv256sfv256si2                      (rtx, rtx);
extern rtx        gen_fix_truncv512sfv512si2                         (rtx, rtx);
extern rtx        gen_fixuns_truncv512sfv512si2                      (rtx, rtx);
extern rtx        gen_fix_truncv1024sfv1024si2                       (rtx, rtx);
extern rtx        gen_fixuns_truncv1024sfv1024si2                    (rtx, rtx);
extern rtx        gen_fix_truncv1dfv1di2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv1dfv1di2                          (rtx, rtx);
extern rtx        gen_fix_truncv2dfv2di2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv2dfv2di2                          (rtx, rtx);
extern rtx        gen_fix_truncv4dfv4di2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv4dfv4di2                          (rtx, rtx);
extern rtx        gen_fix_truncv8dfv8di2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv8dfv8di2                          (rtx, rtx);
extern rtx        gen_fix_truncv16dfv16di2                           (rtx, rtx);
extern rtx        gen_fixuns_truncv16dfv16di2                        (rtx, rtx);
extern rtx        gen_fix_truncv32dfv32di2                           (rtx, rtx);
extern rtx        gen_fixuns_truncv32dfv32di2                        (rtx, rtx);
extern rtx        gen_fix_truncv64dfv64di2                           (rtx, rtx);
extern rtx        gen_fixuns_truncv64dfv64di2                        (rtx, rtx);
extern rtx        gen_fix_truncv128dfv128di2                         (rtx, rtx);
extern rtx        gen_fixuns_truncv128dfv128di2                      (rtx, rtx);
extern rtx        gen_fix_truncv256dfv256di2                         (rtx, rtx);
extern rtx        gen_fixuns_truncv256dfv256di2                      (rtx, rtx);
extern rtx        gen_fix_truncv512dfv512di2                         (rtx, rtx);
extern rtx        gen_fixuns_truncv512dfv512di2                      (rtx, rtx);
extern rtx        gen_floatrvvm8hirvvm8hf2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm8hirvvm8hf2                        (rtx, rtx);
extern rtx        gen_floatrvvm4hirvvm4hf2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm4hirvvm4hf2                        (rtx, rtx);
extern rtx        gen_floatrvvm2hirvvm2hf2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm2hirvvm2hf2                        (rtx, rtx);
extern rtx        gen_floatrvvm1hirvvm1hf2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm1hirvvm1hf2                        (rtx, rtx);
extern rtx        gen_floatrvvmf2hirvvmf2hf2                         (rtx, rtx);
extern rtx        gen_floatunsrvvmf2hirvvmf2hf2                      (rtx, rtx);
extern rtx        gen_floatrvvmf4hirvvmf4hf2                         (rtx, rtx);
extern rtx        gen_floatunsrvvmf4hirvvmf4hf2                      (rtx, rtx);
extern rtx        gen_floatrvvm8sirvvm8sf2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm8sirvvm8sf2                        (rtx, rtx);
extern rtx        gen_floatrvvm4sirvvm4sf2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm4sirvvm4sf2                        (rtx, rtx);
extern rtx        gen_floatrvvm2sirvvm2sf2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm2sirvvm2sf2                        (rtx, rtx);
extern rtx        gen_floatrvvm1sirvvm1sf2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm1sirvvm1sf2                        (rtx, rtx);
extern rtx        gen_floatrvvmf2sirvvmf2sf2                         (rtx, rtx);
extern rtx        gen_floatunsrvvmf2sirvvmf2sf2                      (rtx, rtx);
extern rtx        gen_floatrvvm8dirvvm8df2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm8dirvvm8df2                        (rtx, rtx);
extern rtx        gen_floatrvvm4dirvvm4df2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm4dirvvm4df2                        (rtx, rtx);
extern rtx        gen_floatrvvm2dirvvm2df2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm2dirvvm2df2                        (rtx, rtx);
extern rtx        gen_floatrvvm1dirvvm1df2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm1dirvvm1df2                        (rtx, rtx);
extern rtx        gen_floatv1hiv1hf2                                 (rtx, rtx);
extern rtx        gen_floatunsv1hiv1hf2                              (rtx, rtx);
extern rtx        gen_floatv2hiv2hf2                                 (rtx, rtx);
extern rtx        gen_floatunsv2hiv2hf2                              (rtx, rtx);
extern rtx        gen_floatv4hiv4hf2                                 (rtx, rtx);
extern rtx        gen_floatunsv4hiv4hf2                              (rtx, rtx);
extern rtx        gen_floatv8hiv8hf2                                 (rtx, rtx);
extern rtx        gen_floatunsv8hiv8hf2                              (rtx, rtx);
extern rtx        gen_floatv16hiv16hf2                               (rtx, rtx);
extern rtx        gen_floatunsv16hiv16hf2                            (rtx, rtx);
extern rtx        gen_floatv32hiv32hf2                               (rtx, rtx);
extern rtx        gen_floatunsv32hiv32hf2                            (rtx, rtx);
extern rtx        gen_floatv64hiv64hf2                               (rtx, rtx);
extern rtx        gen_floatunsv64hiv64hf2                            (rtx, rtx);
extern rtx        gen_floatv128hiv128hf2                             (rtx, rtx);
extern rtx        gen_floatunsv128hiv128hf2                          (rtx, rtx);
extern rtx        gen_floatv256hiv256hf2                             (rtx, rtx);
extern rtx        gen_floatunsv256hiv256hf2                          (rtx, rtx);
extern rtx        gen_floatv512hiv512hf2                             (rtx, rtx);
extern rtx        gen_floatunsv512hiv512hf2                          (rtx, rtx);
extern rtx        gen_floatv1024hiv1024hf2                           (rtx, rtx);
extern rtx        gen_floatunsv1024hiv1024hf2                        (rtx, rtx);
extern rtx        gen_floatv2048hiv2048hf2                           (rtx, rtx);
extern rtx        gen_floatunsv2048hiv2048hf2                        (rtx, rtx);
extern rtx        gen_floatv1siv1sf2                                 (rtx, rtx);
extern rtx        gen_floatunsv1siv1sf2                              (rtx, rtx);
extern rtx        gen_floatv2siv2sf2                                 (rtx, rtx);
extern rtx        gen_floatunsv2siv2sf2                              (rtx, rtx);
extern rtx        gen_floatv4siv4sf2                                 (rtx, rtx);
extern rtx        gen_floatunsv4siv4sf2                              (rtx, rtx);
extern rtx        gen_floatv8siv8sf2                                 (rtx, rtx);
extern rtx        gen_floatunsv8siv8sf2                              (rtx, rtx);
extern rtx        gen_floatv16siv16sf2                               (rtx, rtx);
extern rtx        gen_floatunsv16siv16sf2                            (rtx, rtx);
extern rtx        gen_floatv32siv32sf2                               (rtx, rtx);
extern rtx        gen_floatunsv32siv32sf2                            (rtx, rtx);
extern rtx        gen_floatv64siv64sf2                               (rtx, rtx);
extern rtx        gen_floatunsv64siv64sf2                            (rtx, rtx);
extern rtx        gen_floatv128siv128sf2                             (rtx, rtx);
extern rtx        gen_floatunsv128siv128sf2                          (rtx, rtx);
extern rtx        gen_floatv256siv256sf2                             (rtx, rtx);
extern rtx        gen_floatunsv256siv256sf2                          (rtx, rtx);
extern rtx        gen_floatv512siv512sf2                             (rtx, rtx);
extern rtx        gen_floatunsv512siv512sf2                          (rtx, rtx);
extern rtx        gen_floatv1024siv1024sf2                           (rtx, rtx);
extern rtx        gen_floatunsv1024siv1024sf2                        (rtx, rtx);
extern rtx        gen_floatv1div1df2                                 (rtx, rtx);
extern rtx        gen_floatunsv1div1df2                              (rtx, rtx);
extern rtx        gen_floatv2div2df2                                 (rtx, rtx);
extern rtx        gen_floatunsv2div2df2                              (rtx, rtx);
extern rtx        gen_floatv4div4df2                                 (rtx, rtx);
extern rtx        gen_floatunsv4div4df2                              (rtx, rtx);
extern rtx        gen_floatv8div8df2                                 (rtx, rtx);
extern rtx        gen_floatunsv8div8df2                              (rtx, rtx);
extern rtx        gen_floatv16div16df2                               (rtx, rtx);
extern rtx        gen_floatunsv16div16df2                            (rtx, rtx);
extern rtx        gen_floatv32div32df2                               (rtx, rtx);
extern rtx        gen_floatunsv32div32df2                            (rtx, rtx);
extern rtx        gen_floatv64div64df2                               (rtx, rtx);
extern rtx        gen_floatunsv64div64df2                            (rtx, rtx);
extern rtx        gen_floatv128div128df2                             (rtx, rtx);
extern rtx        gen_floatunsv128div128df2                          (rtx, rtx);
extern rtx        gen_floatv256div256df2                             (rtx, rtx);
extern rtx        gen_floatunsv256div256df2                          (rtx, rtx);
extern rtx        gen_floatv512div512df2                             (rtx, rtx);
extern rtx        gen_floatunsv512div512df2                          (rtx, rtx);
extern rtx        gen_fix_truncrvvm4hfrvvm8si2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm4hfrvvm8si2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvm2hfrvvm4si2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm2hfrvvm4si2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvm1hfrvvm2si2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm1hfrvvm2si2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvmf2hfrvvm1si2                      (rtx, rtx);
extern rtx        gen_fixuns_truncrvvmf2hfrvvm1si2                   (rtx, rtx);
extern rtx        gen_fix_truncrvvmf4hfrvvmf2si2                     (rtx, rtx);
extern rtx        gen_fixuns_truncrvvmf4hfrvvmf2si2                  (rtx, rtx);
extern rtx        gen_fix_truncrvvm4sfrvvm8di2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm4sfrvvm8di2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvm2sfrvvm4di2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm2sfrvvm4di2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvm1sfrvvm2di2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm1sfrvvm2di2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvmf2sfrvvm1di2                      (rtx, rtx);
extern rtx        gen_fixuns_truncrvvmf2sfrvvm1di2                   (rtx, rtx);
extern rtx        gen_fix_truncv1hfv1si2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv1hfv1si2                          (rtx, rtx);
extern rtx        gen_fix_truncv2hfv2si2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv2hfv2si2                          (rtx, rtx);
extern rtx        gen_fix_truncv4hfv4si2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv4hfv4si2                          (rtx, rtx);
extern rtx        gen_fix_truncv8hfv8si2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv8hfv8si2                          (rtx, rtx);
extern rtx        gen_fix_truncv16hfv16si2                           (rtx, rtx);
extern rtx        gen_fixuns_truncv16hfv16si2                        (rtx, rtx);
extern rtx        gen_fix_truncv32hfv32si2                           (rtx, rtx);
extern rtx        gen_fixuns_truncv32hfv32si2                        (rtx, rtx);
extern rtx        gen_fix_truncv64hfv64si2                           (rtx, rtx);
extern rtx        gen_fixuns_truncv64hfv64si2                        (rtx, rtx);
extern rtx        gen_fix_truncv128hfv128si2                         (rtx, rtx);
extern rtx        gen_fixuns_truncv128hfv128si2                      (rtx, rtx);
extern rtx        gen_fix_truncv256hfv256si2                         (rtx, rtx);
extern rtx        gen_fixuns_truncv256hfv256si2                      (rtx, rtx);
extern rtx        gen_fix_truncv512hfv512si2                         (rtx, rtx);
extern rtx        gen_fixuns_truncv512hfv512si2                      (rtx, rtx);
extern rtx        gen_fix_truncv1024hfv1024si2                       (rtx, rtx);
extern rtx        gen_fixuns_truncv1024hfv1024si2                    (rtx, rtx);
extern rtx        gen_fix_truncv1sfv1di2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv1sfv1di2                          (rtx, rtx);
extern rtx        gen_fix_truncv2sfv2di2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv2sfv2di2                          (rtx, rtx);
extern rtx        gen_fix_truncv4sfv4di2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv4sfv4di2                          (rtx, rtx);
extern rtx        gen_fix_truncv8sfv8di2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv8sfv8di2                          (rtx, rtx);
extern rtx        gen_fix_truncv16sfv16di2                           (rtx, rtx);
extern rtx        gen_fixuns_truncv16sfv16di2                        (rtx, rtx);
extern rtx        gen_fix_truncv32sfv32di2                           (rtx, rtx);
extern rtx        gen_fixuns_truncv32sfv32di2                        (rtx, rtx);
extern rtx        gen_fix_truncv64sfv64di2                           (rtx, rtx);
extern rtx        gen_fixuns_truncv64sfv64di2                        (rtx, rtx);
extern rtx        gen_fix_truncv128sfv128di2                         (rtx, rtx);
extern rtx        gen_fixuns_truncv128sfv128di2                      (rtx, rtx);
extern rtx        gen_fix_truncv256sfv256di2                         (rtx, rtx);
extern rtx        gen_fixuns_truncv256sfv256di2                      (rtx, rtx);
extern rtx        gen_fix_truncv512sfv512di2                         (rtx, rtx);
extern rtx        gen_fixuns_truncv512sfv512di2                      (rtx, rtx);
extern rtx        gen_floatrvvm4qirvvm8hf2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm4qirvvm8hf2                        (rtx, rtx);
extern rtx        gen_floatrvvm2qirvvm4hf2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm2qirvvm4hf2                        (rtx, rtx);
extern rtx        gen_floatrvvm1qirvvm2hf2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm1qirvvm2hf2                        (rtx, rtx);
extern rtx        gen_floatrvvmf2qirvvm1hf2                          (rtx, rtx);
extern rtx        gen_floatunsrvvmf2qirvvm1hf2                       (rtx, rtx);
extern rtx        gen_floatrvvmf4qirvvmf2hf2                         (rtx, rtx);
extern rtx        gen_floatunsrvvmf4qirvvmf2hf2                      (rtx, rtx);
extern rtx        gen_floatrvvmf8qirvvmf4hf2                         (rtx, rtx);
extern rtx        gen_floatunsrvvmf8qirvvmf4hf2                      (rtx, rtx);
extern rtx        gen_floatrvvm4hirvvm8sf2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm4hirvvm8sf2                        (rtx, rtx);
extern rtx        gen_floatrvvm2hirvvm4sf2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm2hirvvm4sf2                        (rtx, rtx);
extern rtx        gen_floatrvvm1hirvvm2sf2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm1hirvvm2sf2                        (rtx, rtx);
extern rtx        gen_floatrvvmf2hirvvm1sf2                          (rtx, rtx);
extern rtx        gen_floatunsrvvmf2hirvvm1sf2                       (rtx, rtx);
extern rtx        gen_floatrvvmf4hirvvmf2sf2                         (rtx, rtx);
extern rtx        gen_floatunsrvvmf4hirvvmf2sf2                      (rtx, rtx);
extern rtx        gen_floatrvvm4sirvvm8df2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm4sirvvm8df2                        (rtx, rtx);
extern rtx        gen_floatrvvm2sirvvm4df2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm2sirvvm4df2                        (rtx, rtx);
extern rtx        gen_floatrvvm1sirvvm2df2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm1sirvvm2df2                        (rtx, rtx);
extern rtx        gen_floatrvvmf2sirvvm1df2                          (rtx, rtx);
extern rtx        gen_floatunsrvvmf2sirvvm1df2                       (rtx, rtx);
extern rtx        gen_floatv1qiv1hf2                                 (rtx, rtx);
extern rtx        gen_floatunsv1qiv1hf2                              (rtx, rtx);
extern rtx        gen_floatv2qiv2hf2                                 (rtx, rtx);
extern rtx        gen_floatunsv2qiv2hf2                              (rtx, rtx);
extern rtx        gen_floatv4qiv4hf2                                 (rtx, rtx);
extern rtx        gen_floatunsv4qiv4hf2                              (rtx, rtx);
extern rtx        gen_floatv8qiv8hf2                                 (rtx, rtx);
extern rtx        gen_floatunsv8qiv8hf2                              (rtx, rtx);
extern rtx        gen_floatv16qiv16hf2                               (rtx, rtx);
extern rtx        gen_floatunsv16qiv16hf2                            (rtx, rtx);
extern rtx        gen_floatv32qiv32hf2                               (rtx, rtx);
extern rtx        gen_floatunsv32qiv32hf2                            (rtx, rtx);
extern rtx        gen_floatv64qiv64hf2                               (rtx, rtx);
extern rtx        gen_floatunsv64qiv64hf2                            (rtx, rtx);
extern rtx        gen_floatv128qiv128hf2                             (rtx, rtx);
extern rtx        gen_floatunsv128qiv128hf2                          (rtx, rtx);
extern rtx        gen_floatv256qiv256hf2                             (rtx, rtx);
extern rtx        gen_floatunsv256qiv256hf2                          (rtx, rtx);
extern rtx        gen_floatv512qiv512hf2                             (rtx, rtx);
extern rtx        gen_floatunsv512qiv512hf2                          (rtx, rtx);
extern rtx        gen_floatv1024qiv1024hf2                           (rtx, rtx);
extern rtx        gen_floatunsv1024qiv1024hf2                        (rtx, rtx);
extern rtx        gen_floatv2048qiv2048hf2                           (rtx, rtx);
extern rtx        gen_floatunsv2048qiv2048hf2                        (rtx, rtx);
extern rtx        gen_floatv1hiv1sf2                                 (rtx, rtx);
extern rtx        gen_floatunsv1hiv1sf2                              (rtx, rtx);
extern rtx        gen_floatv2hiv2sf2                                 (rtx, rtx);
extern rtx        gen_floatunsv2hiv2sf2                              (rtx, rtx);
extern rtx        gen_floatv4hiv4sf2                                 (rtx, rtx);
extern rtx        gen_floatunsv4hiv4sf2                              (rtx, rtx);
extern rtx        gen_floatv8hiv8sf2                                 (rtx, rtx);
extern rtx        gen_floatunsv8hiv8sf2                              (rtx, rtx);
extern rtx        gen_floatv16hiv16sf2                               (rtx, rtx);
extern rtx        gen_floatunsv16hiv16sf2                            (rtx, rtx);
extern rtx        gen_floatv32hiv32sf2                               (rtx, rtx);
extern rtx        gen_floatunsv32hiv32sf2                            (rtx, rtx);
extern rtx        gen_floatv64hiv64sf2                               (rtx, rtx);
extern rtx        gen_floatunsv64hiv64sf2                            (rtx, rtx);
extern rtx        gen_floatv128hiv128sf2                             (rtx, rtx);
extern rtx        gen_floatunsv128hiv128sf2                          (rtx, rtx);
extern rtx        gen_floatv256hiv256sf2                             (rtx, rtx);
extern rtx        gen_floatunsv256hiv256sf2                          (rtx, rtx);
extern rtx        gen_floatv512hiv512sf2                             (rtx, rtx);
extern rtx        gen_floatunsv512hiv512sf2                          (rtx, rtx);
extern rtx        gen_floatv1024hiv1024sf2                           (rtx, rtx);
extern rtx        gen_floatunsv1024hiv1024sf2                        (rtx, rtx);
extern rtx        gen_floatv1siv1df2                                 (rtx, rtx);
extern rtx        gen_floatunsv1siv1df2                              (rtx, rtx);
extern rtx        gen_floatv2siv2df2                                 (rtx, rtx);
extern rtx        gen_floatunsv2siv2df2                              (rtx, rtx);
extern rtx        gen_floatv4siv4df2                                 (rtx, rtx);
extern rtx        gen_floatunsv4siv4df2                              (rtx, rtx);
extern rtx        gen_floatv8siv8df2                                 (rtx, rtx);
extern rtx        gen_floatunsv8siv8df2                              (rtx, rtx);
extern rtx        gen_floatv16siv16df2                               (rtx, rtx);
extern rtx        gen_floatunsv16siv16df2                            (rtx, rtx);
extern rtx        gen_floatv32siv32df2                               (rtx, rtx);
extern rtx        gen_floatunsv32siv32df2                            (rtx, rtx);
extern rtx        gen_floatv64siv64df2                               (rtx, rtx);
extern rtx        gen_floatunsv64siv64df2                            (rtx, rtx);
extern rtx        gen_floatv128siv128df2                             (rtx, rtx);
extern rtx        gen_floatunsv128siv128df2                          (rtx, rtx);
extern rtx        gen_floatv256siv256df2                             (rtx, rtx);
extern rtx        gen_floatunsv256siv256df2                          (rtx, rtx);
extern rtx        gen_floatv512siv512df2                             (rtx, rtx);
extern rtx        gen_floatunsv512siv512df2                          (rtx, rtx);
extern rtx        gen_fix_truncrvvm8hfrvvm4qi2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm8hfrvvm4qi2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvm4hfrvvm2qi2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm4hfrvvm2qi2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvm2hfrvvm1qi2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm2hfrvvm1qi2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvm1hfrvvmf2qi2                      (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm1hfrvvmf2qi2                   (rtx, rtx);
extern rtx        gen_fix_truncrvvmf2hfrvvmf4qi2                     (rtx, rtx);
extern rtx        gen_fixuns_truncrvvmf2hfrvvmf4qi2                  (rtx, rtx);
extern rtx        gen_fix_truncrvvmf4hfrvvmf8qi2                     (rtx, rtx);
extern rtx        gen_fixuns_truncrvvmf4hfrvvmf8qi2                  (rtx, rtx);
extern rtx        gen_fix_truncrvvm8sfrvvm4hi2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm8sfrvvm4hi2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvm4sfrvvm2hi2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm4sfrvvm2hi2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvm2sfrvvm1hi2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm2sfrvvm1hi2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvm1sfrvvmf2hi2                      (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm1sfrvvmf2hi2                   (rtx, rtx);
extern rtx        gen_fix_truncrvvmf2sfrvvmf4hi2                     (rtx, rtx);
extern rtx        gen_fixuns_truncrvvmf2sfrvvmf4hi2                  (rtx, rtx);
extern rtx        gen_fix_truncrvvm8dfrvvm4si2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm8dfrvvm4si2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvm4dfrvvm2si2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm4dfrvvm2si2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvm2dfrvvm1si2                       (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm2dfrvvm1si2                    (rtx, rtx);
extern rtx        gen_fix_truncrvvm1dfrvvmf2si2                      (rtx, rtx);
extern rtx        gen_fixuns_truncrvvm1dfrvvmf2si2                   (rtx, rtx);
extern rtx        gen_fix_truncv1hfv1qi2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv1hfv1qi2                          (rtx, rtx);
extern rtx        gen_fix_truncv2hfv2qi2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv2hfv2qi2                          (rtx, rtx);
extern rtx        gen_fix_truncv4hfv4qi2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv4hfv4qi2                          (rtx, rtx);
extern rtx        gen_fix_truncv8hfv8qi2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv8hfv8qi2                          (rtx, rtx);
extern rtx        gen_fix_truncv16hfv16qi2                           (rtx, rtx);
extern rtx        gen_fixuns_truncv16hfv16qi2                        (rtx, rtx);
extern rtx        gen_fix_truncv32hfv32qi2                           (rtx, rtx);
extern rtx        gen_fixuns_truncv32hfv32qi2                        (rtx, rtx);
extern rtx        gen_fix_truncv64hfv64qi2                           (rtx, rtx);
extern rtx        gen_fixuns_truncv64hfv64qi2                        (rtx, rtx);
extern rtx        gen_fix_truncv128hfv128qi2                         (rtx, rtx);
extern rtx        gen_fixuns_truncv128hfv128qi2                      (rtx, rtx);
extern rtx        gen_fix_truncv256hfv256qi2                         (rtx, rtx);
extern rtx        gen_fixuns_truncv256hfv256qi2                      (rtx, rtx);
extern rtx        gen_fix_truncv512hfv512qi2                         (rtx, rtx);
extern rtx        gen_fixuns_truncv512hfv512qi2                      (rtx, rtx);
extern rtx        gen_fix_truncv1024hfv1024qi2                       (rtx, rtx);
extern rtx        gen_fixuns_truncv1024hfv1024qi2                    (rtx, rtx);
extern rtx        gen_fix_truncv2048hfv2048qi2                       (rtx, rtx);
extern rtx        gen_fixuns_truncv2048hfv2048qi2                    (rtx, rtx);
extern rtx        gen_fix_truncv1sfv1hi2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv1sfv1hi2                          (rtx, rtx);
extern rtx        gen_fix_truncv2sfv2hi2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv2sfv2hi2                          (rtx, rtx);
extern rtx        gen_fix_truncv4sfv4hi2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv4sfv4hi2                          (rtx, rtx);
extern rtx        gen_fix_truncv8sfv8hi2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv8sfv8hi2                          (rtx, rtx);
extern rtx        gen_fix_truncv16sfv16hi2                           (rtx, rtx);
extern rtx        gen_fixuns_truncv16sfv16hi2                        (rtx, rtx);
extern rtx        gen_fix_truncv32sfv32hi2                           (rtx, rtx);
extern rtx        gen_fixuns_truncv32sfv32hi2                        (rtx, rtx);
extern rtx        gen_fix_truncv64sfv64hi2                           (rtx, rtx);
extern rtx        gen_fixuns_truncv64sfv64hi2                        (rtx, rtx);
extern rtx        gen_fix_truncv128sfv128hi2                         (rtx, rtx);
extern rtx        gen_fixuns_truncv128sfv128hi2                      (rtx, rtx);
extern rtx        gen_fix_truncv256sfv256hi2                         (rtx, rtx);
extern rtx        gen_fixuns_truncv256sfv256hi2                      (rtx, rtx);
extern rtx        gen_fix_truncv512sfv512hi2                         (rtx, rtx);
extern rtx        gen_fixuns_truncv512sfv512hi2                      (rtx, rtx);
extern rtx        gen_fix_truncv1024sfv1024hi2                       (rtx, rtx);
extern rtx        gen_fixuns_truncv1024sfv1024hi2                    (rtx, rtx);
extern rtx        gen_fix_truncv1dfv1si2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv1dfv1si2                          (rtx, rtx);
extern rtx        gen_fix_truncv2dfv2si2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv2dfv2si2                          (rtx, rtx);
extern rtx        gen_fix_truncv4dfv4si2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv4dfv4si2                          (rtx, rtx);
extern rtx        gen_fix_truncv8dfv8si2                             (rtx, rtx);
extern rtx        gen_fixuns_truncv8dfv8si2                          (rtx, rtx);
extern rtx        gen_fix_truncv16dfv16si2                           (rtx, rtx);
extern rtx        gen_fixuns_truncv16dfv16si2                        (rtx, rtx);
extern rtx        gen_fix_truncv32dfv32si2                           (rtx, rtx);
extern rtx        gen_fixuns_truncv32dfv32si2                        (rtx, rtx);
extern rtx        gen_fix_truncv64dfv64si2                           (rtx, rtx);
extern rtx        gen_fixuns_truncv64dfv64si2                        (rtx, rtx);
extern rtx        gen_fix_truncv128dfv128si2                         (rtx, rtx);
extern rtx        gen_fixuns_truncv128dfv128si2                      (rtx, rtx);
extern rtx        gen_fix_truncv256dfv256si2                         (rtx, rtx);
extern rtx        gen_fixuns_truncv256dfv256si2                      (rtx, rtx);
extern rtx        gen_fix_truncv512dfv512si2                         (rtx, rtx);
extern rtx        gen_fixuns_truncv512dfv512si2                      (rtx, rtx);
extern rtx        gen_floatrvvm8sirvvm4hf2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm8sirvvm4hf2                        (rtx, rtx);
extern rtx        gen_floatrvvm4sirvvm2hf2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm4sirvvm2hf2                        (rtx, rtx);
extern rtx        gen_floatrvvm2sirvvm1hf2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm2sirvvm1hf2                        (rtx, rtx);
extern rtx        gen_floatrvvm1sirvvmf2hf2                          (rtx, rtx);
extern rtx        gen_floatunsrvvm1sirvvmf2hf2                       (rtx, rtx);
extern rtx        gen_floatrvvmf2sirvvmf4hf2                         (rtx, rtx);
extern rtx        gen_floatunsrvvmf2sirvvmf4hf2                      (rtx, rtx);
extern rtx        gen_floatrvvm8dirvvm4sf2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm8dirvvm4sf2                        (rtx, rtx);
extern rtx        gen_floatrvvm4dirvvm2sf2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm4dirvvm2sf2                        (rtx, rtx);
extern rtx        gen_floatrvvm2dirvvm1sf2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm2dirvvm1sf2                        (rtx, rtx);
extern rtx        gen_floatrvvm1dirvvmf2sf2                          (rtx, rtx);
extern rtx        gen_floatunsrvvm1dirvvmf2sf2                       (rtx, rtx);
extern rtx        gen_floatv1siv1hf2                                 (rtx, rtx);
extern rtx        gen_floatunsv1siv1hf2                              (rtx, rtx);
extern rtx        gen_floatv2siv2hf2                                 (rtx, rtx);
extern rtx        gen_floatunsv2siv2hf2                              (rtx, rtx);
extern rtx        gen_floatv4siv4hf2                                 (rtx, rtx);
extern rtx        gen_floatunsv4siv4hf2                              (rtx, rtx);
extern rtx        gen_floatv8siv8hf2                                 (rtx, rtx);
extern rtx        gen_floatunsv8siv8hf2                              (rtx, rtx);
extern rtx        gen_floatv16siv16hf2                               (rtx, rtx);
extern rtx        gen_floatunsv16siv16hf2                            (rtx, rtx);
extern rtx        gen_floatv32siv32hf2                               (rtx, rtx);
extern rtx        gen_floatunsv32siv32hf2                            (rtx, rtx);
extern rtx        gen_floatv64siv64hf2                               (rtx, rtx);
extern rtx        gen_floatunsv64siv64hf2                            (rtx, rtx);
extern rtx        gen_floatv128siv128hf2                             (rtx, rtx);
extern rtx        gen_floatunsv128siv128hf2                          (rtx, rtx);
extern rtx        gen_floatv256siv256hf2                             (rtx, rtx);
extern rtx        gen_floatunsv256siv256hf2                          (rtx, rtx);
extern rtx        gen_floatv512siv512hf2                             (rtx, rtx);
extern rtx        gen_floatunsv512siv512hf2                          (rtx, rtx);
extern rtx        gen_floatv1024siv1024hf2                           (rtx, rtx);
extern rtx        gen_floatunsv1024siv1024hf2                        (rtx, rtx);
extern rtx        gen_floatv1div1sf2                                 (rtx, rtx);
extern rtx        gen_floatunsv1div1sf2                              (rtx, rtx);
extern rtx        gen_floatv2div2sf2                                 (rtx, rtx);
extern rtx        gen_floatunsv2div2sf2                              (rtx, rtx);
extern rtx        gen_floatv4div4sf2                                 (rtx, rtx);
extern rtx        gen_floatunsv4div4sf2                              (rtx, rtx);
extern rtx        gen_floatv8div8sf2                                 (rtx, rtx);
extern rtx        gen_floatunsv8div8sf2                              (rtx, rtx);
extern rtx        gen_floatv16div16sf2                               (rtx, rtx);
extern rtx        gen_floatunsv16div16sf2                            (rtx, rtx);
extern rtx        gen_floatv32div32sf2                               (rtx, rtx);
extern rtx        gen_floatunsv32div32sf2                            (rtx, rtx);
extern rtx        gen_floatv64div64sf2                               (rtx, rtx);
extern rtx        gen_floatunsv64div64sf2                            (rtx, rtx);
extern rtx        gen_floatv128div128sf2                             (rtx, rtx);
extern rtx        gen_floatunsv128div128sf2                          (rtx, rtx);
extern rtx        gen_floatv256div256sf2                             (rtx, rtx);
extern rtx        gen_floatunsv256div256sf2                          (rtx, rtx);
extern rtx        gen_floatv512div512sf2                             (rtx, rtx);
extern rtx        gen_floatunsv512div512sf2                          (rtx, rtx);
extern rtx        gen_negrvvm8qi2                                    (rtx, rtx);
extern rtx        gen_one_cmplrvvm8qi2                               (rtx, rtx);
extern rtx        gen_negrvvm4qi2                                    (rtx, rtx);
extern rtx        gen_one_cmplrvvm4qi2                               (rtx, rtx);
extern rtx        gen_negrvvm2qi2                                    (rtx, rtx);
extern rtx        gen_one_cmplrvvm2qi2                               (rtx, rtx);
extern rtx        gen_negrvvm1qi2                                    (rtx, rtx);
extern rtx        gen_one_cmplrvvm1qi2                               (rtx, rtx);
extern rtx        gen_negrvvm8hi2                                    (rtx, rtx);
extern rtx        gen_one_cmplrvvm8hi2                               (rtx, rtx);
extern rtx        gen_negrvvm4hi2                                    (rtx, rtx);
extern rtx        gen_one_cmplrvvm4hi2                               (rtx, rtx);
extern rtx        gen_negrvvm2hi2                                    (rtx, rtx);
extern rtx        gen_one_cmplrvvm2hi2                               (rtx, rtx);
extern rtx        gen_negrvvm1hi2                                    (rtx, rtx);
extern rtx        gen_one_cmplrvvm1hi2                               (rtx, rtx);
extern rtx        gen_negrvvm8si2                                    (rtx, rtx);
extern rtx        gen_one_cmplrvvm8si2                               (rtx, rtx);
extern rtx        gen_negrvvm4si2                                    (rtx, rtx);
extern rtx        gen_one_cmplrvvm4si2                               (rtx, rtx);
extern rtx        gen_negrvvm2si2                                    (rtx, rtx);
extern rtx        gen_one_cmplrvvm2si2                               (rtx, rtx);
extern rtx        gen_negrvvm1si2                                    (rtx, rtx);
extern rtx        gen_one_cmplrvvm1si2                               (rtx, rtx);
extern rtx        gen_negrvvm8di2                                    (rtx, rtx);
extern rtx        gen_one_cmplrvvm8di2                               (rtx, rtx);
extern rtx        gen_negrvvm4di2                                    (rtx, rtx);
extern rtx        gen_one_cmplrvvm4di2                               (rtx, rtx);
extern rtx        gen_negrvvm2di2                                    (rtx, rtx);
extern rtx        gen_one_cmplrvvm2di2                               (rtx, rtx);
extern rtx        gen_negrvvm1di2                                    (rtx, rtx);
extern rtx        gen_one_cmplrvvm1di2                               (rtx, rtx);
extern rtx        gen_negrvvmf2qi2                                   (rtx, rtx);
extern rtx        gen_one_cmplrvvmf2qi2                              (rtx, rtx);
extern rtx        gen_negrvvmf4qi2                                   (rtx, rtx);
extern rtx        gen_one_cmplrvvmf4qi2                              (rtx, rtx);
extern rtx        gen_negrvvmf8qi2                                   (rtx, rtx);
extern rtx        gen_one_cmplrvvmf8qi2                              (rtx, rtx);
extern rtx        gen_negrvvmf2hi2                                   (rtx, rtx);
extern rtx        gen_one_cmplrvvmf2hi2                              (rtx, rtx);
extern rtx        gen_negrvvmf4hi2                                   (rtx, rtx);
extern rtx        gen_one_cmplrvvmf4hi2                              (rtx, rtx);
extern rtx        gen_negrvvmf2si2                                   (rtx, rtx);
extern rtx        gen_one_cmplrvvmf2si2                              (rtx, rtx);
extern rtx        gen_negv1qi2                                       (rtx, rtx);
extern rtx        gen_one_cmplv1qi2                                  (rtx, rtx);
extern rtx        gen_negv2qi2                                       (rtx, rtx);
extern rtx        gen_one_cmplv2qi2                                  (rtx, rtx);
extern rtx        gen_negv4qi2                                       (rtx, rtx);
extern rtx        gen_one_cmplv4qi2                                  (rtx, rtx);
extern rtx        gen_negv8qi2                                       (rtx, rtx);
extern rtx        gen_one_cmplv8qi2                                  (rtx, rtx);
extern rtx        gen_negv16qi2                                      (rtx, rtx);
extern rtx        gen_one_cmplv16qi2                                 (rtx, rtx);
extern rtx        gen_negv32qi2                                      (rtx, rtx);
extern rtx        gen_one_cmplv32qi2                                 (rtx, rtx);
extern rtx        gen_negv64qi2                                      (rtx, rtx);
extern rtx        gen_one_cmplv64qi2                                 (rtx, rtx);
extern rtx        gen_negv128qi2                                     (rtx, rtx);
extern rtx        gen_one_cmplv128qi2                                (rtx, rtx);
extern rtx        gen_negv256qi2                                     (rtx, rtx);
extern rtx        gen_one_cmplv256qi2                                (rtx, rtx);
extern rtx        gen_negv512qi2                                     (rtx, rtx);
extern rtx        gen_one_cmplv512qi2                                (rtx, rtx);
extern rtx        gen_negv1024qi2                                    (rtx, rtx);
extern rtx        gen_one_cmplv1024qi2                               (rtx, rtx);
extern rtx        gen_negv2048qi2                                    (rtx, rtx);
extern rtx        gen_one_cmplv2048qi2                               (rtx, rtx);
extern rtx        gen_negv4096qi2                                    (rtx, rtx);
extern rtx        gen_one_cmplv4096qi2                               (rtx, rtx);
extern rtx        gen_negv1hi2                                       (rtx, rtx);
extern rtx        gen_one_cmplv1hi2                                  (rtx, rtx);
extern rtx        gen_negv2hi2                                       (rtx, rtx);
extern rtx        gen_one_cmplv2hi2                                  (rtx, rtx);
extern rtx        gen_negv4hi2                                       (rtx, rtx);
extern rtx        gen_one_cmplv4hi2                                  (rtx, rtx);
extern rtx        gen_negv8hi2                                       (rtx, rtx);
extern rtx        gen_one_cmplv8hi2                                  (rtx, rtx);
extern rtx        gen_negv16hi2                                      (rtx, rtx);
extern rtx        gen_one_cmplv16hi2                                 (rtx, rtx);
extern rtx        gen_negv32hi2                                      (rtx, rtx);
extern rtx        gen_one_cmplv32hi2                                 (rtx, rtx);
extern rtx        gen_negv64hi2                                      (rtx, rtx);
extern rtx        gen_one_cmplv64hi2                                 (rtx, rtx);
extern rtx        gen_negv128hi2                                     (rtx, rtx);
extern rtx        gen_one_cmplv128hi2                                (rtx, rtx);
extern rtx        gen_negv256hi2                                     (rtx, rtx);
extern rtx        gen_one_cmplv256hi2                                (rtx, rtx);
extern rtx        gen_negv512hi2                                     (rtx, rtx);
extern rtx        gen_one_cmplv512hi2                                (rtx, rtx);
extern rtx        gen_negv1024hi2                                    (rtx, rtx);
extern rtx        gen_one_cmplv1024hi2                               (rtx, rtx);
extern rtx        gen_negv2048hi2                                    (rtx, rtx);
extern rtx        gen_one_cmplv2048hi2                               (rtx, rtx);
extern rtx        gen_negv1si2                                       (rtx, rtx);
extern rtx        gen_one_cmplv1si2                                  (rtx, rtx);
extern rtx        gen_negv2si2                                       (rtx, rtx);
extern rtx        gen_one_cmplv2si2                                  (rtx, rtx);
extern rtx        gen_negv4si2                                       (rtx, rtx);
extern rtx        gen_one_cmplv4si2                                  (rtx, rtx);
extern rtx        gen_negv8si2                                       (rtx, rtx);
extern rtx        gen_one_cmplv8si2                                  (rtx, rtx);
extern rtx        gen_negv16si2                                      (rtx, rtx);
extern rtx        gen_one_cmplv16si2                                 (rtx, rtx);
extern rtx        gen_negv32si2                                      (rtx, rtx);
extern rtx        gen_one_cmplv32si2                                 (rtx, rtx);
extern rtx        gen_negv64si2                                      (rtx, rtx);
extern rtx        gen_one_cmplv64si2                                 (rtx, rtx);
extern rtx        gen_negv128si2                                     (rtx, rtx);
extern rtx        gen_one_cmplv128si2                                (rtx, rtx);
extern rtx        gen_negv256si2                                     (rtx, rtx);
extern rtx        gen_one_cmplv256si2                                (rtx, rtx);
extern rtx        gen_negv512si2                                     (rtx, rtx);
extern rtx        gen_one_cmplv512si2                                (rtx, rtx);
extern rtx        gen_negv1024si2                                    (rtx, rtx);
extern rtx        gen_one_cmplv1024si2                               (rtx, rtx);
extern rtx        gen_negv1di2                                       (rtx, rtx);
extern rtx        gen_one_cmplv1di2                                  (rtx, rtx);
extern rtx        gen_negv2di2                                       (rtx, rtx);
extern rtx        gen_one_cmplv2di2                                  (rtx, rtx);
extern rtx        gen_negv4di2                                       (rtx, rtx);
extern rtx        gen_one_cmplv4di2                                  (rtx, rtx);
extern rtx        gen_negv8di2                                       (rtx, rtx);
extern rtx        gen_one_cmplv8di2                                  (rtx, rtx);
extern rtx        gen_negv16di2                                      (rtx, rtx);
extern rtx        gen_one_cmplv16di2                                 (rtx, rtx);
extern rtx        gen_negv32di2                                      (rtx, rtx);
extern rtx        gen_one_cmplv32di2                                 (rtx, rtx);
extern rtx        gen_negv64di2                                      (rtx, rtx);
extern rtx        gen_one_cmplv64di2                                 (rtx, rtx);
extern rtx        gen_negv128di2                                     (rtx, rtx);
extern rtx        gen_one_cmplv128di2                                (rtx, rtx);
extern rtx        gen_negv256di2                                     (rtx, rtx);
extern rtx        gen_one_cmplv256di2                                (rtx, rtx);
extern rtx        gen_negv512di2                                     (rtx, rtx);
extern rtx        gen_one_cmplv512di2                                (rtx, rtx);
extern rtx        gen_negrvvm8hf2                                    (rtx, rtx);
extern rtx        gen_absrvvm8hf2                                    (rtx, rtx);
extern rtx        gen_negrvvm4hf2                                    (rtx, rtx);
extern rtx        gen_absrvvm4hf2                                    (rtx, rtx);
extern rtx        gen_negrvvm2hf2                                    (rtx, rtx);
extern rtx        gen_absrvvm2hf2                                    (rtx, rtx);
extern rtx        gen_negrvvm1hf2                                    (rtx, rtx);
extern rtx        gen_absrvvm1hf2                                    (rtx, rtx);
extern rtx        gen_negrvvmf2hf2                                   (rtx, rtx);
extern rtx        gen_absrvvmf2hf2                                   (rtx, rtx);
extern rtx        gen_negrvvmf4hf2                                   (rtx, rtx);
extern rtx        gen_absrvvmf4hf2                                   (rtx, rtx);
extern rtx        gen_negrvvm8sf2                                    (rtx, rtx);
extern rtx        gen_absrvvm8sf2                                    (rtx, rtx);
extern rtx        gen_negrvvm4sf2                                    (rtx, rtx);
extern rtx        gen_absrvvm4sf2                                    (rtx, rtx);
extern rtx        gen_negrvvm2sf2                                    (rtx, rtx);
extern rtx        gen_absrvvm2sf2                                    (rtx, rtx);
extern rtx        gen_negrvvm1sf2                                    (rtx, rtx);
extern rtx        gen_absrvvm1sf2                                    (rtx, rtx);
extern rtx        gen_negrvvmf2sf2                                   (rtx, rtx);
extern rtx        gen_absrvvmf2sf2                                   (rtx, rtx);
extern rtx        gen_negrvvm8df2                                    (rtx, rtx);
extern rtx        gen_absrvvm8df2                                    (rtx, rtx);
extern rtx        gen_negrvvm4df2                                    (rtx, rtx);
extern rtx        gen_absrvvm4df2                                    (rtx, rtx);
extern rtx        gen_negrvvm2df2                                    (rtx, rtx);
extern rtx        gen_absrvvm2df2                                    (rtx, rtx);
extern rtx        gen_negrvvm1df2                                    (rtx, rtx);
extern rtx        gen_absrvvm1df2                                    (rtx, rtx);
extern rtx        gen_negv1hf2                                       (rtx, rtx);
extern rtx        gen_absv1hf2                                       (rtx, rtx);
extern rtx        gen_negv2hf2                                       (rtx, rtx);
extern rtx        gen_absv2hf2                                       (rtx, rtx);
extern rtx        gen_negv4hf2                                       (rtx, rtx);
extern rtx        gen_absv4hf2                                       (rtx, rtx);
extern rtx        gen_negv8hf2                                       (rtx, rtx);
extern rtx        gen_absv8hf2                                       (rtx, rtx);
extern rtx        gen_negv16hf2                                      (rtx, rtx);
extern rtx        gen_absv16hf2                                      (rtx, rtx);
extern rtx        gen_negv32hf2                                      (rtx, rtx);
extern rtx        gen_absv32hf2                                      (rtx, rtx);
extern rtx        gen_negv64hf2                                      (rtx, rtx);
extern rtx        gen_absv64hf2                                      (rtx, rtx);
extern rtx        gen_negv128hf2                                     (rtx, rtx);
extern rtx        gen_absv128hf2                                     (rtx, rtx);
extern rtx        gen_negv256hf2                                     (rtx, rtx);
extern rtx        gen_absv256hf2                                     (rtx, rtx);
extern rtx        gen_negv512hf2                                     (rtx, rtx);
extern rtx        gen_absv512hf2                                     (rtx, rtx);
extern rtx        gen_negv1024hf2                                    (rtx, rtx);
extern rtx        gen_absv1024hf2                                    (rtx, rtx);
extern rtx        gen_negv2048hf2                                    (rtx, rtx);
extern rtx        gen_absv2048hf2                                    (rtx, rtx);
extern rtx        gen_negv1sf2                                       (rtx, rtx);
extern rtx        gen_absv1sf2                                       (rtx, rtx);
extern rtx        gen_negv2sf2                                       (rtx, rtx);
extern rtx        gen_absv2sf2                                       (rtx, rtx);
extern rtx        gen_negv4sf2                                       (rtx, rtx);
extern rtx        gen_absv4sf2                                       (rtx, rtx);
extern rtx        gen_negv8sf2                                       (rtx, rtx);
extern rtx        gen_absv8sf2                                       (rtx, rtx);
extern rtx        gen_negv16sf2                                      (rtx, rtx);
extern rtx        gen_absv16sf2                                      (rtx, rtx);
extern rtx        gen_negv32sf2                                      (rtx, rtx);
extern rtx        gen_absv32sf2                                      (rtx, rtx);
extern rtx        gen_negv64sf2                                      (rtx, rtx);
extern rtx        gen_absv64sf2                                      (rtx, rtx);
extern rtx        gen_negv128sf2                                     (rtx, rtx);
extern rtx        gen_absv128sf2                                     (rtx, rtx);
extern rtx        gen_negv256sf2                                     (rtx, rtx);
extern rtx        gen_absv256sf2                                     (rtx, rtx);
extern rtx        gen_negv512sf2                                     (rtx, rtx);
extern rtx        gen_absv512sf2                                     (rtx, rtx);
extern rtx        gen_negv1024sf2                                    (rtx, rtx);
extern rtx        gen_absv1024sf2                                    (rtx, rtx);
extern rtx        gen_negv1df2                                       (rtx, rtx);
extern rtx        gen_absv1df2                                       (rtx, rtx);
extern rtx        gen_negv2df2                                       (rtx, rtx);
extern rtx        gen_absv2df2                                       (rtx, rtx);
extern rtx        gen_negv4df2                                       (rtx, rtx);
extern rtx        gen_absv4df2                                       (rtx, rtx);
extern rtx        gen_negv8df2                                       (rtx, rtx);
extern rtx        gen_absv8df2                                       (rtx, rtx);
extern rtx        gen_negv16df2                                      (rtx, rtx);
extern rtx        gen_absv16df2                                      (rtx, rtx);
extern rtx        gen_negv32df2                                      (rtx, rtx);
extern rtx        gen_absv32df2                                      (rtx, rtx);
extern rtx        gen_negv64df2                                      (rtx, rtx);
extern rtx        gen_absv64df2                                      (rtx, rtx);
extern rtx        gen_negv128df2                                     (rtx, rtx);
extern rtx        gen_absv128df2                                     (rtx, rtx);
extern rtx        gen_negv256df2                                     (rtx, rtx);
extern rtx        gen_absv256df2                                     (rtx, rtx);
extern rtx        gen_negv512df2                                     (rtx, rtx);
extern rtx        gen_absv512df2                                     (rtx, rtx);
extern rtx        gen_sqrtrvvm8hf2                                   (rtx, rtx);
extern rtx        gen_sqrtrvvm4hf2                                   (rtx, rtx);
extern rtx        gen_sqrtrvvm2hf2                                   (rtx, rtx);
extern rtx        gen_sqrtrvvm1hf2                                   (rtx, rtx);
extern rtx        gen_sqrtrvvmf2hf2                                  (rtx, rtx);
extern rtx        gen_sqrtrvvmf4hf2                                  (rtx, rtx);
extern rtx        gen_sqrtrvvm8sf2                                   (rtx, rtx);
extern rtx        gen_sqrtrvvm4sf2                                   (rtx, rtx);
extern rtx        gen_sqrtrvvm2sf2                                   (rtx, rtx);
extern rtx        gen_sqrtrvvm1sf2                                   (rtx, rtx);
extern rtx        gen_sqrtrvvmf2sf2                                  (rtx, rtx);
extern rtx        gen_sqrtrvvm8df2                                   (rtx, rtx);
extern rtx        gen_sqrtrvvm4df2                                   (rtx, rtx);
extern rtx        gen_sqrtrvvm2df2                                   (rtx, rtx);
extern rtx        gen_sqrtrvvm1df2                                   (rtx, rtx);
extern rtx        gen_sqrtv1hf2                                      (rtx, rtx);
extern rtx        gen_sqrtv2hf2                                      (rtx, rtx);
extern rtx        gen_sqrtv4hf2                                      (rtx, rtx);
extern rtx        gen_sqrtv8hf2                                      (rtx, rtx);
extern rtx        gen_sqrtv16hf2                                     (rtx, rtx);
extern rtx        gen_sqrtv32hf2                                     (rtx, rtx);
extern rtx        gen_sqrtv64hf2                                     (rtx, rtx);
extern rtx        gen_sqrtv128hf2                                    (rtx, rtx);
extern rtx        gen_sqrtv256hf2                                    (rtx, rtx);
extern rtx        gen_sqrtv512hf2                                    (rtx, rtx);
extern rtx        gen_sqrtv1024hf2                                   (rtx, rtx);
extern rtx        gen_sqrtv2048hf2                                   (rtx, rtx);
extern rtx        gen_sqrtv1sf2                                      (rtx, rtx);
extern rtx        gen_sqrtv2sf2                                      (rtx, rtx);
extern rtx        gen_sqrtv4sf2                                      (rtx, rtx);
extern rtx        gen_sqrtv8sf2                                      (rtx, rtx);
extern rtx        gen_sqrtv16sf2                                     (rtx, rtx);
extern rtx        gen_sqrtv32sf2                                     (rtx, rtx);
extern rtx        gen_sqrtv64sf2                                     (rtx, rtx);
extern rtx        gen_sqrtv128sf2                                    (rtx, rtx);
extern rtx        gen_sqrtv256sf2                                    (rtx, rtx);
extern rtx        gen_sqrtv512sf2                                    (rtx, rtx);
extern rtx        gen_sqrtv1024sf2                                   (rtx, rtx);
extern rtx        gen_sqrtv1df2                                      (rtx, rtx);
extern rtx        gen_sqrtv2df2                                      (rtx, rtx);
extern rtx        gen_sqrtv4df2                                      (rtx, rtx);
extern rtx        gen_sqrtv8df2                                      (rtx, rtx);
extern rtx        gen_sqrtv16df2                                     (rtx, rtx);
extern rtx        gen_sqrtv32df2                                     (rtx, rtx);
extern rtx        gen_sqrtv64df2                                     (rtx, rtx);
extern rtx        gen_sqrtv128df2                                    (rtx, rtx);
extern rtx        gen_sqrtv256df2                                    (rtx, rtx);
extern rtx        gen_sqrtv512df2                                    (rtx, rtx);
extern rtx        gen_fmarvvm8qi4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm4qi4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm2qi4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm1qi4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm8hi4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm4hi4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm2hi4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm1hi4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm8si4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm4si4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm2si4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm1si4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm8di4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm4di4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm2di4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm1di4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvmf2qi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvmf4qi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvmf8qi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvmf2hi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvmf4hi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvmf2si4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav1qi4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav2qi4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav4qi4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav8qi4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav16qi4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav32qi4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav64qi4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav128qi4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav256qi4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav512qi4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav1024qi4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav2048qi4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav4096qi4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav1hi4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav2hi4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav4hi4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav8hi4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav16hi4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav32hi4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav64hi4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav128hi4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav256hi4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav512hi4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav1024hi4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav2048hi4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav1si4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav2si4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav4si4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav8si4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav16si4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav32si4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav64si4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav128si4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav256si4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav512si4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav1024si4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav1di4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav2di4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav4di4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav8di4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav16di4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav32di4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav64di4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav128di4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav256di4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav512di4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm8qi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm4qi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm2qi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm1qi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm8hi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm4hi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm2hi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm1hi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm8si4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm4si4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm2si4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm1si4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm8di4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm4di4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm2di4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm1di4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvmf2qi4                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvmf4qi4                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvmf8qi4                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvmf2hi4                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvmf4hi4                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvmf2si4                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav1qi4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav2qi4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav4qi4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav8qi4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav16qi4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav32qi4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav64qi4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav128qi4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav256qi4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav512qi4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav1024qi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav2048qi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav4096qi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav1hi4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav2hi4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav4hi4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav8hi4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav16hi4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav32hi4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav64hi4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav128hi4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav256hi4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav512hi4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav1024hi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav2048hi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav1si4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav2si4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav4si4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav8si4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav16si4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav32si4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav64si4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav128si4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav256si4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav512si4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav1024si4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav1di4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav2di4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav4di4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav8di4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav16di4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav32di4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav64di4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav128di4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav256di4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav512di4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm8hf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm4hf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm2hf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm1hf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvmf2hf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvmf4hf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm8sf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm4sf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm2sf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm1sf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvmf2sf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm8df4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm4df4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm2df4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmarvvm1df4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav1hf4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav2hf4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav4hf4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav8hf4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav16hf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav32hf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav64hf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav128hf4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav256hf4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav512hf4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav1024hf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav2048hf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav1sf4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav2sf4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav4sf4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav8sf4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav16sf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav32sf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav64sf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav128sf4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav256sf4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav512sf4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav1024sf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav1df4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav2df4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav4df4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav8df4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav16df4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav32df4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav64df4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav128df4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav256df4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmav512df4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm8hf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm4hf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm2hf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm1hf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvmf2hf4                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvmf4hf4                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm8sf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm4sf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm2sf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm1sf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvmf2sf4                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm8df4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm4df4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm2df4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmarvvm1df4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav1hf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav2hf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav4hf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav8hf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav16hf4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav32hf4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav64hf4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav128hf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav256hf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav512hf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav1024hf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav2048hf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav1sf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav2sf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav4sf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav8sf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav16sf4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav32sf4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav64sf4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav128sf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav256sf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav512sf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav1024sf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav1df4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav2df4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav4df4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav8df4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav16df4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav32df4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav64df4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav128df4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav256df4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmav512df4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsrvvm8hf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsrvvm4hf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsrvvm2hf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsrvvm1hf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsrvvmf2hf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsrvvmf4hf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsrvvm8sf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsrvvm4sf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsrvvm2sf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsrvvm1sf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsrvvmf2sf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsrvvm8df4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsrvvm4df4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsrvvm2df4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsrvvm1df4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv1hf4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv2hf4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv4hf4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv8hf4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv16hf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv32hf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv64hf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv128hf4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv256hf4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv512hf4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv1024hf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv2048hf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv1sf4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv2sf4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv4sf4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv8sf4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv16sf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv32sf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv64sf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv128sf4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv256sf4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv512sf4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv1024sf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv1df4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv2df4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv4df4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv8df4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv16df4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv32df4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv64df4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv128df4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv256df4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fmsv512df4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsrvvm8hf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsrvvm4hf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsrvvm2hf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsrvvm1hf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsrvvmf2hf4                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsrvvmf4hf4                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsrvvm8sf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsrvvm4sf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsrvvm2sf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsrvvm1sf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsrvvmf2sf4                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsrvvm8df4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsrvvm4df4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsrvvm2df4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsrvvm1df4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv1hf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv2hf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv4hf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv8hf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv16hf4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv32hf4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv64hf4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv128hf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv256hf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv512hf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv1024hf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv2048hf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv1sf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv2sf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv4sf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv8sf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv16sf4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv32sf4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv64sf4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv128sf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv256sf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv512sf4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv1024sf4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv1df4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv2df4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv4df4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv8df4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv16df4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv32df4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv64df4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv128df4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv256df4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_fnmsv512df4                                    (rtx, rtx, rtx, rtx);
extern rtx        gen_addrvvm8hf3                                    (rtx, rtx, rtx);
extern rtx        gen_mulrvvm8hf3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm8hf3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm8hf3                                    (rtx, rtx, rtx);
extern rtx        gen_addrvvm4hf3                                    (rtx, rtx, rtx);
extern rtx        gen_mulrvvm4hf3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm4hf3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm4hf3                                    (rtx, rtx, rtx);
extern rtx        gen_addrvvm2hf3                                    (rtx, rtx, rtx);
extern rtx        gen_mulrvvm2hf3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm2hf3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm2hf3                                    (rtx, rtx, rtx);
extern rtx        gen_addrvvm1hf3                                    (rtx, rtx, rtx);
extern rtx        gen_mulrvvm1hf3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm1hf3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm1hf3                                    (rtx, rtx, rtx);
extern rtx        gen_addrvvmf2hf3                                   (rtx, rtx, rtx);
extern rtx        gen_mulrvvmf2hf3                                   (rtx, rtx, rtx);
extern rtx        gen_subrvvmf2hf3                                   (rtx, rtx, rtx);
extern rtx        gen_divrvvmf2hf3                                   (rtx, rtx, rtx);
extern rtx        gen_addrvvmf4hf3                                   (rtx, rtx, rtx);
extern rtx        gen_mulrvvmf4hf3                                   (rtx, rtx, rtx);
extern rtx        gen_subrvvmf4hf3                                   (rtx, rtx, rtx);
extern rtx        gen_divrvvmf4hf3                                   (rtx, rtx, rtx);
extern rtx        gen_addrvvm8sf3                                    (rtx, rtx, rtx);
extern rtx        gen_mulrvvm8sf3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm8sf3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm8sf3                                    (rtx, rtx, rtx);
extern rtx        gen_addrvvm4sf3                                    (rtx, rtx, rtx);
extern rtx        gen_mulrvvm4sf3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm4sf3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm4sf3                                    (rtx, rtx, rtx);
extern rtx        gen_addrvvm2sf3                                    (rtx, rtx, rtx);
extern rtx        gen_mulrvvm2sf3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm2sf3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm2sf3                                    (rtx, rtx, rtx);
extern rtx        gen_addrvvm1sf3                                    (rtx, rtx, rtx);
extern rtx        gen_mulrvvm1sf3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm1sf3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm1sf3                                    (rtx, rtx, rtx);
extern rtx        gen_addrvvmf2sf3                                   (rtx, rtx, rtx);
extern rtx        gen_mulrvvmf2sf3                                   (rtx, rtx, rtx);
extern rtx        gen_subrvvmf2sf3                                   (rtx, rtx, rtx);
extern rtx        gen_divrvvmf2sf3                                   (rtx, rtx, rtx);
extern rtx        gen_addrvvm8df3                                    (rtx, rtx, rtx);
extern rtx        gen_mulrvvm8df3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm8df3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm8df3                                    (rtx, rtx, rtx);
extern rtx        gen_addrvvm4df3                                    (rtx, rtx, rtx);
extern rtx        gen_mulrvvm4df3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm4df3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm4df3                                    (rtx, rtx, rtx);
extern rtx        gen_addrvvm2df3                                    (rtx, rtx, rtx);
extern rtx        gen_mulrvvm2df3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm2df3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm2df3                                    (rtx, rtx, rtx);
extern rtx        gen_addrvvm1df3                                    (rtx, rtx, rtx);
extern rtx        gen_mulrvvm1df3                                    (rtx, rtx, rtx);
extern rtx        gen_subrvvm1df3                                    (rtx, rtx, rtx);
extern rtx        gen_divrvvm1df3                                    (rtx, rtx, rtx);
extern rtx        gen_addv1hf3                                       (rtx, rtx, rtx);
extern rtx        gen_mulv1hf3                                       (rtx, rtx, rtx);
extern rtx        gen_subv1hf3                                       (rtx, rtx, rtx);
extern rtx        gen_divv1hf3                                       (rtx, rtx, rtx);
extern rtx        gen_addv2hf3                                       (rtx, rtx, rtx);
extern rtx        gen_mulv2hf3                                       (rtx, rtx, rtx);
extern rtx        gen_subv2hf3                                       (rtx, rtx, rtx);
extern rtx        gen_divv2hf3                                       (rtx, rtx, rtx);
extern rtx        gen_addv4hf3                                       (rtx, rtx, rtx);
extern rtx        gen_mulv4hf3                                       (rtx, rtx, rtx);
extern rtx        gen_subv4hf3                                       (rtx, rtx, rtx);
extern rtx        gen_divv4hf3                                       (rtx, rtx, rtx);
extern rtx        gen_addv8hf3                                       (rtx, rtx, rtx);
extern rtx        gen_mulv8hf3                                       (rtx, rtx, rtx);
extern rtx        gen_subv8hf3                                       (rtx, rtx, rtx);
extern rtx        gen_divv8hf3                                       (rtx, rtx, rtx);
extern rtx        gen_addv16hf3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv16hf3                                      (rtx, rtx, rtx);
extern rtx        gen_subv16hf3                                      (rtx, rtx, rtx);
extern rtx        gen_divv16hf3                                      (rtx, rtx, rtx);
extern rtx        gen_addv32hf3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv32hf3                                      (rtx, rtx, rtx);
extern rtx        gen_subv32hf3                                      (rtx, rtx, rtx);
extern rtx        gen_divv32hf3                                      (rtx, rtx, rtx);
extern rtx        gen_addv64hf3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv64hf3                                      (rtx, rtx, rtx);
extern rtx        gen_subv64hf3                                      (rtx, rtx, rtx);
extern rtx        gen_divv64hf3                                      (rtx, rtx, rtx);
extern rtx        gen_addv128hf3                                     (rtx, rtx, rtx);
extern rtx        gen_mulv128hf3                                     (rtx, rtx, rtx);
extern rtx        gen_subv128hf3                                     (rtx, rtx, rtx);
extern rtx        gen_divv128hf3                                     (rtx, rtx, rtx);
extern rtx        gen_addv256hf3                                     (rtx, rtx, rtx);
extern rtx        gen_mulv256hf3                                     (rtx, rtx, rtx);
extern rtx        gen_subv256hf3                                     (rtx, rtx, rtx);
extern rtx        gen_divv256hf3                                     (rtx, rtx, rtx);
extern rtx        gen_addv512hf3                                     (rtx, rtx, rtx);
extern rtx        gen_mulv512hf3                                     (rtx, rtx, rtx);
extern rtx        gen_subv512hf3                                     (rtx, rtx, rtx);
extern rtx        gen_divv512hf3                                     (rtx, rtx, rtx);
extern rtx        gen_addv1024hf3                                    (rtx, rtx, rtx);
extern rtx        gen_mulv1024hf3                                    (rtx, rtx, rtx);
extern rtx        gen_subv1024hf3                                    (rtx, rtx, rtx);
extern rtx        gen_divv1024hf3                                    (rtx, rtx, rtx);
extern rtx        gen_addv2048hf3                                    (rtx, rtx, rtx);
extern rtx        gen_mulv2048hf3                                    (rtx, rtx, rtx);
extern rtx        gen_subv2048hf3                                    (rtx, rtx, rtx);
extern rtx        gen_divv2048hf3                                    (rtx, rtx, rtx);
extern rtx        gen_addv1sf3                                       (rtx, rtx, rtx);
extern rtx        gen_mulv1sf3                                       (rtx, rtx, rtx);
extern rtx        gen_subv1sf3                                       (rtx, rtx, rtx);
extern rtx        gen_divv1sf3                                       (rtx, rtx, rtx);
extern rtx        gen_addv2sf3                                       (rtx, rtx, rtx);
extern rtx        gen_mulv2sf3                                       (rtx, rtx, rtx);
extern rtx        gen_subv2sf3                                       (rtx, rtx, rtx);
extern rtx        gen_divv2sf3                                       (rtx, rtx, rtx);
extern rtx        gen_addv4sf3                                       (rtx, rtx, rtx);
extern rtx        gen_mulv4sf3                                       (rtx, rtx, rtx);
extern rtx        gen_subv4sf3                                       (rtx, rtx, rtx);
extern rtx        gen_divv4sf3                                       (rtx, rtx, rtx);
extern rtx        gen_addv8sf3                                       (rtx, rtx, rtx);
extern rtx        gen_mulv8sf3                                       (rtx, rtx, rtx);
extern rtx        gen_subv8sf3                                       (rtx, rtx, rtx);
extern rtx        gen_divv8sf3                                       (rtx, rtx, rtx);
extern rtx        gen_addv16sf3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv16sf3                                      (rtx, rtx, rtx);
extern rtx        gen_subv16sf3                                      (rtx, rtx, rtx);
extern rtx        gen_divv16sf3                                      (rtx, rtx, rtx);
extern rtx        gen_addv32sf3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv32sf3                                      (rtx, rtx, rtx);
extern rtx        gen_subv32sf3                                      (rtx, rtx, rtx);
extern rtx        gen_divv32sf3                                      (rtx, rtx, rtx);
extern rtx        gen_addv64sf3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv64sf3                                      (rtx, rtx, rtx);
extern rtx        gen_subv64sf3                                      (rtx, rtx, rtx);
extern rtx        gen_divv64sf3                                      (rtx, rtx, rtx);
extern rtx        gen_addv128sf3                                     (rtx, rtx, rtx);
extern rtx        gen_mulv128sf3                                     (rtx, rtx, rtx);
extern rtx        gen_subv128sf3                                     (rtx, rtx, rtx);
extern rtx        gen_divv128sf3                                     (rtx, rtx, rtx);
extern rtx        gen_addv256sf3                                     (rtx, rtx, rtx);
extern rtx        gen_mulv256sf3                                     (rtx, rtx, rtx);
extern rtx        gen_subv256sf3                                     (rtx, rtx, rtx);
extern rtx        gen_divv256sf3                                     (rtx, rtx, rtx);
extern rtx        gen_addv512sf3                                     (rtx, rtx, rtx);
extern rtx        gen_mulv512sf3                                     (rtx, rtx, rtx);
extern rtx        gen_subv512sf3                                     (rtx, rtx, rtx);
extern rtx        gen_divv512sf3                                     (rtx, rtx, rtx);
extern rtx        gen_addv1024sf3                                    (rtx, rtx, rtx);
extern rtx        gen_mulv1024sf3                                    (rtx, rtx, rtx);
extern rtx        gen_subv1024sf3                                    (rtx, rtx, rtx);
extern rtx        gen_divv1024sf3                                    (rtx, rtx, rtx);
extern rtx        gen_addv1df3                                       (rtx, rtx, rtx);
extern rtx        gen_mulv1df3                                       (rtx, rtx, rtx);
extern rtx        gen_subv1df3                                       (rtx, rtx, rtx);
extern rtx        gen_divv1df3                                       (rtx, rtx, rtx);
extern rtx        gen_addv2df3                                       (rtx, rtx, rtx);
extern rtx        gen_mulv2df3                                       (rtx, rtx, rtx);
extern rtx        gen_subv2df3                                       (rtx, rtx, rtx);
extern rtx        gen_divv2df3                                       (rtx, rtx, rtx);
extern rtx        gen_addv4df3                                       (rtx, rtx, rtx);
extern rtx        gen_mulv4df3                                       (rtx, rtx, rtx);
extern rtx        gen_subv4df3                                       (rtx, rtx, rtx);
extern rtx        gen_divv4df3                                       (rtx, rtx, rtx);
extern rtx        gen_addv8df3                                       (rtx, rtx, rtx);
extern rtx        gen_mulv8df3                                       (rtx, rtx, rtx);
extern rtx        gen_subv8df3                                       (rtx, rtx, rtx);
extern rtx        gen_divv8df3                                       (rtx, rtx, rtx);
extern rtx        gen_addv16df3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv16df3                                      (rtx, rtx, rtx);
extern rtx        gen_subv16df3                                      (rtx, rtx, rtx);
extern rtx        gen_divv16df3                                      (rtx, rtx, rtx);
extern rtx        gen_addv32df3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv32df3                                      (rtx, rtx, rtx);
extern rtx        gen_subv32df3                                      (rtx, rtx, rtx);
extern rtx        gen_divv32df3                                      (rtx, rtx, rtx);
extern rtx        gen_addv64df3                                      (rtx, rtx, rtx);
extern rtx        gen_mulv64df3                                      (rtx, rtx, rtx);
extern rtx        gen_subv64df3                                      (rtx, rtx, rtx);
extern rtx        gen_divv64df3                                      (rtx, rtx, rtx);
extern rtx        gen_addv128df3                                     (rtx, rtx, rtx);
extern rtx        gen_mulv128df3                                     (rtx, rtx, rtx);
extern rtx        gen_subv128df3                                     (rtx, rtx, rtx);
extern rtx        gen_divv128df3                                     (rtx, rtx, rtx);
extern rtx        gen_addv256df3                                     (rtx, rtx, rtx);
extern rtx        gen_mulv256df3                                     (rtx, rtx, rtx);
extern rtx        gen_subv256df3                                     (rtx, rtx, rtx);
extern rtx        gen_divv256df3                                     (rtx, rtx, rtx);
extern rtx        gen_addv512df3                                     (rtx, rtx, rtx);
extern rtx        gen_mulv512df3                                     (rtx, rtx, rtx);
extern rtx        gen_subv512df3                                     (rtx, rtx, rtx);
extern rtx        gen_divv512df3                                     (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm8hf3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm8hf3                                   (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm4hf3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm4hf3                                   (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm2hf3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm2hf3                                   (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm1hf3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm1hf3                                   (rtx, rtx, rtx);
extern rtx        gen_smaxrvvmf2hf3                                  (rtx, rtx, rtx);
extern rtx        gen_sminrvvmf2hf3                                  (rtx, rtx, rtx);
extern rtx        gen_smaxrvvmf4hf3                                  (rtx, rtx, rtx);
extern rtx        gen_sminrvvmf4hf3                                  (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm8sf3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm8sf3                                   (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm4sf3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm4sf3                                   (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm2sf3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm2sf3                                   (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm1sf3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm1sf3                                   (rtx, rtx, rtx);
extern rtx        gen_smaxrvvmf2sf3                                  (rtx, rtx, rtx);
extern rtx        gen_sminrvvmf2sf3                                  (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm8df3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm8df3                                   (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm4df3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm4df3                                   (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm2df3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm2df3                                   (rtx, rtx, rtx);
extern rtx        gen_smaxrvvm1df3                                   (rtx, rtx, rtx);
extern rtx        gen_sminrvvm1df3                                   (rtx, rtx, rtx);
extern rtx        gen_smaxv1hf3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv1hf3                                      (rtx, rtx, rtx);
extern rtx        gen_smaxv2hf3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv2hf3                                      (rtx, rtx, rtx);
extern rtx        gen_smaxv4hf3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv4hf3                                      (rtx, rtx, rtx);
extern rtx        gen_smaxv8hf3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv8hf3                                      (rtx, rtx, rtx);
extern rtx        gen_smaxv16hf3                                     (rtx, rtx, rtx);
extern rtx        gen_sminv16hf3                                     (rtx, rtx, rtx);
extern rtx        gen_smaxv32hf3                                     (rtx, rtx, rtx);
extern rtx        gen_sminv32hf3                                     (rtx, rtx, rtx);
extern rtx        gen_smaxv64hf3                                     (rtx, rtx, rtx);
extern rtx        gen_sminv64hf3                                     (rtx, rtx, rtx);
extern rtx        gen_smaxv128hf3                                    (rtx, rtx, rtx);
extern rtx        gen_sminv128hf3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxv256hf3                                    (rtx, rtx, rtx);
extern rtx        gen_sminv256hf3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxv512hf3                                    (rtx, rtx, rtx);
extern rtx        gen_sminv512hf3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxv1024hf3                                   (rtx, rtx, rtx);
extern rtx        gen_sminv1024hf3                                   (rtx, rtx, rtx);
extern rtx        gen_smaxv2048hf3                                   (rtx, rtx, rtx);
extern rtx        gen_sminv2048hf3                                   (rtx, rtx, rtx);
extern rtx        gen_smaxv1sf3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv1sf3                                      (rtx, rtx, rtx);
extern rtx        gen_smaxv2sf3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv2sf3                                      (rtx, rtx, rtx);
extern rtx        gen_smaxv4sf3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv4sf3                                      (rtx, rtx, rtx);
extern rtx        gen_smaxv8sf3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv8sf3                                      (rtx, rtx, rtx);
extern rtx        gen_smaxv16sf3                                     (rtx, rtx, rtx);
extern rtx        gen_sminv16sf3                                     (rtx, rtx, rtx);
extern rtx        gen_smaxv32sf3                                     (rtx, rtx, rtx);
extern rtx        gen_sminv32sf3                                     (rtx, rtx, rtx);
extern rtx        gen_smaxv64sf3                                     (rtx, rtx, rtx);
extern rtx        gen_sminv64sf3                                     (rtx, rtx, rtx);
extern rtx        gen_smaxv128sf3                                    (rtx, rtx, rtx);
extern rtx        gen_sminv128sf3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxv256sf3                                    (rtx, rtx, rtx);
extern rtx        gen_sminv256sf3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxv512sf3                                    (rtx, rtx, rtx);
extern rtx        gen_sminv512sf3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxv1024sf3                                   (rtx, rtx, rtx);
extern rtx        gen_sminv1024sf3                                   (rtx, rtx, rtx);
extern rtx        gen_smaxv1df3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv1df3                                      (rtx, rtx, rtx);
extern rtx        gen_smaxv2df3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv2df3                                      (rtx, rtx, rtx);
extern rtx        gen_smaxv4df3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv4df3                                      (rtx, rtx, rtx);
extern rtx        gen_smaxv8df3                                      (rtx, rtx, rtx);
extern rtx        gen_sminv8df3                                      (rtx, rtx, rtx);
extern rtx        gen_smaxv16df3                                     (rtx, rtx, rtx);
extern rtx        gen_sminv16df3                                     (rtx, rtx, rtx);
extern rtx        gen_smaxv32df3                                     (rtx, rtx, rtx);
extern rtx        gen_sminv32df3                                     (rtx, rtx, rtx);
extern rtx        gen_smaxv64df3                                     (rtx, rtx, rtx);
extern rtx        gen_sminv64df3                                     (rtx, rtx, rtx);
extern rtx        gen_smaxv128df3                                    (rtx, rtx, rtx);
extern rtx        gen_sminv128df3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxv256df3                                    (rtx, rtx, rtx);
extern rtx        gen_sminv256df3                                    (rtx, rtx, rtx);
extern rtx        gen_smaxv512df3                                    (rtx, rtx, rtx);
extern rtx        gen_sminv512df3                                    (rtx, rtx, rtx);
extern rtx        gen_fmaxrvvm8hf3                                   (rtx, rtx, rtx);
extern rtx        gen_fminrvvm8hf3                                   (rtx, rtx, rtx);
extern rtx        gen_fmaxrvvm4hf3                                   (rtx, rtx, rtx);
extern rtx        gen_fminrvvm4hf3                                   (rtx, rtx, rtx);
extern rtx        gen_fmaxrvvm2hf3                                   (rtx, rtx, rtx);
extern rtx        gen_fminrvvm2hf3                                   (rtx, rtx, rtx);
extern rtx        gen_fmaxrvvm1hf3                                   (rtx, rtx, rtx);
extern rtx        gen_fminrvvm1hf3                                   (rtx, rtx, rtx);
extern rtx        gen_fmaxrvvmf2hf3                                  (rtx, rtx, rtx);
extern rtx        gen_fminrvvmf2hf3                                  (rtx, rtx, rtx);
extern rtx        gen_fmaxrvvmf4hf3                                  (rtx, rtx, rtx);
extern rtx        gen_fminrvvmf4hf3                                  (rtx, rtx, rtx);
extern rtx        gen_fmaxrvvm8sf3                                   (rtx, rtx, rtx);
extern rtx        gen_fminrvvm8sf3                                   (rtx, rtx, rtx);
extern rtx        gen_fmaxrvvm4sf3                                   (rtx, rtx, rtx);
extern rtx        gen_fminrvvm4sf3                                   (rtx, rtx, rtx);
extern rtx        gen_fmaxrvvm2sf3                                   (rtx, rtx, rtx);
extern rtx        gen_fminrvvm2sf3                                   (rtx, rtx, rtx);
extern rtx        gen_fmaxrvvm1sf3                                   (rtx, rtx, rtx);
extern rtx        gen_fminrvvm1sf3                                   (rtx, rtx, rtx);
extern rtx        gen_fmaxrvvmf2sf3                                  (rtx, rtx, rtx);
extern rtx        gen_fminrvvmf2sf3                                  (rtx, rtx, rtx);
extern rtx        gen_fmaxrvvm8df3                                   (rtx, rtx, rtx);
extern rtx        gen_fminrvvm8df3                                   (rtx, rtx, rtx);
extern rtx        gen_fmaxrvvm4df3                                   (rtx, rtx, rtx);
extern rtx        gen_fminrvvm4df3                                   (rtx, rtx, rtx);
extern rtx        gen_fmaxrvvm2df3                                   (rtx, rtx, rtx);
extern rtx        gen_fminrvvm2df3                                   (rtx, rtx, rtx);
extern rtx        gen_fmaxrvvm1df3                                   (rtx, rtx, rtx);
extern rtx        gen_fminrvvm1df3                                   (rtx, rtx, rtx);
extern rtx        gen_fmaxv1hf3                                      (rtx, rtx, rtx);
extern rtx        gen_fminv1hf3                                      (rtx, rtx, rtx);
extern rtx        gen_fmaxv2hf3                                      (rtx, rtx, rtx);
extern rtx        gen_fminv2hf3                                      (rtx, rtx, rtx);
extern rtx        gen_fmaxv4hf3                                      (rtx, rtx, rtx);
extern rtx        gen_fminv4hf3                                      (rtx, rtx, rtx);
extern rtx        gen_fmaxv8hf3                                      (rtx, rtx, rtx);
extern rtx        gen_fminv8hf3                                      (rtx, rtx, rtx);
extern rtx        gen_fmaxv16hf3                                     (rtx, rtx, rtx);
extern rtx        gen_fminv16hf3                                     (rtx, rtx, rtx);
extern rtx        gen_fmaxv32hf3                                     (rtx, rtx, rtx);
extern rtx        gen_fminv32hf3                                     (rtx, rtx, rtx);
extern rtx        gen_fmaxv64hf3                                     (rtx, rtx, rtx);
extern rtx        gen_fminv64hf3                                     (rtx, rtx, rtx);
extern rtx        gen_fmaxv128hf3                                    (rtx, rtx, rtx);
extern rtx        gen_fminv128hf3                                    (rtx, rtx, rtx);
extern rtx        gen_fmaxv256hf3                                    (rtx, rtx, rtx);
extern rtx        gen_fminv256hf3                                    (rtx, rtx, rtx);
extern rtx        gen_fmaxv512hf3                                    (rtx, rtx, rtx);
extern rtx        gen_fminv512hf3                                    (rtx, rtx, rtx);
extern rtx        gen_fmaxv1024hf3                                   (rtx, rtx, rtx);
extern rtx        gen_fminv1024hf3                                   (rtx, rtx, rtx);
extern rtx        gen_fmaxv2048hf3                                   (rtx, rtx, rtx);
extern rtx        gen_fminv2048hf3                                   (rtx, rtx, rtx);
extern rtx        gen_fmaxv1sf3                                      (rtx, rtx, rtx);
extern rtx        gen_fminv1sf3                                      (rtx, rtx, rtx);
extern rtx        gen_fmaxv2sf3                                      (rtx, rtx, rtx);
extern rtx        gen_fminv2sf3                                      (rtx, rtx, rtx);
extern rtx        gen_fmaxv4sf3                                      (rtx, rtx, rtx);
extern rtx        gen_fminv4sf3                                      (rtx, rtx, rtx);
extern rtx        gen_fmaxv8sf3                                      (rtx, rtx, rtx);
extern rtx        gen_fminv8sf3                                      (rtx, rtx, rtx);
extern rtx        gen_fmaxv16sf3                                     (rtx, rtx, rtx);
extern rtx        gen_fminv16sf3                                     (rtx, rtx, rtx);
extern rtx        gen_fmaxv32sf3                                     (rtx, rtx, rtx);
extern rtx        gen_fminv32sf3                                     (rtx, rtx, rtx);
extern rtx        gen_fmaxv64sf3                                     (rtx, rtx, rtx);
extern rtx        gen_fminv64sf3                                     (rtx, rtx, rtx);
extern rtx        gen_fmaxv128sf3                                    (rtx, rtx, rtx);
extern rtx        gen_fminv128sf3                                    (rtx, rtx, rtx);
extern rtx        gen_fmaxv256sf3                                    (rtx, rtx, rtx);
extern rtx        gen_fminv256sf3                                    (rtx, rtx, rtx);
extern rtx        gen_fmaxv512sf3                                    (rtx, rtx, rtx);
extern rtx        gen_fminv512sf3                                    (rtx, rtx, rtx);
extern rtx        gen_fmaxv1024sf3                                   (rtx, rtx, rtx);
extern rtx        gen_fminv1024sf3                                   (rtx, rtx, rtx);
extern rtx        gen_fmaxv1df3                                      (rtx, rtx, rtx);
extern rtx        gen_fminv1df3                                      (rtx, rtx, rtx);
extern rtx        gen_fmaxv2df3                                      (rtx, rtx, rtx);
extern rtx        gen_fminv2df3                                      (rtx, rtx, rtx);
extern rtx        gen_fmaxv4df3                                      (rtx, rtx, rtx);
extern rtx        gen_fminv4df3                                      (rtx, rtx, rtx);
extern rtx        gen_fmaxv8df3                                      (rtx, rtx, rtx);
extern rtx        gen_fminv8df3                                      (rtx, rtx, rtx);
extern rtx        gen_fmaxv16df3                                     (rtx, rtx, rtx);
extern rtx        gen_fminv16df3                                     (rtx, rtx, rtx);
extern rtx        gen_fmaxv32df3                                     (rtx, rtx, rtx);
extern rtx        gen_fminv32df3                                     (rtx, rtx, rtx);
extern rtx        gen_fmaxv64df3                                     (rtx, rtx, rtx);
extern rtx        gen_fminv64df3                                     (rtx, rtx, rtx);
extern rtx        gen_fmaxv128df3                                    (rtx, rtx, rtx);
extern rtx        gen_fminv128df3                                    (rtx, rtx, rtx);
extern rtx        gen_fmaxv256df3                                    (rtx, rtx, rtx);
extern rtx        gen_fminv256df3                                    (rtx, rtx, rtx);
extern rtx        gen_fmaxv512df3                                    (rtx, rtx, rtx);
extern rtx        gen_fminv512df3                                    (rtx, rtx, rtx);
extern rtx        gen_copysignrvvm8hf3                               (rtx, rtx, rtx);
extern rtx        gen_copysignrvvm4hf3                               (rtx, rtx, rtx);
extern rtx        gen_copysignrvvm2hf3                               (rtx, rtx, rtx);
extern rtx        gen_copysignrvvm1hf3                               (rtx, rtx, rtx);
extern rtx        gen_copysignrvvmf2hf3                              (rtx, rtx, rtx);
extern rtx        gen_copysignrvvmf4hf3                              (rtx, rtx, rtx);
extern rtx        gen_copysignrvvm8sf3                               (rtx, rtx, rtx);
extern rtx        gen_copysignrvvm4sf3                               (rtx, rtx, rtx);
extern rtx        gen_copysignrvvm2sf3                               (rtx, rtx, rtx);
extern rtx        gen_copysignrvvm1sf3                               (rtx, rtx, rtx);
extern rtx        gen_copysignrvvmf2sf3                              (rtx, rtx, rtx);
extern rtx        gen_copysignrvvm8df3                               (rtx, rtx, rtx);
extern rtx        gen_copysignrvvm4df3                               (rtx, rtx, rtx);
extern rtx        gen_copysignrvvm2df3                               (rtx, rtx, rtx);
extern rtx        gen_copysignrvvm1df3                               (rtx, rtx, rtx);
extern rtx        gen_copysignv1hf3                                  (rtx, rtx, rtx);
extern rtx        gen_copysignv2hf3                                  (rtx, rtx, rtx);
extern rtx        gen_copysignv4hf3                                  (rtx, rtx, rtx);
extern rtx        gen_copysignv8hf3                                  (rtx, rtx, rtx);
extern rtx        gen_copysignv16hf3                                 (rtx, rtx, rtx);
extern rtx        gen_copysignv32hf3                                 (rtx, rtx, rtx);
extern rtx        gen_copysignv64hf3                                 (rtx, rtx, rtx);
extern rtx        gen_copysignv128hf3                                (rtx, rtx, rtx);
extern rtx        gen_copysignv256hf3                                (rtx, rtx, rtx);
extern rtx        gen_copysignv512hf3                                (rtx, rtx, rtx);
extern rtx        gen_copysignv1024hf3                               (rtx, rtx, rtx);
extern rtx        gen_copysignv2048hf3                               (rtx, rtx, rtx);
extern rtx        gen_copysignv1sf3                                  (rtx, rtx, rtx);
extern rtx        gen_copysignv2sf3                                  (rtx, rtx, rtx);
extern rtx        gen_copysignv4sf3                                  (rtx, rtx, rtx);
extern rtx        gen_copysignv8sf3                                  (rtx, rtx, rtx);
extern rtx        gen_copysignv16sf3                                 (rtx, rtx, rtx);
extern rtx        gen_copysignv32sf3                                 (rtx, rtx, rtx);
extern rtx        gen_copysignv64sf3                                 (rtx, rtx, rtx);
extern rtx        gen_copysignv128sf3                                (rtx, rtx, rtx);
extern rtx        gen_copysignv256sf3                                (rtx, rtx, rtx);
extern rtx        gen_copysignv512sf3                                (rtx, rtx, rtx);
extern rtx        gen_copysignv1024sf3                               (rtx, rtx, rtx);
extern rtx        gen_copysignv1df3                                  (rtx, rtx, rtx);
extern rtx        gen_copysignv2df3                                  (rtx, rtx, rtx);
extern rtx        gen_copysignv4df3                                  (rtx, rtx, rtx);
extern rtx        gen_copysignv8df3                                  (rtx, rtx, rtx);
extern rtx        gen_copysignv16df3                                 (rtx, rtx, rtx);
extern rtx        gen_copysignv32df3                                 (rtx, rtx, rtx);
extern rtx        gen_copysignv64df3                                 (rtx, rtx, rtx);
extern rtx        gen_copysignv128df3                                (rtx, rtx, rtx);
extern rtx        gen_copysignv256df3                                (rtx, rtx, rtx);
extern rtx        gen_copysignv512df3                                (rtx, rtx, rtx);
extern rtx        gen_smulrvvm8qi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_umulrvvm8qi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_smulrvvm4qi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_umulrvvm4qi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_smulrvvm2qi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_umulrvvm2qi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_smulrvvm1qi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_umulrvvm1qi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_smulrvvmf2qi3_highpart                         (rtx, rtx, rtx);
extern rtx        gen_umulrvvmf2qi3_highpart                         (rtx, rtx, rtx);
extern rtx        gen_smulrvvmf4qi3_highpart                         (rtx, rtx, rtx);
extern rtx        gen_umulrvvmf4qi3_highpart                         (rtx, rtx, rtx);
extern rtx        gen_smulrvvmf8qi3_highpart                         (rtx, rtx, rtx);
extern rtx        gen_umulrvvmf8qi3_highpart                         (rtx, rtx, rtx);
extern rtx        gen_smulrvvm8hi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_umulrvvm8hi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_smulrvvm4hi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_umulrvvm4hi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_smulrvvm2hi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_umulrvvm2hi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_smulrvvm1hi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_umulrvvm1hi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_smulrvvmf2hi3_highpart                         (rtx, rtx, rtx);
extern rtx        gen_umulrvvmf2hi3_highpart                         (rtx, rtx, rtx);
extern rtx        gen_smulrvvmf4hi3_highpart                         (rtx, rtx, rtx);
extern rtx        gen_umulrvvmf4hi3_highpart                         (rtx, rtx, rtx);
extern rtx        gen_smulrvvm8si3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_umulrvvm8si3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_smulrvvm4si3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_umulrvvm4si3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_smulrvvm2si3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_umulrvvm2si3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_smulrvvm1si3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_umulrvvm1si3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_smulrvvmf2si3_highpart                         (rtx, rtx, rtx);
extern rtx        gen_umulrvvmf2si3_highpart                         (rtx, rtx, rtx);
extern rtx        gen_smulrvvm8di3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_umulrvvm8di3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_smulrvvm4di3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_umulrvvm4di3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_smulrvvm2di3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_umulrvvm2di3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_smulrvvm1di3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_umulrvvm1di3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_smulv1qi3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_umulv1qi3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_smulv2qi3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_umulv2qi3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_smulv4qi3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_umulv4qi3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_smulv8qi3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_umulv8qi3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_smulv16qi3_highpart                            (rtx, rtx, rtx);
extern rtx        gen_umulv16qi3_highpart                            (rtx, rtx, rtx);
extern rtx        gen_smulv32qi3_highpart                            (rtx, rtx, rtx);
extern rtx        gen_umulv32qi3_highpart                            (rtx, rtx, rtx);
extern rtx        gen_smulv64qi3_highpart                            (rtx, rtx, rtx);
extern rtx        gen_umulv64qi3_highpart                            (rtx, rtx, rtx);
extern rtx        gen_smulv128qi3_highpart                           (rtx, rtx, rtx);
extern rtx        gen_umulv128qi3_highpart                           (rtx, rtx, rtx);
extern rtx        gen_smulv256qi3_highpart                           (rtx, rtx, rtx);
extern rtx        gen_umulv256qi3_highpart                           (rtx, rtx, rtx);
extern rtx        gen_smulv512qi3_highpart                           (rtx, rtx, rtx);
extern rtx        gen_umulv512qi3_highpart                           (rtx, rtx, rtx);
extern rtx        gen_smulv1024qi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_umulv1024qi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_smulv2048qi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_umulv2048qi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_smulv4096qi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_umulv4096qi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_smulv1hi3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_umulv1hi3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_smulv2hi3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_umulv2hi3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_smulv4hi3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_umulv4hi3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_smulv8hi3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_umulv8hi3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_smulv16hi3_highpart                            (rtx, rtx, rtx);
extern rtx        gen_umulv16hi3_highpart                            (rtx, rtx, rtx);
extern rtx        gen_smulv32hi3_highpart                            (rtx, rtx, rtx);
extern rtx        gen_umulv32hi3_highpart                            (rtx, rtx, rtx);
extern rtx        gen_smulv64hi3_highpart                            (rtx, rtx, rtx);
extern rtx        gen_umulv64hi3_highpart                            (rtx, rtx, rtx);
extern rtx        gen_smulv128hi3_highpart                           (rtx, rtx, rtx);
extern rtx        gen_umulv128hi3_highpart                           (rtx, rtx, rtx);
extern rtx        gen_smulv256hi3_highpart                           (rtx, rtx, rtx);
extern rtx        gen_umulv256hi3_highpart                           (rtx, rtx, rtx);
extern rtx        gen_smulv512hi3_highpart                           (rtx, rtx, rtx);
extern rtx        gen_umulv512hi3_highpart                           (rtx, rtx, rtx);
extern rtx        gen_smulv1024hi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_umulv1024hi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_smulv2048hi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_umulv2048hi3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_smulv1si3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_umulv1si3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_smulv2si3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_umulv2si3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_smulv4si3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_umulv4si3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_smulv8si3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_umulv8si3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_smulv16si3_highpart                            (rtx, rtx, rtx);
extern rtx        gen_umulv16si3_highpart                            (rtx, rtx, rtx);
extern rtx        gen_smulv32si3_highpart                            (rtx, rtx, rtx);
extern rtx        gen_umulv32si3_highpart                            (rtx, rtx, rtx);
extern rtx        gen_smulv64si3_highpart                            (rtx, rtx, rtx);
extern rtx        gen_umulv64si3_highpart                            (rtx, rtx, rtx);
extern rtx        gen_smulv128si3_highpart                           (rtx, rtx, rtx);
extern rtx        gen_umulv128si3_highpart                           (rtx, rtx, rtx);
extern rtx        gen_smulv256si3_highpart                           (rtx, rtx, rtx);
extern rtx        gen_umulv256si3_highpart                           (rtx, rtx, rtx);
extern rtx        gen_smulv512si3_highpart                           (rtx, rtx, rtx);
extern rtx        gen_umulv512si3_highpart                           (rtx, rtx, rtx);
extern rtx        gen_smulv1024si3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_umulv1024si3_highpart                          (rtx, rtx, rtx);
extern rtx        gen_smulv1di3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_umulv1di3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_smulv2di3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_umulv2di3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_smulv4di3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_umulv4di3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_smulv8di3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_umulv8di3_highpart                             (rtx, rtx, rtx);
extern rtx        gen_smulv16di3_highpart                            (rtx, rtx, rtx);
extern rtx        gen_umulv16di3_highpart                            (rtx, rtx, rtx);
extern rtx        gen_smulv32di3_highpart                            (rtx, rtx, rtx);
extern rtx        gen_umulv32di3_highpart                            (rtx, rtx, rtx);
extern rtx        gen_smulv64di3_highpart                            (rtx, rtx, rtx);
extern rtx        gen_umulv64di3_highpart                            (rtx, rtx, rtx);
extern rtx        gen_smulv128di3_highpart                           (rtx, rtx, rtx);
extern rtx        gen_umulv128di3_highpart                           (rtx, rtx, rtx);
extern rtx        gen_smulv256di3_highpart                           (rtx, rtx, rtx);
extern rtx        gen_umulv256di3_highpart                           (rtx, rtx, rtx);
extern rtx        gen_smulv512di3_highpart                           (rtx, rtx, rtx);
extern rtx        gen_umulv512di3_highpart                           (rtx, rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm8qi                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm4qi                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm2qi                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm1qi                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm8hi                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm4hi                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm2hi                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm1hi                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm8si                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm4si                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm2si                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm1si                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm8di                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm4di                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm2di                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm1di                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvmf2qi                       (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvmf4qi                       (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvmf8qi                       (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvmf2hi                       (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvmf4hi                       (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvmf2si                       (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v1qi                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v2qi                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v4qi                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v8qi                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v16qi                          (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v32qi                          (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v64qi                          (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v128qi                         (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v256qi                         (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v512qi                         (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v1024qi                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v2048qi                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v4096qi                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v1hi                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v2hi                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v4hi                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v8hi                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v16hi                          (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v32hi                          (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v64hi                          (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v128hi                         (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v256hi                         (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v512hi                         (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v1024hi                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v2048hi                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v1si                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v2si                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v4si                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v8si                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v16si                          (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v32si                          (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v64si                          (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v128si                         (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v256si                         (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v512si                         (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v1024si                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v1di                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v2di                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v4di                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v8di                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v16di                          (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v32di                          (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v64di                          (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v128di                         (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v256di                         (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v512di                         (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm8hf                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm4hf                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm2hf                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm1hf                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvmf2hf                       (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvmf4hf                       (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm8sf                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm4sf                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm2sf                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm1sf                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvmf2sf                       (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm8df                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm4df                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm2df                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_rvvm1df                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v1hf                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v2hf                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v4hf                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v8hf                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v16hf                          (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v32hf                          (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v64hf                          (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v128hf                         (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v256hf                         (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v512hf                         (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v1024hf                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v2048hf                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v1sf                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v2sf                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v4sf                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v8sf                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v16sf                          (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v32sf                          (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v64sf                          (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v128sf                         (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v256sf                         (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v512sf                         (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v1024sf                        (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v1df                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v2df                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v4df                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v8df                           (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v16df                          (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v32df                          (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v64df                          (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v128df                         (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v256df                         (rtx, rtx);
extern rtx        gen_reduc_plus_scal_v512df                         (rtx, rtx);
extern rtx        gen_fold_left_plus_rvvm8hf                         (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_rvvm4hf                         (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_rvvm2hf                         (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_rvvm1hf                         (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_rvvmf2hf                        (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_rvvmf4hf                        (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_rvvm8sf                         (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_rvvm4sf                         (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_rvvm2sf                         (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_rvvm1sf                         (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_rvvmf2sf                        (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_rvvm8df                         (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_rvvm4df                         (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_rvvm2df                         (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_rvvm1df                         (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v1hf                            (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v2hf                            (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v4hf                            (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v8hf                            (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v16hf                           (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v32hf                           (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v64hf                           (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v128hf                          (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v256hf                          (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v512hf                          (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v1024hf                         (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v2048hf                         (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v1sf                            (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v2sf                            (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v4sf                            (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v8sf                            (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v16sf                           (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v32sf                           (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v64sf                           (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v128sf                          (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v256sf                          (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v512sf                          (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v1024sf                         (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v1df                            (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v2df                            (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v4df                            (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v8df                            (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v16df                           (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v32df                           (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v64df                           (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v128df                          (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v256df                          (rtx, rtx, rtx);
extern rtx        gen_fold_left_plus_v512df                          (rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_rvvm8hf                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_rvvm4hf                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_rvvm2hf                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_rvvm1hf                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_rvvmf2hf               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_rvvmf4hf               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_rvvm8sf                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_rvvm4sf                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_rvvm2sf                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_rvvm1sf                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_rvvmf2sf               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_rvvm8df                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_rvvm4df                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_rvvm2df                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_rvvm1df                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v1hf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v2hf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v4hf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v8hf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v16hf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v32hf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v64hf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v128hf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v256hf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v512hf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v1024hf                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v2048hf                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v1sf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v2sf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v4sf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v8sf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v16sf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v32sf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v64sf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v128sf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v256sf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v512sf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v1024sf                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v1df                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v2df                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v4df                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v8df                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v16df                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v32df                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v64df                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v128df                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v256df                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_fold_left_plus_v512df                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvmf64bi                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvmf32bi                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvmf16bi                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvmf8bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvmf4bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvmf2bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm1bi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plusrvvm8si_qoq                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plusurvvm8si_qoq               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plusrvvm4si_qoq                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plusurvvm4si_qoq               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plusrvvm2si_qoq                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plusurvvm2si_qoq               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plusrvvm1si_qoq                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plusurvvm1si_qoq               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plussurvvm8si_qoq              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plussurvvm4si_qoq              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plussurvvm2si_qoq              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plussurvvm1si_qoq              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plususrvvm8si_qoq              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plususrvvm4si_qoq              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plususrvvm2si_qoq              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plususrvvm1si_qoq              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plusrvvm8si_dod                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plusurvvm8si_dod               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plusrvvm4si_dod                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plusurvvm4si_dod               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plusrvvm2si_dod                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plusurvvm2si_dod               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plusrvvm1si_dod                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plusurvvm1si_dod               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plussurvvm8si_dod              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plussurvvm4si_dod              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plussurvvm2si_dod              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plussurvvm1si_dod              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plususrvvm8si_dod              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plususrvvm4si_dod              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plususrvvm2si_dod              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_matrix_mul_plususrvvm1si_dod              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sf_vfnrcliprvvm2qi_x_f_qf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sf_vfnrclipurvvm2qi_x_f_qf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sf_vfnrcliprvvm1qi_x_f_qf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sf_vfnrclipurvvm1qi_x_f_qf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sf_vfnrcliprvvmf2qi_x_f_qf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sf_vfnrclipurvvmf2qi_x_f_qf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sf_vfnrcliprvvmf4qi_x_f_qf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sf_vfnrclipurvvmf4qi_x_f_qf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sf_vfnrcliprvvmf8qi_x_f_qf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sf_vfnrclipurvvmf8qi_x_f_qf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_servvm8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_servvm4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_servvm2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_servvm1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_servvmf2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_servvmf4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_servvmf8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_servvm8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_servvm4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_servvm2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_servvm1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_servvmf2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_servvmf4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_servvm8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_servvm4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_servvm2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_servvm1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_servvmf2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_servvm8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_servvm4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_servvm2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_servvm1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev1qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev2qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev4qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev8qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev16qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev32qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev64qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev128qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev256qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev512qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev1024qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev2048qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev4096qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev1hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev2hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev4hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev8hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev16hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev32hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev64hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev128hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev256hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev512hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev1024hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev2048hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev1si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev2si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev4si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev8si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev16si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev32si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev64si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev128si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev256si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev512si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev1024si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev1di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev2di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev4di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev8di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev16di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev32di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev64di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev128di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev256di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_x_sev512di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_servvm8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_servvm4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_servvm2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_servvm1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_servvmf2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_servvmf4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_servvmf8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_servvm8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_servvm4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_servvm2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_servvm1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_servvmf2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_servvmf4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_servvm8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_servvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_servvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_servvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_servvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_servvm8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_servvm4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_servvm2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_servvm1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev16qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev32qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev64qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev128qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev256qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev512qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev1024qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev2048qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev4096qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev16hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev32hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev64hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev128hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev256hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev512hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev1024hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev2048hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev16si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev32si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev64si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev128si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev256si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev512si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev1024si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev16di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev32di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev64di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev128di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev256di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_x_sev512di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xrvvm8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xrvvm4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xrvvm2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xrvvm1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xrvvm8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xrvvm4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xrvvm2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xrvvm1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xrvvm8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xrvvm4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xrvvm2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xrvvm1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xrvvmf2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xrvvm8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xrvvm4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xrvvm2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xrvvm1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv1qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv2qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv4qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv8qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv16qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv32qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv64qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv128qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv256qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv512qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv1024qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv2048qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv4096qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv1hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv2hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv4hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv8hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv16hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv32hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv64hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv128hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv256hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv512hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv1024hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv2048hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv1si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv2si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv4si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv8si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv16si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv32si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv64si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv128si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv256si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv512si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv1024si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv1di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv2di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv4di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv8di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv16di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv32di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv64di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv128di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv256di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv512di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_servvm8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_servvm4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_servvm2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_servvm1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_servvmf2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_servvmf4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_servvmf8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_servvm8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_servvm4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_servvm2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_servvm1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_servvmf2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_servvmf4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_servvm8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_servvm4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_servvm2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_servvm1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_servvmf2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_servvm8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_servvm4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_servvm2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_servvm1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev1qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev2qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev4qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev8qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev16qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev32qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev64qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev128qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev256qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev512qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev1024qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev2048qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev4096qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev1hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev2hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev4hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev8hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev16hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev32hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev64hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev128hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev256hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev512hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev1024hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev2048hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev1si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev2si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev4si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev8si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev16si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev32si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev64si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev128si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev256si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev512si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev1024si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev1di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev2di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev4di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev8di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev16di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev32di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev64di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev128di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev256di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_i_sev512di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_servvm8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_servvm4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_servvm2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_servvm1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_servvmf2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_servvmf4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_servvmf8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_servvm8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_servvm4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_servvm2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_servvm1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_servvmf2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_servvmf4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_servvm8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_servvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_servvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_servvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_servvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_servvm8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_servvm4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_servvm2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_servvm1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev16qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev32qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev64qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev128qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev256qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev512qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev1024qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev2048qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev4096qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev16hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev32hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev64hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev128hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev256hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev512hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev1024hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev2048hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev16si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev32si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev64si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev128si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev256si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev512si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev1024si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev16di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev32di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev64di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev128di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev256di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_i_sev512di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_irvvm8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_irvvm4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_irvvm2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_irvvm1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_irvvmf2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_irvvmf4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_irvvmf8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_irvvm8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_irvvm4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_irvvm2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_irvvm1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_irvvmf2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_irvvmf4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_irvvm8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_irvvm4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_irvvm2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_irvvm1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_irvvmf2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_irvvm8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_irvvm4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_irvvm2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_irvvm1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv1qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv2qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv4qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv8qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv16qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv32qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv64qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv128qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv256qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv512qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv1024qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv2048qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv4096qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv1hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv2hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv4hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv8hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv16hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv32hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv64hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv128hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv256hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv512hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv1024hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv2048hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv1si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv2si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv4si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv8si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv16si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv32si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv64si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv128si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv256si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv512si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv1024si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv1di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv2di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv4di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv8di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv16di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv32di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv64di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv128di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv256di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv512di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_servvm8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_servvm4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_servvm2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_servvm1qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_servvmf2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_servvmf4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_servvmf8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_servvm8hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_servvm4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_servvm2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_servvm1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_servvmf2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_servvmf4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_servvm8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_servvm4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_servvm2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_servvm1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_servvmf2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_servvm8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_servvm4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_servvm2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_servvm1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev16qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev32qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev64qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev128qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev256qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev512qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev1024qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev2048qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev4096qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev16hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev32hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev64hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev128hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev256hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev512hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev1024hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev2048hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev16si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev32si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev64si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev128si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev256si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev512si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev1024si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev16di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev32di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev64di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev128di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev256di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vv_sev512di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_servvm8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_servvm4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_servvm2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_servvm1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_servvmf2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_servvmf4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_servvmf8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_servvm8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_servvm4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_servvm2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_servvm1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_servvmf2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_servvmf4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_servvm8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_servvm4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_servvm2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_servvm1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_servvmf2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_servvm8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_servvm4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_servvm2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_servvm1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev16qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev32qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev64qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev128qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev256qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev512qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev1024qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev2048qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev4096qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev16hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev32hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev64hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev128hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev256hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev512hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev1024hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev2048hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev16si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev32si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev64si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev128si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev256si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev512si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev1024si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev16di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev32di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev64di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev128di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev256di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vv_sev512di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvrvvm8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvrvvm4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvrvvm2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvrvvm1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvrvvmf2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvrvvmf4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvrvvmf8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvrvvm8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvrvvm4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvrvvm2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvrvvm1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvrvvmf2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvrvvmf4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvrvvm8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvrvvm4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvrvvm2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvrvvm1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvrvvmf2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvrvvm8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvrvvm4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvrvvm2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvrvvm1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv1qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv2qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv4qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv8qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv16qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv32qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv64qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv128qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv256qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv512qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv1024qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv2048qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv4096qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv1hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv2hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv4hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv8hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv16hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv32hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv64hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv128hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv256hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv512hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv1024hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv2048hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv1si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv2si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv4si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv8si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv16si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv32si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv64si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv128si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv256si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv512si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv1024si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv1di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv2di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv4di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv8di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv16di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv32di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv64di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv128di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv256di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv512di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_servvm8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_servvm4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_servvm2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_servvm1qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_servvmf2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_servvmf4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_servvmf8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_servvm8hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_servvm4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_servvm2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_servvm1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_servvmf2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_servvmf4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_servvm8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_servvm4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_servvm2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_servvm1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_servvmf2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_servvm8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_servvm4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_servvm2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_servvm1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev16qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev32qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev64qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev128qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev256qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev512qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev1024qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev2048qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev4096qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev16hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev32hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev64hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev128hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev256hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev512hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev1024hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev2048hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev16si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev32si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev64si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev128si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev256si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev512si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev1024si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev16di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev32di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev64di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev128di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev256di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xv_sev512di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_servvm8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_servvm4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_servvm2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_servvm1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_servvmf2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_servvmf4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_servvmf8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_servvm8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_servvm4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_servvm2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_servvm1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_servvmf2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_servvmf4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_servvm8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_servvm4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_servvm2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_servvm1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_servvmf2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_servvm8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_servvm4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_servvm2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_servvm1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev16qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev32qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev64qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev128qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev256qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev512qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev1024qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev2048qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev4096qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev16hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev32hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev64hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev128hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev256hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev512hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev1024hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev2048hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev16si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev32si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev64si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev128si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev256si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev512si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev1024si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev16di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev32di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev64di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev128di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev256di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xv_sev512di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvrvvm8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvrvvm4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvrvvm2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvrvvm1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvrvvmf2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvrvvmf4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvrvvmf8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvrvvm8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvrvvm4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvrvvm2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvrvvm1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvrvvmf2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvrvvmf4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvrvvm8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvrvvm4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvrvvm2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvrvvm1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvrvvmf2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvrvvm8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvrvvm4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvrvvm2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvrvvm1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv1qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv2qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv4qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv8qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv16qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv32qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv64qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv128qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv256qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv512qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv1024qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv2048qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv4096qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv1hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv2hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv4hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv8hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv16hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv32hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv64hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv128hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv256hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv512hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv1024hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv2048hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv1si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv2si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv4si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv8si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv16si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv32si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv64si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv128si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv256si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv512si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv1024si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv1di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv2di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv4di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv8di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv16di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv32di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv64di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv128di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv256di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv512di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_servvm8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_servvm4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_servvm2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_servvm1qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_servvmf2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_servvmf4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_servvmf8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_servvm8hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_servvm4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_servvm2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_servvm1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_servvmf2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_servvmf4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_servvm8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_servvm4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_servvm2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_servvm1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_servvmf2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_servvm8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_servvm4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_servvm2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_servvm1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev16qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev32qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev64qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev128qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev256qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev512qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev1024qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev2048qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev4096qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev16hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev32hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev64hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev128hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev256hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev512hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev1024hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev2048hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev16si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev32si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev64si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev128si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev256si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev512si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev1024si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev16di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev32di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev64di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev128di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev256di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_iv_sev512di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_servvm8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_servvm4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_servvm2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_servvm1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_servvmf2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_servvmf4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_servvmf8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_servvm8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_servvm4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_servvm2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_servvm1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_servvmf2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_servvmf4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_servvm8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_servvm4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_servvm2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_servvm1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_servvmf2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_servvm8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_servvm4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_servvm2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_servvm1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev16qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev32qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev64qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev128qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev256qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev512qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev1024qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev2048qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev4096qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev16hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev32hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev64hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev128hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev256hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev512hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev1024hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev2048hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev16si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev32si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev64si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev128si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev256si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev512si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev1024si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev16di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev32di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev64di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev128di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev256di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_iv_sev512di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivrvvm8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivrvvm4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivrvvm2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivrvvm1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivrvvmf2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivrvvmf4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivrvvmf8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivrvvm8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivrvvm4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivrvvm2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivrvvm1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivrvvmf2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivrvvmf4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivrvvm8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivrvvm4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivrvvm2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivrvvm1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivrvvmf2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivrvvm8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivrvvm4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivrvvm2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivrvvm1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv1qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv2qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv4qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv8qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv16qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv32qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv64qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv128qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv256qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv512qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv1024qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv2048qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv4096qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv1hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv2hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv4hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv8hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv16hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv32hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv64hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv128hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv256hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv512hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv1024hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv2048hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv1si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv2si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv4si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv8si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv16si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv32si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv64si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv128si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv256si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv512si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv1024si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv1di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv2di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv4di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv8di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv16di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv32di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv64di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv128di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv256di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv512di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fv_servvm8hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fv_servvm4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fv_servvm2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fv_servvm1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fv_servvmf2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fv_servvmf4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fv_servvm8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fv_servvm4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fv_servvm2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fv_servvm1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fv_servvmf2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fv_servvm8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fv_servvm4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fv_servvm2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fv_servvm1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fv_servvm8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fv_servvm4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fv_servvm2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fv_servvm1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fv_servvmf2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fv_servvmf4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fv_servvm8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fv_servvm4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fv_servvm2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fv_servvm1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fv_servvmf2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fv_servvm8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fv_servvm4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fv_servvm2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fv_servvm1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvrvvm8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvrvvm4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvrvvm2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvrvvm1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvrvvmf2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvrvvmf4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvrvvm8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvrvvm4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvrvvm2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvrvvm1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvrvvmf2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvrvvm8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvrvvm4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvrvvm2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvrvvm1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_servvm8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_servvm4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_servvm2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_servvm1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_servvmf2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_servvmf4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_servvmf8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_servvm8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_servvm4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_servvm2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_servvm1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_servvmf2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_servvmf4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_servvm8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_servvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_servvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_servvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_servvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_servvm8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_servvm4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_servvm2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_servvm1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev16qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev32qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev64qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev128qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev256qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev512qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev1024qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev2048qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev4096qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev16hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev32hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev64hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev128hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev256hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev512hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev1024hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev2048hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev16si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev32si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev64si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev128si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev256si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev512si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev1024si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev16di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev32di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev64di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev128di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev256di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvv_sev512di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_servvm8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_servvm4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_servvm2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_servvm1qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_servvmf2qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_servvmf4qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_servvmf8qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_servvm8hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_servvm4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_servvm2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_servvm1hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_servvmf2hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_servvmf4hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_servvm8si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_servvm4si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_servvm2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_servvm1si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_servvmf2si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_servvm8di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_servvm4di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_servvm2di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_servvm1di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev1qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev16qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev32qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev64qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev128qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev256qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev512qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev1024qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev2048qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev4096qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev8hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev16hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev32hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev64hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev128hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev256hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev512hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev1024hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev2048hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev16si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev32si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev64si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev128si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev256si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev512si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev1024si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev16di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev32di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev64di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev128di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev256di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvv_sev512di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvrvvm8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvrvvm4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvrvvm2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvrvvm1qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvrvvmf2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvrvvmf4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvrvvmf8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvrvvm8hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvrvvm4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvrvvm2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvrvvm1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvrvvmf2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvrvvmf4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvrvvm8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvrvvm4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvrvvm2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvrvvm1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvrvvmf2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvrvvm8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvrvvm4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvrvvm2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvrvvm1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv16qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv32qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv64qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv128qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv256qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv512qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv1024qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv2048qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv4096qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv16hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv32hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv64hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv128hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv256hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv512hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv1024hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv2048hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv16si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv32si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv64si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv128si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv256si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv512si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv1024si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv16di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv32di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv64di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv128di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv256di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvvv512di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_servvm8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_servvm4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_servvm2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_servvm1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_servvmf2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_servvmf4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_servvmf8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_servvm8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_servvm4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_servvm2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_servvm1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_servvmf2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_servvmf4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_servvm8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_servvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_servvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_servvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_servvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_servvm8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_servvm4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_servvm2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_servvm1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev16qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev32qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev64qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev128qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev256qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev512qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev1024qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev2048qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev4096qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev16hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev32hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev64hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev128hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev256hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev512hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev1024hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev2048hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev16si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev32si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev64si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev128si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev256si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev512si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev1024si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev16di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev32di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev64di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev128di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev256di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvv_sev512di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_servvm8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_servvm4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_servvm2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_servvm1qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_servvmf2qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_servvmf4qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_servvmf8qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_servvm8hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_servvm4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_servvm2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_servvm1hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_servvmf2hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_servvmf4hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_servvm8si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_servvm4si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_servvm2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_servvm1si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_servvmf2si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_servvm8di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_servvm4di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_servvm2di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_servvm1di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev1qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev16qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev32qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev64qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev128qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev256qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev512qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev1024qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev2048qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev4096qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev8hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev16hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev32hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev64hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev128hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev256hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev512hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev1024hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev2048hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev16si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev32si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev64si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev128si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev256si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev512si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev1024si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev16di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev32di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev64di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev128di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev256di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvv_sev512di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvrvvm8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvrvvm4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvrvvm2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvrvvm1qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvrvvmf2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvrvvmf4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvrvvmf8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvrvvm8hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvrvvm4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvrvvm2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvrvvm1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvrvvmf2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvrvvmf4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvrvvm8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvrvvm4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvrvvm2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvrvvm1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvrvvmf2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvrvvm8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvrvvm4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvrvvm2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvrvvm1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv16qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv32qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv64qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv128qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv256qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv512qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv1024qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv2048qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv4096qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv16hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv32hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv64hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv128hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv256hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv512hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv1024hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv2048hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv16si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv32si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv64si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv128si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv256si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv512si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv1024si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv16di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv32di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv64di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv128di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv256di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvvv512di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_servvm8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_servvm4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_servvm2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_servvm1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_servvmf2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_servvmf4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_servvmf8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_servvm8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_servvm4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_servvm2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_servvm1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_servvmf2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_servvmf4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_servvm8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_servvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_servvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_servvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_servvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_servvm8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_servvm4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_servvm2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_servvm1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev16qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev32qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev64qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev128qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev256qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev512qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev1024qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev2048qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev4096qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev16hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev32hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev64hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev128hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev256hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev512hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev1024hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev2048hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev16si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev32si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev64si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev128si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev256si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev512si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev1024si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev16di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev32di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev64di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev128di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev256di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivv_sev512di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_servvm8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_servvm4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_servvm2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_servvm1qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_servvmf2qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_servvmf4qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_servvmf8qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_servvm8hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_servvm4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_servvm2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_servvm1hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_servvmf2hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_servvmf4hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_servvm8si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_servvm4si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_servvm2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_servvm1si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_servvmf2si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_servvm8di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_servvm4di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_servvm2di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_servvm1di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev1qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev16qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev32qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev64qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev128qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev256qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev512qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev1024qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev2048qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev4096qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev8hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev16hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev32hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev64hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev128hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev256hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev512hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev1024hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev2048hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev16si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev32si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev64si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev128si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev256si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev512si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev1024si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev16di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev32di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev64di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev128di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev256di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivv_sev512di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvrvvm8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvrvvm4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvrvvm2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvrvvm1qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvrvvmf2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvrvvmf4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvrvvmf8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvrvvm8hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvrvvm4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvrvvm2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvrvvm1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvrvvmf2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvrvvmf4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvrvvm8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvrvvm4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvrvvm2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvrvvm1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvrvvmf2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvrvvm8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvrvvm4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvrvvm2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvrvvm1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv16qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv32qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv64qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv128qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv256qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv512qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv1024qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv2048qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv4096qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv16hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv32hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv64hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv128hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv256hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv512hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv1024hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv2048hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv16si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv32si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv64si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv128si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv256si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv512si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv1024si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv16di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv32di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv64di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv128di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv256di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivvv512di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fvv_servvm8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fvv_servvm4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fvv_servvm2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fvv_servvm1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fvv_servvmf2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fvv_servvmf4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fvv_servvm8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fvv_servvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fvv_servvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fvv_servvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fvv_servvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fvv_servvm8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fvv_servvm4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fvv_servvm2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fvv_servvm1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvv_servvm8hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvv_servvm4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvv_servvm2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvv_servvm1hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvv_servvmf2hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvv_servvmf4hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvv_servvm8si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvv_servvm4si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvv_servvm2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvv_servvm1si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvv_servvmf2si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvv_servvm8di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvv_servvm4di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvv_servvm2di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvv_servvm1di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvvrvvm8hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvvrvvm4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvvrvvm2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvvrvvm1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvvrvvmf2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvvrvvmf4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvvrvvm8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvvrvvm4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvvrvvm2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvvrvvm1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvvrvvmf2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvvrvvm8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvvrvvm4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvvrvvm2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvvrvvm1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvw_servvm4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvw_servvm2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvw_servvm1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvw_servvmf2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvw_servvmf4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvw_servvmf8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvw_servvm4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvw_servvm2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvw_servvm1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvw_servvmf2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvw_servvmf4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvw_servvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvw_servvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvw_servvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_vvw_servvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvw_servvm4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvw_servvm2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvw_servvm1qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvw_servvmf2qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvw_servvmf4qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvw_servvmf8qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvw_servvm4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvw_servvm2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvw_servvm1hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvw_servvmf2hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvw_servvmf4hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvw_servvm4si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvw_servvm2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvw_servvm1si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvw_servvmf2si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvwrvvm4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvwrvvm2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvwrvvm1qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvwrvvmf2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvwrvvmf4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvwrvvmf8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvwrvvm4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvwrvvm2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvwrvvm1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvwrvvmf2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvwrvvmf4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvwrvvm4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvwrvvm2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvwrvvm1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_vvwrvvmf2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvw_servvm4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvw_servvm2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvw_servvm1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvw_servvmf2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvw_servvmf4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvw_servvmf8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvw_servvm4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvw_servvm2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvw_servvm1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvw_servvmf2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvw_servvmf4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvw_servvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvw_servvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvw_servvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_xvw_servvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvw_servvm4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvw_servvm2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvw_servvm1qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvw_servvmf2qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvw_servvmf4qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvw_servvmf8qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvw_servvm4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvw_servvm2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvw_servvm1hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvw_servvmf2hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvw_servvmf4hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvw_servvm4si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvw_servvm2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvw_servvm1si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvw_servvmf2si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvwrvvm4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvwrvvm2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvwrvvm1qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvwrvvmf2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvwrvvmf4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvwrvvmf8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvwrvvm4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvwrvvm2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvwrvvm1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvwrvvmf2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvwrvvmf4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvwrvvm4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvwrvvm2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvwrvvm1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_xvwrvvmf2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivw_servvm4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivw_servvm2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivw_servvm1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivw_servvmf2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivw_servvmf4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivw_servvmf8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivw_servvm4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivw_servvm2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivw_servvm1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivw_servvmf2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivw_servvmf4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivw_servvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivw_servvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivw_servvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_ivw_servvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivw_servvm4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivw_servvm2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivw_servvm1qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivw_servvmf2qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivw_servvmf4qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivw_servvmf8qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivw_servvm4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivw_servvm2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivw_servvm1hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivw_servvmf2hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivw_servvmf4hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivw_servvm4si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivw_servvm2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivw_servvm1si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivw_servvmf2si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivwrvvm4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivwrvvm2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivwrvvm1qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivwrvvmf2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivwrvvmf4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivwrvvmf8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivwrvvm4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivwrvvm2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivwrvvm1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivwrvvmf2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivwrvvmf4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivwrvvm4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivwrvvm2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivwrvvm1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_ivwrvvmf2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fvw_servvm4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fvw_servvm2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fvw_servvm1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fvw_servvmf2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fvw_servvmf4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fvw_servvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fvw_servvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fvw_servvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_fvw_servvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvw_servvm4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvw_servvm2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvw_servvm1hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvw_servvmf2hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvw_servvmf4hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvw_servvm4si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvw_servvm2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvw_servvm1si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvw_servvmf2si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvwrvvm4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvwrvvm2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvwrvvm1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvwrvvmf2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvwrvvmf4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvwrvvm4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvwrvvm2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvwrvvm1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_sf_vc_v_fvwrvvmf2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vfncvt_bf16rvvm8sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vfncvt_bf16rvvm4sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vfncvt_bf16rvvm2sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vfncvt_bf16rvvm1sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vfncvt_bf16rvvmf2sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vfwcvt_bf16rvvm8sf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vfwcvt_bf16rvvm4sf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vfwcvt_bf16rvvm2sf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vfwcvt_bf16rvvm1sf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vfwcvt_bf16rvvmf2sf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_intload_movsrvvm8qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_intload_movurvvm8qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_intload_movsrvvm4qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_intload_movurvvm4qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_intload_movsrvvm2qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_intload_movurvvm2qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_intload_movsrvvm1qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_intload_movurvvm1qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_intload_movsrvvmf2qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_intload_movurvvmf2qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_intload_movsrvvmf4qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_intload_movurvvmf4qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_intload_movsrvvmf8qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_intload_movurvvmf8qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vfpmadtrvvm8hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vfpmadbrvvm8hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vfpmadtrvvm4hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vfpmadbrvvm4hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vfpmadtrvvm2hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vfpmadbrvvm2hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vfpmadtrvvm1hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vfpmadbrvvm1hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vfpmadtrvvmf2hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vfpmadbrvvmf2hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vfpmadtrvvmf4hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vfpmadbrvvmf4hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsrvvm8si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4doturvvm8si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsrvvm4si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4doturvvm4si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsrvvm2si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4doturvvm2si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsrvvm1si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4doturvvm1si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsrvvmf2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4doturvvmf2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsrvvm8di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4doturvvm8di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsrvvm4di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4doturvvm4di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsrvvm2di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4doturvvm2di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsrvvm1di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4doturvvm1di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsv1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotuv1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsv2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotuv2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsv4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotuv4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsv8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotuv8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsv16si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotuv16si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsv32si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotuv32si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsv64si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotuv64si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsv128si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotuv128si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsv256si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotuv256si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsv512si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotuv512si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsv1024si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotuv1024si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsv1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotuv1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsv2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotuv2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsv4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotuv4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsv8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotuv8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsv16di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotuv16di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsv32di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotuv32di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsv64di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotuv64di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsv128di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotuv128di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsv256di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotuv256di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsv512di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotuv512di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsurvvm8si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsurvvm4si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsurvvm2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsurvvm1si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsurvvmf2si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsurvvm8di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsurvvm4di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsurvvm2di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsurvvm1di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsuv1si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsuv2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsuv4si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsuv8si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsuv16si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsuv32si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsuv64si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsuv128si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsuv256si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsuv512si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsuv1024si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsuv1di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsuv2di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsuv4di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsuv8di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsuv16di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsuv32di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsuv64di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsuv128di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsuv256di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_nds_vd4dotsuv512di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvmf2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvmf4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvmf8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvmf2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvmf4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvmf2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv1qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv2qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv4qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv8qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv16qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv32qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv64qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv128qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv256qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv512qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv1024qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv2048qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv4096qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv1hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv2hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv4hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv8hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv16hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv32hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv64hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv128hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv256hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv512hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv1024hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv2048hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv1si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv2si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv4si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv8si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv16si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv32si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv64si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv128si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv256si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv512si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv1024si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv1di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv2di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv4di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv8di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv16di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv32di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv64di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv128di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv256di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv512di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm1qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvmf2qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvmf4qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvmf8qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm8hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm1hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvmf2hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvmf4hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm8si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm4si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm1si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvmf2si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv1qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv2qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv4qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv8qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv16qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv32qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv64qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv128qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv256qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv512qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv1024qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv2048qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv4096qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv1hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv2hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv4hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv8hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv16hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv32hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv64hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv128hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv256hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv512hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv1024hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv2048hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv1si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv2si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv4si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv8si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv16si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv32si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv64si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv128si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv256si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv512si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv1024si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvmf2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvmf2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvmf4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvmf4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvmf8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvmf8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvmf2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvmf2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvmf4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvmf4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvmf2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvmf2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv1qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv1qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv2qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv2qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv4qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv4qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv8qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv8qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv16qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv16qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv32qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv32qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv64qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv64qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv128qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv128qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv256qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv256qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv512qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv512qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv1024qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv1024qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv2048qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv2048qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv4096qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv4096qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv1hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv1hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv2hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv2hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv4hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv4hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv8hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv8hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv16hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv16hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv32hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv32hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv64hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv64hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv128hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv128hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv256hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv256hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv512hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv512hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv1024hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv1024hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv2048hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv2048hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv1si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv1si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv2si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv2si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv4si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv4si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv8si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv8si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv16si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv16si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv32si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv32si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv64si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv64si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv128si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv128si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv256si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv256si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv512si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv512si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv1024si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv1024si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv1di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv1di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv2di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv2di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv4di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv4di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv8di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv8di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv16di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv16di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv32di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv32di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv64di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv64di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv128di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv128di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv256di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv256di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv512di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv512di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm1qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm1qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm8hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm8hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm1hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm1hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm8si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm8si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm4si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm4si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm1si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm1si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm8di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm8di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm4di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm4di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm2di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm2di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvm1di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvm1di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvmf2qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvmf2qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvmf4qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvmf4qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvmf8qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvmf8qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvmf2hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvmf2hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvmf4hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvmf4hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlrvvmf2si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrrvvmf2si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv1qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv1qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv2qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv2qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv4qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv4qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv8qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv8qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv16qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv16qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv32qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv32qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv64qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv64qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv128qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv128qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv256qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv256qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv512qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv512qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv1024qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv1024qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv2048qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv2048qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv4096qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv4096qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv1hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv1hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv2hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv2hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv4hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv4hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv8hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv8hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv16hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv16hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv32hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv32hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv64hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv64hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv128hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv128hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv256hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv256hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv512hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv512hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv1024hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv1024hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv2048hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv2048hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv1si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv1si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv2si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv2si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv4si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv4si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv8si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv8si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv16si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv16si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv32si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv32si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv64si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv64si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv128si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv128si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv256si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv256si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv512si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv512si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv1024si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv1024si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv1di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv1di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv2di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv2di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv4di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv4di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv8di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv8di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv16di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv16di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv32di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv32di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv64di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv64di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv128di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv128di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv256di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv256di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotlv512di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrotrv512di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvm8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvm4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvm2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvm1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvmf2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvmf4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvm8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvm4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvm2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvm1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvmf2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvm8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvm4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvm2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvm1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv1hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv2hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv4hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv8hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv16hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv32hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv64hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv128hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv256hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv512hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv1024hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv2048hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv1si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv2si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv4si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv8si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv16si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv32si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv64si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv128si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv256si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv512si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv1024si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv1di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv2di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv4di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv8di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv16di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv32di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv64di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv128di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv256di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv512di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvm8hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvm4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvm2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvm1hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvmf2hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvmf4hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvm8si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvm4si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvm2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvm1si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvmf2si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvm8di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvm4di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvm2di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllrvvm1di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv1hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv2hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv4hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv8hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv16hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv32hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv64hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv128hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv256hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv512hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv1024hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv2048hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv1si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv2si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv4si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv8si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv16si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv32si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv64si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv128si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv256si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv512si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv1024si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv1di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv2di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv4di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv8di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv16di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv32di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv64di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv128di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv256di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vwsllv512di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevrvvm8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8rvvm8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8rvvm8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevrvvm4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8rvvm4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8rvvm4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevrvvm2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8rvvm2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8rvvm2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevrvvm1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8rvvm1qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8rvvm1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevrvvm8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8rvvm8hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8rvvm8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevrvvm4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8rvvm4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8rvvm4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevrvvm2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8rvvm2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8rvvm2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevrvvm1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8rvvm1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8rvvm1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevrvvm8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8rvvm8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8rvvm8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevrvvm4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8rvvm4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8rvvm4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevrvvm2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8rvvm2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8rvvm2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevrvvm1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8rvvm1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8rvvm1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevrvvm8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8rvvm8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8rvvm8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevrvvm4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8rvvm4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8rvvm4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevrvvm2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8rvvm2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8rvvm2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevrvvm1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8rvvm1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8rvvm1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevrvvmf2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8rvvmf2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8rvvmf2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevrvvmf4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8rvvmf4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8rvvmf4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevrvvmf8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8rvvmf8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8rvvmf8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevrvvmf2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8rvvmf2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8rvvmf2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevrvvmf4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8rvvmf4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8rvvmf4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevrvvmf2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8rvvmf2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8rvvmf2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv1qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v1qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv2qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v2qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv4qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v4qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv8qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v8qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv16qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v16qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v16qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv32qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v32qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v32qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv64qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v64qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v64qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv128qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v128qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v128qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv256qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v256qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v256qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv512qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v512qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v512qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv1024qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v1024qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v1024qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv2048qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v2048qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v2048qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv4096qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v4096qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v4096qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv1hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v1hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv2hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v2hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv4hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v4hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv8hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v8hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv16hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v16hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v16hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv32hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v32hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v32hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv64hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v64hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v64hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv128hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v128hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v128hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv256hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v256hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v256hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv512hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v512hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v512hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv1024hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v1024hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v1024hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv2048hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v2048hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v2048hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv1si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v1si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv2si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v2si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv4si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v4si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv8si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v8si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv16si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v16si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v16si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv32si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v32si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v32si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv64si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v64si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v64si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv128si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v128si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v128si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv256si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v256si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v256si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv512si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v512si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v512si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv1024si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v1024si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v1024si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv1di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v1di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv2di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v2di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv4di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v4di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv8di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v8di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv16di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v16di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v16di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv32di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v32di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v32di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv64di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v64di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v64di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv128di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v128di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v128di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv256di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v256di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v256di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrevv512di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vbrev8v512di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vrev8v512di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzrvvm8qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzrvvm8qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountrvvm8qi                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzrvvm4qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzrvvm4qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountrvvm4qi                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzrvvm2qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzrvvm2qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountrvvm2qi                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzrvvm1qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzrvvm1qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountrvvm1qi                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzrvvm8hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzrvvm8hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountrvvm8hi                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzrvvm4hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzrvvm4hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountrvvm4hi                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzrvvm2hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzrvvm2hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountrvvm2hi                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzrvvm1hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzrvvm1hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountrvvm1hi                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzrvvm8si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzrvvm8si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountrvvm8si                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzrvvm4si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzrvvm4si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountrvvm4si                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzrvvm2si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzrvvm2si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountrvvm2si                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzrvvm1si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzrvvm1si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountrvvm1si                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzrvvm8di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzrvvm8di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountrvvm8di                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzrvvm4di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzrvvm4di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountrvvm4di                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzrvvm2di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzrvvm2di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountrvvm2di                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzrvvm1di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzrvvm1di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountrvvm1di                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountrvvmf2qi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountrvvmf4qi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountrvvmf8qi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountrvvmf2hi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountrvvmf4hi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzrvvmf2si                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzrvvmf2si                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountrvvmf2si                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv1qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv1qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv1qi                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv2qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv2qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv2qi                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv4qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv4qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv4qi                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv8qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv8qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv8qi                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv16qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv16qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv16qi                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv32qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv32qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv32qi                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv64qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv64qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv64qi                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv128qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv128qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv128qi                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv256qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv256qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv256qi                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv512qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv512qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv512qi                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv1024qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv1024qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv1024qi                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv2048qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv2048qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv2048qi                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv4096qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv4096qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv4096qi                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv1hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv1hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv1hi                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv2hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv2hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv2hi                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv4hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv4hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv4hi                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv8hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv8hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv8hi                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv16hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv16hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv16hi                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv32hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv32hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv32hi                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv64hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv64hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv64hi                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv128hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv128hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv128hi                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv256hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv256hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv256hi                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv512hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv512hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv512hi                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv1024hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv1024hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv1024hi                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv2048hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv2048hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv2048hi                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv1si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv1si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv1si                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv2si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv2si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv2si                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv4si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv4si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv4si                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv8si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv8si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv8si                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv16si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv16si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv16si                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv32si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv32si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv32si                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv64si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv64si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv64si                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv128si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv128si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv128si                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv256si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv256si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv256si                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv512si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv512si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv512si                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv1024si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv1024si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv1024si                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv1di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv1di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv1di                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv2di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv2di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv2di                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv4di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv4di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv4di                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv8di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv8di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv8di                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv16di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv16di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv16di                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv32di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv32di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv32di                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv64di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv64di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv64di                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv128di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv128di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv128di                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv256di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv256di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv256di                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclzv512di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vctzv512di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vpopcountv512di                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulrvvm8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhrvvm8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulrvvm4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhrvvm4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulrvvm2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhrvvm2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulrvvm1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhrvvm1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulv1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhv1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulv2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhv2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulv4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhv4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulv8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhv8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulv16di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhv16di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulv32di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhv32di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulv64di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhv64di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulv128di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhv128di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulv256di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhv256di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulv512di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhv512di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshrvvm8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msrvvm8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chrvvm8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clrvvm8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshrvvm4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msrvvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chrvvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clrvvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshrvvm2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msrvvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chrvvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clrvvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshrvvm1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msrvvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chrvvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clrvvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshrvvmf2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msrvvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chrvvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clrvvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshrvvm8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msrvvm8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chrvvm8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clrvvm8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshrvvm4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msrvvm4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chrvvm4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clrvvm4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshrvvm2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msrvvm2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chrvvm2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clrvvm2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshrvvm1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msrvvm1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chrvvm1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clrvvm1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshv1si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msv1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chv1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clv1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshv2si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msv2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chv2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clv2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshv4si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msv4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chv4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clv4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshv8si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msv8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chv8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clv8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshv16si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msv16si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chv16si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clv16si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshv32si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msv32si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chv32si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clv32si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshv64si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msv64si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chv64si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clv64si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshv128si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msv128si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chv128si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clv128si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshv256si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msv256si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chv256si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clv256si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshv512si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msv512si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chv512si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clv512si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshv1024si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msv1024si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chv1024si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clv1024si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshv1di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msv1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chv1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clv1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshv2di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msv2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chv2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clv2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshv4di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msv4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chv4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clv4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshv8di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msv8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chv8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clv8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshv16di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msv16di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chv16di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clv16di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshv32di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msv32di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chv32di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clv32di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshv64di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msv64di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chv64di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clv64di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshv128di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msv128di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chv128di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clv128di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshv256di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msv256di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chv256di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clv256di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vghshv512di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2msv512di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2chv512di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsha2clv512di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvrvvm8si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvrvvm8si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvrvvm8si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvrvvm8si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvrvvm8si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsrvvm8si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsrvvm8si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsrvvm8si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsrvvm8si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsrvvm8si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvrvvm8si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsrvvm8si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvrvvm4si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvrvvm4si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvrvvm4si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvrvvm4si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvrvvm4si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsrvvm4si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsrvvm4si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsrvvm4si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsrvvm4si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsrvvm4si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvrvvm4si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsrvvm4si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvrvvm2si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvrvvm2si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvrvvm2si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvrvvm2si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvrvvm2si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsrvvm2si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsrvvm2si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsrvvm2si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsrvvm2si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsrvvm2si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvrvvm2si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsrvvm2si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvrvvm1si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvrvvm1si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvrvvm1si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvrvvm1si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvrvvm1si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsrvvm1si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsrvvm1si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsrvvm1si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsrvvm1si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsrvvm1si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvrvvm1si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsrvvm1si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvrvvmf2si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvrvvmf2si                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvrvvmf2si                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvrvvmf2si                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvrvvmf2si                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsrvvmf2si                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsrvvmf2si                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsrvvmf2si                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsrvvmf2si                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsrvvmf2si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvrvvmf2si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsrvvmf2si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvv1si                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvv1si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvv1si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvv1si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvv1si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsv1si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsv1si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsv1si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsv1si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsv1si                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvv1si                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsv1si                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvv2si                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvv2si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvv2si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvv2si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvv2si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsv2si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsv2si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsv2si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsv2si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsv2si                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvv2si                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsv2si                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvv4si                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvv4si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvv4si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvv4si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvv4si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsv4si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsv4si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsv4si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsv4si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsv4si                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvv4si                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsv4si                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvv8si                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvv8si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvv8si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvv8si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvv8si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsv8si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsv8si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsv8si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsv8si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsv8si                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvv8si                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsv8si                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvv16si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvv16si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvv16si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvv16si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvv16si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsv16si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsv16si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsv16si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsv16si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsv16si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvv16si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsv16si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvv32si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvv32si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvv32si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvv32si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvv32si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsv32si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsv32si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsv32si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsv32si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsv32si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvv32si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsv32si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvv64si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvv64si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvv64si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvv64si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvv64si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsv64si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsv64si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsv64si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsv64si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsv64si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvv64si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsv64si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvv128si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvv128si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvv128si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvv128si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvv128si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsv128si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsv128si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsv128si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsv128si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsv128si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvv128si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsv128si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvv256si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvv256si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvv256si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvv256si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvv256si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsv256si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsv256si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsv256si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsv256si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsv256si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvv256si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsv256si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvv512si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvv512si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvv512si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvv512si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvv512si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsv512si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsv512si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsv512si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsv512si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsv512si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvv512si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsv512si                     (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvv1024si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvv1024si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvv1024si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvv1024si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvv1024si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsv1024si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsv1024si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsv1024si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsv1024si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsv1024si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvv1024si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsv1024si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx1rvvm8si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx1rvvm8si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx1rvvm8si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx1rvvm8si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx1rvvm8si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx1rvvm8si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx1rvvm8si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx1rvvm8si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx1rvvm8si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx1rvvm8si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx1rvvm8si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx1rvvm8si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx1rvvm4si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx1rvvm4si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx1rvvm4si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx1rvvm4si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx1rvvm4si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx1rvvm4si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx1rvvm4si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx1rvvm4si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx1rvvm4si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx1rvvm4si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx1rvvm4si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx1rvvm4si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx1rvvm2si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx1rvvm2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx1rvvm2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx1rvvm2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx1rvvm2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx1rvvm2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx1rvvm2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx1rvvm2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx1rvvm2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx1rvvm2si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx1rvvm2si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx1rvvm2si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx1rvvm1si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx1rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx1rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx1rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx1rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx1rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx1rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx1rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx1rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx1rvvm1si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx1rvvm1si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx1rvvm1si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx1rvvmf2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx1rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx1rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx1rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx1rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx1rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx1rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx1rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx1rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx1rvvmf2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx1rvvmf2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx1rvvmf2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx1v1si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx1v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx1v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx1v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx1v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx1v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx1v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx1v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx1v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx1v1si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx1v1si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx1v1si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx1v2si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx1v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx1v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx1v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx1v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx1v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx1v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx1v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx1v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx1v2si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx1v2si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx1v2si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx1v4si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx1v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx1v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx1v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx1v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx1v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx1v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx1v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx1v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx1v4si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx1v4si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx1v4si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx1v8si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx1v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx1v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx1v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx1v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx1v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx1v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx1v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx1v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx1v8si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx1v8si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx1v8si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx1v16si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx1v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx1v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx1v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx1v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx1v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx1v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx1v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx1v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx1v16si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx1v16si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx1v16si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx1v32si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx1v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx1v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx1v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx1v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx1v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx1v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx1v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx1v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx1v32si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx1v32si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx1v32si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx1v64si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx1v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx1v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx1v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx1v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx1v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx1v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx1v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx1v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx1v64si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx1v64si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx1v64si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx1v128si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx1v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx1v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx1v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx1v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx1v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx1v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx1v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx1v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx1v128si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx1v128si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx1v128si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx1v256si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx1v256si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx1v256si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx1v256si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx1v256si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx1v256si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx1v256si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx1v256si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx1v256si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx1v256si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx1v256si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx1v256si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx1v512si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx1v512si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx1v512si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx1v512si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx1v512si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx1v512si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx1v512si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx1v512si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx1v512si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx1v512si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx1v512si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx1v512si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx1v1024si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx1v1024si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx1v1024si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx1v1024si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx1v1024si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx1v1024si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx1v1024si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx1v1024si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx1v1024si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx1v1024si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx1v1024si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx1v1024si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx2rvvm4si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx2rvvm4si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx2rvvm4si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx2rvvm4si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx2rvvm4si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx2rvvm4si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx2rvvm4si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx2rvvm4si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx2rvvm4si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx2rvvm4si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx2rvvm4si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx2rvvm4si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx2rvvm2si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx2rvvm2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx2rvvm2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx2rvvm2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx2rvvm2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx2rvvm2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx2rvvm2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx2rvvm2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx2rvvm2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx2rvvm2si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx2rvvm2si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx2rvvm2si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx2rvvm1si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx2rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx2rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx2rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx2rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx2rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx2rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx2rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx2rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx2rvvm1si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx2rvvm1si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx2rvvm1si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx2rvvmf2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx2rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx2rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx2rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx2rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx2rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx2rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx2rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx2rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx2rvvmf2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx2rvvmf2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx2rvvmf2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx2v1si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx2v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx2v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx2v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx2v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx2v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx2v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx2v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx2v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx2v1si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx2v1si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx2v1si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx2v2si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx2v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx2v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx2v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx2v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx2v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx2v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx2v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx2v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx2v2si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx2v2si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx2v2si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx2v4si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx2v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx2v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx2v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx2v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx2v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx2v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx2v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx2v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx2v4si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx2v4si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx2v4si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx2v8si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx2v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx2v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx2v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx2v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx2v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx2v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx2v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx2v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx2v8si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx2v8si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx2v8si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx2v16si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx2v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx2v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx2v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx2v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx2v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx2v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx2v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx2v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx2v16si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx2v16si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx2v16si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx2v32si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx2v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx2v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx2v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx2v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx2v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx2v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx2v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx2v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx2v32si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx2v32si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx2v32si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx2v64si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx2v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx2v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx2v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx2v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx2v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx2v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx2v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx2v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx2v64si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx2v64si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx2v64si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx2v128si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx2v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx2v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx2v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx2v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx2v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx2v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx2v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx2v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx2v128si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx2v128si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx2v128si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx2v256si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx2v256si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx2v256si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx2v256si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx2v256si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx2v256si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx2v256si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx2v256si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx2v256si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx2v256si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx2v256si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx2v256si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx2v512si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx2v512si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx2v512si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx2v512si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx2v512si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx2v512si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx2v512si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx2v512si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx2v512si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx2v512si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx2v512si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx2v512si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx4rvvm2si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx4rvvm2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx4rvvm2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx4rvvm2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx4rvvm2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx4rvvm2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx4rvvm2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx4rvvm2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx4rvvm2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx4rvvm2si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx4rvvm2si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx4rvvm2si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx4rvvm1si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx4rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx4rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx4rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx4rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx4rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx4rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx4rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx4rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx4rvvm1si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx4rvvm1si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx4rvvm1si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx4rvvmf2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx4rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx4rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx4rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx4rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx4rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx4rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx4rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx4rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx4rvvmf2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx4rvvmf2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx4rvvmf2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx4v1si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx4v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx4v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx4v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx4v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx4v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx4v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx4v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx4v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx4v1si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx4v1si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx4v1si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx4v2si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx4v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx4v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx4v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx4v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx4v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx4v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx4v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx4v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx4v2si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx4v2si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx4v2si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx4v4si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx4v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx4v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx4v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx4v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx4v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx4v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx4v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx4v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx4v4si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx4v4si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx4v4si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx4v8si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx4v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx4v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx4v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx4v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx4v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx4v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx4v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx4v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx4v8si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx4v8si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx4v8si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx4v16si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx4v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx4v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx4v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx4v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx4v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx4v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx4v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx4v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx4v16si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx4v16si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx4v16si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx4v32si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx4v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx4v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx4v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx4v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx4v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx4v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx4v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx4v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx4v32si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx4v32si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx4v32si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx4v64si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx4v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx4v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx4v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx4v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx4v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx4v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx4v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx4v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx4v64si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx4v64si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx4v64si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx4v128si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx4v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx4v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx4v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx4v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx4v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx4v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx4v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx4v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx4v128si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx4v128si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx4v128si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx4v256si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx4v256si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx4v256si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx4v256si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx4v256si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx4v256si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx4v256si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx4v256si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx4v256si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx4v256si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx4v256si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx4v256si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx8rvvm1si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx8rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx8rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx8rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx8rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx8rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx8rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx8rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx8rvvm1si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx8rvvm1si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx8rvvm1si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx8rvvm1si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx8rvvmf2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx8rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx8rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx8rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx8rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx8rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx8rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx8rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx8rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx8rvvmf2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx8rvvmf2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx8rvvmf2si_scalar          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx8v1si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx8v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx8v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx8v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx8v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx8v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx8v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx8v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx8v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx8v1si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx8v1si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx8v1si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx8v2si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx8v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx8v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx8v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx8v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx8v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx8v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx8v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx8v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx8v2si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx8v2si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx8v2si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx8v4si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx8v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx8v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx8v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx8v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx8v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx8v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx8v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx8v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx8v4si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx8v4si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx8v4si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx8v8si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx8v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx8v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx8v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx8v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx8v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx8v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx8v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx8v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx8v8si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx8v8si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx8v8si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx8v16si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx8v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx8v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx8v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx8v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx8v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx8v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx8v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx8v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx8v16si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx8v16si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx8v16si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx8v32si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx8v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx8v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx8v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx8v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx8v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx8v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx8v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx8v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx8v32si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx8v32si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx8v32si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx8v64si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx8v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx8v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx8v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx8v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx8v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx8v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx8v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx8v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx8v64si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx8v64si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx8v64si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx8v128si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx8v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx8v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx8v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx8v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx8v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx8v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx8v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx8v128si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx8v128si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx8v128si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx8v128si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx16rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx16rvvmf2si_scalar        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx16rvvmf2si_scalar        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx16rvvmf2si_scalar        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx16rvvmf2si_scalar        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx16rvvmf2si_scalar        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx16rvvmf2si_scalar        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx16rvvmf2si_scalar        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx16rvvmf2si_scalar        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx16rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx16rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx16rvvmf2si_scalar         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx16v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx16v1si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx16v1si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx16v1si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx16v1si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx16v1si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx16v1si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx16v1si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx16v1si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx16v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx16v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx16v1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx16v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx16v2si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx16v2si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx16v2si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx16v2si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx16v2si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx16v2si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx16v2si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx16v2si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx16v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx16v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx16v2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx16v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx16v4si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx16v4si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx16v4si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx16v4si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx16v4si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx16v4si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx16v4si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx16v4si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx16v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx16v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx16v4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx16v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx16v8si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx16v8si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx16v8si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx16v8si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx16v8si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx16v8si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx16v8si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx16v8si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx16v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx16v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx16v8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx16v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx16v16si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx16v16si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx16v16si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx16v16si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx16v16si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx16v16si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx16v16si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx16v16si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx16v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx16v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx16v16si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx16v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx16v32si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx16v32si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx16v32si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx16v32si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx16v32si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx16v32si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx16v32si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx16v32si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx16v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx16v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx16v32si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvgmulvvx16v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvvx16v64si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvvx16v64si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvvx16v64si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvvx16v64si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesefvsx16v64si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesemvsx16v64si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdfvsx16v64si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaesdmvsx16v64si_scalar           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvaeszvsx16v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvvx16v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vvsm4rvsx16v64si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_viaeskf1rvvm8si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vism4krvvm8si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_viaeskf1rvvm4si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vism4krvvm4si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_viaeskf1rvvm2si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vism4krvvm2si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_viaeskf1rvvm1si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vism4krvvm1si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_viaeskf1rvvmf2si_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vism4krvvmf2si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_viaeskf1v1si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vism4kv1si_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_viaeskf1v2si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vism4kv2si_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_viaeskf1v4si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vism4kv4si_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_viaeskf1v8si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vism4kv8si_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_viaeskf1v16si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vism4kv16si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_viaeskf1v32si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vism4kv32si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_viaeskf1v64si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vism4kv64si_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_viaeskf1v128si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vism4kv128si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_viaeskf1v256si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vism4kv256si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_viaeskf1v512si_scalar              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vism4kv512si_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_viaeskf1v1024si_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_crypto_vism4kv1024si_scalar               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_viaeskf2rvvm8si_nomaskedoff_scalar        (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vism3crvvm8si_nomaskedoff_scalar          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_viaeskf2rvvm4si_nomaskedoff_scalar        (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vism3crvvm4si_nomaskedoff_scalar          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_viaeskf2rvvm2si_nomaskedoff_scalar        (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vism3crvvm2si_nomaskedoff_scalar          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_viaeskf2rvvm1si_nomaskedoff_scalar        (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vism3crvvm1si_nomaskedoff_scalar          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_viaeskf2rvvmf2si_nomaskedoff_scalar       (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vism3crvvmf2si_nomaskedoff_scalar         (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_viaeskf2v1si_nomaskedoff_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vism3cv1si_nomaskedoff_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_viaeskf2v2si_nomaskedoff_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vism3cv2si_nomaskedoff_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_viaeskf2v4si_nomaskedoff_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vism3cv4si_nomaskedoff_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_viaeskf2v8si_nomaskedoff_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vism3cv8si_nomaskedoff_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_viaeskf2v16si_nomaskedoff_scalar          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vism3cv16si_nomaskedoff_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_viaeskf2v32si_nomaskedoff_scalar          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vism3cv32si_nomaskedoff_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_viaeskf2v64si_nomaskedoff_scalar          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vism3cv64si_nomaskedoff_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_viaeskf2v128si_nomaskedoff_scalar         (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vism3cv128si_nomaskedoff_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_viaeskf2v256si_nomaskedoff_scalar         (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vism3cv256si_nomaskedoff_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_viaeskf2v512si_nomaskedoff_scalar         (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vism3cv512si_nomaskedoff_scalar           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_viaeskf2v1024si_nomaskedoff_scalar        (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vism3cv1024si_nomaskedoff_scalar          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsm3mervvm8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsm3mervvm4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsm3mervvm2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsm3mervvm1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsm3mervvmf2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsm3mev1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsm3mev2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsm3mev4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsm3mev8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsm3mev16si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsm3mev32si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsm3mev64si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsm3mev128si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsm3mev256si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsm3mev512si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vsm3mev1024si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvm8sf_to_bf16                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvm4sf_to_bf16                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvm2sf_to_bf16                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvm1sf_to_bf16                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_truncrvvmf2sf_to_bf16                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extend_bf16_to_rvvm8sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extend_bf16_to_rvvm4sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extend_bf16_to_rvvm2sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extend_bf16_to_rvvm1sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extend_bf16_to_rvvmf2sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_bf16_mul_rvvm8sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_bf16_mul_rvvm4sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_bf16_mul_rvvm2sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_bf16_mul_rvvm1sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_bf16_mul_rvvmf2sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_bf16_mul_rvvm8sf_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_bf16_mul_rvvm4sf_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_bf16_mul_rvvm2sf_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_bf16_mul_rvvm1sf_scalar             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_bf16_mul_rvvmf2sf_scalar            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_conditional_andsi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_conditional_anddi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_conditional_randsi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_conditional_randdi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_gpr_multi_pop_up_to_ra_si                      (rtx);
extern rtx        gen_gpr_multi_pop_up_to_ra_di                      (rtx);
extern rtx        gen_gpr_multi_pop_up_to_s0_si                      (rtx);
extern rtx        gen_gpr_multi_pop_up_to_s0_di                      (rtx);
extern rtx        gen_gpr_multi_pop_up_to_s1_si                      (rtx);
extern rtx        gen_gpr_multi_pop_up_to_s1_di                      (rtx);
extern rtx        gen_gpr_multi_pop_up_to_s2_si                      (rtx);
extern rtx        gen_gpr_multi_pop_up_to_s2_di                      (rtx);
extern rtx        gen_gpr_multi_pop_up_to_s3_si                      (rtx);
extern rtx        gen_gpr_multi_pop_up_to_s3_di                      (rtx);
extern rtx        gen_gpr_multi_pop_up_to_s4_si                      (rtx);
extern rtx        gen_gpr_multi_pop_up_to_s4_di                      (rtx);
extern rtx        gen_gpr_multi_pop_up_to_s5_si                      (rtx);
extern rtx        gen_gpr_multi_pop_up_to_s5_di                      (rtx);
extern rtx        gen_gpr_multi_pop_up_to_s6_si                      (rtx);
extern rtx        gen_gpr_multi_pop_up_to_s6_di                      (rtx);
extern rtx        gen_gpr_multi_pop_up_to_s7_si                      (rtx);
extern rtx        gen_gpr_multi_pop_up_to_s7_di                      (rtx);
extern rtx        gen_gpr_multi_pop_up_to_s8_si                      (rtx);
extern rtx        gen_gpr_multi_pop_up_to_s8_di                      (rtx);
extern rtx        gen_gpr_multi_pop_up_to_s9_si                      (rtx);
extern rtx        gen_gpr_multi_pop_up_to_s9_di                      (rtx);
extern rtx        gen_gpr_multi_pop_up_to_s11_si                     (rtx);
extern rtx        gen_gpr_multi_pop_up_to_s11_di                     (rtx);
extern rtx        gen_gpr_multi_popret_up_to_ra_si                   (rtx);
extern rtx        gen_gpr_multi_popret_up_to_ra_di                   (rtx);
extern rtx        gen_gpr_multi_popret_up_to_s0_si                   (rtx);
extern rtx        gen_gpr_multi_popret_up_to_s0_di                   (rtx);
extern rtx        gen_gpr_multi_popret_up_to_s1_si                   (rtx);
extern rtx        gen_gpr_multi_popret_up_to_s1_di                   (rtx);
extern rtx        gen_gpr_multi_popret_up_to_s2_si                   (rtx);
extern rtx        gen_gpr_multi_popret_up_to_s2_di                   (rtx);
extern rtx        gen_gpr_multi_popret_up_to_s3_si                   (rtx);
extern rtx        gen_gpr_multi_popret_up_to_s3_di                   (rtx);
extern rtx        gen_gpr_multi_popret_up_to_s4_si                   (rtx);
extern rtx        gen_gpr_multi_popret_up_to_s4_di                   (rtx);
extern rtx        gen_gpr_multi_popret_up_to_s5_si                   (rtx);
extern rtx        gen_gpr_multi_popret_up_to_s5_di                   (rtx);
extern rtx        gen_gpr_multi_popret_up_to_s6_si                   (rtx);
extern rtx        gen_gpr_multi_popret_up_to_s6_di                   (rtx);
extern rtx        gen_gpr_multi_popret_up_to_s7_si                   (rtx);
extern rtx        gen_gpr_multi_popret_up_to_s7_di                   (rtx);
extern rtx        gen_gpr_multi_popret_up_to_s8_si                   (rtx);
extern rtx        gen_gpr_multi_popret_up_to_s8_di                   (rtx);
extern rtx        gen_gpr_multi_popret_up_to_s9_si                   (rtx);
extern rtx        gen_gpr_multi_popret_up_to_s9_di                   (rtx);
extern rtx        gen_gpr_multi_popret_up_to_s11_si                  (rtx);
extern rtx        gen_gpr_multi_popret_up_to_s11_di                  (rtx);
extern rtx        gen_gpr_multi_popretz_up_to_ra_si                  (rtx);
extern rtx        gen_gpr_multi_popretz_up_to_ra_di                  (rtx);
extern rtx        gen_gpr_multi_popretz_up_to_s0_si                  (rtx);
extern rtx        gen_gpr_multi_popretz_up_to_s0_di                  (rtx);
extern rtx        gen_gpr_multi_popretz_up_to_s1_si                  (rtx);
extern rtx        gen_gpr_multi_popretz_up_to_s1_di                  (rtx);
extern rtx        gen_gpr_multi_popretz_up_to_s2_si                  (rtx);
extern rtx        gen_gpr_multi_popretz_up_to_s2_di                  (rtx);
extern rtx        gen_gpr_multi_popretz_up_to_s3_si                  (rtx);
extern rtx        gen_gpr_multi_popretz_up_to_s3_di                  (rtx);
extern rtx        gen_gpr_multi_popretz_up_to_s4_si                  (rtx);
extern rtx        gen_gpr_multi_popretz_up_to_s4_di                  (rtx);
extern rtx        gen_gpr_multi_popretz_up_to_s5_si                  (rtx);
extern rtx        gen_gpr_multi_popretz_up_to_s5_di                  (rtx);
extern rtx        gen_gpr_multi_popretz_up_to_s6_si                  (rtx);
extern rtx        gen_gpr_multi_popretz_up_to_s6_di                  (rtx);
extern rtx        gen_gpr_multi_popretz_up_to_s7_si                  (rtx);
extern rtx        gen_gpr_multi_popretz_up_to_s7_di                  (rtx);
extern rtx        gen_gpr_multi_popretz_up_to_s8_si                  (rtx);
extern rtx        gen_gpr_multi_popretz_up_to_s8_di                  (rtx);
extern rtx        gen_gpr_multi_popretz_up_to_s9_si                  (rtx);
extern rtx        gen_gpr_multi_popretz_up_to_s9_di                  (rtx);
extern rtx        gen_gpr_multi_popretz_up_to_s11_si                 (rtx);
extern rtx        gen_gpr_multi_popretz_up_to_s11_di                 (rtx);
extern rtx        gen_gpr_multi_push_up_to_ra_si                     (rtx);
extern rtx        gen_gpr_multi_push_up_to_ra_di                     (rtx);
extern rtx        gen_gpr_multi_push_up_to_s0_si                     (rtx);
extern rtx        gen_gpr_multi_push_up_to_s0_di                     (rtx);
extern rtx        gen_gpr_multi_push_up_to_s1_si                     (rtx);
extern rtx        gen_gpr_multi_push_up_to_s1_di                     (rtx);
extern rtx        gen_gpr_multi_push_up_to_s2_si                     (rtx);
extern rtx        gen_gpr_multi_push_up_to_s2_di                     (rtx);
extern rtx        gen_gpr_multi_push_up_to_s3_si                     (rtx);
extern rtx        gen_gpr_multi_push_up_to_s3_di                     (rtx);
extern rtx        gen_gpr_multi_push_up_to_s4_si                     (rtx);
extern rtx        gen_gpr_multi_push_up_to_s4_di                     (rtx);
extern rtx        gen_gpr_multi_push_up_to_s5_si                     (rtx);
extern rtx        gen_gpr_multi_push_up_to_s5_di                     (rtx);
extern rtx        gen_gpr_multi_push_up_to_s6_si                     (rtx);
extern rtx        gen_gpr_multi_push_up_to_s6_di                     (rtx);
extern rtx        gen_gpr_multi_push_up_to_s7_si                     (rtx);
extern rtx        gen_gpr_multi_push_up_to_s7_di                     (rtx);
extern rtx        gen_gpr_multi_push_up_to_s8_si                     (rtx);
extern rtx        gen_gpr_multi_push_up_to_s8_di                     (rtx);
extern rtx        gen_gpr_multi_push_up_to_s9_si                     (rtx);
extern rtx        gen_gpr_multi_push_up_to_s9_di                     (rtx);
extern rtx        gen_gpr_multi_push_up_to_s11_si                    (rtx);
extern rtx        gen_gpr_multi_push_up_to_s11_di                    (rtx);
extern rtx        gen_th_revsi2                                      (rtx, rtx);
extern rtx        gen_th_revdi2                                      (rtx, rtx);
extern rtx        gen_th_tstnbzsi2                                   (rtx, rtx);
extern rtx        gen_th_tstnbzdi2                                   (rtx, rtx);
extern rtx        gen_th_fmv_hw_w_x                                  (rtx, rtx, rtx);
extern rtx        gen_th_fmv_x_w                                     (rtx, rtx);
extern rtx        gen_th_fmv_x_hw                                    (rtx, rtx);
extern rtx        gen_th_int_push                                    (void);
extern rtx        gen_th_int_pop                                     (void);
extern rtx        gen_riscv_cv_mac_mac                               (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_mac_msu                               (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_mac_muluN                             (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_mac_mulhhuN                           (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_mac_mulsN                             (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_mac_mulhhsN                           (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_mac_muluRN                            (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_mac_mulhhuRN                          (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_mac_mulsRN                            (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_mac_mulhhsRN                          (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_mac_macuN                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_mac_machhuN                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_mac_macsN                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_mac_machhsN                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_mac_macuRN                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_mac_machhuRN                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_mac_macsRN                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_mac_machhsRN                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_alu_slet                              (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_alu_sletu                             (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_alu_min                               (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_alu_minu                              (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_alu_max                               (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_alu_maxu                              (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_alu_exths                             (rtx, rtx);
extern rtx        gen_riscv_cv_alu_exthz                             (rtx, rtx);
extern rtx        gen_riscv_cv_alu_extbs                             (rtx, rtx);
extern rtx        gen_riscv_cv_alu_extbz                             (rtx, rtx);
extern rtx        gen_riscv_cv_alu_clip                              (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_alu_clipu                             (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_alu_addN                              (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_alu_adduN                             (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_alu_addRN                             (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_alu_adduRN                            (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_alu_subN                              (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_alu_subuN                             (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_alu_subRN                             (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_alu_subuRN                            (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_elw_elw_si                            (rtx, rtx);
extern rtx        gen_riscv_cv_simd_add_h_si                         (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_add_b_si                         (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_add_sc_h_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_add_sc_b_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_sub_h_si                         (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_sub_b_si                         (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_sub_sc_h_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_sub_sc_b_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_avg_h_si                         (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_avg_b_si                         (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_avg_sc_h_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_avg_sc_b_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_avgu_h_si                        (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_avgu_b_si                        (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_avgu_sc_h_si                     (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_avgu_sc_b_si                     (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_min_h_si                         (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_min_b_si                         (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_min_sc_h_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_min_sc_b_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_minu_h_si                        (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_minu_b_si                        (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_minu_sc_h_si                     (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_minu_sc_b_si                     (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_max_h_si                         (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_max_b_si                         (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_max_sc_h_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_max_sc_b_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_maxu_h_si                        (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_maxu_b_si                        (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_maxu_sc_h_si                     (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_maxu_sc_b_si                     (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_srl_h_si                         (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_srl_b_si                         (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_srl_sc_h_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_srl_sc_b_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_sra_h_si                         (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_sra_b_si                         (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_sra_sc_h_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_sra_sc_b_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_sll_h_si                         (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_sll_b_si                         (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_sll_sc_h_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_sll_sc_b_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_or_h_si                          (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_or_b_si                          (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_or_sc_h_si                       (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_or_sc_b_si                       (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_xor_h_si                         (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_xor_b_si                         (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_xor_sc_h_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_xor_sc_b_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_and_h_si                         (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_and_b_si                         (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_and_sc_h_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_and_sc_b_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_abs_h_si                         (rtx, rtx);
extern rtx        gen_riscv_cv_simd_abs_b_si                         (rtx, rtx);
extern rtx        gen_riscv_cv_simd_neg_h_si                         (rtx, rtx);
extern rtx        gen_riscv_cv_simd_neg_b_si                         (rtx, rtx);
extern rtx        gen_riscv_cv_simd_extract_h_si                     (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_extract_b_si                     (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_extractu_h_si                    (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_extractu_b_si                    (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_insert_h_si                      (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_insert_b_si                      (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_dotup_h_si                       (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_dotup_b_si                       (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_dotup_sc_h_si                    (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_dotup_sc_b_si                    (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_dotusp_h_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_dotusp_b_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_dotusp_sc_h_si                   (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_dotusp_sc_b_si                   (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_dotsp_h_si                       (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_dotsp_b_si                       (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_dotsp_sc_h_si                    (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_dotsp_sc_b_si                    (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_sdotup_h_si                      (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_sdotup_b_si                      (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_sdotup_sc_h_si                   (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_sdotup_sc_b_si                   (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_sdotusp_h_si                     (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_sdotusp_b_si                     (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_sdotusp_sc_h_si                  (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_sdotusp_sc_b_si                  (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_sdotsp_h_si                      (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_sdotsp_b_si                      (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_sdotsp_sc_h_si                   (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_sdotsp_sc_b_si                   (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_shuffle_h_si                     (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_shuffle_sci_h_si                 (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_shuffle_b_si                     (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_shuffle_sci_b_si                 (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_shuffle2_h_si                    (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_shuffle2_b_si                    (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_packhi_h_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_packlo_h_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_packhi_b_si                      (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_packlo_b_si                      (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpeq_h_si                       (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpeq_b_si                       (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpeq_sc_h_si                    (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpeq_sc_b_si                    (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpne_h_si                       (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpne_b_si                       (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpne_sc_h_si                    (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpne_sc_b_si                    (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpgt_h_si                       (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpgt_b_si                       (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpgt_sc_h_si                    (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpgt_sc_b_si                    (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpge_h_si                       (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpge_b_si                       (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpge_sc_h_si                    (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpge_sc_b_si                    (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmplt_h_si                       (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmplt_b_si                       (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmplt_sc_h_si                    (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmplt_sc_b_si                    (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmple_h_si                       (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmple_b_si                       (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmple_sc_h_si                    (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmple_sc_b_si                    (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpgtu_h_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpgtu_b_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpgtu_sc_h_si                   (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpgtu_sc_b_si                   (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpgeu_h_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpgeu_b_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpgeu_sc_h_si                   (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpgeu_sc_b_si                   (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpltu_h_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpltu_b_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpltu_sc_h_si                   (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpltu_sc_b_si                   (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpleu_h_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpleu_b_si                      (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpleu_sc_h_si                   (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cmpleu_sc_b_si                   (rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cplxmul_r_si                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cplxmul_i_si                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_cv_simd_cplxconj_si                      (rtx, rtx);
extern rtx        gen_riscv_cv_simd_subrotmj_si                      (rtx, rtx, rtx, rtx);
extern rtx        gen_lea_hsi                                        (rtx, rtx, rtx);
extern rtx        gen_lea_hdi                                        (rtx, rtx, rtx);
extern rtx        gen_lea_wsi                                        (rtx, rtx, rtx);
extern rtx        gen_lea_wdi                                        (rtx, rtx, rtx);
extern rtx        gen_lea_dsi                                        (rtx, rtx, rtx);
extern rtx        gen_lea_ddi                                        (rtx, rtx, rtx);
extern rtx        gen_lea_b_ze                                       (rtx, rtx, rtx);
extern rtx        gen_lea_h_ze                                       (rtx, rtx, rtx);
extern rtx        gen_lea_w_ze                                       (rtx, rtx, rtx);
extern rtx        gen_lea_d_ze                                       (rtx, rtx, rtx);
extern rtx        gen_lea_andim_ashift                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_nds_ffbsi                                (rtx, rtx, rtx);
extern rtx        gen_riscv_nds_ffbdi                                (rtx, rtx, rtx);
extern rtx        gen_riscv_nds_ffzmismsi                            (rtx, rtx, rtx);
extern rtx        gen_riscv_nds_ffzmismdi                            (rtx, rtx, rtx);
extern rtx        gen_riscv_nds_ffmismsi                             (rtx, rtx, rtx);
extern rtx        gen_riscv_nds_ffmismdi                             (rtx, rtx, rtx);
extern rtx        gen_riscv_nds_flmismsi                             (rtx, rtx, rtx);
extern rtx        gen_riscv_nds_flmismdi                             (rtx, rtx, rtx);
extern rtx        gen_addptrsi3                                      (rtx, rtx, rtx);
extern rtx        gen_addptrdi3                                      (rtx, rtx, rtx);
extern rtx        gen_addsi3                                         (rtx, rtx, rtx);
extern rtx        gen_adddi3                                         (rtx, rtx, rtx);
extern rtx        gen_addvsi4                                        (rtx, rtx, rtx, rtx);
extern rtx        gen_addvdi4                                        (rtx, rtx, rtx, rtx);
extern rtx        gen_uaddvsi4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_uaddvdi4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_subsi3                                         (rtx, rtx, rtx);
extern rtx        gen_subvsi4                                        (rtx, rtx, rtx, rtx);
extern rtx        gen_subvdi4                                        (rtx, rtx, rtx, rtx);
extern rtx        gen_usubvsi4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_usubvdi4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_negsi2                                         (rtx, rtx);
extern rtx        gen_mulsi3                                         (rtx, rtx, rtx);
extern rtx        gen_mulvsi4                                        (rtx, rtx, rtx, rtx);
extern rtx        gen_mulvdi4                                        (rtx, rtx, rtx, rtx);
extern rtx        gen_umulvsi4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_umulvdi4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_mulditi3                                       (rtx, rtx, rtx);
extern rtx        gen_umulditi3                                      (rtx, rtx, rtx);
extern rtx        gen_usmulditi3                                     (rtx, rtx, rtx);
extern rtx        gen_mulsidi3                                       (rtx, rtx, rtx);
extern rtx        gen_umulsidi3                                      (rtx, rtx, rtx);
extern rtx        gen_usmulsidi3                                     (rtx, rtx, rtx);
extern rtx        gen_divsi3                                         (rtx, rtx, rtx);
extern rtx        gen_udivsi3                                        (rtx, rtx, rtx);
extern rtx        gen_modsi3                                         (rtx, rtx, rtx);
extern rtx        gen_umodsi3                                        (rtx, rtx, rtx);
extern rtx        gen_divmodsi4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_udivmodsi4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_divmoddi4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_udivmoddi4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_andsi3                                         (rtx, rtx, rtx);
extern rtx        gen_anddi3                                         (rtx, rtx, rtx);
extern rtx        gen_iorsi3                                         (rtx, rtx, rtx);
extern rtx        gen_xorsi3                                         (rtx, rtx, rtx);
extern rtx        gen_iordi3                                         (rtx, rtx, rtx);
extern rtx        gen_xordi3                                         (rtx, rtx, rtx);
extern rtx        gen_trunchfbf2                                     (rtx, rtx);
extern rtx        gen_truncdfbf2                                     (rtx, rtx);
extern rtx        gen_trunctfbf2                                     (rtx, rtx);
extern rtx        gen_zero_extendsidi2                               (rtx, rtx);
extern rtx        gen_zero_extendhisi2                               (rtx, rtx);
extern rtx        gen_zero_extendhidi2                               (rtx, rtx);
extern rtx        gen_zero_extendqihi2                               (rtx, rtx);
extern rtx        gen_zero_extendqisi2                               (rtx, rtx);
extern rtx        gen_zero_extendqidi2                               (rtx, rtx);
extern rtx        gen_extendsidi2                                    (rtx, rtx);
extern rtx        gen_extendqihi2                                    (rtx, rtx);
extern rtx        gen_extendqisi2                                    (rtx, rtx);
extern rtx        gen_extendqidi2                                    (rtx, rtx);
extern rtx        gen_extendhihi2                                    (rtx, rtx);
extern rtx        gen_extendhisi2                                    (rtx, rtx);
extern rtx        gen_extendhidi2                                    (rtx, rtx);
extern rtx        gen_movhf                                          (rtx, rtx);
extern rtx        gen_movbf                                          (rtx, rtx);
extern rtx        gen_fix_truncsfsi2                                 (rtx, rtx);
extern rtx        gen_fixuns_truncsfsi2                              (rtx, rtx);
extern rtx        gen_fix_truncdfsi2                                 (rtx, rtx);
extern rtx        gen_fixuns_truncdfsi2                              (rtx, rtx);
extern rtx        gen_fix_trunchfsi2                                 (rtx, rtx);
extern rtx        gen_fixuns_trunchfsi2                              (rtx, rtx);
extern rtx        gen_lrintsfsi2                                     (rtx, rtx);
extern rtx        gen_lrintdfsi2                                     (rtx, rtx);
extern rtx        gen_lrinthfsi2                                     (rtx, rtx);
extern rtx        gen_lroundsfsi2                                    (rtx, rtx);
extern rtx        gen_lfloorsfsi2                                    (rtx, rtx);
extern rtx        gen_lceilsfsi2                                     (rtx, rtx);
extern rtx        gen_lbtruncsfsi2                                   (rtx, rtx);
extern rtx        gen_lroundevensfsi2                                (rtx, rtx);
extern rtx        gen_lnearbyintsfsi2                                (rtx, rtx);
extern rtx        gen_lrounddfsi2                                    (rtx, rtx);
extern rtx        gen_lfloordfsi2                                    (rtx, rtx);
extern rtx        gen_lceildfsi2                                     (rtx, rtx);
extern rtx        gen_lbtruncdfsi2                                   (rtx, rtx);
extern rtx        gen_lroundevendfsi2                                (rtx, rtx);
extern rtx        gen_lnearbyintdfsi2                                (rtx, rtx);
extern rtx        gen_lroundhfsi2                                    (rtx, rtx);
extern rtx        gen_lfloorhfsi2                                    (rtx, rtx);
extern rtx        gen_lceilhfsi2                                     (rtx, rtx);
extern rtx        gen_lbtrunchfsi2                                   (rtx, rtx);
extern rtx        gen_lroundevenhfsi2                                (rtx, rtx);
extern rtx        gen_lnearbyinthfsi2                                (rtx, rtx);
extern rtx        gen_roundsf2                                       (rtx, rtx);
extern rtx        gen_floorsf2                                       (rtx, rtx);
extern rtx        gen_ceilsf2                                        (rtx, rtx);
extern rtx        gen_btruncsf2                                      (rtx, rtx);
extern rtx        gen_roundevensf2                                   (rtx, rtx);
extern rtx        gen_nearbyintsf2                                   (rtx, rtx);
extern rtx        gen_rounddf2                                       (rtx, rtx);
extern rtx        gen_floordf2                                       (rtx, rtx);
extern rtx        gen_ceildf2                                        (rtx, rtx);
extern rtx        gen_btruncdf2                                      (rtx, rtx);
extern rtx        gen_roundevendf2                                   (rtx, rtx);
extern rtx        gen_nearbyintdf2                                   (rtx, rtx);
extern rtx        gen_roundhf2                                       (rtx, rtx);
extern rtx        gen_floorhf2                                       (rtx, rtx);
extern rtx        gen_ceilhf2                                        (rtx, rtx);
extern rtx        gen_btrunchf2                                      (rtx, rtx);
extern rtx        gen_roundevenhf2                                   (rtx, rtx);
extern rtx        gen_nearbyinthf2                                   (rtx, rtx);
extern rtx        gen_movdi                                          (rtx, rtx);
extern rtx        gen_movsi                                          (rtx, rtx);
extern rtx        gen_movhi                                          (rtx, rtx);
extern rtx        gen_movqi                                          (rtx, rtx);
extern rtx        gen_movsf                                          (rtx, rtx);
extern rtx        gen_movdf                                          (rtx, rtx);
extern rtx        gen_cmpmemsi                                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cpymemsi                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_cpymemdi                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_setmemsi                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_setmemdi                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_movmemsi                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_movmemdi                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_clear_cache                                    (rtx, rtx);
extern rtx        gen_ashlsi3                                        (rtx, rtx, rtx);
extern rtx        gen_ashrsi3                                        (rtx, rtx, rtx);
extern rtx        gen_lshrsi3                                        (rtx, rtx, rtx);
extern rtx        gen_movsicc                                        (rtx, rtx, rtx, rtx);
extern rtx        gen_movdicc                                        (rtx, rtx, rtx, rtx);
extern rtx        gen_addsicc                                        (rtx, rtx, rtx, rtx);
extern rtx        gen_adddicc                                        (rtx, rtx, rtx, rtx);
extern rtx        gen_condjump                                       (rtx, rtx);
extern rtx        gen_cbranchqi4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_cbranchsi4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_cbranchdi4                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_cbranchsf4                                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cbranchdf4                                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cbranchhf4                                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cstoresi4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_cstoredi4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_cstoresf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_cstoredf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_cstorehf4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_flt_quietsfsi4                                 (rtx, rtx, rtx);
extern rtx        gen_fle_quietsfsi4                                 (rtx, rtx, rtx);
extern rtx        gen_flt_quietsfdi4                                 (rtx, rtx, rtx);
extern rtx        gen_fle_quietsfdi4                                 (rtx, rtx, rtx);
extern rtx        gen_flt_quietdfsi4                                 (rtx, rtx, rtx);
extern rtx        gen_fle_quietdfsi4                                 (rtx, rtx, rtx);
extern rtx        gen_flt_quietdfdi4                                 (rtx, rtx, rtx);
extern rtx        gen_fle_quietdfdi4                                 (rtx, rtx, rtx);
extern rtx        gen_flt_quiethfsi4                                 (rtx, rtx, rtx);
extern rtx        gen_fle_quiethfsi4                                 (rtx, rtx, rtx);
extern rtx        gen_flt_quiethfdi4                                 (rtx, rtx, rtx);
extern rtx        gen_fle_quiethfdi4                                 (rtx, rtx, rtx);
extern rtx        gen_isfinitesf2                                    (rtx, rtx);
extern rtx        gen_isnormalsf2                                    (rtx, rtx);
extern rtx        gen_isinfsf2                                       (rtx, rtx);
extern rtx        gen_isfinitedf2                                    (rtx, rtx);
extern rtx        gen_isnormaldf2                                    (rtx, rtx);
extern rtx        gen_isinfdf2                                       (rtx, rtx);
extern rtx        gen_isfinitehf2                                    (rtx, rtx);
extern rtx        gen_isnormalhf2                                    (rtx, rtx);
extern rtx        gen_isinfhf2                                       (rtx, rtx);
extern rtx        gen_indirect_jump                                  (rtx);
extern rtx        gen_tablejump                                      (rtx, rtx);
extern rtx        gen_prologue                                       (void);
extern rtx        gen_epilogue                                       (void);
extern rtx        gen_sibcall_epilogue                               (void);
extern rtx        gen_return                                         (void);
extern rtx        gen_eh_return                                      (rtx);
extern rtx        gen_sibcall                                        (rtx, rtx, rtx);
extern rtx        gen_sibcall_value                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_call                                           (rtx, rtx, rtx);
extern rtx        gen_call_value                                     (rtx, rtx, rtx, rtx);
extern rtx        gen_untyped_call                                   (rtx, rtx, rtx);
extern rtx        gen_save_stack_nonlocal                            (rtx, rtx);
extern rtx        gen_restore_stack_nonlocal                         (rtx, rtx);
extern rtx        gen_get_thread_pointersi                           (rtx);
extern rtx        gen_get_thread_pointerdi                           (rtx);
extern rtx        gen_stack_protect_set                              (rtx, rtx);
extern rtx        gen_stack_protect_test                             (rtx, rtx, rtx);
extern rtx        gen_extvsi                                         (rtx, rtx, rtx, rtx);
extern rtx        gen_extvdi                                         (rtx, rtx, rtx, rtx);
extern rtx        gen_extzvsi                                        (rtx, rtx, rtx, rtx);
extern rtx        gen_extzvdi                                        (rtx, rtx, rtx, rtx);
extern rtx        gen_maddhisi4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_msubhisi4                                      (rtx, rtx, rtx, rtx);
extern rtx        gen_cmpstrnsi                                      (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cmpstrsi                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_strlensi                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_strlendi                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_usaddqi3                                       (rtx, rtx, rtx);
extern rtx        gen_usaddhi3                                       (rtx, rtx, rtx);
extern rtx        gen_usaddsi3                                       (rtx, rtx, rtx);
extern rtx        gen_usadddi3                                       (rtx, rtx, rtx);
extern rtx        gen_ssaddqi3                                       (rtx, rtx, rtx);
extern rtx        gen_ssaddhi3                                       (rtx, rtx, rtx);
extern rtx        gen_ssaddsi3                                       (rtx, rtx, rtx);
extern rtx        gen_ssadddi3                                       (rtx, rtx, rtx);
extern rtx        gen_ussubqi3                                       (rtx, rtx, rtx);
extern rtx        gen_ussubhi3                                       (rtx, rtx, rtx);
extern rtx        gen_ussubsi3                                       (rtx, rtx, rtx);
extern rtx        gen_ussubdi3                                       (rtx, rtx, rtx);
extern rtx        gen_sssubqi3                                       (rtx, rtx, rtx);
extern rtx        gen_sssubhi3                                       (rtx, rtx, rtx);
extern rtx        gen_sssubsi3                                       (rtx, rtx, rtx);
extern rtx        gen_sssubdi3                                       (rtx, rtx, rtx);
extern rtx        gen_usmulqi3                                       (rtx, rtx, rtx);
extern rtx        gen_usmulhi3                                       (rtx, rtx, rtx);
extern rtx        gen_usmulsi3                                       (rtx, rtx, rtx);
extern rtx        gen_usmuldi3                                       (rtx, rtx, rtx);
extern rtx        gen_ustrunchiqi2                                   (rtx, rtx);
extern rtx        gen_ustruncsihi2                                   (rtx, rtx);
extern rtx        gen_ustruncdisi2                                   (rtx, rtx);
extern rtx        gen_sstrunchiqi2                                   (rtx, rtx);
extern rtx        gen_sstruncsihi2                                   (rtx, rtx);
extern rtx        gen_sstruncdisi2                                   (rtx, rtx);
extern rtx        gen_ustruncsiqi2                                   (rtx, rtx);
extern rtx        gen_ustruncdihi2                                   (rtx, rtx);
extern rtx        gen_sstruncsiqi2                                   (rtx, rtx);
extern rtx        gen_sstruncdihi2                                   (rtx, rtx);
extern rtx        gen_ustruncdiqi2                                   (rtx, rtx);
extern rtx        gen_sstruncdiqi2                                   (rtx, rtx);
extern rtx        gen_clzdi2                                         (rtx, rtx);
extern rtx        gen_clzsi2                                         (rtx, rtx);
extern rtx        gen_ctzsi2                                         (rtx, rtx);
extern rtx        gen_ctzdi2                                         (rtx, rtx);
extern rtx        gen_popcountsi2                                    (rtx, rtx);
extern rtx        gen_popcountdi2                                    (rtx, rtx);
extern rtx        gen_rotrdi3                                        (rtx, rtx, rtx);
extern rtx        gen_rotrsi3                                        (rtx, rtx, rtx);
extern rtx        gen_rotlsi3                                        (rtx, rtx, rtx);
extern rtx        gen_bswapdi2                                       (rtx, rtx);
extern rtx        gen_bswapsi2                                       (rtx, rtx);
extern rtx        gen_bswaphi2                                       (rtx, rtx);
extern rtx        gen_smindi3                                        (rtx, rtx, rtx);
extern rtx        gen_umindi3                                        (rtx, rtx, rtx);
extern rtx        gen_smaxdi3                                        (rtx, rtx, rtx);
extern rtx        gen_umaxdi3                                        (rtx, rtx, rtx);
extern rtx        gen_sminsi3                                        (rtx, rtx, rtx);
extern rtx        gen_uminsi3                                        (rtx, rtx, rtx);
extern rtx        gen_smaxsi3                                        (rtx, rtx, rtx);
extern rtx        gen_umaxsi3                                        (rtx, rtx, rtx);
extern rtx        gen_crc_revqiqi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_crc_revqihi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_crc_revqisi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_crc_revqidi4                                   (rtx, rtx, rtx, rtx);
static inline rtx gen_crc_revhiqi4                                   (rtx, rtx, rtx, rtx);
static inline rtx
gen_crc_revhiqi4(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d))
{
  return 0;
}
extern rtx        gen_crc_revhihi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_crc_revhisi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_crc_revhidi4                                   (rtx, rtx, rtx, rtx);
static inline rtx gen_crc_revsiqi4                                   (rtx, rtx, rtx, rtx);
static inline rtx
gen_crc_revsiqi4(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d))
{
  return 0;
}
static inline rtx gen_crc_revsihi4                                   (rtx, rtx, rtx, rtx);
static inline rtx
gen_crc_revsihi4(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d))
{
  return 0;
}
extern rtx        gen_crc_revsisi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_crc_revsidi4                                   (rtx, rtx, rtx, rtx);
static inline rtx gen_crc_revdiqi4                                   (rtx, rtx, rtx, rtx);
static inline rtx
gen_crc_revdiqi4(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d))
{
  return 0;
}
static inline rtx gen_crc_revdihi4                                   (rtx, rtx, rtx, rtx);
static inline rtx
gen_crc_revdihi4(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d))
{
  return 0;
}
static inline rtx gen_crc_revdisi4                                   (rtx, rtx, rtx, rtx);
static inline rtx
gen_crc_revdisi4(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d))
{
  return 0;
}
extern rtx        gen_crc_revdidi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_crcqiqi4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_crcqihi4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_crcqisi4                                       (rtx, rtx, rtx, rtx);
static inline rtx gen_crchiqi4                                       (rtx, rtx, rtx, rtx);
static inline rtx
gen_crchiqi4(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d))
{
  return 0;
}
extern rtx        gen_crchihi4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_crchisi4                                       (rtx, rtx, rtx, rtx);
static inline rtx gen_crcsiqi4                                       (rtx, rtx, rtx, rtx);
static inline rtx
gen_crcsiqi4(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d))
{
  return 0;
}
static inline rtx gen_crcsihi4                                       (rtx, rtx, rtx, rtx);
static inline rtx
gen_crcsihi4(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d))
{
  return 0;
}
extern rtx        gen_crcsisi4                                       (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_sha256sig0_si                            (rtx, rtx);
extern rtx        gen_riscv_sha256sig1_si                            (rtx, rtx);
extern rtx        gen_riscv_sha256sum0_si                            (rtx, rtx);
extern rtx        gen_riscv_sha256sum1_si                            (rtx, rtx);
extern rtx        gen_riscv_sm3p0_si                                 (rtx, rtx);
extern rtx        gen_riscv_sm3p1_si                                 (rtx, rtx);
extern rtx        gen_riscv_sm4ed_si                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_riscv_sm4ks_si                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_mem_thread_fence                               (rtx);
extern rtx        gen_atomic_loadqi                                  (rtx, rtx, rtx);
extern rtx        gen_atomic_loadhi                                  (rtx, rtx, rtx);
extern rtx        gen_atomic_loadsi                                  (rtx, rtx, rtx);
extern rtx        gen_atomic_loaddi                                  (rtx, rtx, rtx);
extern rtx        gen_atomic_storeqi                                 (rtx, rtx, rtx);
extern rtx        gen_atomic_storehi                                 (rtx, rtx, rtx);
extern rtx        gen_atomic_storesi                                 (rtx, rtx, rtx);
extern rtx        gen_atomic_storedi                                 (rtx, rtx, rtx);
extern rtx        gen_atomic_addsi                                   (rtx, rtx, rtx);
extern rtx        gen_atomic_orsi                                    (rtx, rtx, rtx);
extern rtx        gen_atomic_xorsi                                   (rtx, rtx, rtx);
extern rtx        gen_atomic_andsi                                   (rtx, rtx, rtx);
extern rtx        gen_atomic_adddi                                   (rtx, rtx, rtx);
extern rtx        gen_atomic_ordi                                    (rtx, rtx, rtx);
extern rtx        gen_atomic_xordi                                   (rtx, rtx, rtx);
extern rtx        gen_atomic_anddi                                   (rtx, rtx, rtx);
extern rtx        gen_atomic_fetch_addsi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_fetch_orsi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_fetch_xorsi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_fetch_andsi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_fetch_adddi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_fetch_ordi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_fetch_xordi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_fetch_anddi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_fetch_nandqi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_fetch_nandhi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_fetch_addqi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_fetch_orqi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_fetch_xorqi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_fetch_andqi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_fetch_addhi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_fetch_orhi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_fetch_xorhi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_fetch_andhi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_fetch_addqi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_fetch_orqi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_fetch_xorqi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_fetch_andqi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_fetch_addhi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_fetch_orhi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_fetch_xorhi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_fetch_andhi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_exchangesi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_exchangedi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_exchangeqi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_exchangehi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_exchangeqi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_lrsc_atomic_exchangehi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_compare_and_swapsi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_compare_and_swapdi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_compare_and_swapqi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_compare_and_swaphi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_zalrsc_atomic_cas_value_strongqi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_zalrsc_atomic_cas_value_stronghi               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_atomic_test_and_set                            (rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm8qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm8qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm8qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm8qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm8qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm8qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm4qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm4qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm4qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm4qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm4qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm4qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm2qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm2qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm2qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm2qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm2qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm2qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm1qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm1qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm1qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm1qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm1qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm1qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm8hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm8hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm8hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm8hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm8hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm8hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm4hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm4hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm4hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm4hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm4hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm4hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm2hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm2hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm2hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm2hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm2hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm2hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm1hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm1hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm1hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm1hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm1hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm1hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm8si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm8si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm8si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm8si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm8si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm8si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm4si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm4si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm4si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm4si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm4si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm4si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm2si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm2si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm2si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm2si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm2si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm2si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm1si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm1si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm1si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm1si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm1si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm1si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm8di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm8di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm8di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm8di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm8di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm8di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm4di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm4di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm4di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm4di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm4di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm4di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm2di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm2di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm2di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm2di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm2di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm2di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm1di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm1di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm1di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm1di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm1di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm1di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx gen_pred_mov_widthbrvvmf2qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_mov_widthbrvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h))
{
  return 0;
}
static inline rtx gen_pred_mov_widthburvvmf2qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_mov_widthburvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h))
{
  return 0;
}
static inline rtx gen_pred_mov_widthhrvvmf2qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_mov_widthhrvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h))
{
  return 0;
}
static inline rtx gen_pred_mov_widthhurvvmf2qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_mov_widthhurvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h))
{
  return 0;
}
static inline rtx gen_pred_mov_widthwrvvmf2qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_mov_widthwrvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h))
{
  return 0;
}
static inline rtx gen_pred_mov_widthwurvvmf2qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_mov_widthwurvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h))
{
  return 0;
}
static inline rtx gen_pred_mov_widthbrvvmf4qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_mov_widthbrvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h))
{
  return 0;
}
static inline rtx gen_pred_mov_widthburvvmf4qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_mov_widthburvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h))
{
  return 0;
}
static inline rtx gen_pred_mov_widthhrvvmf4qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_mov_widthhrvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h))
{
  return 0;
}
static inline rtx gen_pred_mov_widthhurvvmf4qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_mov_widthhurvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h))
{
  return 0;
}
static inline rtx gen_pred_mov_widthwrvvmf4qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_mov_widthwrvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h))
{
  return 0;
}
static inline rtx gen_pred_mov_widthwurvvmf4qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_mov_widthwurvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h))
{
  return 0;
}
extern rtx        gen_pred_mov_widthbrvvmf8qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvmf8qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvmf8qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvmf8qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvmf8qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvmf8qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx gen_pred_mov_widthbrvvmf2hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_mov_widthbrvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h))
{
  return 0;
}
static inline rtx gen_pred_mov_widthburvvmf2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_mov_widthburvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h))
{
  return 0;
}
static inline rtx gen_pred_mov_widthhrvvmf2hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_mov_widthhrvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h))
{
  return 0;
}
static inline rtx gen_pred_mov_widthhurvvmf2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_mov_widthhurvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h))
{
  return 0;
}
static inline rtx gen_pred_mov_widthwrvvmf2hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_mov_widthwrvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h))
{
  return 0;
}
static inline rtx gen_pred_mov_widthwurvvmf2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx
gen_pred_mov_widthwurvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c), rtx ARG_UNUSED (d), rtx ARG_UNUSED (e), rtx ARG_UNUSED (f), rtx ARG_UNUSED (g), rtx ARG_UNUSED (h))
{
  return 0;
}
extern rtx        gen_pred_mov_widthbrvvmf4hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvmf4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvmf4hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvmf4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvmf4hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvmf4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvmf2si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvmf2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvmf2si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvmf2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvmf2si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvmf2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm8hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm8hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm8hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm8hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm8hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm8hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm4hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm4hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm4hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm4hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm4hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm4hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm2hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm2hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm2hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm2hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm2hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm2hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm1hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm1hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm1hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm1hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm1hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm1hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvmf2hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvmf2hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvmf2hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvmf2hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvmf2hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvmf2hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvmf4hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvmf4hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvmf4hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvmf4hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvmf4hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvmf4hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm8sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm8sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm8sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm8sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm8sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm8sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm4sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm4sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm4sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm4sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm4sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm4sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm2sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm2sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm2sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm2sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm2sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm2sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm1sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm1sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm1sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm1sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm1sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm1sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvmf2sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvmf2sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvmf2sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvmf2sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvmf2sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvmf2sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm8df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm8df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm8df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm8df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm8df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm8df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm4df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm4df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm4df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm4df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm4df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm4df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm2df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm2df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm2df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm2df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm2df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm2df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm1df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm1df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm1df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm1df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm1df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm1df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm8bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm8bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm8bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm8bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm8bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm8bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm4bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm4bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm4bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm4bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm4bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm4bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm2bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm2bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm2bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm2bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm2bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm2bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvm1bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvm1bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvm1bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvm1bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvm1bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvm1bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvmf2bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvmf2bf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvmf2bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvmf2bf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvmf2bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvmf2bf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbrvvmf4bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthburvvmf4bf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhrvvmf4bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhurvvmf4bf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwrvvmf4bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwurvvmf4bf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv16qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv16qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv16qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv16qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv16qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv16qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv32qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv32qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv32qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv32qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv32qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv32qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv64qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv64qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv64qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv64qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv64qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv64qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv128qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv128qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv128qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv128qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv128qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv128qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv256qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv256qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv256qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv256qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv256qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv256qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv512qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv512qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv512qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv512qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv512qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv512qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv1024qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv1024qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv1024qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv1024qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv1024qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv1024qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv2048qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv2048qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv2048qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv2048qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv2048qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv2048qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv4096qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv4096qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv4096qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv4096qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv4096qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv4096qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv16hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv16hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv16hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv16hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv16hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv16hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv32hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv32hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv32hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv32hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv32hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv32hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv64hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv64hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv64hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv64hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv64hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv64hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv128hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv128hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv128hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv128hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv128hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv128hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv256hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv256hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv256hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv256hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv256hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv256hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv512hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv512hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv512hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv512hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv512hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv512hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv1024hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv1024hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv1024hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv1024hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv1024hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv1024hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv2048hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv2048hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv2048hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv2048hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv2048hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv2048hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv16si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv16si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv16si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv16si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv16si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv16si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv32si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv32si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv32si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv32si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv32si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv32si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv64si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv64si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv64si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv64si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv64si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv64si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv128si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv128si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv128si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv128si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv128si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv128si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv256si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv256si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv256si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv256si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv256si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv256si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv512si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv512si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv512si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv512si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv512si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv512si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv1024si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv1024si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv1024si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv1024si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv1024si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv1024si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv16di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv16di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv16di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv16di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv16di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv16di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv32di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv32di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv32di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv32di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv32di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv32di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv64di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv64di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv64di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv64di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv64di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv64di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv128di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv128di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv128di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv128di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv128di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv128di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv256di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv256di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv256di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv256di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv256di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv256di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv512di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv512di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv512di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv512di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv512di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv512di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv1hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv1hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv1hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv1hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv1hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv1hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv2hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv2hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv2hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv4hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv4hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv4hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv8hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv8hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv8hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv8hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv8hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv8hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv16hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv16hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv16hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv16hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv16hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv16hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv32hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv32hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv32hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv32hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv32hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv32hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv64hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv64hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv64hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv64hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv64hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv64hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv128hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv128hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv128hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv128hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv128hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv128hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv256hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv256hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv256hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv256hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv256hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv256hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv512hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv512hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv512hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv512hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv512hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv512hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv1024hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv1024hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv1024hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv1024hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv1024hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv1024hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv2048hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv2048hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv2048hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv2048hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv2048hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv2048hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv1sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv1sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv1sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv1sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv1sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv1sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv2sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv2sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv2sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv4sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv4sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv4sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv4sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv4sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv4sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv8sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv8sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv8sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv8sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv8sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv8sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv16sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv16sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv16sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv16sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv16sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv16sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv32sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv32sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv32sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv32sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv32sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv32sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv64sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv64sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv64sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv64sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv64sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv64sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv128sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv128sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv128sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv128sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv128sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv128sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv256sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv256sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv256sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv256sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv256sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv256sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv512sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv512sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv512sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv512sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv512sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv512sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv1024sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv1024sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv1024sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv1024sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv1024sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv1024sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv1df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv1df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv1df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv1df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv1df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv1df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv2df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv2df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv2df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv2df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv2df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv2df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv4df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv4df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv4df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv4df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv4df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv4df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv8df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv8df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv8df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv8df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv8df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv8df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv16df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv16df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv16df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv16df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv16df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv16df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv32df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv32df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv32df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv32df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv32df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv32df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv64df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv64df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv64df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv64df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv64df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv64df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv128df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv128df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv128df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv128df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv128df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv128df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv256df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv256df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv256df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv256df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv256df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv256df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv512df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv512df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv512df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv512df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv512df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv512df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv1bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv1bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv1bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv1bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv1bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv1bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv2bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv2bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv2bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv2bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv2bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv2bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv4bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv4bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv4bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv4bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv4bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv4bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv8bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv8bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv8bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv8bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv8bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv8bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv16bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv16bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv16bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv16bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv16bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv16bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv32bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv32bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv32bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv32bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv32bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv32bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv64bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv64bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv64bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv64bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv64bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv64bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv128bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv128bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv128bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv128bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv128bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv128bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv256bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv256bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv256bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv256bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv256bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv256bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv512bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv512bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv512bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv512bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv512bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv512bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv1024bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv1024bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv1024bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv1024bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv1024bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv1024bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbv2048bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthbuv2048bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhv2048bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthhuv2048bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwv2048bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mov_widthwuv2048bf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_th_extractrvvm8qi                         (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractrvvm4qi                         (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractrvvm2qi                         (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractrvvm1qi                         (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractrvvm8hi                         (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractrvvm4hi                         (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractrvvm2hi                         (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractrvvm1hi                         (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractrvvm8si                         (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractrvvm4si                         (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractrvvm2si                         (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractrvvm1si                         (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractrvvm8di                         (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractrvvm4di                         (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractrvvm2di                         (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractrvvm1di                         (rtx, rtx, rtx);
static inline rtx gen_pred_th_extractrvvmf2qi                        (rtx, rtx, rtx);
static inline rtx
gen_pred_th_extractrvvmf2qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_pred_th_extractrvvmf4qi                        (rtx, rtx, rtx);
static inline rtx
gen_pred_th_extractrvvmf4qi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
extern rtx        gen_pred_th_extractrvvmf8qi                        (rtx, rtx, rtx);
static inline rtx gen_pred_th_extractrvvmf2hi                        (rtx, rtx, rtx);
static inline rtx
gen_pred_th_extractrvvmf2hi(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
extern rtx        gen_pred_th_extractrvvmf4hi                        (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractrvvmf2si                        (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv1qi                            (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv2qi                            (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv4qi                            (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv8qi                            (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv16qi                           (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv32qi                           (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv64qi                           (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv128qi                          (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv256qi                          (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv512qi                          (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv1024qi                         (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv2048qi                         (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv4096qi                         (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv1hi                            (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv2hi                            (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv4hi                            (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv8hi                            (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv16hi                           (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv32hi                           (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv64hi                           (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv128hi                          (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv256hi                          (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv512hi                          (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv1024hi                         (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv2048hi                         (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv1si                            (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv2si                            (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv4si                            (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv8si                            (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv16si                           (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv32si                           (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv64si                           (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv128si                          (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv256si                          (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv512si                          (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv1024si                         (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv1di                            (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv2di                            (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv4di                            (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv8di                            (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv16di                           (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv32di                           (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv64di                           (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv128di                          (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv256di                          (rtx, rtx, rtx);
extern rtx        gen_pred_th_extractv512di                          (rtx, rtx, rtx);
extern rtx        gen_vreinterpretrvvm8qi                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm4qi                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm2qi                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm1qi                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm8hi                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm4hi                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm2hi                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm1hi                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm8si                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm4si                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm2si                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm1si                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm8di                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm4di                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm2di                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm1di                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvmf2qi                           (rtx, rtx);
extern rtx        gen_vreinterpretrvvmf4qi                           (rtx, rtx);
extern rtx        gen_vreinterpretrvvmf8qi                           (rtx, rtx);
extern rtx        gen_vreinterpretrvvmf2hi                           (rtx, rtx);
extern rtx        gen_vreinterpretrvvmf4hi                           (rtx, rtx);
extern rtx        gen_vreinterpretrvvmf2si                           (rtx, rtx);
extern rtx        gen_vreinterpretrvvm8hf                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm4hf                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm2hf                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm1hf                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvmf2hf                           (rtx, rtx);
extern rtx        gen_vreinterpretrvvmf4hf                           (rtx, rtx);
extern rtx        gen_vreinterpretrvvm8sf                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm4sf                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm2sf                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm1sf                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvmf2sf                           (rtx, rtx);
extern rtx        gen_vreinterpretrvvm8df                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm4df                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm2df                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm1df                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm8bf                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm4bf                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm2bf                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvm1bf                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvmf2bf                           (rtx, rtx);
extern rtx        gen_vreinterpretrvvmf4bf                           (rtx, rtx);
extern rtx        gen_vreinterpretv1qi                               (rtx, rtx);
extern rtx        gen_vreinterpretv2qi                               (rtx, rtx);
extern rtx        gen_vreinterpretv4qi                               (rtx, rtx);
extern rtx        gen_vreinterpretv8qi                               (rtx, rtx);
extern rtx        gen_vreinterpretv16qi                              (rtx, rtx);
extern rtx        gen_vreinterpretv32qi                              (rtx, rtx);
extern rtx        gen_vreinterpretv64qi                              (rtx, rtx);
extern rtx        gen_vreinterpretv128qi                             (rtx, rtx);
extern rtx        gen_vreinterpretv256qi                             (rtx, rtx);
extern rtx        gen_vreinterpretv512qi                             (rtx, rtx);
extern rtx        gen_vreinterpretv1024qi                            (rtx, rtx);
extern rtx        gen_vreinterpretv2048qi                            (rtx, rtx);
extern rtx        gen_vreinterpretv4096qi                            (rtx, rtx);
extern rtx        gen_vreinterpretv1hi                               (rtx, rtx);
extern rtx        gen_vreinterpretv2hi                               (rtx, rtx);
extern rtx        gen_vreinterpretv4hi                               (rtx, rtx);
extern rtx        gen_vreinterpretv8hi                               (rtx, rtx);
extern rtx        gen_vreinterpretv16hi                              (rtx, rtx);
extern rtx        gen_vreinterpretv32hi                              (rtx, rtx);
extern rtx        gen_vreinterpretv64hi                              (rtx, rtx);
extern rtx        gen_vreinterpretv128hi                             (rtx, rtx);
extern rtx        gen_vreinterpretv256hi                             (rtx, rtx);
extern rtx        gen_vreinterpretv512hi                             (rtx, rtx);
extern rtx        gen_vreinterpretv1024hi                            (rtx, rtx);
extern rtx        gen_vreinterpretv2048hi                            (rtx, rtx);
extern rtx        gen_vreinterpretv1si                               (rtx, rtx);
extern rtx        gen_vreinterpretv2si                               (rtx, rtx);
extern rtx        gen_vreinterpretv4si                               (rtx, rtx);
extern rtx        gen_vreinterpretv8si                               (rtx, rtx);
extern rtx        gen_vreinterpretv16si                              (rtx, rtx);
extern rtx        gen_vreinterpretv32si                              (rtx, rtx);
extern rtx        gen_vreinterpretv64si                              (rtx, rtx);
extern rtx        gen_vreinterpretv128si                             (rtx, rtx);
extern rtx        gen_vreinterpretv256si                             (rtx, rtx);
extern rtx        gen_vreinterpretv512si                             (rtx, rtx);
extern rtx        gen_vreinterpretv1024si                            (rtx, rtx);
extern rtx        gen_vreinterpretv1di                               (rtx, rtx);
extern rtx        gen_vreinterpretv2di                               (rtx, rtx);
extern rtx        gen_vreinterpretv4di                               (rtx, rtx);
extern rtx        gen_vreinterpretv8di                               (rtx, rtx);
extern rtx        gen_vreinterpretv16di                              (rtx, rtx);
extern rtx        gen_vreinterpretv32di                              (rtx, rtx);
extern rtx        gen_vreinterpretv64di                              (rtx, rtx);
extern rtx        gen_vreinterpretv128di                             (rtx, rtx);
extern rtx        gen_vreinterpretv256di                             (rtx, rtx);
extern rtx        gen_vreinterpretv512di                             (rtx, rtx);
extern rtx        gen_vreinterpretv1hf                               (rtx, rtx);
extern rtx        gen_vreinterpretv2hf                               (rtx, rtx);
extern rtx        gen_vreinterpretv4hf                               (rtx, rtx);
extern rtx        gen_vreinterpretv8hf                               (rtx, rtx);
extern rtx        gen_vreinterpretv16hf                              (rtx, rtx);
extern rtx        gen_vreinterpretv32hf                              (rtx, rtx);
extern rtx        gen_vreinterpretv64hf                              (rtx, rtx);
extern rtx        gen_vreinterpretv128hf                             (rtx, rtx);
extern rtx        gen_vreinterpretv256hf                             (rtx, rtx);
extern rtx        gen_vreinterpretv512hf                             (rtx, rtx);
extern rtx        gen_vreinterpretv1024hf                            (rtx, rtx);
extern rtx        gen_vreinterpretv2048hf                            (rtx, rtx);
extern rtx        gen_vreinterpretv1sf                               (rtx, rtx);
extern rtx        gen_vreinterpretv2sf                               (rtx, rtx);
extern rtx        gen_vreinterpretv4sf                               (rtx, rtx);
extern rtx        gen_vreinterpretv8sf                               (rtx, rtx);
extern rtx        gen_vreinterpretv16sf                              (rtx, rtx);
extern rtx        gen_vreinterpretv32sf                              (rtx, rtx);
extern rtx        gen_vreinterpretv64sf                              (rtx, rtx);
extern rtx        gen_vreinterpretv128sf                             (rtx, rtx);
extern rtx        gen_vreinterpretv256sf                             (rtx, rtx);
extern rtx        gen_vreinterpretv512sf                             (rtx, rtx);
extern rtx        gen_vreinterpretv1024sf                            (rtx, rtx);
extern rtx        gen_vreinterpretv1df                               (rtx, rtx);
extern rtx        gen_vreinterpretv2df                               (rtx, rtx);
extern rtx        gen_vreinterpretv4df                               (rtx, rtx);
extern rtx        gen_vreinterpretv8df                               (rtx, rtx);
extern rtx        gen_vreinterpretv16df                              (rtx, rtx);
extern rtx        gen_vreinterpretv32df                              (rtx, rtx);
extern rtx        gen_vreinterpretv64df                              (rtx, rtx);
extern rtx        gen_vreinterpretv128df                             (rtx, rtx);
extern rtx        gen_vreinterpretv256df                             (rtx, rtx);
extern rtx        gen_vreinterpretv512df                             (rtx, rtx);
extern rtx        gen_vreinterpretv1bf                               (rtx, rtx);
extern rtx        gen_vreinterpretv2bf                               (rtx, rtx);
extern rtx        gen_vreinterpretv4bf                               (rtx, rtx);
extern rtx        gen_vreinterpretv8bf                               (rtx, rtx);
extern rtx        gen_vreinterpretv16bf                              (rtx, rtx);
extern rtx        gen_vreinterpretv32bf                              (rtx, rtx);
extern rtx        gen_vreinterpretv64bf                              (rtx, rtx);
extern rtx        gen_vreinterpretv128bf                             (rtx, rtx);
extern rtx        gen_vreinterpretv256bf                             (rtx, rtx);
extern rtx        gen_vreinterpretv512bf                             (rtx, rtx);
extern rtx        gen_vreinterpretv1024bf                            (rtx, rtx);
extern rtx        gen_vreinterpretv2048bf                            (rtx, rtx);
extern rtx        gen_vreinterpretrvvmf64bi                          (rtx, rtx);
extern rtx        gen_vreinterpretrvvmf32bi                          (rtx, rtx);
extern rtx        gen_vreinterpretrvvmf16bi                          (rtx, rtx);
extern rtx        gen_vreinterpretrvvmf8bi                           (rtx, rtx);
extern rtx        gen_vreinterpretrvvmf4bi                           (rtx, rtx);
extern rtx        gen_vreinterpretrvvmf2bi                           (rtx, rtx);
extern rtx        gen_vreinterpretrvvm1bi                            (rtx, rtx);
extern rtx        gen_movrvvm8qi                                     (rtx, rtx);
extern rtx        gen_movrvvm4qi                                     (rtx, rtx);
extern rtx        gen_movrvvm2qi                                     (rtx, rtx);
extern rtx        gen_movrvvm1qi                                     (rtx, rtx);
extern rtx        gen_movrvvm8hi                                     (rtx, rtx);
extern rtx        gen_movrvvm4hi                                     (rtx, rtx);
extern rtx        gen_movrvvm2hi                                     (rtx, rtx);
extern rtx        gen_movrvvm1hi                                     (rtx, rtx);
extern rtx        gen_movrvvm8si                                     (rtx, rtx);
extern rtx        gen_movrvvm4si                                     (rtx, rtx);
extern rtx        gen_movrvvm2si                                     (rtx, rtx);
extern rtx        gen_movrvvm1si                                     (rtx, rtx);
extern rtx        gen_movrvvm8di                                     (rtx, rtx);
extern rtx        gen_movrvvm4di                                     (rtx, rtx);
extern rtx        gen_movrvvm2di                                     (rtx, rtx);
extern rtx        gen_movrvvm1di                                     (rtx, rtx);
extern rtx        gen_movrvvmf2qi                                    (rtx, rtx);
extern rtx        gen_movrvvmf4qi                                    (rtx, rtx);
extern rtx        gen_movrvvmf8qi                                    (rtx, rtx);
extern rtx        gen_movrvvmf2hi                                    (rtx, rtx);
extern rtx        gen_movrvvmf4hi                                    (rtx, rtx);
extern rtx        gen_movrvvmf2si                                    (rtx, rtx);
extern rtx        gen_movrvvm8hf                                     (rtx, rtx);
extern rtx        gen_movrvvm4hf                                     (rtx, rtx);
extern rtx        gen_movrvvm2hf                                     (rtx, rtx);
extern rtx        gen_movrvvm1hf                                     (rtx, rtx);
extern rtx        gen_movrvvmf2hf                                    (rtx, rtx);
extern rtx        gen_movrvvmf4hf                                    (rtx, rtx);
extern rtx        gen_movrvvm8sf                                     (rtx, rtx);
extern rtx        gen_movrvvm4sf                                     (rtx, rtx);
extern rtx        gen_movrvvm2sf                                     (rtx, rtx);
extern rtx        gen_movrvvm1sf                                     (rtx, rtx);
extern rtx        gen_movrvvmf2sf                                    (rtx, rtx);
extern rtx        gen_movrvvm8df                                     (rtx, rtx);
extern rtx        gen_movrvvm4df                                     (rtx, rtx);
extern rtx        gen_movrvvm2df                                     (rtx, rtx);
extern rtx        gen_movrvvm1df                                     (rtx, rtx);
extern rtx        gen_movrvvm8bf                                     (rtx, rtx);
extern rtx        gen_movrvvm4bf                                     (rtx, rtx);
extern rtx        gen_movrvvm2bf                                     (rtx, rtx);
extern rtx        gen_movrvvm1bf                                     (rtx, rtx);
extern rtx        gen_movrvvmf2bf                                    (rtx, rtx);
extern rtx        gen_movrvvmf4bf                                    (rtx, rtx);
extern rtx        gen_movrvvmf64bi                                   (rtx, rtx);
extern rtx        gen_movrvvmf32bi                                   (rtx, rtx);
extern rtx        gen_movrvvmf16bi                                   (rtx, rtx);
extern rtx        gen_movrvvmf8bi                                    (rtx, rtx);
extern rtx        gen_movrvvmf4bi                                    (rtx, rtx);
extern rtx        gen_movrvvmf2bi                                    (rtx, rtx);
extern rtx        gen_movrvvm1bi                                     (rtx, rtx);
extern rtx        gen_movrvvmf2qisi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf4qisi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf8qisi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf2hisi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf4hisi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf2bfsi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf4bfsi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf2hfsi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf4hfsi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf2sisi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf2sfsi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf2qidi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf4qidi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf8qidi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf2hidi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf4hidi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf2bfdi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf4bfdi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf2hfdi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf4hfdi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf2sidi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf2sfdi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf64bisi_lra                             (rtx, rtx);
extern rtx        gen_movrvvmf64bidi_lra                             (rtx, rtx);
extern rtx        gen_movrvvmf32bisi_lra                             (rtx, rtx);
extern rtx        gen_movrvvmf32bidi_lra                             (rtx, rtx);
extern rtx        gen_movrvvmf16bisi_lra                             (rtx, rtx);
extern rtx        gen_movrvvmf16bidi_lra                             (rtx, rtx);
extern rtx        gen_movrvvmf8bisi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf8bidi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf4bisi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf4bidi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf2bisi_lra                              (rtx, rtx);
extern rtx        gen_movrvvmf2bidi_lra                              (rtx, rtx);
extern rtx        gen_movrvvm1bisi_lra                               (rtx, rtx);
extern rtx        gen_movrvvm1bidi_lra                               (rtx, rtx);
extern rtx        gen_movrvvmf8x2qi                                  (rtx, rtx);
extern rtx        gen_movrvvmf8x3qi                                  (rtx, rtx);
extern rtx        gen_movrvvmf8x4qi                                  (rtx, rtx);
extern rtx        gen_movrvvmf8x5qi                                  (rtx, rtx);
extern rtx        gen_movrvvmf8x6qi                                  (rtx, rtx);
extern rtx        gen_movrvvmf8x7qi                                  (rtx, rtx);
extern rtx        gen_movrvvmf8x8qi                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x2hi                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x3hi                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x4hi                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x5hi                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x6hi                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x7hi                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x8hi                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x2si                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x3si                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x4si                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x5si                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x6si                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x7si                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x8si                                  (rtx, rtx);
extern rtx        gen_movrvvm1x2di                                   (rtx, rtx);
extern rtx        gen_movrvvm1x3di                                   (rtx, rtx);
extern rtx        gen_movrvvm1x4di                                   (rtx, rtx);
extern rtx        gen_movrvvm1x5di                                   (rtx, rtx);
extern rtx        gen_movrvvm1x6di                                   (rtx, rtx);
extern rtx        gen_movrvvm1x7di                                   (rtx, rtx);
extern rtx        gen_movrvvm1x8di                                   (rtx, rtx);
extern rtx        gen_movrvvmf4x2bf                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x3bf                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x4bf                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x5bf                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x6bf                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x7bf                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x8bf                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x2hf                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x3hf                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x4hf                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x5hf                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x6hf                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x7hf                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x8hf                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x2sf                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x3sf                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x4sf                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x5sf                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x6sf                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x7sf                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x8sf                                  (rtx, rtx);
extern rtx        gen_movrvvm1x2df                                   (rtx, rtx);
extern rtx        gen_movrvvm1x3df                                   (rtx, rtx);
extern rtx        gen_movrvvm1x4df                                   (rtx, rtx);
extern rtx        gen_movrvvm1x5df                                   (rtx, rtx);
extern rtx        gen_movrvvm1x6df                                   (rtx, rtx);
extern rtx        gen_movrvvm1x7df                                   (rtx, rtx);
extern rtx        gen_movrvvm1x8df                                   (rtx, rtx);
extern rtx        gen_movrvvmf4x2qi                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x3qi                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x4qi                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x5qi                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x6qi                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x7qi                                  (rtx, rtx);
extern rtx        gen_movrvvmf4x8qi                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x2hi                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x3hi                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x4hi                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x5hi                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x6hi                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x7hi                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x8hi                                  (rtx, rtx);
extern rtx        gen_movrvvm1x2si                                   (rtx, rtx);
extern rtx        gen_movrvvm1x3si                                   (rtx, rtx);
extern rtx        gen_movrvvm1x4si                                   (rtx, rtx);
extern rtx        gen_movrvvm1x5si                                   (rtx, rtx);
extern rtx        gen_movrvvm1x6si                                   (rtx, rtx);
extern rtx        gen_movrvvm1x7si                                   (rtx, rtx);
extern rtx        gen_movrvvm1x8si                                   (rtx, rtx);
extern rtx        gen_movrvvm2x2di                                   (rtx, rtx);
extern rtx        gen_movrvvm2x3di                                   (rtx, rtx);
extern rtx        gen_movrvvm2x4di                                   (rtx, rtx);
extern rtx        gen_movrvvmf2x2bf                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x3bf                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x4bf                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x5bf                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x6bf                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x7bf                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x8bf                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x2hf                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x3hf                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x4hf                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x5hf                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x6hf                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x7hf                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x8hf                                  (rtx, rtx);
extern rtx        gen_movrvvm1x2sf                                   (rtx, rtx);
extern rtx        gen_movrvvm1x3sf                                   (rtx, rtx);
extern rtx        gen_movrvvm1x4sf                                   (rtx, rtx);
extern rtx        gen_movrvvm1x5sf                                   (rtx, rtx);
extern rtx        gen_movrvvm1x6sf                                   (rtx, rtx);
extern rtx        gen_movrvvm1x7sf                                   (rtx, rtx);
extern rtx        gen_movrvvm1x8sf                                   (rtx, rtx);
extern rtx        gen_movrvvm2x2df                                   (rtx, rtx);
extern rtx        gen_movrvvm2x3df                                   (rtx, rtx);
extern rtx        gen_movrvvm2x4df                                   (rtx, rtx);
extern rtx        gen_movrvvmf2x2qi                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x3qi                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x4qi                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x5qi                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x6qi                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x7qi                                  (rtx, rtx);
extern rtx        gen_movrvvmf2x8qi                                  (rtx, rtx);
extern rtx        gen_movrvvm1x2hi                                   (rtx, rtx);
extern rtx        gen_movrvvm1x3hi                                   (rtx, rtx);
extern rtx        gen_movrvvm1x4hi                                   (rtx, rtx);
extern rtx        gen_movrvvm1x5hi                                   (rtx, rtx);
extern rtx        gen_movrvvm1x6hi                                   (rtx, rtx);
extern rtx        gen_movrvvm1x7hi                                   (rtx, rtx);
extern rtx        gen_movrvvm1x8hi                                   (rtx, rtx);
extern rtx        gen_movrvvm2x2si                                   (rtx, rtx);
extern rtx        gen_movrvvm2x3si                                   (rtx, rtx);
extern rtx        gen_movrvvm2x4si                                   (rtx, rtx);
extern rtx        gen_movrvvm4x2di                                   (rtx, rtx);
extern rtx        gen_movrvvm1x2bf                                   (rtx, rtx);
extern rtx        gen_movrvvm1x3bf                                   (rtx, rtx);
extern rtx        gen_movrvvm1x4bf                                   (rtx, rtx);
extern rtx        gen_movrvvm1x5bf                                   (rtx, rtx);
extern rtx        gen_movrvvm1x6bf                                   (rtx, rtx);
extern rtx        gen_movrvvm1x7bf                                   (rtx, rtx);
extern rtx        gen_movrvvm1x8bf                                   (rtx, rtx);
extern rtx        gen_movrvvm1x2hf                                   (rtx, rtx);
extern rtx        gen_movrvvm1x3hf                                   (rtx, rtx);
extern rtx        gen_movrvvm1x4hf                                   (rtx, rtx);
extern rtx        gen_movrvvm1x5hf                                   (rtx, rtx);
extern rtx        gen_movrvvm1x6hf                                   (rtx, rtx);
extern rtx        gen_movrvvm1x7hf                                   (rtx, rtx);
extern rtx        gen_movrvvm1x8hf                                   (rtx, rtx);
extern rtx        gen_movrvvm2x2sf                                   (rtx, rtx);
extern rtx        gen_movrvvm2x3sf                                   (rtx, rtx);
extern rtx        gen_movrvvm2x4sf                                   (rtx, rtx);
extern rtx        gen_movrvvm4x2df                                   (rtx, rtx);
extern rtx        gen_movrvvm1x2qi                                   (rtx, rtx);
extern rtx        gen_movrvvm1x3qi                                   (rtx, rtx);
extern rtx        gen_movrvvm1x4qi                                   (rtx, rtx);
extern rtx        gen_movrvvm1x5qi                                   (rtx, rtx);
extern rtx        gen_movrvvm1x6qi                                   (rtx, rtx);
extern rtx        gen_movrvvm1x7qi                                   (rtx, rtx);
extern rtx        gen_movrvvm1x8qi                                   (rtx, rtx);
extern rtx        gen_movrvvm2x2hi                                   (rtx, rtx);
extern rtx        gen_movrvvm2x3hi                                   (rtx, rtx);
extern rtx        gen_movrvvm2x4hi                                   (rtx, rtx);
extern rtx        gen_movrvvm4x2si                                   (rtx, rtx);
extern rtx        gen_movrvvm2x2bf                                   (rtx, rtx);
extern rtx        gen_movrvvm2x3bf                                   (rtx, rtx);
extern rtx        gen_movrvvm2x4bf                                   (rtx, rtx);
extern rtx        gen_movrvvm2x2hf                                   (rtx, rtx);
extern rtx        gen_movrvvm2x3hf                                   (rtx, rtx);
extern rtx        gen_movrvvm2x4hf                                   (rtx, rtx);
extern rtx        gen_movrvvm4x2sf                                   (rtx, rtx);
extern rtx        gen_movrvvm2x2qi                                   (rtx, rtx);
extern rtx        gen_movrvvm2x3qi                                   (rtx, rtx);
extern rtx        gen_movrvvm2x4qi                                   (rtx, rtx);
extern rtx        gen_movrvvm4x2hi                                   (rtx, rtx);
extern rtx        gen_movrvvm4x2bf                                   (rtx, rtx);
extern rtx        gen_movrvvm4x2hf                                   (rtx, rtx);
extern rtx        gen_movrvvm4x2qi                                   (rtx, rtx);
extern rtx        gen_movv1qi                                        (rtx, rtx);
extern rtx        gen_movv2qi                                        (rtx, rtx);
extern rtx        gen_movv4qi                                        (rtx, rtx);
extern rtx        gen_movv8qi                                        (rtx, rtx);
extern rtx        gen_movv16qi                                       (rtx, rtx);
extern rtx        gen_movv1hi                                        (rtx, rtx);
extern rtx        gen_movv2hi                                        (rtx, rtx);
extern rtx        gen_movv4hi                                        (rtx, rtx);
extern rtx        gen_movv8hi                                        (rtx, rtx);
extern rtx        gen_movv16hi                                       (rtx, rtx);
extern rtx        gen_movv1si                                        (rtx, rtx);
extern rtx        gen_movv2si                                        (rtx, rtx);
extern rtx        gen_movv4si                                        (rtx, rtx);
extern rtx        gen_movv8si                                        (rtx, rtx);
extern rtx        gen_movv16si                                       (rtx, rtx);
extern rtx        gen_movv1di                                        (rtx, rtx);
extern rtx        gen_movv2di                                        (rtx, rtx);
extern rtx        gen_movv4di                                        (rtx, rtx);
extern rtx        gen_movv8di                                        (rtx, rtx);
extern rtx        gen_movv16di                                       (rtx, rtx);
extern rtx        gen_movv1hf                                        (rtx, rtx);
extern rtx        gen_movv2hf                                        (rtx, rtx);
extern rtx        gen_movv4hf                                        (rtx, rtx);
extern rtx        gen_movv8hf                                        (rtx, rtx);
extern rtx        gen_movv16hf                                       (rtx, rtx);
extern rtx        gen_movv1bf                                        (rtx, rtx);
extern rtx        gen_movv2bf                                        (rtx, rtx);
extern rtx        gen_movv4bf                                        (rtx, rtx);
extern rtx        gen_movv8bf                                        (rtx, rtx);
extern rtx        gen_movv16bf                                       (rtx, rtx);
extern rtx        gen_movv1sf                                        (rtx, rtx);
extern rtx        gen_movv2sf                                        (rtx, rtx);
extern rtx        gen_movv4sf                                        (rtx, rtx);
extern rtx        gen_movv8sf                                        (rtx, rtx);
extern rtx        gen_movv16sf                                       (rtx, rtx);
extern rtx        gen_movv1df                                        (rtx, rtx);
extern rtx        gen_movv2df                                        (rtx, rtx);
extern rtx        gen_movv4df                                        (rtx, rtx);
extern rtx        gen_movv8df                                        (rtx, rtx);
extern rtx        gen_movv16df                                       (rtx, rtx);
extern rtx        gen_movv1bi                                        (rtx, rtx);
extern rtx        gen_movv2bi                                        (rtx, rtx);
extern rtx        gen_movv4bi                                        (rtx, rtx);
extern rtx        gen_movv8bi                                        (rtx, rtx);
extern rtx        gen_movv16bi                                       (rtx, rtx);
extern rtx        gen_movv32qi                                       (rtx, rtx);
extern rtx        gen_movv64qi                                       (rtx, rtx);
extern rtx        gen_movv128qi                                      (rtx, rtx);
extern rtx        gen_movv256qi                                      (rtx, rtx);
extern rtx        gen_movv512qi                                      (rtx, rtx);
extern rtx        gen_movv1024qi                                     (rtx, rtx);
extern rtx        gen_movv2048qi                                     (rtx, rtx);
extern rtx        gen_movv4096qi                                     (rtx, rtx);
extern rtx        gen_movv32hi                                       (rtx, rtx);
extern rtx        gen_movv64hi                                       (rtx, rtx);
extern rtx        gen_movv128hi                                      (rtx, rtx);
extern rtx        gen_movv256hi                                      (rtx, rtx);
extern rtx        gen_movv512hi                                      (rtx, rtx);
extern rtx        gen_movv1024hi                                     (rtx, rtx);
extern rtx        gen_movv2048hi                                     (rtx, rtx);
extern rtx        gen_movv32si                                       (rtx, rtx);
extern rtx        gen_movv64si                                       (rtx, rtx);
extern rtx        gen_movv128si                                      (rtx, rtx);
extern rtx        gen_movv256si                                      (rtx, rtx);
extern rtx        gen_movv512si                                      (rtx, rtx);
extern rtx        gen_movv1024si                                     (rtx, rtx);
extern rtx        gen_movv32di                                       (rtx, rtx);
extern rtx        gen_movv64di                                       (rtx, rtx);
extern rtx        gen_movv128di                                      (rtx, rtx);
extern rtx        gen_movv256di                                      (rtx, rtx);
extern rtx        gen_movv512di                                      (rtx, rtx);
extern rtx        gen_movv32hf                                       (rtx, rtx);
extern rtx        gen_movv64hf                                       (rtx, rtx);
extern rtx        gen_movv128hf                                      (rtx, rtx);
extern rtx        gen_movv256hf                                      (rtx, rtx);
extern rtx        gen_movv512hf                                      (rtx, rtx);
extern rtx        gen_movv1024hf                                     (rtx, rtx);
extern rtx        gen_movv2048hf                                     (rtx, rtx);
extern rtx        gen_movv32bf                                       (rtx, rtx);
extern rtx        gen_movv64bf                                       (rtx, rtx);
extern rtx        gen_movv128bf                                      (rtx, rtx);
extern rtx        gen_movv256bf                                      (rtx, rtx);
extern rtx        gen_movv512bf                                      (rtx, rtx);
extern rtx        gen_movv1024bf                                     (rtx, rtx);
extern rtx        gen_movv2048bf                                     (rtx, rtx);
extern rtx        gen_movv32sf                                       (rtx, rtx);
extern rtx        gen_movv64sf                                       (rtx, rtx);
extern rtx        gen_movv128sf                                      (rtx, rtx);
extern rtx        gen_movv256sf                                      (rtx, rtx);
extern rtx        gen_movv512sf                                      (rtx, rtx);
extern rtx        gen_movv1024sf                                     (rtx, rtx);
extern rtx        gen_movv32df                                       (rtx, rtx);
extern rtx        gen_movv64df                                       (rtx, rtx);
extern rtx        gen_movv128df                                      (rtx, rtx);
extern rtx        gen_movv256df                                      (rtx, rtx);
extern rtx        gen_movv512df                                      (rtx, rtx);
extern rtx        gen_movv32bi                                       (rtx, rtx);
extern rtx        gen_movv64bi                                       (rtx, rtx);
extern rtx        gen_movv128bi                                      (rtx, rtx);
extern rtx        gen_movv256bi                                      (rtx, rtx);
extern rtx        gen_movv512bi                                      (rtx, rtx);
extern rtx        gen_movv1024bi                                     (rtx, rtx);
extern rtx        gen_movv2048bi                                     (rtx, rtx);
extern rtx        gen_movv4096bi                                     (rtx, rtx);
extern rtx        gen_movv32qisi_lra                                 (rtx, rtx);
extern rtx        gen_movv32qidi_lra                                 (rtx, rtx);
extern rtx        gen_movv64qisi_lra                                 (rtx, rtx);
extern rtx        gen_movv64qidi_lra                                 (rtx, rtx);
extern rtx        gen_movv128qisi_lra                                (rtx, rtx);
extern rtx        gen_movv128qidi_lra                                (rtx, rtx);
extern rtx        gen_movv256qisi_lra                                (rtx, rtx);
extern rtx        gen_movv256qidi_lra                                (rtx, rtx);
extern rtx        gen_movv512qisi_lra                                (rtx, rtx);
extern rtx        gen_movv512qidi_lra                                (rtx, rtx);
extern rtx        gen_movv1024qisi_lra                               (rtx, rtx);
extern rtx        gen_movv1024qidi_lra                               (rtx, rtx);
extern rtx        gen_movv2048qisi_lra                               (rtx, rtx);
extern rtx        gen_movv2048qidi_lra                               (rtx, rtx);
extern rtx        gen_movv4096qisi_lra                               (rtx, rtx);
extern rtx        gen_movv4096qidi_lra                               (rtx, rtx);
extern rtx        gen_movv32hisi_lra                                 (rtx, rtx);
extern rtx        gen_movv32hidi_lra                                 (rtx, rtx);
extern rtx        gen_movv64hisi_lra                                 (rtx, rtx);
extern rtx        gen_movv64hidi_lra                                 (rtx, rtx);
extern rtx        gen_movv128hisi_lra                                (rtx, rtx);
extern rtx        gen_movv128hidi_lra                                (rtx, rtx);
extern rtx        gen_movv256hisi_lra                                (rtx, rtx);
extern rtx        gen_movv256hidi_lra                                (rtx, rtx);
extern rtx        gen_movv512hisi_lra                                (rtx, rtx);
extern rtx        gen_movv512hidi_lra                                (rtx, rtx);
extern rtx        gen_movv1024hisi_lra                               (rtx, rtx);
extern rtx        gen_movv1024hidi_lra                               (rtx, rtx);
extern rtx        gen_movv2048hisi_lra                               (rtx, rtx);
extern rtx        gen_movv2048hidi_lra                               (rtx, rtx);
extern rtx        gen_movv32sisi_lra                                 (rtx, rtx);
extern rtx        gen_movv32sidi_lra                                 (rtx, rtx);
extern rtx        gen_movv64sisi_lra                                 (rtx, rtx);
extern rtx        gen_movv64sidi_lra                                 (rtx, rtx);
extern rtx        gen_movv128sisi_lra                                (rtx, rtx);
extern rtx        gen_movv128sidi_lra                                (rtx, rtx);
extern rtx        gen_movv256sisi_lra                                (rtx, rtx);
extern rtx        gen_movv256sidi_lra                                (rtx, rtx);
extern rtx        gen_movv512sisi_lra                                (rtx, rtx);
extern rtx        gen_movv512sidi_lra                                (rtx, rtx);
extern rtx        gen_movv1024sisi_lra                               (rtx, rtx);
extern rtx        gen_movv1024sidi_lra                               (rtx, rtx);
extern rtx        gen_movv32disi_lra                                 (rtx, rtx);
extern rtx        gen_movv32didi_lra                                 (rtx, rtx);
extern rtx        gen_movv64disi_lra                                 (rtx, rtx);
extern rtx        gen_movv64didi_lra                                 (rtx, rtx);
extern rtx        gen_movv128disi_lra                                (rtx, rtx);
extern rtx        gen_movv128didi_lra                                (rtx, rtx);
extern rtx        gen_movv256disi_lra                                (rtx, rtx);
extern rtx        gen_movv256didi_lra                                (rtx, rtx);
extern rtx        gen_movv512disi_lra                                (rtx, rtx);
extern rtx        gen_movv512didi_lra                                (rtx, rtx);
extern rtx        gen_movv32hfsi_lra                                 (rtx, rtx);
extern rtx        gen_movv32hfdi_lra                                 (rtx, rtx);
extern rtx        gen_movv64hfsi_lra                                 (rtx, rtx);
extern rtx        gen_movv64hfdi_lra                                 (rtx, rtx);
extern rtx        gen_movv128hfsi_lra                                (rtx, rtx);
extern rtx        gen_movv128hfdi_lra                                (rtx, rtx);
extern rtx        gen_movv256hfsi_lra                                (rtx, rtx);
extern rtx        gen_movv256hfdi_lra                                (rtx, rtx);
extern rtx        gen_movv512hfsi_lra                                (rtx, rtx);
extern rtx        gen_movv512hfdi_lra                                (rtx, rtx);
extern rtx        gen_movv1024hfsi_lra                               (rtx, rtx);
extern rtx        gen_movv1024hfdi_lra                               (rtx, rtx);
extern rtx        gen_movv2048hfsi_lra                               (rtx, rtx);
extern rtx        gen_movv2048hfdi_lra                               (rtx, rtx);
extern rtx        gen_movv32bfsi_lra                                 (rtx, rtx);
extern rtx        gen_movv32bfdi_lra                                 (rtx, rtx);
extern rtx        gen_movv64bfsi_lra                                 (rtx, rtx);
extern rtx        gen_movv64bfdi_lra                                 (rtx, rtx);
extern rtx        gen_movv128bfsi_lra                                (rtx, rtx);
extern rtx        gen_movv128bfdi_lra                                (rtx, rtx);
extern rtx        gen_movv256bfsi_lra                                (rtx, rtx);
extern rtx        gen_movv256bfdi_lra                                (rtx, rtx);
extern rtx        gen_movv512bfsi_lra                                (rtx, rtx);
extern rtx        gen_movv512bfdi_lra                                (rtx, rtx);
extern rtx        gen_movv1024bfsi_lra                               (rtx, rtx);
extern rtx        gen_movv1024bfdi_lra                               (rtx, rtx);
extern rtx        gen_movv2048bfsi_lra                               (rtx, rtx);
extern rtx        gen_movv2048bfdi_lra                               (rtx, rtx);
extern rtx        gen_movv32sfsi_lra                                 (rtx, rtx);
extern rtx        gen_movv32sfdi_lra                                 (rtx, rtx);
extern rtx        gen_movv64sfsi_lra                                 (rtx, rtx);
extern rtx        gen_movv64sfdi_lra                                 (rtx, rtx);
extern rtx        gen_movv128sfsi_lra                                (rtx, rtx);
extern rtx        gen_movv128sfdi_lra                                (rtx, rtx);
extern rtx        gen_movv256sfsi_lra                                (rtx, rtx);
extern rtx        gen_movv256sfdi_lra                                (rtx, rtx);
extern rtx        gen_movv512sfsi_lra                                (rtx, rtx);
extern rtx        gen_movv512sfdi_lra                                (rtx, rtx);
extern rtx        gen_movv1024sfsi_lra                               (rtx, rtx);
extern rtx        gen_movv1024sfdi_lra                               (rtx, rtx);
extern rtx        gen_movv32dfsi_lra                                 (rtx, rtx);
extern rtx        gen_movv32dfdi_lra                                 (rtx, rtx);
extern rtx        gen_movv64dfsi_lra                                 (rtx, rtx);
extern rtx        gen_movv64dfdi_lra                                 (rtx, rtx);
extern rtx        gen_movv128dfsi_lra                                (rtx, rtx);
extern rtx        gen_movv128dfdi_lra                                (rtx, rtx);
extern rtx        gen_movv256dfsi_lra                                (rtx, rtx);
extern rtx        gen_movv256dfdi_lra                                (rtx, rtx);
extern rtx        gen_movv512dfsi_lra                                (rtx, rtx);
extern rtx        gen_movv512dfdi_lra                                (rtx, rtx);
extern rtx        gen_movv32bisi_lra                                 (rtx, rtx);
extern rtx        gen_movv32bidi_lra                                 (rtx, rtx);
extern rtx        gen_movv64bisi_lra                                 (rtx, rtx);
extern rtx        gen_movv64bidi_lra                                 (rtx, rtx);
extern rtx        gen_movv128bisi_lra                                (rtx, rtx);
extern rtx        gen_movv128bidi_lra                                (rtx, rtx);
extern rtx        gen_movv256bisi_lra                                (rtx, rtx);
extern rtx        gen_movv256bidi_lra                                (rtx, rtx);
extern rtx        gen_movv512bisi_lra                                (rtx, rtx);
extern rtx        gen_movv512bidi_lra                                (rtx, rtx);
extern rtx        gen_movv1024bisi_lra                               (rtx, rtx);
extern rtx        gen_movv1024bidi_lra                               (rtx, rtx);
extern rtx        gen_movv2048bisi_lra                               (rtx, rtx);
extern rtx        gen_movv2048bidi_lra                               (rtx, rtx);
extern rtx        gen_movv4096bisi_lra                               (rtx, rtx);
extern rtx        gen_movv4096bidi_lra                               (rtx, rtx);
extern rtx        gen_movmisalignrvvm8qi                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm4qi                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm2qi                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm1qi                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm8hi                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm4hi                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm2hi                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm1hi                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm8si                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm4si                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm2si                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm1si                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm8di                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm4di                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm2di                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm1di                             (rtx, rtx);
extern rtx        gen_movmisalignrvvmf2qi                            (rtx, rtx);
extern rtx        gen_movmisalignrvvmf4qi                            (rtx, rtx);
extern rtx        gen_movmisalignrvvmf8qi                            (rtx, rtx);
extern rtx        gen_movmisalignrvvmf2hi                            (rtx, rtx);
extern rtx        gen_movmisalignrvvmf4hi                            (rtx, rtx);
extern rtx        gen_movmisalignrvvmf2si                            (rtx, rtx);
extern rtx        gen_movmisalignrvvm8hf                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm4hf                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm2hf                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm1hf                             (rtx, rtx);
extern rtx        gen_movmisalignrvvmf2hf                            (rtx, rtx);
extern rtx        gen_movmisalignrvvmf4hf                            (rtx, rtx);
extern rtx        gen_movmisalignrvvm8sf                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm4sf                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm2sf                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm1sf                             (rtx, rtx);
extern rtx        gen_movmisalignrvvmf2sf                            (rtx, rtx);
extern rtx        gen_movmisalignrvvm8df                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm4df                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm2df                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm1df                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm8bf                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm4bf                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm2bf                             (rtx, rtx);
extern rtx        gen_movmisalignrvvm1bf                             (rtx, rtx);
extern rtx        gen_movmisalignrvvmf2bf                            (rtx, rtx);
extern rtx        gen_movmisalignrvvmf4bf                            (rtx, rtx);
extern rtx        gen_movmisalignv1qi                                (rtx, rtx);
extern rtx        gen_movmisalignv2qi                                (rtx, rtx);
extern rtx        gen_movmisalignv4qi                                (rtx, rtx);
extern rtx        gen_movmisalignv8qi                                (rtx, rtx);
extern rtx        gen_movmisalignv16qi                               (rtx, rtx);
extern rtx        gen_movmisalignv32qi                               (rtx, rtx);
extern rtx        gen_movmisalignv64qi                               (rtx, rtx);
extern rtx        gen_movmisalignv128qi                              (rtx, rtx);
extern rtx        gen_movmisalignv256qi                              (rtx, rtx);
extern rtx        gen_movmisalignv512qi                              (rtx, rtx);
extern rtx        gen_movmisalignv1024qi                             (rtx, rtx);
extern rtx        gen_movmisalignv2048qi                             (rtx, rtx);
extern rtx        gen_movmisalignv4096qi                             (rtx, rtx);
extern rtx        gen_movmisalignv1hi                                (rtx, rtx);
extern rtx        gen_movmisalignv2hi                                (rtx, rtx);
extern rtx        gen_movmisalignv4hi                                (rtx, rtx);
extern rtx        gen_movmisalignv8hi                                (rtx, rtx);
extern rtx        gen_movmisalignv16hi                               (rtx, rtx);
extern rtx        gen_movmisalignv32hi                               (rtx, rtx);
extern rtx        gen_movmisalignv64hi                               (rtx, rtx);
extern rtx        gen_movmisalignv128hi                              (rtx, rtx);
extern rtx        gen_movmisalignv256hi                              (rtx, rtx);
extern rtx        gen_movmisalignv512hi                              (rtx, rtx);
extern rtx        gen_movmisalignv1024hi                             (rtx, rtx);
extern rtx        gen_movmisalignv2048hi                             (rtx, rtx);
extern rtx        gen_movmisalignv1si                                (rtx, rtx);
extern rtx        gen_movmisalignv2si                                (rtx, rtx);
extern rtx        gen_movmisalignv4si                                (rtx, rtx);
extern rtx        gen_movmisalignv8si                                (rtx, rtx);
extern rtx        gen_movmisalignv16si                               (rtx, rtx);
extern rtx        gen_movmisalignv32si                               (rtx, rtx);
extern rtx        gen_movmisalignv64si                               (rtx, rtx);
extern rtx        gen_movmisalignv128si                              (rtx, rtx);
extern rtx        gen_movmisalignv256si                              (rtx, rtx);
extern rtx        gen_movmisalignv512si                              (rtx, rtx);
extern rtx        gen_movmisalignv1024si                             (rtx, rtx);
extern rtx        gen_movmisalignv1di                                (rtx, rtx);
extern rtx        gen_movmisalignv2di                                (rtx, rtx);
extern rtx        gen_movmisalignv4di                                (rtx, rtx);
extern rtx        gen_movmisalignv8di                                (rtx, rtx);
extern rtx        gen_movmisalignv16di                               (rtx, rtx);
extern rtx        gen_movmisalignv32di                               (rtx, rtx);
extern rtx        gen_movmisalignv64di                               (rtx, rtx);
extern rtx        gen_movmisalignv128di                              (rtx, rtx);
extern rtx        gen_movmisalignv256di                              (rtx, rtx);
extern rtx        gen_movmisalignv512di                              (rtx, rtx);
extern rtx        gen_movmisalignv1hf                                (rtx, rtx);
extern rtx        gen_movmisalignv2hf                                (rtx, rtx);
extern rtx        gen_movmisalignv4hf                                (rtx, rtx);
extern rtx        gen_movmisalignv8hf                                (rtx, rtx);
extern rtx        gen_movmisalignv16hf                               (rtx, rtx);
extern rtx        gen_movmisalignv32hf                               (rtx, rtx);
extern rtx        gen_movmisalignv64hf                               (rtx, rtx);
extern rtx        gen_movmisalignv128hf                              (rtx, rtx);
extern rtx        gen_movmisalignv256hf                              (rtx, rtx);
extern rtx        gen_movmisalignv512hf                              (rtx, rtx);
extern rtx        gen_movmisalignv1024hf                             (rtx, rtx);
extern rtx        gen_movmisalignv2048hf                             (rtx, rtx);
extern rtx        gen_movmisalignv1sf                                (rtx, rtx);
extern rtx        gen_movmisalignv2sf                                (rtx, rtx);
extern rtx        gen_movmisalignv4sf                                (rtx, rtx);
extern rtx        gen_movmisalignv8sf                                (rtx, rtx);
extern rtx        gen_movmisalignv16sf                               (rtx, rtx);
extern rtx        gen_movmisalignv32sf                               (rtx, rtx);
extern rtx        gen_movmisalignv64sf                               (rtx, rtx);
extern rtx        gen_movmisalignv128sf                              (rtx, rtx);
extern rtx        gen_movmisalignv256sf                              (rtx, rtx);
extern rtx        gen_movmisalignv512sf                              (rtx, rtx);
extern rtx        gen_movmisalignv1024sf                             (rtx, rtx);
extern rtx        gen_movmisalignv1df                                (rtx, rtx);
extern rtx        gen_movmisalignv2df                                (rtx, rtx);
extern rtx        gen_movmisalignv4df                                (rtx, rtx);
extern rtx        gen_movmisalignv8df                                (rtx, rtx);
extern rtx        gen_movmisalignv16df                               (rtx, rtx);
extern rtx        gen_movmisalignv32df                               (rtx, rtx);
extern rtx        gen_movmisalignv64df                               (rtx, rtx);
extern rtx        gen_movmisalignv128df                              (rtx, rtx);
extern rtx        gen_movmisalignv256df                              (rtx, rtx);
extern rtx        gen_movmisalignv512df                              (rtx, rtx);
extern rtx        gen_movmisalignv1bf                                (rtx, rtx);
extern rtx        gen_movmisalignv2bf                                (rtx, rtx);
extern rtx        gen_movmisalignv4bf                                (rtx, rtx);
extern rtx        gen_movmisalignv8bf                                (rtx, rtx);
extern rtx        gen_movmisalignv16bf                               (rtx, rtx);
extern rtx        gen_movmisalignv32bf                               (rtx, rtx);
extern rtx        gen_movmisalignv64bf                               (rtx, rtx);
extern rtx        gen_movmisalignv128bf                              (rtx, rtx);
extern rtx        gen_movmisalignv256bf                              (rtx, rtx);
extern rtx        gen_movmisalignv512bf                              (rtx, rtx);
extern rtx        gen_movmisalignv1024bf                             (rtx, rtx);
extern rtx        gen_movmisalignv2048bf                             (rtx, rtx);
extern rtx        gen_vec_duplicatervvm8qi                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm4qi                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm2qi                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm1qi                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm8hi                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm4hi                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm2hi                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm1hi                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm8si                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm4si                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm2si                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm1si                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm8di                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm4di                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm2di                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm1di                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvmf2qi                          (rtx, rtx);
extern rtx        gen_vec_duplicatervvmf4qi                          (rtx, rtx);
extern rtx        gen_vec_duplicatervvmf8qi                          (rtx, rtx);
extern rtx        gen_vec_duplicatervvmf2hi                          (rtx, rtx);
extern rtx        gen_vec_duplicatervvmf4hi                          (rtx, rtx);
extern rtx        gen_vec_duplicatervvmf2si                          (rtx, rtx);
extern rtx        gen_vec_duplicatervvm8hf                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm4hf                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm2hf                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm1hf                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvmf2hf                          (rtx, rtx);
extern rtx        gen_vec_duplicatervvmf4hf                          (rtx, rtx);
extern rtx        gen_vec_duplicatervvm8sf                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm4sf                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm2sf                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm1sf                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvmf2sf                          (rtx, rtx);
extern rtx        gen_vec_duplicatervvm8df                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm4df                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm2df                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm1df                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm8bf                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm4bf                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm2bf                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvm1bf                           (rtx, rtx);
extern rtx        gen_vec_duplicatervvmf2bf                          (rtx, rtx);
extern rtx        gen_vec_duplicatervvmf4bf                          (rtx, rtx);
extern rtx        gen_vec_duplicatev1qi                              (rtx, rtx);
extern rtx        gen_vec_duplicatev2qi                              (rtx, rtx);
extern rtx        gen_vec_duplicatev4qi                              (rtx, rtx);
extern rtx        gen_vec_duplicatev8qi                              (rtx, rtx);
extern rtx        gen_vec_duplicatev16qi                             (rtx, rtx);
extern rtx        gen_vec_duplicatev32qi                             (rtx, rtx);
extern rtx        gen_vec_duplicatev64qi                             (rtx, rtx);
extern rtx        gen_vec_duplicatev128qi                            (rtx, rtx);
extern rtx        gen_vec_duplicatev256qi                            (rtx, rtx);
extern rtx        gen_vec_duplicatev512qi                            (rtx, rtx);
extern rtx        gen_vec_duplicatev1024qi                           (rtx, rtx);
extern rtx        gen_vec_duplicatev2048qi                           (rtx, rtx);
extern rtx        gen_vec_duplicatev4096qi                           (rtx, rtx);
extern rtx        gen_vec_duplicatev1hi                              (rtx, rtx);
extern rtx        gen_vec_duplicatev2hi                              (rtx, rtx);
extern rtx        gen_vec_duplicatev4hi                              (rtx, rtx);
extern rtx        gen_vec_duplicatev8hi                              (rtx, rtx);
extern rtx        gen_vec_duplicatev16hi                             (rtx, rtx);
extern rtx        gen_vec_duplicatev32hi                             (rtx, rtx);
extern rtx        gen_vec_duplicatev64hi                             (rtx, rtx);
extern rtx        gen_vec_duplicatev128hi                            (rtx, rtx);
extern rtx        gen_vec_duplicatev256hi                            (rtx, rtx);
extern rtx        gen_vec_duplicatev512hi                            (rtx, rtx);
extern rtx        gen_vec_duplicatev1024hi                           (rtx, rtx);
extern rtx        gen_vec_duplicatev2048hi                           (rtx, rtx);
extern rtx        gen_vec_duplicatev1si                              (rtx, rtx);
extern rtx        gen_vec_duplicatev2si                              (rtx, rtx);
extern rtx        gen_vec_duplicatev4si                              (rtx, rtx);
extern rtx        gen_vec_duplicatev8si                              (rtx, rtx);
extern rtx        gen_vec_duplicatev16si                             (rtx, rtx);
extern rtx        gen_vec_duplicatev32si                             (rtx, rtx);
extern rtx        gen_vec_duplicatev64si                             (rtx, rtx);
extern rtx        gen_vec_duplicatev128si                            (rtx, rtx);
extern rtx        gen_vec_duplicatev256si                            (rtx, rtx);
extern rtx        gen_vec_duplicatev512si                            (rtx, rtx);
extern rtx        gen_vec_duplicatev1024si                           (rtx, rtx);
extern rtx        gen_vec_duplicatev1di                              (rtx, rtx);
extern rtx        gen_vec_duplicatev2di                              (rtx, rtx);
extern rtx        gen_vec_duplicatev4di                              (rtx, rtx);
extern rtx        gen_vec_duplicatev8di                              (rtx, rtx);
extern rtx        gen_vec_duplicatev16di                             (rtx, rtx);
extern rtx        gen_vec_duplicatev32di                             (rtx, rtx);
extern rtx        gen_vec_duplicatev64di                             (rtx, rtx);
extern rtx        gen_vec_duplicatev128di                            (rtx, rtx);
extern rtx        gen_vec_duplicatev256di                            (rtx, rtx);
extern rtx        gen_vec_duplicatev512di                            (rtx, rtx);
extern rtx        gen_vec_duplicatev1hf                              (rtx, rtx);
extern rtx        gen_vec_duplicatev2hf                              (rtx, rtx);
extern rtx        gen_vec_duplicatev4hf                              (rtx, rtx);
extern rtx        gen_vec_duplicatev8hf                              (rtx, rtx);
extern rtx        gen_vec_duplicatev16hf                             (rtx, rtx);
extern rtx        gen_vec_duplicatev32hf                             (rtx, rtx);
extern rtx        gen_vec_duplicatev64hf                             (rtx, rtx);
extern rtx        gen_vec_duplicatev128hf                            (rtx, rtx);
extern rtx        gen_vec_duplicatev256hf                            (rtx, rtx);
extern rtx        gen_vec_duplicatev512hf                            (rtx, rtx);
extern rtx        gen_vec_duplicatev1024hf                           (rtx, rtx);
extern rtx        gen_vec_duplicatev2048hf                           (rtx, rtx);
extern rtx        gen_vec_duplicatev1sf                              (rtx, rtx);
extern rtx        gen_vec_duplicatev2sf                              (rtx, rtx);
extern rtx        gen_vec_duplicatev4sf                              (rtx, rtx);
extern rtx        gen_vec_duplicatev8sf                              (rtx, rtx);
extern rtx        gen_vec_duplicatev16sf                             (rtx, rtx);
extern rtx        gen_vec_duplicatev32sf                             (rtx, rtx);
extern rtx        gen_vec_duplicatev64sf                             (rtx, rtx);
extern rtx        gen_vec_duplicatev128sf                            (rtx, rtx);
extern rtx        gen_vec_duplicatev256sf                            (rtx, rtx);
extern rtx        gen_vec_duplicatev512sf                            (rtx, rtx);
extern rtx        gen_vec_duplicatev1024sf                           (rtx, rtx);
extern rtx        gen_vec_duplicatev1df                              (rtx, rtx);
extern rtx        gen_vec_duplicatev2df                              (rtx, rtx);
extern rtx        gen_vec_duplicatev4df                              (rtx, rtx);
extern rtx        gen_vec_duplicatev8df                              (rtx, rtx);
extern rtx        gen_vec_duplicatev16df                             (rtx, rtx);
extern rtx        gen_vec_duplicatev32df                             (rtx, rtx);
extern rtx        gen_vec_duplicatev64df                             (rtx, rtx);
extern rtx        gen_vec_duplicatev128df                            (rtx, rtx);
extern rtx        gen_vec_duplicatev256df                            (rtx, rtx);
extern rtx        gen_vec_duplicatev512df                            (rtx, rtx);
extern rtx        gen_vec_duplicatev1bf                              (rtx, rtx);
extern rtx        gen_vec_duplicatev2bf                              (rtx, rtx);
extern rtx        gen_vec_duplicatev4bf                              (rtx, rtx);
extern rtx        gen_vec_duplicatev8bf                              (rtx, rtx);
extern rtx        gen_vec_duplicatev16bf                             (rtx, rtx);
extern rtx        gen_vec_duplicatev32bf                             (rtx, rtx);
extern rtx        gen_vec_duplicatev64bf                             (rtx, rtx);
extern rtx        gen_vec_duplicatev128bf                            (rtx, rtx);
extern rtx        gen_vec_duplicatev256bf                            (rtx, rtx);
extern rtx        gen_vec_duplicatev512bf                            (rtx, rtx);
extern rtx        gen_vec_duplicatev1024bf                           (rtx, rtx);
extern rtx        gen_vec_duplicatev2048bf                           (rtx, rtx);
extern rtx        gen_pred_movrvvm8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvmf2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvmf4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvmf8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvmf2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvmf4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvmf2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm8hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm4hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm2hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm1hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvmf2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvmf4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm8sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm4sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm2sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm1sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvmf2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm8df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm4df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm2df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm1df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm8bf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm4bf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm2bf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvm1bf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvmf2bf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movrvvmf4bf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv1qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv2qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv4qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv8qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv16qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv32qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv64qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv128qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv256qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv512qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv1024qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv2048qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv4096qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv1hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv2hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv4hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv8hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv16hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv32hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv64hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv128hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv256hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv512hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv1024hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv2048hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv1si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv2si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv4si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv8si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv16si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv32si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv64si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv128si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv256si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv512si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv1024si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv1di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv2di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv4di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv8di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv16di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv32di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv64di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv128di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv256di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv512di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv1hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv2hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv4hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv8hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv16hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv32hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv64hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv128hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv256hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv512hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv1024hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv2048hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv1sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv2sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv4sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv8sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv16sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv32sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv64sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv128sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv256sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv512sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv1024sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv1df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv2df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv4df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv8df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv16df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv32df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv64df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv128df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv256df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv512df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv1bf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv2bf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv4bf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv8bf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv16bf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv32bf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv64bf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv128bf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv256bf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv512bf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv1024bf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_movv2048bf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm8di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm4di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm2di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergervvm1di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev1di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev2di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev4di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev8di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev16di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev32di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev64di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev128di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev256di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mergev512di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm1qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm8hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm1hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm8si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm4si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm1si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm8di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm4di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm2di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm1di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvmf2qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvmf4qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvmf8qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvmf2hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvmf4hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvmf2si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm8hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm4hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm2hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm1hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvmf2hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvmf4hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm8sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm4sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm2sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm1sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvmf2sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm8df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm4df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm2df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm1df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm8bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm4bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm2bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvm1bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvmf2bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastrvvmf4bf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv1qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv16qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv32qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv64qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv128qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv256qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv512qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv1024qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv2048qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv4096qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv8hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv16hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv32hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv64hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv128hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv256hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv512hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv1024hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv2048hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv16si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv32si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv64si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv128si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv256si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv512si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv1024si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv16di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv32di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv64di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv128di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv256di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv512di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv1hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv2hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv4hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv8hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv16hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv32hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv64hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv128hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv256hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv512hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv1024hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv2048hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv1sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv2sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv4sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv8sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv16sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv32sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv64sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv128sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv256sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv512sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv1024sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv1df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv2df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv4df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv8df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv16df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv32df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv64df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv128df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv256df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv512df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv1bf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv2bf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv4bf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv8bf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv16bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv32bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv64bf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv128bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv256bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv512bf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv1024bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_broadcastv2048bf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm8qi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm4qi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm2qi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm1qi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm8hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm4hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm2hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm1hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm8si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm4si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm2si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm1si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm8di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm4di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm2di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm1di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvmf2qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvmf4qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvmf8qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvmf2hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvmf4hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvmf2si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm8hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm4hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm2hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm1hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvmf2hf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvmf4hf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm8sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm4sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm2sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm1sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvmf2sf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm8df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm4df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm2df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm1df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm8bf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm4bf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm2bf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvm1bf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvmf2bf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastrvvmf4bf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv1qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv2qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv4qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv8qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv16qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv32qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv64qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv128qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv256qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv512qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv1024qi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv2048qi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv4096qi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv1hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv2hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv4hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv8hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv16hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv32hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv64hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv128hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv256hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv512hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv1024hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv2048hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv1si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv2si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv4si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv8si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv16si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv32si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv64si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv128si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv256si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv512si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv1024si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv1di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv2di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv4di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv8di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv16di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv32di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv64di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv128di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv256di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv512di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv1hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv2hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv4hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv8hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv16hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv32hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv64hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv128hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv256hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv512hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv1024hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv2048hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv1sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv2sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv4sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv8sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv16sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv32sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv64sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv128sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv256sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv512sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv1024sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv1df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv2df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv4df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv8df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv16df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv32df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv64df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv128df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv256df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv512df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv1bf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv2bf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv4bf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv8bf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv16bf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv32bf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv64bf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv128bf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv256bf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv512bf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv1024bf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_strided_broadcastv2048bf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm8di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm8di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm8di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm8di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm8di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm8di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm8di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm8di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm8di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm4di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm4di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm4di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm4di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm4di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm4di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm4di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm4di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm4di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm2di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm2di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm2di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm2di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm2di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm2di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm2di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm2di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm2di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addrvvm1di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andrvvm1di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorrvvm1di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorrvvm1di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxrvvm1di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxrvvm1di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminrvvm1di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminrvvm1di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulrvvm1di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv1di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv1di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv1di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv1di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv1di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv1di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv1di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv1di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv1di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv2di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv2di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv2di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv2di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv2di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv2di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv2di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv2di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv2di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv4di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv4di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv4di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv4di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv4di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv4di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv4di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv4di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv4di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv8di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv8di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv8di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv8di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv8di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv8di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv8di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv8di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv8di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv16di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv16di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv16di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv16di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv16di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv16di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv16di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv16di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv16di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv32di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv32di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv32di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv32di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv32di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv32di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv32di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv32di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv32di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv64di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv64di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv64di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv64di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv64di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv64di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv64di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv64di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv64di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv128di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv128di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv128di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv128di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv128di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv128di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv128di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv128di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv128di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv256di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv256di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv256di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv256di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv256di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv256di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv256di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv256di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv256di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_addv512di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_andv512di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_iorv512di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_xorv512di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smaxv512di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umaxv512di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sminv512di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_uminv512di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulv512di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm8di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm8di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm8di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm8di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm8di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm4di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm4di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm4di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm4di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm4di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm2di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm2di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm2di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm2di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm2di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm1di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divrvvm1di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivrvvm1di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modrvvm1di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodrvvm1di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv1di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv1di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv1di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv1di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv2di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv2di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv2di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv2di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv4di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv4di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv4di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv4di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv4di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv8di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv8di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv8di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv8di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv8di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv16di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv16di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv16di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv16di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv16di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv32di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv32di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv32di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv32di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv32di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv64di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv64di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv64di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv64di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv64di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv128di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv128di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv128di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv128di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv128di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv256di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv256di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv256di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv256di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv256di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv512di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_divv512di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_udivv512di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_modv512di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_umodv512di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm8di_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm4di_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm2di_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subrvvm1di_reverse_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv1di_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv2di_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv4di_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv8di_reverse_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv16di_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv32di_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv64di_reverse_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv128di_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv256di_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_subv512di_reverse_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm8di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm8di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm8di_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm4di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm4di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm4di_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm2di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm2di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm2di_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhrvvm1di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhurvvm1di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mulhsurvvm1di_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm8di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm4di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm2di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_adcrvvm1di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm8di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm4di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm2di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sbcrvvm1di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm8di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm4di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm2di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm1di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm8di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm4di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm2di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm1di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm8di_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm4di_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm2di_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_madcrvvm1di_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm8di_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm4di_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm2di_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_msbcrvvm1di_overflow_scalar               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm8di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm8di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm4di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm4di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm2di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm2di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ssaddrvvm1di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_usaddrvvm1di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm8di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm8di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm4di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm4di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm2di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm2di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_sssubrvvm1di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ussubrvvm1di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm8di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm8di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm8di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm8di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm8di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm4di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm4di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm4di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm4di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm4di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm2di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm2di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm2di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm2di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm2di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddurvvm1di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddrvvm1di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asuburvvm1di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubrvvm1di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulrvvm1di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv1di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv1di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv1di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv1di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv1di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv2di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv2di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv2di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv2di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv2di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv4di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv4di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv4di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv4di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv4di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv8di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv8di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv8di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv8di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv8di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv16di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv16di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv16di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv16di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv16di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv32di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv32di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv32di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv32di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv32di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv64di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv64di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv64di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv64di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv64di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv128di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv128di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv128di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv128di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv128di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv256di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv256di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv256di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv256di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv256di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aadduv512di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_aaddv512di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubuv512di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_asubv512di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_smulv512di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm8qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm4qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm2qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm1qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm8hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm4hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm2hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm1hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm8si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm4si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm2si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm1si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm8di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm4di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm2di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm1di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvmf2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvmf4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvmf8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvmf2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvmf4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvmf2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv1qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv2qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv4qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv8qi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv16qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv32qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv64qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv128qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv256qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv512qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv1024qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv2048qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv4096qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv1hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv2hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv4hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv8hi                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv16hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv32hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv64hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv128hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv256hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv512hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv1024hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv2048hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv1si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv2si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv4si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv8si                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv16si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv32si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv64si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv128si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv256si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv512si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv1024si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv1di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv2di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv4di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv8di                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv16di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv32di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv64di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv128di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv256di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv512di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgervvm8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgervvm4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgervvm2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgervvm1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgervvm8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgervvm4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgervvm2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgervvm1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgervvm8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgervvm4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgervvm2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgervvm1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgervvm8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgervvm4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgervvm2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgervvm1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgervvmf2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgervvmf4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgervvmf8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgervvmf2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgervvmf4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgervvmf2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev1qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev2qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev4qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev8qi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev16qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev32qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev64qi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev128qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev256qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev512qi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev1024qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev2048qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev4096qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev1hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev2hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev4hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev8hi                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev16hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev32hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev64hi                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev128hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev256hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev512hi                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev1024hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev2048hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev1si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev2si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev4si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev8si                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev16si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev32si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev64si                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev128si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev256si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev512si                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev1024si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev1di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev2di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev4di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev8di                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev16di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev32di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev64di                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev128di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev256di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_ltgev512di                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm8qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm4qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm2qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm1qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvmf2qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvmf4qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvmf8qi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm8hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm4hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm2hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm1hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvmf2hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvmf4hi_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm8si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm4si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm2si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm1si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvmf2si_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv1qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv2qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv4qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv8qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv16qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv32qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv64qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv128qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv256qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv512qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv1024qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv2048qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv4096qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv1hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv2hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv4hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv8hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv16hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv32hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv64hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv128hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv256hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv512hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv1024hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv2048hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv1si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv2si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv4si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv8si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv16si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv32si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv64si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv128si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv256si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv512si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv1024si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm8di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm4di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm2di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm1di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv1di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv2di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv4di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv8di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv16di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv32di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv64di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv128di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv256di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv512di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gervvm8qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gervvm4qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gervvm2qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gervvm1qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gervvm8hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gervvm4hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gervvm2hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gervvm1hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gervvm8si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gervvm4si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gervvm2si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gervvm1si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gervvm8di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gervvm4di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gervvm2di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gervvm1di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gervvmf2qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gervvmf4qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gervvmf8qi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gervvmf2hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gervvmf4hi_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gervvmf2si_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev1qi_scalar                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev2qi_scalar                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev4qi_scalar                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev8qi_scalar                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev16qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev32qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev64qi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev128qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev256qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev512qi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev1024qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev2048qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev4096qi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev1hi_scalar                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev2hi_scalar                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev4hi_scalar                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev8hi_scalar                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev16hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev32hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev64hi_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev128hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev256hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev512hi_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev1024hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev2048hi_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev1si_scalar                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev2si_scalar                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev4si_scalar                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev8si_scalar                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev16si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev32si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev64si_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev128si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev256si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev512si_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev1024si_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev1di_scalar                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev2di_scalar                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev4di_scalar                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev8di_scalar                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev16di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev32di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev64di_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev128di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev256di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_gev512di_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvmf2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvmf4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvmf8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvmf2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvmf4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvmf2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv16qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv32qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv64qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv128qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv256qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv512qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv1024qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv2048qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv4096qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv16hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv32hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv64hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv128hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv256hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv512hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv1024hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv2048hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv16si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv32si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv64si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv128si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv256si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv512si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv1024si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv16di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv32di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv64di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv128di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv256di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv512di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm8qi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm4qi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm2qi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm1qi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvmf2qi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvmf4qi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvmf8qi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm8hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm4hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm2hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm1hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvmf2hi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvmf4hi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm8si_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm4si_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm2si_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm1si_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvmf2si_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv1qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv2qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv4qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv8qi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv16qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv32qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv64qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv128qi_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv256qi_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv512qi_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv1024qi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv2048qi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv4096qi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv1hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv2hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv4hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv8hi_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv16hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv32hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv64hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv128hi_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv256hi_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv512hi_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv1024hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv2048hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv1si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv2si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv4si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv8si_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv16si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv32si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv64si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv128si_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv256si_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv512si_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv1024si_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_rvvm8qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_rvvm4qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_rvvm2qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_rvvm1qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_rvvmf2qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_rvvmf4qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_rvvmf8qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_rvvm8hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_rvvm4hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_rvvm2hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_rvvm1hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_rvvmf2hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_rvvmf4hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_rvvm8si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_rvvm4si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_rvvm2si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_rvvm1si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_rvvmf2si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v1qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v2qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v4qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v8qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v16qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v32qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v64qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v128qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v256qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v512qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v1024qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v2048qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v4096qi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v1hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v2hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v4hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v8hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v16hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v32hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v64hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v128hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v256hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v512hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v1024hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v2048hi                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v1si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v2si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v4si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v8si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v16si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v32si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v64si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v128si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v256si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v512si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v1024si                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_rvvm8di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_rvvm4di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_rvvm2di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_rvvm1di                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v1di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v2di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v4di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v8di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v16di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v32di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v64di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v128di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v256di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_minus_vx_v512di                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm8di_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm4di_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm2di_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusrvvm1di_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv1di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv2di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv4di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv8di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv16di_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv32di_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv64di_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv128di_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv256di_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plusv512di_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm1qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm8hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm1hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm8si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm4si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm1si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm8di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm4di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm2di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm1di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvmf2qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvmf4qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvmf8qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvmf2hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvmf4hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvmf2si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv1qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv2qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv4qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv8qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv16qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv32qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv64qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv128qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv256qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv512qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv1024qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv2048qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv4096qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv1hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv2hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv4hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv8hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv16hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv32hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv64hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv128hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv256hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv512hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv1024hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv2048hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv1si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv2si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv4si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv8si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv16si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv32si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv64si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv128si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv256si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv512si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv1024si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv1di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv2di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv4di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv8di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv16di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv32di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv64di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv128di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv256di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv512di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm8qi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm4qi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm2qi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm1qi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvmf2qi_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvmf4qi_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvmf8qi_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm8hi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm4hi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm2hi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm1hi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvmf2hi_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvmf4hi_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm8si_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm4si_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm2si_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm1si_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvmf2si_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv1qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv2qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv4qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv8qi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv16qi_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv32qi_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv64qi_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv128qi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv256qi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv512qi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv1024qi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv2048qi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv4096qi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv1hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv2hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv4hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv8hi_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv16hi_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv32hi_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv64hi_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv128hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv256hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv512hi_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv1024hi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv2048hi_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv1si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv2si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv4si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv8si_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv16si_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv32si_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv64si_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv128si_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv256si_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv512si_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv1024si_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm8di_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm4di_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm2di_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulrvvm1di_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv1di_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv2di_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv4di_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv8di_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv16di_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv32di_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv64di_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv128di_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv256di_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_minus_mulv512di_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvm8hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvm8hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvm4hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvm4hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvm2hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvm2hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvm1hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvm1hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvmf2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvmf2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvmf4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvmf4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvm8sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvm8sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvm4sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvm4sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvm2sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvm2sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvm1sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvm1sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvmf2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvmf2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvm8df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvm8df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvm4df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvm4df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvm2df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvm2df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvm1df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvm1df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv1hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv1hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv8hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv8hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv16hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv16hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv32hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv32hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv64hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv64hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv128hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv128hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv256hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv256hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv512hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv512hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv1024hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv1024hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv2048hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv2048hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv1sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv1sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv4sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv4sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv8sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv8sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv16sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv16sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv32sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv32sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv64sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv64sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv128sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv128sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv256sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv256sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv512sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv512sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv1024sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv1024sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv1df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv1df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv2df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv2df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv4df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv4df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv8df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv8df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv16df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv16df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv32df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv32df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv64df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv64df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv128df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv128df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv256df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv256df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv512df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv512df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvm8hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvm8hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvm4hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvm4hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvm2hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvm2hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvm1hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvm1hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvmf2hf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvmf2hf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvmf4hf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvmf4hf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvm8sf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvm8sf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvm4sf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvm4sf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvm2sf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvm2sf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvm1sf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvm1sf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvmf2sf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvmf2sf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvm8df_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvm8df_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvm4df_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvm4df_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvm2df_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvm2df_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addrvvm1df_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subrvvm1df_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv1hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv1hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv2hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv2hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv4hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv4hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv8hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv8hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv16hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv16hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv32hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv32hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv64hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv64hf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv128hf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv128hf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv256hf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv256hf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv512hf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv512hf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv1024hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv1024hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv2048hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv2048hf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv1sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv1sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv2sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv2sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv4sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv4sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv8sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv8sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv16sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv16sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv32sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv32sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv64sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv64sf_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv128sf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv128sf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv256sf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv256sf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv512sf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv512sf_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv1024sf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv1024sf_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv1df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv1df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv2df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv2df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv4df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv4df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv8df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv8df_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv16df_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv16df_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv32df_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv32df_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv64df_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv64df_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv128df_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv128df_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv256df_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv256df_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_addv512df_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_subv512df_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvm8hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvm8hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvm4hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvm4hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvm2hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvm2hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvm1hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvm1hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvmf2hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvmf2hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvmf4hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvmf4hf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvm8sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvm8sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvm4sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvm4sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvm2sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvm2sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvm1sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvm1sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvmf2sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvmf2sf                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvm8df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvm8df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvm4df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvm4df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvm2df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvm2df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvm1df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvm1df                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv1hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv1hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv8hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv8hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv16hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv16hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv32hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv32hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv64hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv64hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv128hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv128hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv256hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv256hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv512hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv512hf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv1024hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv1024hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv2048hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv2048hf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv1sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv1sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv4sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv4sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv8sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv8sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv16sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv16sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv32sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv32sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv64sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv64sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv128sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv128sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv256sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv256sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv512sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv512sf                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv1024sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv1024sf                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv1df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv1df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv2df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv2df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv4df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv4df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv8df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv8df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv16df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv16df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv32df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv32df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv64df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv64df                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv128df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv128df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv256df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv256df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv512df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv512df                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvm8hf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvm8hf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvm4hf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvm4hf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvm2hf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvm2hf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvm1hf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvm1hf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvmf2hf_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvmf2hf_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvmf4hf_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvmf4hf_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvm8sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvm8sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvm4sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvm4sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvm2sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvm2sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvm1sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvm1sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvmf2sf_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvmf2sf_scalar                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvm8df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvm8df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvm4df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvm4df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvm2df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvm2df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addrvvm1df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subrvvm1df_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv1hf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv1hf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv2hf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv2hf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv4hf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv4hf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv8hf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv8hf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv16hf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv16hf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv32hf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv32hf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv64hf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv64hf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv128hf_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv128hf_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv256hf_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv256hf_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv512hf_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv512hf_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv1024hf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv1024hf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv2048hf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv2048hf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv1sf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv1sf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv2sf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv2sf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv4sf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv4sf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv8sf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv8sf_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv16sf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv16sf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv32sf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv32sf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv64sf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv64sf_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv128sf_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv128sf_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv256sf_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv256sf_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv512sf_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv512sf_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv1024sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv1024sf_scalar                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv1df_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv1df_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv2df_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv2df_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv4df_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv4df_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv8df_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv8df_scalar                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv16df_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv16df_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv32df_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv32df_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv64df_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv64df_scalar                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv128df_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv128df_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv256df_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv256df_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_addv512df_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_neg_subv512df_scalar                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm8hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm4hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm2hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm1hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvmf2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvmf4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm8sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm4sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm2sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm1sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvmf2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm8df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm4df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm2df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm1df                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv1hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv2hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv4hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv8hf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv16hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv32hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv64hf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv128hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv256hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv512hf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv1024hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv2048hf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv1sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv2sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv4sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv8sf                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv16sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv32sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv64sf                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv128sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv256sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv512sf                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv1024sf                                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv1df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv2df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv4df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv8df                                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv16df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv32df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv64df                                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv128df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv256df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv512df                                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm8hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm4hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm2hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm1hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvmf2hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvmf4hf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm8sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm4sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm2sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm1sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvmf2sf_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm8df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm4df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm2df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmprvvm1df_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv1hf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv2hf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv4hf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv8hf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv16hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv32hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv64hf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv128hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv256hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv512hf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv1024hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv2048hf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv1sf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv2sf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv4sf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv8sf_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv16sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv32sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv64sf_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv128sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv256sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv512sf_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv1024sf_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv1df_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv2df_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv4df_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv8df_scalar                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv16df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv32df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv64df_scalar                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv128df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv256df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_cmpv512df_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm8qi                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm4qi                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm2qi                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm1qi                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm8hi                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm4hi                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm2hi                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm1hi                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm8si                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm4si                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm2si                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm1si                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm8di                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm4di                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm2di                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm1di                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvmf2qi                     (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvmf4qi                     (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvmf8qi                     (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvmf2hi                     (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvmf4hi                     (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvmf2si                     (rtx, rtx);
extern rtx        gen_pred_extract_firstv1qi                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv2qi                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv4qi                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv8qi                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv16qi                        (rtx, rtx);
extern rtx        gen_pred_extract_firstv32qi                        (rtx, rtx);
extern rtx        gen_pred_extract_firstv64qi                        (rtx, rtx);
extern rtx        gen_pred_extract_firstv128qi                       (rtx, rtx);
extern rtx        gen_pred_extract_firstv256qi                       (rtx, rtx);
extern rtx        gen_pred_extract_firstv512qi                       (rtx, rtx);
extern rtx        gen_pred_extract_firstv1024qi                      (rtx, rtx);
extern rtx        gen_pred_extract_firstv2048qi                      (rtx, rtx);
extern rtx        gen_pred_extract_firstv4096qi                      (rtx, rtx);
extern rtx        gen_pred_extract_firstv1hi                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv2hi                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv4hi                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv8hi                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv16hi                        (rtx, rtx);
extern rtx        gen_pred_extract_firstv32hi                        (rtx, rtx);
extern rtx        gen_pred_extract_firstv64hi                        (rtx, rtx);
extern rtx        gen_pred_extract_firstv128hi                       (rtx, rtx);
extern rtx        gen_pred_extract_firstv256hi                       (rtx, rtx);
extern rtx        gen_pred_extract_firstv512hi                       (rtx, rtx);
extern rtx        gen_pred_extract_firstv1024hi                      (rtx, rtx);
extern rtx        gen_pred_extract_firstv2048hi                      (rtx, rtx);
extern rtx        gen_pred_extract_firstv1si                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv2si                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv4si                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv8si                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv16si                        (rtx, rtx);
extern rtx        gen_pred_extract_firstv32si                        (rtx, rtx);
extern rtx        gen_pred_extract_firstv64si                        (rtx, rtx);
extern rtx        gen_pred_extract_firstv128si                       (rtx, rtx);
extern rtx        gen_pred_extract_firstv256si                       (rtx, rtx);
extern rtx        gen_pred_extract_firstv512si                       (rtx, rtx);
extern rtx        gen_pred_extract_firstv1024si                      (rtx, rtx);
extern rtx        gen_pred_extract_firstv1di                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv2di                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv4di                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv8di                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv16di                        (rtx, rtx);
extern rtx        gen_pred_extract_firstv32di                        (rtx, rtx);
extern rtx        gen_pred_extract_firstv64di                        (rtx, rtx);
extern rtx        gen_pred_extract_firstv128di                       (rtx, rtx);
extern rtx        gen_pred_extract_firstv256di                       (rtx, rtx);
extern rtx        gen_pred_extract_firstv512di                       (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm8hf                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm4hf                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm2hf                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm1hf                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvmf2hf                     (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvmf4hf                     (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm8sf                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm4sf                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm2sf                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm1sf                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvmf2sf                     (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm8df                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm4df                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm2df                      (rtx, rtx);
extern rtx        gen_pred_extract_firstrvvm1df                      (rtx, rtx);
extern rtx        gen_pred_extract_firstv1hf                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv2hf                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv4hf                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv8hf                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv16hf                        (rtx, rtx);
extern rtx        gen_pred_extract_firstv32hf                        (rtx, rtx);
extern rtx        gen_pred_extract_firstv64hf                        (rtx, rtx);
extern rtx        gen_pred_extract_firstv128hf                       (rtx, rtx);
extern rtx        gen_pred_extract_firstv256hf                       (rtx, rtx);
extern rtx        gen_pred_extract_firstv512hf                       (rtx, rtx);
extern rtx        gen_pred_extract_firstv1024hf                      (rtx, rtx);
extern rtx        gen_pred_extract_firstv2048hf                      (rtx, rtx);
extern rtx        gen_pred_extract_firstv1sf                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv2sf                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv4sf                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv8sf                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv16sf                        (rtx, rtx);
extern rtx        gen_pred_extract_firstv32sf                        (rtx, rtx);
extern rtx        gen_pred_extract_firstv64sf                        (rtx, rtx);
extern rtx        gen_pred_extract_firstv128sf                       (rtx, rtx);
extern rtx        gen_pred_extract_firstv256sf                       (rtx, rtx);
extern rtx        gen_pred_extract_firstv512sf                       (rtx, rtx);
extern rtx        gen_pred_extract_firstv1024sf                      (rtx, rtx);
extern rtx        gen_pred_extract_firstv1df                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv2df                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv4df                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv8df                         (rtx, rtx);
extern rtx        gen_pred_extract_firstv16df                        (rtx, rtx);
extern rtx        gen_pred_extract_firstv32df                        (rtx, rtx);
extern rtx        gen_pred_extract_firstv64df                        (rtx, rtx);
extern rtx        gen_pred_extract_firstv128df                       (rtx, rtx);
extern rtx        gen_pred_extract_firstv256df                       (rtx, rtx);
extern rtx        gen_pred_extract_firstv512df                       (rtx, rtx);
extern rtx        gen_pred_slide1uprvvm8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm8di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm4di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm2di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1uprvvm1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downrvvm1di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv16di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv16di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv32di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv32di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv64di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv64di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv128di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv128di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv256di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv256di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1upv512di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_slide1downv512di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxrvvm8qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxrvvm4qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxrvvm2qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxrvvm1qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxrvvmf2qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxrvvmf4qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxrvvmf8qi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxrvvm8hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxrvvm4hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxrvvm2hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxrvvm1hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxrvvmf2hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxrvvmf4hi                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxrvvm8si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxrvvm4si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxrvvm2si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxrvvm1si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxrvvmf2si                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv16qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv32qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv64qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv128qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv256qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv512qi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv1024qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv2048qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv4096qi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv16hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv32hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv64hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv128hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv256hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv512hi                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv1024hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv2048hi                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv16si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv32si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv64si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv128si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv256si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv512si                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv1024si                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxrvvm8di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxrvvm4di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxrvvm2di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxrvvm1di                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv16di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv32di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv64di                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv128di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv256di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_mul_plus_vxv512di                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxrvvm8hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxrvvm4hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxrvvm2hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxrvvm1hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxrvvmf2hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxrvvmf4hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxrvvm8si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxrvvm4si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxrvvm2si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxrvvm1si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxrvvmf2si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxrvvm8di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxrvvm4di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxrvvm2di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxrvvm1di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv1hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv2hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv4hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv8hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv16hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv32hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv64hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv128hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv256hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv512hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv1024hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv2048hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv1si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv2si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv4si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv8si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv16si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv32si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv64si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv128si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv256si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv512si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv1024si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv1di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv2di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv4di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv8di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv16di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv32di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv64di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv128di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv256di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_widen_mul_plus_u_vxv512di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm8qirvvm1bi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm4qirvvmf2bi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm2qirvvmf4bi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm1qirvvmf8bi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm8hirvvmf2bi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm4hirvvmf4bi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm2hirvvmf8bi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm1hirvvmf16bi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm8sirvvmf4bi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm4sirvvmf8bi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm2sirvvmf16bi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm1sirvvmf32bi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm8dirvvmf8bi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm4dirvvmf16bi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm2dirvvmf32bi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm1dirvvmf64bi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvmf2qirvvmf16bi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvmf4qirvvmf32bi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvmf8qirvvmf64bi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvmf2hirvvmf32bi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvmf4hirvvmf64bi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvmf2sirvvmf64bi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm8hfrvvmf2bi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm4hfrvvmf4bi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm2hfrvvmf8bi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm1hfrvvmf16bi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvmf2hfrvvmf32bi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvmf4hfrvvmf64bi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm8sfrvvmf4bi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm4sfrvvmf8bi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm2sfrvvmf16bi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm1sfrvvmf32bi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvmf2sfrvvmf64bi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm8dfrvvmf8bi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm4dfrvvmf16bi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm2dfrvvmf32bi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm1dfrvvmf64bi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm8bfrvvmf2bi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm4bfrvvmf4bi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm2bfrvvmf8bi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvm1bfrvvmf16bi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvmf2bfrvvmf32bi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadrvvmf4bfrvvmf64bi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv1qiv1bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv2qiv2bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv4qiv4bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv8qiv8bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv16qiv16bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv32qiv32bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv64qiv64bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv128qiv128bi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv256qiv256bi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv512qiv512bi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv1024qiv1024bi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv2048qiv2048bi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv4096qiv4096bi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv1hiv1bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv2hiv2bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv4hiv4bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv8hiv8bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv16hiv16bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv32hiv32bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv64hiv64bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv128hiv128bi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv256hiv256bi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv512hiv512bi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv1024hiv1024bi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv2048hiv2048bi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv1siv1bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv2siv2bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv4siv4bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv8siv8bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv16siv16bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv32siv32bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv64siv64bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv128siv128bi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv256siv256bi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv512siv512bi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv1024siv1024bi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv1div1bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv2div2bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv4div4bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv8div8bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv16div16bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv32div32bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv64div64bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv128div128bi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv256div256bi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv512div512bi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv1hfv1bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv2hfv2bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv4hfv4bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv8hfv8bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv16hfv16bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv32hfv32bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv64hfv64bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv128hfv128bi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv256hfv256bi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv512hfv512bi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv1024hfv1024bi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv2048hfv2048bi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv1sfv1bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv2sfv2bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv4sfv4bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv8sfv8bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv16sfv16bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv32sfv32bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv64sfv64bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv128sfv128bi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv256sfv256bi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv512sfv512bi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv1024sfv1024bi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv1dfv1bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv2dfv2bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv4dfv4bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv8dfv8bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv16dfv16bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv32dfv32bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv64dfv64bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv128dfv128bi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv256dfv256bi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv512dfv512bi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv1bfv1bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv2bfv2bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv4bfv4bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv8bfv8bi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv16bfv16bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv32bfv32bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv64bfv64bi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv128bfv128bi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv256bfv256bi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv512bfv512bi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv1024bfv1024bi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_loadv2048bfv2048bi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm8qirvvm1bi                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm4qirvvmf2bi                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm2qirvvmf4bi                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm1qirvvmf8bi                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm8hirvvmf2bi                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm4hirvvmf4bi                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm2hirvvmf8bi                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm1hirvvmf16bi                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm8sirvvmf4bi                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm4sirvvmf8bi                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm2sirvvmf16bi                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm1sirvvmf32bi                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm8dirvvmf8bi                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm4dirvvmf16bi                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm2dirvvmf32bi                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm1dirvvmf64bi                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvmf2qirvvmf16bi                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvmf4qirvvmf32bi                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvmf8qirvvmf64bi                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvmf2hirvvmf32bi                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvmf4hirvvmf64bi                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvmf2sirvvmf64bi                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm8hfrvvmf2bi                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm4hfrvvmf4bi                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm2hfrvvmf8bi                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm1hfrvvmf16bi                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvmf2hfrvvmf32bi                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvmf4hfrvvmf64bi                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm8sfrvvmf4bi                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm4sfrvvmf8bi                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm2sfrvvmf16bi                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm1sfrvvmf32bi                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvmf2sfrvvmf64bi                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm8dfrvvmf8bi                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm4dfrvvmf16bi                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm2dfrvvmf32bi                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm1dfrvvmf64bi                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm8bfrvvmf2bi                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm4bfrvvmf4bi                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm2bfrvvmf8bi                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvm1bfrvvmf16bi                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvmf2bfrvvmf32bi                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storervvmf4bfrvvmf64bi                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev1qiv1bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev2qiv2bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev4qiv4bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev8qiv8bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev16qiv16bi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev32qiv32bi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev64qiv64bi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev128qiv128bi                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev256qiv256bi                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev512qiv512bi                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev1024qiv1024bi                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev2048qiv2048bi                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev4096qiv4096bi                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev1hiv1bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev2hiv2bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev4hiv4bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev8hiv8bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev16hiv16bi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev32hiv32bi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev64hiv64bi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev128hiv128bi                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev256hiv256bi                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev512hiv512bi                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev1024hiv1024bi                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev2048hiv2048bi                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev1siv1bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev2siv2bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev4siv4bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev8siv8bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev16siv16bi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev32siv32bi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev64siv64bi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev128siv128bi                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev256siv256bi                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev512siv512bi                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev1024siv1024bi                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev1div1bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev2div2bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev4div4bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev8div8bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev16div16bi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev32div32bi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev64div64bi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev128div128bi                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev256div256bi                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev512div512bi                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev1hfv1bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev2hfv2bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev4hfv4bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev8hfv8bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev16hfv16bi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev32hfv32bi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev64hfv64bi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev128hfv128bi                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev256hfv256bi                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev512hfv512bi                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev1024hfv1024bi                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev2048hfv2048bi                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev1sfv1bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev2sfv2bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev4sfv4bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev8sfv8bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev16sfv16bi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev32sfv32bi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev64sfv64bi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev128sfv128bi                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev256sfv256bi                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev512sfv512bi                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev1024sfv1024bi                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev1dfv1bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev2dfv2bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev4dfv4bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev8dfv8bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev16dfv16bi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev32dfv32bi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev64dfv64bi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev128dfv128bi                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev256dfv256bi                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev512dfv512bi                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev1bfv1bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev2bfv2bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev4bfv4bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev8bfv8bi                         (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev16bfv16bi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev32bfv32bi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev64bfv64bi                       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev128bfv128bi                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev256bfv256bi                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev512bfv512bi                     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev1024bfv1024bi                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_storev2048bfv2048bi                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm8qirvvm8qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4qirvvm4qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2qirvvm2qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1qirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf2qirvvmf2qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf4qirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf8qirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm8hirvvm8hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4hirvvm4hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2hirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1hirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf2hirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf4hirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm8sirvvm8si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4sirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2sirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1sirvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf2sirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm8dirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4dirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2dirvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1dirvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm8bfrvvm8hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4bfrvvm4hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2bfrvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1bfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf2bfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf4bfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm8hfrvvm8hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4hfrvvm4hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2hfrvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1hfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf2hfrvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf4hfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm8sfrvvm8si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4sfrvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2sfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1sfrvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf2sfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm8dfrvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4dfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2dfrvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1dfrvvm1di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1qiv1qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2qiv2qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4qiv4qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8qiv8qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16qiv16qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32qiv32qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64qiv64qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128qiv128qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256qiv256qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512qiv512qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1024qiv1024qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2048qiv2048qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4096qiv4096qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1hiv1hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2hiv2hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4hiv4hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8hiv8hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16hiv16hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32hiv32hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64hiv64hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128hiv128hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256hiv256hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512hiv512hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1024hiv1024hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2048hiv2048hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1siv1si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2siv2si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4siv4si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8siV8SI                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16siv16si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32siv32si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64siv64si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128siv128si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256siv256si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512siv512si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1024siv1024si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1div1di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2div2di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4div4di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8div8di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16div16di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32div32di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64div64di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128div128di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256div256di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512div512di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1hfv1hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2hfv2hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4hfv4hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8hfv8hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16hfv16hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32hfv32hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64hfv64hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128hfv128hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256hfv256hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512hfv512hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1024hfv1024hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2048hfv2048hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1bfv1hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2bfv2hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4bfv4hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8bfv8hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16bfv16hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32bfv32hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64bfv64hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128bfv128hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256bfv256hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512bfv512hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1024bfv1024hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2048bfv2048hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1sfv1si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2sfv2si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4sfv4si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8sfv8si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16sfv16si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32sfv32si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64sfv64si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128sfv128si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256sfv256si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512sfv512si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1024sfv1024si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1dfv1di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2dfv2di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4dfv4di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8dfv8di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16dfv16di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32dfv32di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64dfv64di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128dfv128di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256dfv256di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512dfv512di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm8hirvvm4qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4hirvvm2qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2hirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1hirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf2hirvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf4hirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm8bfrvvm4qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4bfrvvm2qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2bfrvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1bfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf2bfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf4bfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm8hfrvvm4qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4hfrvvm2qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2hfrvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1hfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf2hfrvvmf4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf4hfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm8sirvvm4hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4sirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2sirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1sirvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf2sirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm8sfrvvm4hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4sfrvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2sfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1sfrvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf2sfrvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm8dirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4dirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2dirvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1dirvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm8dfrvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4dfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2dfrvvm1si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1dfrvvmf2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1hiv1qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2hiv2qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4hiv4qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8hiv8qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16hiv16qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32hiv32qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64hiv64qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128hiv128qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256hiv256qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512hiv512qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1024hiv1024qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1siv1hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2siv2hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4siv4hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8siv8hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16siv16hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32siv32hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64siv64hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128siv128hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256siv256hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512siv512hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1024siv1024hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1div1si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2div2si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4div4si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8div8si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16div16si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32div32si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64div64si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128div128si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256div256si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512div512si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1hfv1qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2hfv2qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4hfv4qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8hfv8qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16hfv16qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32hfv32qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64hfv64qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128hfv128qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256hfv256qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512hfv512qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1024hfv1024qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2048hfv2048qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1bfv1qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2bfv2qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4bfv4qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8bfv8qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16bfv16qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32bfv32qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64bfv64qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128bfv128qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256bfv256qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512bfv512qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1024bfv1024qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2048bfv2048qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1sfv1hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2sfv2hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4sfv4hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8sfv8hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16sfv16hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32sfv32hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64sfv64hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128sfv128hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256sfv256hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512sfv512hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1024sfv1024hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1dfv1si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2dfv2si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4dfv4si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8dfv8si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16dfv16si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32dfv32si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64dfv64si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128dfv128si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256dfv256si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512dfv512si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm8sirvvm2qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4sirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2sirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1sirvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf2sirvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm8sfrvvm2qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4sfrvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2sfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1sfrvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf2sfrvvmf8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm8dirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4dirvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2dirvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1dirvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm8dfrvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4dfrvvm1hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2dfrvvmf2hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1dfrvvmf4hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1siv1qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2siv2qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4siv4qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8siv8qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16siv16qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32siv32qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64siv64qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128siv128qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256siv256qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512siv512qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1024siv1024qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1div1hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2div2hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4div4hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8div8hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16div16hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32div32hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64div64hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128div128hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256div256hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512div512hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1sfv1qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2sfv2qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4sfv4qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8sfv8qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16sfv16qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32sfv32qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64sfv64qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128sfv128qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256sfv256qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512sfv512qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1024sfv512qi              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1dfv1hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2dfv2hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4dfv4hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8dfv8hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16dfv16hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32dfv32hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64dfv64hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128dfv128hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256dfv256hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512dfv512hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm8dirvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4dirvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2dirvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1dirvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm8dfrvvm1qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4dfrvvmf2qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2dfrvvmf4qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1dfrvvmf8qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1div1qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2div2qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4div4qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8div8qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16div16qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32div32qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64div64qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128div128qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256div256qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512div512qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1dfv1qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2dfv2qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4dfv4qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8dfv8qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16dfv16qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32dfv32qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64dfv64qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128dfv128qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256dfv256qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512dfv512qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4qirvvm8hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2qirvvm4hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1qirvvm2hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf2qirvvm1hi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf4qirvvmf2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf8qirvvmf4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4hirvvm8si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2hirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1hirvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf2hirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf4hirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4bfrvvm8si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2bfrvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1bfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf2bfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf4bfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4hfrvvm8si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2hfrvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1hfrvvm2si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf2hfrvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf4hfrvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4sirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2sirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1sirvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf2sirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm4sfrvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2sfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1sfrvvm2di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf2sfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1qiv1hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2qiv2hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4qiv4hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8qiv8hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16qiv16hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32qiv32hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64qiv64hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128qiv128hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256qiv256hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512qiv512hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1024qiv1024hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2048qiv2048hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1hiv1si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2hiv2si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4hiv4si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8hiv8si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16hiv16si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32hiv32si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64hiv64si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128hiv128si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256hiv256si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512hiv512si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1024hiv1024si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1siv1di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2siv2di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4siv4di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8siv8di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16siv16di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32siv32di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64siv64di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128siv128di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256siv256di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512siv512di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1hfv1si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2hfv2si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4hfv4si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8hfv8si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16hfv16si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32hfv32si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64hfv64si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128hfv128si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256hfv256si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512hfv512si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1024hfv1024si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1bfv1si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2bfv2si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4bfv4si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8bfv8si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16bfv16si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32bfv32si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64bfv64si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128bfv128si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256bfv256si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512bfv512si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1024bfv1024si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1sfv1di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2sfv2di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4sfv4di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8sfv8di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16sfv16di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32sfv32di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64sfv64di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128sfv128di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256sfv256di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512sfv512di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2qirvvm8si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1qirvvm4si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf2qirvvm2si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf4qirvvm1si            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf8qirvvmf2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2hirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1hirvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf2hirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf4hirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2bfrvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1bfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf2bfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf4bfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm2hfrvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1hfrvvm4di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf2hfrvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf4hfrvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1qiv1si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2qiv2si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4qiv4si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8qiv8si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16qiv16si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32qiv32si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64qiv64si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128qiv128si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256qiv256si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512qiv512si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1024qiv1024si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1hiv1di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2hiv2di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4hiv4di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8hiv8di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16hiv16di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32hiv32di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64hiv64di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128hiv1d8di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256hiv256di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512hiv512di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1hfv1di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2hfv2di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4hfv4di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8hfv8di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16hfv16di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32hfv32di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64hfv64di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128hfv128di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256hfv256di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512hfv512di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1bfv1di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2bfv2di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4bfv4di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8bfv8di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16bfv16di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32bfv32di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64bfv64di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128bfv128di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256bfv256di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512bfv512di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvm1qirvvm8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf2qirvvm4di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf4qirvvm2di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadrvvmf8qirvvm1di            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv1qiv1di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv2qiv2di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv4qiv4di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv8qiv8di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv16qiv16di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv32qiv32di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv64qiv64di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv128qiv128di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv256qiv256di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_gather_loadv512qiv512di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm8qirvvm8qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4qirvvm4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2qirvvm2qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1qirvvm1qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf2qirvvmf2qi         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf4qirvvmf4qi         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf8qirvvmf8qi         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm8hirvvm8hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4hirvvm4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2hirvvm2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1hirvvm1hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf2hirvvmf2hi         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf4hirvvmf4hi         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm8sirvvm8si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4sirvvm4si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2sirvvm2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1sirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf2sirvvmf2si         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm8dirvvm8di           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4dirvvm4di           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2dirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1dirvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm8bfrvvm8hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4bfrvvm4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2bfrvvm2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1bfrvvm1hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf2bfrvvmf2hi         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf4bfrvvmf4hi         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm8hfrvvm8hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4hfrvvm4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2hfrvvm2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1hfrvvm1hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf2hfrvvmf2hi         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf4hfrvvmf4hi         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm8sfrvvm8si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4sfrvvm4si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2sfrvvm2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1sfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf2sfrvvmf2si         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm8dfrvvm8di           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4dfrvvm4di           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2dfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1dfrvvm1di           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1qiv1qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2qiv2qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4qiv4qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8qiv8qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16qiv16qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32qiv32qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64qiv64qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128qiv128qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256qiv256qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512qiv512qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1024qiv1024qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2048qiv2048qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4096qiv4096qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1hiv1hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2hiv2hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4hiv4hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8hiv8hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16hiv16hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32hiv32hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64hiv64hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128hiv128hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256hiv256hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512hiv512hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1024hiv1024hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2048hiv2048hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1siv1si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2siv2si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4siv4si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8siV8SI                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16siv16si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32siv32si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64siv64si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128siv128si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256siv256si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512siv512si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1024siv1024si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1div1di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2div2di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4div4di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8div8di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16div16di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32div32di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64div64di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128div128di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256div256di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512div512di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1hfv1hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2hfv2hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4hfv4hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8hfv8hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16hfv16hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32hfv32hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64hfv64hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128hfv128hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256hfv256hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512hfv512hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1024hfv1024hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2048hfv2048hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1bfv1hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2bfv2hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4bfv4hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8bfv8hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16bfv16hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32bfv32hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64bfv64hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128bfv128hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256bfv256hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512bfv512hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1024bfv1024hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2048bfv2048hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1sfv1si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2sfv2si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4sfv4si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8sfv8si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16sfv16si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32sfv32si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64sfv64si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128sfv128si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256sfv256si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512sfv512si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1024sfv1024si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1dfv1di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2dfv2di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4dfv4di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8dfv8di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16dfv16di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32dfv32di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64dfv64di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128dfv128di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256dfv256di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512dfv512di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm8hirvvm4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4hirvvm2qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2hirvvm1qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1hirvvmf2qi          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf2hirvvmf4qi         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf4hirvvmf8qi         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm8bfrvvm4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4bfrvvm2qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2bfrvvm1qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1bfrvvmf2qi          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf2bfrvvmf4qi         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf4bfrvvmf8qi         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm8hfrvvm4qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4hfrvvm2qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2hfrvvm1qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1hfrvvmf2qi          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf2hfrvvmf4qi         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf4hfrvvmf8qi         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm8sirvvm4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4sirvvm2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2sirvvm1hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1sirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf2sirvvmf4hi         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm8sfrvvm4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4sfrvvm2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2sfrvvm1hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1sfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf2sfrvvmf4hi         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm8dirvvm4si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4dirvvm2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2dirvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1dirvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm8dfrvvm4si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4dfrvvm2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2dfrvvm1si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1dfrvvmf2si          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1hiv1qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2hiv2qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4hiv4qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8hiv8qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16hiv16qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32hiv32qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64hiv64qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128hiv128qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256hiv256qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512hiv512qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1024hiv1024qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1siv1hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2siv2hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4siv4hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8siv8hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16siv16hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32siv32hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64siv64hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128siv128hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256siv256hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512siv512hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1024siv1024hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1div1si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2div2si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4div4si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8div8si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16div16si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32div32si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64div64si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128div128si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256div256si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512div512si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1hfv1qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2hfv2qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4hfv4qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8hfv8qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16hfv16qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32hfv32qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64hfv64qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128hfv128qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256hfv256qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512hfv512qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1024hfv1024qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2048hfv2048qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1bfv1qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2bfv2qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4bfv4qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8bfv8qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16bfv16qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32bfv32qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64bfv64qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128bfv128qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256bfv256qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512bfv512qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1024bfv1024qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2048bfv2048qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1sfv1hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2sfv2hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4sfv4hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8sfv8hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16sfv16hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32sfv32hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64sfv64hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128sfv128hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256sfv256hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512sfv512hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1024sfv1024hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1dfv1si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2dfv2si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4dfv4si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8dfv8si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16dfv16si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32dfv32si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64dfv64si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128dfv128si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256dfv256si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512dfv512si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm8sirvvm2qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4sirvvm1qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2sirvvmf2qi          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1sirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf2sirvvmf8qi         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm8sfrvvm2qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4sfrvvm1qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2sfrvvmf2qi          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1sfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf2sfrvvmf8qi         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm8dirvvm2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4dirvvm1hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2dirvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1dirvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm8dfrvvm2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4dfrvvm1hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2dfrvvmf2hi          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1dfrvvmf4hi          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1siv1qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2siv2qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4siv4qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8siv8qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16siv16qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32siv32qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64siv64qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128siv128qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256siv256qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512siv512qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1024siv1024qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1div1hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2div2hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4div4hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8div8hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16div16hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32div32hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64div64hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128div128hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256div256hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512div512hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1sfv1qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2sfv2qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4sfv4qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8sfv8qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16sfv16qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32sfv32qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64sfv64qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128sfv128qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256sfv256qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512sfv512qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1024sfv512qi            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1dfv1hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2dfv2hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4dfv4hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8dfv8hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16dfv16hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32dfv32hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64dfv64hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128dfv128hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256dfv256hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512dfv512hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm8dirvvm1qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4dirvvmf2qi          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2dirvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1dirvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm8dfrvvm1qi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4dfrvvmf2qi          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2dfrvvmf4qi          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1dfrvvmf8qi          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1div1qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2div2qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4div4qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8div8qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16div16qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32div32qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64div64qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128div128qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256div256qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512div512qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1dfv1qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2dfv2qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4dfv4qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8dfv8qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16dfv16qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32dfv32qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64dfv64qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128dfv128qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256dfv256qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512dfv512qi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4qirvvm8hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2qirvvm4hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1qirvvm2hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf2qirvvm1hi          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf4qirvvmf2hi         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf8qirvvmf4hi         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4hirvvm8si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2hirvvm4si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1hirvvm2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf2hirvvm1si          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf4hirvvmf2si         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4bfrvvm8si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2bfrvvm4si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1bfrvvm2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf2bfrvvm1si          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf4bfrvvmf2si         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4hfrvvm8si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2hfrvvm4si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1hfrvvm2si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf2hfrvvm1si          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf4hfrvvmf2si         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4sirvvm8di           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2sirvvm4di           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1sirvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf2sirvvm1di          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm4sfrvvm8di           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2sfrvvm4di           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1sfrvvm2di           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf2sfrvvm1di          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1qiv1hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2qiv2hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4qiv4hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8qiv8hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16qiv16hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32qiv32hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64qiv64hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128qiv128hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256qiv256hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512qiv512hi             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1024qiv1024hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2048qiv2048hi           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1hiv1si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2hiv2si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4hiv4si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8hiv8si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16hiv16si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32hiv32si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64hiv64si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128hiv128si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256hiv256si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512hiv512si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1024hiv1024si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1siv1di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2siv2di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4siv4di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8siv8di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16siv16di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32siv32di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64siv64di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128siv128di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256siv256di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512siv512di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1hfv1si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2hfv2si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4hfv4si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8hfv8si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16hfv16si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32hfv32si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64hfv64si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128hfv128si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256hfv256si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512hfv512si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1024hfv1024si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1bfv1si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2bfv2si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4bfv4si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8bfv8si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16bfv16si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32bfv32si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64bfv64si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128bfv128si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256bfv256si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512bfv512si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1024bfv1024si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1sfv1di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2sfv2di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4sfv4di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8sfv8di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16sfv16di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32sfv32di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64sfv64di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128sfv128di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256sfv256di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512sfv512di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2qirvvm8si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1qirvvm4si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf2qirvvm2si          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf4qirvvm1si          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf8qirvvmf2si         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2hirvvm8di           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1hirvvm4di           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf2hirvvm2di          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf4hirvvm1di          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2bfrvvm8di           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1bfrvvm4di           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf2bfrvvm2di          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf4bfrvvm1di          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm2hfrvvm8di           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1hfrvvm4di           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf2hfrvvm2di          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf4hfrvvm1di          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1qiv1si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2qiv2si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4qiv4si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8qiv8si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16qiv16si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32qiv32si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64qiv64si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128qiv128si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256qiv256si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512qiv512si             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1024qiv1024si           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1hiv1di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2hiv2di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4hiv4di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8hiv8di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16hiv16di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32hiv32di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64hiv64di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128hiv1d8di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256hiv256di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512hiv512di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1hfv1di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2hfv2di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4hfv4di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8hfv8di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16hfv16di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32hfv32di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64hfv64di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128hfv128di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256hfv256di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512hfv512di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1bfv1di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2bfv2di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4bfv4di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8bfv8di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16bfv16di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32bfv32di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64bfv64di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128bfv128di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256bfv256di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512bfv512di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvm1qirvvm8di           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf2qirvvm4di          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf4qirvvm2di          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storervvmf8qirvvm1di          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev1qiv1di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev2qiv2di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev4qiv4di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev8qiv8di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev16qiv16di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev32qiv32di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev64qiv64di               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev128qiv128di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev256qiv256di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_scatter_storev512qiv512di             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf8x2qirvvmf8qi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf8x3qirvvmf8qi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf8x4qirvvmf8qi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf8x5qirvvmf8qi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf8x6qirvvmf8qi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf8x7qirvvmf8qi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf8x8qirvvmf8qi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x2hirvvmf4hi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x3hirvvmf4hi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x4hirvvmf4hi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x5hirvvmf4hi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x6hirvvmf4hi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x7hirvvmf4hi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x8hirvvmf4hi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x2sirvvmf2si      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x3sirvvmf2si      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x4sirvvmf2si      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x5sirvvmf2si      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x6sirvvmf2si      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x7sirvvmf2si      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x8sirvvmf2si      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x2dirvvm1di        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x3dirvvm1di        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x4dirvvm1di        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x5dirvvm1di        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x6dirvvm1di        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x7dirvvm1di        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x8dirvvm1di        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x2bfrvvmf4bf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x3bfrvvmf4bf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x4bfrvvmf4bf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x5bfrvvmf4bf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x6bfrvvmf4bf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x7bfrvvmf4bf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x8bfrvvmf4bf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x2hfrvvmf4hf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x3hfrvvmf4hf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x4hfrvvmf4hf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x5hfrvvmf4hf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x6hfrvvmf4hf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x7hfrvvmf4hf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x8hfrvvmf4hf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x2sfrvvmf2sf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x3sfrvvmf2sf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x4sfrvvmf2sf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x5sfrvvmf2sf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x6sfrvvmf2sf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x7sfrvvmf2sf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x8sfrvvmf2sf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x2dfrvvm1df        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x3dfrvvm1df        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x4dfrvvm1df        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x5dfrvvm1df        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x6dfrvvm1df        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x7dfrvvm1df        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x8dfrvvm1df        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x2qirvvmf4qi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x3qirvvmf4qi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x4qirvvmf4qi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x5qirvvmf4qi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x6qirvvmf4qi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x7qirvvmf4qi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf4x8qirvvmf4qi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x2hirvvmf2hi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x3hirvvmf2hi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x4hirvvmf2hi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x5hirvvmf2hi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x6hirvvmf2hi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x7hirvvmf2hi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x8hirvvmf2hi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x2sirvvm1si        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x3sirvvm1si        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x4sirvvm1si        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x5sirvvm1si        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x6sirvvm1si        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x7sirvvm1si        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x8sirvvm1si        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm2x2dirvvm2di        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm2x3dirvvm2di        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm2x4dirvvm2di        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x2bfrvvmf2bf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x3bfrvvmf2bf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x4bfrvvmf2bf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x5bfrvvmf2bf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x6bfrvvmf2bf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x7bfrvvmf2bf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x8bfrvvmf2bf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x2hfrvvmf2hf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x3hfrvvmf2hf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x4hfrvvmf2hf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x5hfrvvmf2hf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x6hfrvvmf2hf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x7hfrvvmf2hf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x8hfrvvmf2hf      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x2sfrvvm1sf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x3sfrvvm1sf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x4sfrvvm1sf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x5sfrvvm1sf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x6sfrvvm1sf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x7sfrvvm1sf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x8sfrvvm1sf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm2x2dfrvvm2df        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm2x3dfrvvm2df        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm2x4dfrvvm2df        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x2qirvvmf2qi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x3qirvvmf2qi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x4qirvvmf2qi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x5qirvvmf2qi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x6qirvvmf2qi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x7qirvvmf2qi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvmf2x8qirvvmf2qi      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x2hirvvm1hi        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x3hirvvm1hi        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x4hirvvm1hi        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x5hirvvm1hi        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x6hirvvm1hi        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x7hirvvm1hi        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x8hirvvm1hi        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm2x2sirvvm2si        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm2x3sirvvm2si        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm2x4sirvvm2si        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm4x2dirvvm4di        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x2bfrvvm1bf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x3bfrvvm1bf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x4bfrvvm1bf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x5bfrvvm1bf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x6bfrvvm1bf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x7bfrvvm1bf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x8bfrvvm1bf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x2hfrvvm1hf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x3hfrvvm1hf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x4hfrvvm1hf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x5hfrvvm1hf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x6hfrvvm1hf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x7hfrvvm1hf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x8hfrvvm1hf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm2x2sfrvvm2sf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm2x3sfrvvm2sf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm2x4sfrvvm2sf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm4x2dfrvvm4df        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x2qirvvm1qi        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x3qirvvm1qi        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x4qirvvm1qi        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x5qirvvm1qi        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x6qirvvm1qi        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x7qirvvm1qi        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm1x8qirvvm1qi        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm2x2hirvvm2hi        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm2x3hirvvm2hi        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm2x4hirvvm2hi        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm4x2sirvvm4si        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm2x2bfrvvm2bf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm2x3bfrvvm2bf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm2x4bfrvvm2bf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm2x2hfrvvm2hf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm2x3hfrvvm2hf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm2x4hfrvvm2hf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm4x2sfrvvm4sf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm2x2qirvvm2qi        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm2x3qirvvm2qi        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm2x4qirvvm2qi        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm4x2hirvvm4hi        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm4x2bfrvvm4bf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm4x2hfrvvm4hf        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_load_lanesrvvm4x2qirvvm4qi        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf8x2qirvvmf8qi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf8x3qirvvmf8qi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf8x4qirvvmf8qi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf8x5qirvvmf8qi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf8x6qirvvmf8qi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf8x7qirvvmf8qi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf8x8qirvvmf8qi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x2hirvvmf4hi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x3hirvvmf4hi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x4hirvvmf4hi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x5hirvvmf4hi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x6hirvvmf4hi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x7hirvvmf4hi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x8hirvvmf4hi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x2sirvvmf2si     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x3sirvvmf2si     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x4sirvvmf2si     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x5sirvvmf2si     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x6sirvvmf2si     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x7sirvvmf2si     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x8sirvvmf2si     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x2dirvvm1di       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x3dirvvm1di       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x4dirvvm1di       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x5dirvvm1di       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x6dirvvm1di       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x7dirvvm1di       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x8dirvvm1di       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x2bfrvvmf4bf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x3bfrvvmf4bf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x4bfrvvmf4bf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x5bfrvvmf4bf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x6bfrvvmf4bf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x7bfrvvmf4bf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x8bfrvvmf4bf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x2hfrvvmf4hf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x3hfrvvmf4hf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x4hfrvvmf4hf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x5hfrvvmf4hf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x6hfrvvmf4hf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x7hfrvvmf4hf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x8hfrvvmf4hf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x2sfrvvmf2sf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x3sfrvvmf2sf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x4sfrvvmf2sf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x5sfrvvmf2sf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x6sfrvvmf2sf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x7sfrvvmf2sf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x8sfrvvmf2sf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x2dfrvvm1df       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x3dfrvvm1df       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x4dfrvvm1df       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x5dfrvvm1df       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x6dfrvvm1df       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x7dfrvvm1df       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x8dfrvvm1df       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x2qirvvmf4qi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x3qirvvmf4qi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x4qirvvmf4qi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x5qirvvmf4qi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x6qirvvmf4qi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x7qirvvmf4qi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf4x8qirvvmf4qi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x2hirvvmf2hi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x3hirvvmf2hi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x4hirvvmf2hi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x5hirvvmf2hi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x6hirvvmf2hi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x7hirvvmf2hi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x8hirvvmf2hi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x2sirvvm1si       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x3sirvvm1si       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x4sirvvm1si       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x5sirvvm1si       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x6sirvvm1si       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x7sirvvm1si       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x8sirvvm1si       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm2x2dirvvm2di       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm2x3dirvvm2di       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm2x4dirvvm2di       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x2bfrvvmf2bf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x3bfrvvmf2bf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x4bfrvvmf2bf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x5bfrvvmf2bf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x6bfrvvmf2bf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x7bfrvvmf2bf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x8bfrvvmf2bf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x2hfrvvmf2hf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x3hfrvvmf2hf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x4hfrvvmf2hf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x5hfrvvmf2hf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x6hfrvvmf2hf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x7hfrvvmf2hf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x8hfrvvmf2hf     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x2sfrvvm1sf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x3sfrvvm1sf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x4sfrvvm1sf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x5sfrvvm1sf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x6sfrvvm1sf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x7sfrvvm1sf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x8sfrvvm1sf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm2x2dfrvvm2df       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm2x3dfrvvm2df       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm2x4dfrvvm2df       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x2qirvvmf2qi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x3qirvvmf2qi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x4qirvvmf2qi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x5qirvvmf2qi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x6qirvvmf2qi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x7qirvvmf2qi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvmf2x8qirvvmf2qi     (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x2hirvvm1hi       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x3hirvvm1hi       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x4hirvvm1hi       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x5hirvvm1hi       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x6hirvvm1hi       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x7hirvvm1hi       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x8hirvvm1hi       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm2x2sirvvm2si       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm2x3sirvvm2si       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm2x4sirvvm2si       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm4x2dirvvm4di       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x2bfrvvm1bf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x3bfrvvm1bf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x4bfrvvm1bf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x5bfrvvm1bf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x6bfrvvm1bf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x7bfrvvm1bf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x8bfrvvm1bf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x2hfrvvm1hf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x3hfrvvm1hf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x4hfrvvm1hf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x5hfrvvm1hf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x6hfrvvm1hf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x7hfrvvm1hf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x8hfrvvm1hf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm2x2sfrvvm2sf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm2x3sfrvvm2sf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm2x4sfrvvm2sf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm4x2dfrvvm4df       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x2qirvvm1qi       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x3qirvvm1qi       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x4qirvvm1qi       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x5qirvvm1qi       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x6qirvvm1qi       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x7qirvvm1qi       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm1x8qirvvm1qi       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm2x2hirvvm2hi       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm2x3hirvvm2hi       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm2x4hirvvm2hi       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm4x2sirvvm4si       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm2x2bfrvvm2bf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm2x3bfrvvm2bf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm2x4bfrvvm2bf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm2x2hfrvvm2hf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm2x3hfrvvm2hf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm2x4hfrvvm2hf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm4x2sfrvvm4sf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm2x2qirvvm2qi       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm2x3qirvvm2qi       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm2x4qirvvm2qi       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm4x2hirvvm4hi       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm4x2bfrvvm4bf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm4x2hfrvvm4hf       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_mask_len_store_lanesrvvm4x2qirvvm4qi       (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vec_duplicatervvmf64bi                         (rtx, rtx);
extern rtx        gen_vec_duplicatervvmf32bi                         (rtx, rtx);
extern rtx        gen_vec_duplicatervvmf16bi                         (rtx, rtx);
extern rtx        gen_vec_duplicatervvmf8bi                          (rtx, rtx);
extern rtx        gen_vec_duplicatervvmf4bi                          (rtx, rtx);
extern rtx        gen_vec_duplicatervvmf2bi                          (rtx, rtx);
extern rtx        gen_vec_duplicatervvm1bi                           (rtx, rtx);
extern rtx        gen_vec_seriesrvvm8qi                              (rtx, rtx, rtx);
extern rtx        gen_vec_seriesrvvm4qi                              (rtx, rtx, rtx);
extern rtx        gen_vec_seriesrvvm2qi                              (rtx, rtx, rtx);
extern rtx        gen_vec_seriesrvvm1qi                              (rtx, rtx, rtx);
extern rtx        gen_vec_seriesrvvm8hi                              (rtx, rtx, rtx);
extern rtx        gen_vec_seriesrvvm4hi                              (rtx, rtx, rtx);
extern rtx        gen_vec_seriesrvvm2hi                              (rtx, rtx, rtx);
extern rtx        gen_vec_seriesrvvm1hi                              (rtx, rtx, rtx);
extern rtx        gen_vec_seriesrvvm8si                              (rtx, rtx, rtx);
extern rtx        gen_vec_seriesrvvm4si                              (rtx, rtx, rtx);
extern rtx        gen_vec_seriesrvvm2si                              (rtx, rtx, rtx);
extern rtx        gen_vec_seriesrvvm1si                              (rtx, rtx, rtx);
extern rtx        gen_vec_seriesrvvm8di                              (rtx, rtx, rtx);
extern rtx        gen_vec_seriesrvvm4di                              (rtx, rtx, rtx);
extern rtx        gen_vec_seriesrvvm2di                              (rtx, rtx, rtx);
extern rtx        gen_vec_seriesrvvm1di                              (rtx, rtx, rtx);
extern rtx        gen_vec_seriesrvvmf2qi                             (rtx, rtx, rtx);
extern rtx        gen_vec_seriesrvvmf4qi                             (rtx, rtx, rtx);
extern rtx        gen_vec_seriesrvvmf8qi                             (rtx, rtx, rtx);
extern rtx        gen_vec_seriesrvvmf2hi                             (rtx, rtx, rtx);
extern rtx        gen_vec_seriesrvvmf4hi                             (rtx, rtx, rtx);
extern rtx        gen_vec_seriesrvvmf2si                             (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv1qi                                 (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv2qi                                 (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv4qi                                 (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv8qi                                 (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv16qi                                (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv32qi                                (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv64qi                                (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv128qi                               (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv256qi                               (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv512qi                               (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv1024qi                              (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv2048qi                              (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv4096qi                              (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv1hi                                 (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv2hi                                 (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv4hi                                 (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv8hi                                 (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv16hi                                (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv32hi                                (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv64hi                                (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv128hi                               (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv256hi                               (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv512hi                               (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv1024hi                              (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv2048hi                              (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv1si                                 (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv2si                                 (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv4si                                 (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv8si                                 (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv16si                                (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv32si                                (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv64si                                (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv128si                               (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv256si                               (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv512si                               (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv1024si                              (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv1di                                 (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv2di                                 (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv4di                                 (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv8di                                 (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv16di                                (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv32di                                (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv64di                                (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv128di                               (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv256di                               (rtx, rtx, rtx);
extern rtx        gen_vec_seriesv512di                               (rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm8qi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm4qi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm2qi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm1qi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm8hi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm4hi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm2hi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm1hi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm8si                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm4si                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm2si                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm1si                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm8di                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm4di                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm2di                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm1di                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvmf2qi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvmf4qi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvmf8qi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvmf2hi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvmf4hi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvmf2si                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm8hf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm4hf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm2hf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm1hf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvmf2hf                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvmf4hf                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm8sf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm4sf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm2sf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm1sf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvmf2sf                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm8df                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm4df                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm2df                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm1df                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm8bf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm4bf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm2bf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvm1bf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvmf2bf                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permrvvmf4bf                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv1qi                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv2qi                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv4qi                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv8qi                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv16qi                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv32qi                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv64qi                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv128qi                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv256qi                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv512qi                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv1024qi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv2048qi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv4096qi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv1hi                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv2hi                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv4hi                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv8hi                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv16hi                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv32hi                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv64hi                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv128hi                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv256hi                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv512hi                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv1024hi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv2048hi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv1si                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv2si                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv4si                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv8si                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv16si                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv32si                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv64si                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv128si                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv256si                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv512si                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv1024si                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv1di                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv2di                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv4di                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv8di                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv16di                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv32di                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv64di                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv128di                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv256di                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv512di                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv1hf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv2hf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv4hf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv8hf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv16hf                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv32hf                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv64hf                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv128hf                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv256hf                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv512hf                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv1024hf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv2048hf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv1sf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv2sf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv4sf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv8sf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv16sf                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv32sf                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv64sf                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv128sf                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv256sf                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv512sf                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv1024sf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv1df                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv2df                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv4df                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv8df                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv16df                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv32df                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv64df                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv128df                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv256df                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv512df                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv1bf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv2bf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv4bf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv8bf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv16bf                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv32bf                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv64bf                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv128bf                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv256bf                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv512bf                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv1024bf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_permv2048bf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_initrvvm8qiqi                              (rtx, rtx);
extern rtx        gen_vec_initrvvm4qiqi                              (rtx, rtx);
extern rtx        gen_vec_initrvvm2qiqi                              (rtx, rtx);
extern rtx        gen_vec_initrvvm1qiqi                              (rtx, rtx);
extern rtx        gen_vec_initrvvm8hihi                              (rtx, rtx);
extern rtx        gen_vec_initrvvm4hihi                              (rtx, rtx);
extern rtx        gen_vec_initrvvm2hihi                              (rtx, rtx);
extern rtx        gen_vec_initrvvm1hihi                              (rtx, rtx);
extern rtx        gen_vec_initrvvm8sisi                              (rtx, rtx);
extern rtx        gen_vec_initrvvm4sisi                              (rtx, rtx);
extern rtx        gen_vec_initrvvm2sisi                              (rtx, rtx);
extern rtx        gen_vec_initrvvm1sisi                              (rtx, rtx);
extern rtx        gen_vec_initrvvm8didi                              (rtx, rtx);
extern rtx        gen_vec_initrvvm4didi                              (rtx, rtx);
extern rtx        gen_vec_initrvvm2didi                              (rtx, rtx);
extern rtx        gen_vec_initrvvm1didi                              (rtx, rtx);
extern rtx        gen_vec_initrvvmf2qiqi                             (rtx, rtx);
extern rtx        gen_vec_initrvvmf4qiqi                             (rtx, rtx);
extern rtx        gen_vec_initrvvmf8qiqi                             (rtx, rtx);
extern rtx        gen_vec_initrvvmf2hihi                             (rtx, rtx);
extern rtx        gen_vec_initrvvmf4hihi                             (rtx, rtx);
extern rtx        gen_vec_initrvvmf2sisi                             (rtx, rtx);
extern rtx        gen_vec_initv1qiqi                                 (rtx, rtx);
extern rtx        gen_vec_initv2qiqi                                 (rtx, rtx);
extern rtx        gen_vec_initv4qiqi                                 (rtx, rtx);
extern rtx        gen_vec_initv8qiqi                                 (rtx, rtx);
extern rtx        gen_vec_initv16qiqi                                (rtx, rtx);
extern rtx        gen_vec_initv32qiqi                                (rtx, rtx);
extern rtx        gen_vec_initv64qiqi                                (rtx, rtx);
extern rtx        gen_vec_initv128qiqi                               (rtx, rtx);
extern rtx        gen_vec_initv256qiqi                               (rtx, rtx);
extern rtx        gen_vec_initv512qiqi                               (rtx, rtx);
extern rtx        gen_vec_initv1024qiqi                              (rtx, rtx);
extern rtx        gen_vec_initv2048qiqi                              (rtx, rtx);
extern rtx        gen_vec_initv4096qiqi                              (rtx, rtx);
extern rtx        gen_vec_initv1hihi                                 (rtx, rtx);
extern rtx        gen_vec_initv2hihi                                 (rtx, rtx);
extern rtx        gen_vec_initv4hihi                                 (rtx, rtx);
extern rtx        gen_vec_initv8hihi                                 (rtx, rtx);
extern rtx        gen_vec_initv16hihi                                (rtx, rtx);
extern rtx        gen_vec_initv32hihi                                (rtx, rtx);
extern rtx        gen_vec_initv64hihi                                (rtx, rtx);
extern rtx        gen_vec_initv128hihi                               (rtx, rtx);
extern rtx        gen_vec_initv256hihi                               (rtx, rtx);
extern rtx        gen_vec_initv512hihi                               (rtx, rtx);
extern rtx        gen_vec_initv1024hihi                              (rtx, rtx);
extern rtx        gen_vec_initv2048hihi                              (rtx, rtx);
extern rtx        gen_vec_initv1sisi                                 (rtx, rtx);
extern rtx        gen_vec_initv2sisi                                 (rtx, rtx);
extern rtx        gen_vec_initv4sisi                                 (rtx, rtx);
extern rtx        gen_vec_initv8sisi                                 (rtx, rtx);
extern rtx        gen_vec_initv16sisi                                (rtx, rtx);
extern rtx        gen_vec_initv32sisi                                (rtx, rtx);
extern rtx        gen_vec_initv64sisi                                (rtx, rtx);
extern rtx        gen_vec_initv128sisi                               (rtx, rtx);
extern rtx        gen_vec_initv256sisi                               (rtx, rtx);
extern rtx        gen_vec_initv512sisi                               (rtx, rtx);
extern rtx        gen_vec_initv1024sisi                              (rtx, rtx);
extern rtx        gen_vec_initv1didi                                 (rtx, rtx);
extern rtx        gen_vec_initv2didi                                 (rtx, rtx);
extern rtx        gen_vec_initv4didi                                 (rtx, rtx);
extern rtx        gen_vec_initv8didi                                 (rtx, rtx);
extern rtx        gen_vec_initv16didi                                (rtx, rtx);
extern rtx        gen_vec_initv32didi                                (rtx, rtx);
extern rtx        gen_vec_initv64didi                                (rtx, rtx);
extern rtx        gen_vec_initv128didi                               (rtx, rtx);
extern rtx        gen_vec_initv256didi                               (rtx, rtx);
extern rtx        gen_vec_initv512didi                               (rtx, rtx);
extern rtx        gen_vec_initrvvm8hfhf                              (rtx, rtx);
extern rtx        gen_vec_initrvvm4hfhf                              (rtx, rtx);
extern rtx        gen_vec_initrvvm2hfhf                              (rtx, rtx);
extern rtx        gen_vec_initrvvm1hfhf                              (rtx, rtx);
extern rtx        gen_vec_initrvvmf2hfhf                             (rtx, rtx);
extern rtx        gen_vec_initrvvmf4hfhf                             (rtx, rtx);
extern rtx        gen_vec_initrvvm8sfsf                              (rtx, rtx);
extern rtx        gen_vec_initrvvm4sfsf                              (rtx, rtx);
extern rtx        gen_vec_initrvvm2sfsf                              (rtx, rtx);
extern rtx        gen_vec_initrvvm1sfsf                              (rtx, rtx);
extern rtx        gen_vec_initrvvmf2sfsf                             (rtx, rtx);
extern rtx        gen_vec_initrvvm8dfdf                              (rtx, rtx);
extern rtx        gen_vec_initrvvm4dfdf                              (rtx, rtx);
extern rtx        gen_vec_initrvvm2dfdf                              (rtx, rtx);
extern rtx        gen_vec_initrvvm1dfdf                              (rtx, rtx);
extern rtx        gen_vec_initv1hfhf                                 (rtx, rtx);
extern rtx        gen_vec_initv2hfhf                                 (rtx, rtx);
extern rtx        gen_vec_initv4hfhf                                 (rtx, rtx);
extern rtx        gen_vec_initv8hfhf                                 (rtx, rtx);
extern rtx        gen_vec_initv16hfhf                                (rtx, rtx);
extern rtx        gen_vec_initv32hfhf                                (rtx, rtx);
extern rtx        gen_vec_initv64hfhf                                (rtx, rtx);
extern rtx        gen_vec_initv128hfhf                               (rtx, rtx);
extern rtx        gen_vec_initv256hfhf                               (rtx, rtx);
extern rtx        gen_vec_initv512hfhf                               (rtx, rtx);
extern rtx        gen_vec_initv1024hfhf                              (rtx, rtx);
extern rtx        gen_vec_initv2048hfhf                              (rtx, rtx);
extern rtx        gen_vec_initv1sfsf                                 (rtx, rtx);
extern rtx        gen_vec_initv2sfsf                                 (rtx, rtx);
extern rtx        gen_vec_initv4sfsf                                 (rtx, rtx);
extern rtx        gen_vec_initv8sfsf                                 (rtx, rtx);
extern rtx        gen_vec_initv16sfsf                                (rtx, rtx);
extern rtx        gen_vec_initv32sfsf                                (rtx, rtx);
extern rtx        gen_vec_initv64sfsf                                (rtx, rtx);
extern rtx        gen_vec_initv128sfsf                               (rtx, rtx);
extern rtx        gen_vec_initv256sfsf                               (rtx, rtx);
extern rtx        gen_vec_initv512sfsf                               (rtx, rtx);
extern rtx        gen_vec_initv1024sfsf                              (rtx, rtx);
extern rtx        gen_vec_initv1dfdf                                 (rtx, rtx);
extern rtx        gen_vec_initv2dfdf                                 (rtx, rtx);
extern rtx        gen_vec_initv4dfdf                                 (rtx, rtx);
extern rtx        gen_vec_initv8dfdf                                 (rtx, rtx);
extern rtx        gen_vec_initv16dfdf                                (rtx, rtx);
extern rtx        gen_vec_initv32dfdf                                (rtx, rtx);
extern rtx        gen_vec_initv64dfdf                                (rtx, rtx);
extern rtx        gen_vec_initv128dfdf                               (rtx, rtx);
extern rtx        gen_vec_initv256dfdf                               (rtx, rtx);
extern rtx        gen_vec_initv512dfdf                               (rtx, rtx);
extern rtx        gen_vec_initrvvmf64biqi                            (rtx, rtx);
extern rtx        gen_vec_initrvvmf32biqi                            (rtx, rtx);
extern rtx        gen_vec_initrvvmf16biqi                            (rtx, rtx);
extern rtx        gen_vec_initrvvmf8biqi                             (rtx, rtx);
extern rtx        gen_vec_initrvvmf4biqi                             (rtx, rtx);
extern rtx        gen_vec_initrvvmf2biqi                             (rtx, rtx);
extern rtx        gen_vec_initrvvm1biqi                              (rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm8qi                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm4qi                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm2qi                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm1qi                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm8hi                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm4hi                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm2hi                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm1hi                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm8si                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm4si                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm2si                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm1si                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm8di                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm4di                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm2di                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm1di                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvmf2qi                        (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvmf4qi                        (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvmf8qi                        (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvmf2hi                        (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvmf4hi                        (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvmf2si                        (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v1qi                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v2qi                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v4qi                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v8qi                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v16qi                           (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v32qi                           (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v64qi                           (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v128qi                          (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v256qi                          (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v512qi                          (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v1024qi                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v2048qi                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v4096qi                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v1hi                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v2hi                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v4hi                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v8hi                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v16hi                           (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v32hi                           (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v64hi                           (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v128hi                          (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v256hi                          (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v512hi                          (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v1024hi                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v2048hi                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v1si                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v2si                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v4si                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v8si                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v16si                           (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v32si                           (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v64si                           (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v128si                          (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v256si                          (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v512si                          (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v1024si                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v1di                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v2di                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v4di                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v8di                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v16di                           (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v32di                           (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v64di                           (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v128di                          (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v256di                          (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v512di                          (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm8hf                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm4hf                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm2hf                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm1hf                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvmf2hf                        (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvmf4hf                        (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm8sf                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm4sf                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm2sf                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm1sf                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvmf2sf                        (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm8df                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm4df                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm2df                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_rvvm1df                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v1hf                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v2hf                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v4hf                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v8hf                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v16hf                           (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v32hf                           (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v64hf                           (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v128hf                          (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v256hf                          (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v512hf                          (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v1024hf                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v2048hf                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v1sf                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v2sf                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v4sf                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v8sf                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v16sf                           (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v32sf                           (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v64sf                           (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v128sf                          (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v256sf                          (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v512sf                          (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v1024sf                         (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v1df                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v2df                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v4df                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v8df                            (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v16df                           (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v32df                           (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v64df                           (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v128df                          (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v256df                          (rtx, rtx, rtx);
extern rtx        gen_vec_shl_insert_v512df                          (rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm8qi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm4qi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm2qi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm1qi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm8hi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm4hi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm2hi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm1hi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm8si                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm4si                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm2si                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm1si                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm8di                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm4di                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm2di                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm1di                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvmf2qi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvmf4qi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvmf8qi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvmf2hi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvmf4hi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvmf2si                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm8hf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm4hf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm2hf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm1hf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvmf2hf                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvmf4hf                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm8sf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm4sf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm2sf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm1sf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvmf2sf                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm8df                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm4df                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm2df                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm1df                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm8bf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm4bf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm2bf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvm1bf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvmf2bf                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_rvvmf4bf                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v1qi                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v2qi                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v4qi                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v8qi                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v16qi                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v32qi                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v64qi                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v128qi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v256qi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v512qi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v1024qi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v2048qi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v4096qi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v1hi                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v2hi                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v4hi                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v8hi                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v16hi                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v32hi                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v64hi                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v128hi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v256hi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v512hi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v1024hi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v2048hi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v1si                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v2si                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v4si                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v8si                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v16si                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v32si                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v64si                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v128si                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v256si                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v512si                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v1024si                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v1di                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v2di                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v4di                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v8di                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v16di                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v32di                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v64di                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v128di                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v256di                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v512di                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v1hf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v2hf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v4hf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v8hf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v16hf                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v32hf                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v64hf                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v128hf                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v256hf                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v512hf                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v1024hf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v2048hf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v1sf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v2sf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v4sf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v8sf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v16sf                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v32sf                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v64sf                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v128sf                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v256sf                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v512sf                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v1024sf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v1df                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v2df                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v4df                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v8df                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v16df                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v32df                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v64df                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v128df                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v256df                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v512df                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v1bf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v2bf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v4bf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v8bf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v16bf                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v32bf                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v64bf                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v128bf                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v256bf                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v512bf                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v1024bf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_len_v2048bf                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvmf64birvvmf64bi                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvmf32birvvmf32bi                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvmf16birvvmf16bi                  (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvmf8birvvmf8bi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvmf4birvvmf4bi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvmf2birvvmf2bi                    (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_rvvm1birvvm1bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v1biv1bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v2biv2bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v4biv4bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v8biv8bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v16biv16bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v32biv32bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v64biv64bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v128biv128bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v256biv256bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v512biv512bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v1024biv1024bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v2048biv2048bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_vcond_mask_v4096biv4096bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm8qirvvm1bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm4qirvvmf2bi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm2qirvvmf4bi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm1qirvvmf8bi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm8hirvvmf2bi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm4hirvvmf4bi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm2hirvvmf8bi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm1hirvvmf16bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm8sirvvmf4bi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm4sirvvmf8bi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm2sirvvmf16bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm1sirvvmf32bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm8dirvvmf8bi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm4dirvvmf16bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm2dirvvmf32bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm1dirvvmf64bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvmf2qirvvmf16bi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvmf4qirvvmf32bi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvmf8qirvvmf64bi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvmf2hirvvmf32bi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvmf4hirvvmf64bi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvmf2sirvvmf64bi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv1qiv1bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv2qiv2bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv4qiv4bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv8qiv8bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv16qiv16bi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv32qiv32bi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv64qiv64bi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv128qiv128bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv256qiv256bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv512qiv512bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv1024qiv1024bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv2048qiv2048bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv4096qiv4096bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv1hiv1bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv2hiv2bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv4hiv4bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv8hiv8bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv16hiv16bi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv32hiv32bi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv64hiv64bi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv128hiv128bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv256hiv256bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv512hiv512bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv1024hiv1024bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv2048hiv2048bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv1siv1bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv2siv2bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv4siv4bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv8siv8bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv16siv16bi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv32siv32bi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv64siv64bi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv128siv128bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv256siv256bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv512siv512bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv1024siv1024bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv1div1bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv2div2bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv4div4bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv8div8bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv16div16bi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv32div32bi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv64div64bi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv128div128bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv256div256bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv512div512bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpurvvm8qirvvm1bi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpurvvm4qirvvmf2bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpurvvm2qirvvmf4bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpurvvm1qirvvmf8bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpurvvm8hirvvmf2bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpurvvm4hirvvmf4bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpurvvm2hirvvmf8bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpurvvm1hirvvmf16bi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpurvvm8sirvvmf4bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpurvvm4sirvvmf8bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpurvvm2sirvvmf16bi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpurvvm1sirvvmf32bi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpurvvm8dirvvmf8bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpurvvm4dirvvmf16bi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpurvvm2dirvvmf32bi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpurvvm1dirvvmf64bi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpurvvmf2qirvvmf16bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpurvvmf4qirvvmf32bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpurvvmf8qirvvmf64bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpurvvmf2hirvvmf32bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpurvvmf4hirvvmf64bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpurvvmf2sirvvmf64bi                      (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv1qiv1bi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv2qiv2bi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv4qiv4bi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv8qiv8bi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv16qiv16bi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv32qiv32bi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv64qiv64bi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv128qiv128bi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv256qiv256bi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv512qiv512bi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv1024qiv1024bi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv2048qiv2048bi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv4096qiv4096bi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv1hiv1bi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv2hiv2bi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv4hiv4bi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv8hiv8bi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv16hiv16bi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv32hiv32bi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv64hiv64bi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv128hiv128bi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv256hiv256bi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv512hiv512bi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv1024hiv1024bi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv2048hiv2048bi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv1siv1bi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv2siv2bi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv4siv4bi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv8siv8bi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv16siv16bi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv32siv32bi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv64siv64bi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv128siv128bi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv256siv256bi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv512siv512bi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv1024siv1024bi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv1div1bi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv2div2bi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv4div4bi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv8div8bi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv16div16bi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv32div32bi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv64div64bi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv128div128bi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv256div256bi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpuv512div512bi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm8hfrvvmf2bi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm4hfrvvmf4bi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm2hfrvvmf8bi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm1hfrvvmf16bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvmf2hfrvvmf32bi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvmf4hfrvvmf64bi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm8sfrvvmf4bi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm4sfrvvmf8bi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm2sfrvvmf16bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm1sfrvvmf32bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvmf2sfrvvmf64bi                       (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm8dfrvvmf8bi                         (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm4dfrvvmf16bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm2dfrvvmf32bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmprvvm1dfrvvmf64bi                        (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv1hfv1bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv2hfv2bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv4hfv4bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv8hfv8bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv16hfv16bi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv32hfv32bi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv64hfv64bi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv128hfv128bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv256hfv256bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv512hfv512bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv1024hfv1024bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv2048hfv2048bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv1sfv1bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv2sfv2bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv4sfv4bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv8sfv8bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv16sfv16bi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv32sfv32bi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv64sfv64bi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv128sfv128bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv256sfv256bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv512sfv512bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv1024sfv1024bi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv1dfv1bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv2dfv2bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv4dfv4bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv8dfv8bi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv16dfv16bi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv32dfv32bi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv64dfv64bi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv128dfv128bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv256dfv256bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_cmpv512dfv512bi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_truncrvvm8sirvvm2qi2                           (rtx, rtx);
extern rtx        gen_truncrvvm4sirvvm1qi2                           (rtx, rtx);
extern rtx        gen_truncrvvm2sirvvmf2qi2                          (rtx, rtx);
extern rtx        gen_truncrvvm1sirvvmf4qi2                          (rtx, rtx);
extern rtx        gen_truncrvvmf2sirvvmf8qi2                         (rtx, rtx);
extern rtx        gen_truncrvvm8dirvvm2hi2                           (rtx, rtx);
extern rtx        gen_truncrvvm4dirvvm1hi2                           (rtx, rtx);
extern rtx        gen_truncrvvm2dirvvmf2hi2                          (rtx, rtx);
extern rtx        gen_truncrvvm1dirvvmf4hi2                          (rtx, rtx);
extern rtx        gen_truncv1siv1qi2                                 (rtx, rtx);
extern rtx        gen_truncv2siv2qi2                                 (rtx, rtx);
extern rtx        gen_truncv4siv4qi2                                 (rtx, rtx);
extern rtx        gen_truncv8siv8qi2                                 (rtx, rtx);
extern rtx        gen_truncv16siv16qi2                               (rtx, rtx);
extern rtx        gen_truncv32siv32qi2                               (rtx, rtx);
extern rtx        gen_truncv64siv64qi2                               (rtx, rtx);
extern rtx        gen_truncv128siv128qi2                             (rtx, rtx);
extern rtx        gen_truncv256siv256qi2                             (rtx, rtx);
extern rtx        gen_truncv512siv512qi2                             (rtx, rtx);
extern rtx        gen_truncv1024siv1024qi2                           (rtx, rtx);
extern rtx        gen_truncv1div1hi2                                 (rtx, rtx);
extern rtx        gen_truncv2div2hi2                                 (rtx, rtx);
extern rtx        gen_truncv4div4hi2                                 (rtx, rtx);
extern rtx        gen_truncv8div8hi2                                 (rtx, rtx);
extern rtx        gen_truncv16div16hi2                               (rtx, rtx);
extern rtx        gen_truncv32div32hi2                               (rtx, rtx);
extern rtx        gen_truncv64div64hi2                               (rtx, rtx);
extern rtx        gen_truncv128div128hi2                             (rtx, rtx);
extern rtx        gen_truncv256div256hi2                             (rtx, rtx);
extern rtx        gen_truncv512div512hi2                             (rtx, rtx);
extern rtx        gen_truncrvvm8dirvvm1qi2                           (rtx, rtx);
extern rtx        gen_truncrvvm4dirvvmf2qi2                          (rtx, rtx);
extern rtx        gen_truncrvvm2dirvvmf4qi2                          (rtx, rtx);
extern rtx        gen_truncrvvm1dirvvmf8qi2                          (rtx, rtx);
extern rtx        gen_truncv1div1qi2                                 (rtx, rtx);
extern rtx        gen_truncv2div2qi2                                 (rtx, rtx);
extern rtx        gen_truncv4div4qi2                                 (rtx, rtx);
extern rtx        gen_truncv8div8qi2                                 (rtx, rtx);
extern rtx        gen_truncv16div16qi2                               (rtx, rtx);
extern rtx        gen_truncv32div32qi2                               (rtx, rtx);
extern rtx        gen_truncv64div64qi2                               (rtx, rtx);
extern rtx        gen_truncv128div128qi2                             (rtx, rtx);
extern rtx        gen_truncv256div256qi2                             (rtx, rtx);
extern rtx        gen_truncv512div512qi2                             (rtx, rtx);
extern rtx        gen_extendrvvm2hfrvvm8df2                          (rtx, rtx);
extern rtx        gen_extendrvvm1hfrvvm4df2                          (rtx, rtx);
extern rtx        gen_extendrvvmf2hfrvvm2df2                         (rtx, rtx);
extern rtx        gen_extendrvvmf4hfrvvm1df2                         (rtx, rtx);
extern rtx        gen_extendv1hfv1df2                                (rtx, rtx);
extern rtx        gen_extendv2hfv2df2                                (rtx, rtx);
extern rtx        gen_extendv4hfv4df2                                (rtx, rtx);
extern rtx        gen_extendv8hfv8df2                                (rtx, rtx);
extern rtx        gen_extendv16hfv16df2                              (rtx, rtx);
extern rtx        gen_extendv32hfv32df2                              (rtx, rtx);
extern rtx        gen_extendv64hfv64df2                              (rtx, rtx);
extern rtx        gen_extendv128hfv128df2                            (rtx, rtx);
extern rtx        gen_extendv256hfv256df2                            (rtx, rtx);
extern rtx        gen_extendv512hfv512df2                            (rtx, rtx);
extern rtx        gen_truncrvvm8dfrvvm2hf2                           (rtx, rtx);
extern rtx        gen_truncrvvm4dfrvvm1hf2                           (rtx, rtx);
extern rtx        gen_truncrvvm2dfrvvmf2hf2                          (rtx, rtx);
extern rtx        gen_truncrvvm1dfrvvmf4hf2                          (rtx, rtx);
extern rtx        gen_truncv1dfv1hf2                                 (rtx, rtx);
extern rtx        gen_truncv2dfv2hf2                                 (rtx, rtx);
extern rtx        gen_truncv4dfv4hf2                                 (rtx, rtx);
extern rtx        gen_truncv8dfv8hf2                                 (rtx, rtx);
extern rtx        gen_truncv16dfv16hf2                               (rtx, rtx);
extern rtx        gen_truncv32dfv32hf2                               (rtx, rtx);
extern rtx        gen_truncv64dfv64hf2                               (rtx, rtx);
extern rtx        gen_truncv128dfv128hf2                             (rtx, rtx);
extern rtx        gen_truncv256dfv256hf2                             (rtx, rtx);
extern rtx        gen_truncv512dfv512hf2                             (rtx, rtx);
extern rtx        gen_floatrvvm8dirvvm2hf2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm8dirvvm2hf2                        (rtx, rtx);
extern rtx        gen_floatrvvm4dirvvm1hf2                           (rtx, rtx);
extern rtx        gen_floatunsrvvm4dirvvm1hf2                        (rtx, rtx);
extern rtx        gen_floatrvvm2dirvvmf2hf2                          (rtx, rtx);
extern rtx        gen_floatunsrvvm2dirvvmf2hf2                       (rtx, rtx);
extern rtx        gen_floatrvvm1dirvvmf4hf2                          (rtx, rtx);
extern rtx        gen_floatunsrvvm1dirvvmf4hf2                       (rtx, rtx);
extern rtx        gen_floatv1div1hf2                                 (rtx, rtx);
extern rtx        gen_floatunsv1div1hf2                              (rtx, rtx);
extern rtx        gen_floatv2div2hf2                                 (rtx, rtx);
extern rtx        gen_floatunsv2div2hf2                              (rtx, rtx);
extern rtx        gen_floatv4div4hf2                                 (rtx, rtx);
extern rtx        gen_floatunsv4div4hf2                              (rtx, rtx);
extern rtx        gen_floatv8div8hf2                                 (rtx, rtx);
extern rtx        gen_floatunsv8div8hf2                              (rtx, rtx);
extern rtx        gen_floatv16div16hf2                               (rtx, rtx);
extern rtx        gen_floatunsv16div16hf2                            (rtx, rtx);
extern rtx        gen_floatv32div32hf2                               (rtx, rtx);
extern rtx        gen_floatunsv32div32hf2                            (rtx, rtx);
extern rtx        gen_floatv64div64hf2                               (rtx, rtx);
extern rtx        gen_floatunsv64div64hf2                            (rtx, rtx);
extern rtx        gen_floatv128div128hf2                             (rtx, rtx);
extern rtx        gen_floatunsv128div128hf2                          (rtx, rtx);
extern rtx        gen_floatv256div256hf2                             (rtx, rtx);
extern rtx        gen_floatunsv256div256hf2                          (rtx, rtx);
extern rtx        gen_floatv512div512hf2                             (rtx, rtx);
extern rtx        gen_floatunsv512div512hf2                          (rtx, rtx);
extern rtx        gen_absrvvm8qi2                                    (rtx, rtx);
extern rtx        gen_absrvvm4qi2                                    (rtx, rtx);
extern rtx        gen_absrvvm2qi2                                    (rtx, rtx);
extern rtx        gen_absrvvm1qi2                                    (rtx, rtx);
extern rtx        gen_absrvvm8hi2                                    (rtx, rtx);
extern rtx        gen_absrvvm4hi2                                    (rtx, rtx);
extern rtx        gen_absrvvm2hi2                                    (rtx, rtx);
extern rtx        gen_absrvvm1hi2                                    (rtx, rtx);
extern rtx        gen_absrvvm8si2                                    (rtx, rtx);
extern rtx        gen_absrvvm4si2                                    (rtx, rtx);
extern rtx        gen_absrvvm2si2                                    (rtx, rtx);
extern rtx        gen_absrvvm1si2                                    (rtx, rtx);
extern rtx        gen_absrvvm8di2                                    (rtx, rtx);
extern rtx        gen_absrvvm4di2                                    (rtx, rtx);
extern rtx        gen_absrvvm2di2                                    (rtx, rtx);
extern rtx        gen_absrvvm1di2                                    (rtx, rtx);
extern rtx        gen_absrvvmf2qi2                                   (rtx, rtx);
extern rtx        gen_absrvvmf4qi2                                   (rtx, rtx);
extern rtx        gen_absrvvmf8qi2                                   (rtx, rtx);
extern rtx        gen_absrvvmf2hi2                                   (rtx, rtx);
extern rtx        gen_absrvvmf4hi2                                   (rtx, rtx);
extern rtx        gen_absrvvmf2si2                                   (rtx, rtx);
extern rtx        gen_absv1qi2                                       (rtx, rtx);
extern rtx        gen_absv2qi2                                       (rtx, rtx);
extern rtx        gen_absv4qi2                                       (rtx, rtx);
extern rtx        gen_absv8qi2                                       (rtx, rtx);
extern rtx        gen_absv16qi2                                      (rtx, rtx);
extern rtx        gen_absv32qi2                                      (rtx, rtx);
extern rtx        gen_absv64qi2                                      (rtx, rtx);
extern rtx        gen_absv128qi2                                     (rtx, rtx);
extern rtx        gen_absv256qi2                                     (rtx, rtx);
extern rtx        gen_absv512qi2                                     (rtx, rtx);
extern rtx        gen_absv1024qi2                                    (rtx, rtx);
extern rtx        gen_absv2048qi2                                    (rtx, rtx);
extern rtx        gen_absv4096qi2                                    (rtx, rtx);
extern rtx        gen_absv1hi2                                       (rtx, rtx);
extern rtx        gen_absv2hi2                                       (rtx, rtx);
extern rtx        gen_absv4hi2                                       (rtx, rtx);
extern rtx        gen_absv8hi2                                       (rtx, rtx);
extern rtx        gen_absv16hi2                                      (rtx, rtx);
extern rtx        gen_absv32hi2                                      (rtx, rtx);
extern rtx        gen_absv64hi2                                      (rtx, rtx);
extern rtx        gen_absv128hi2                                     (rtx, rtx);
extern rtx        gen_absv256hi2                                     (rtx, rtx);
extern rtx        gen_absv512hi2                                     (rtx, rtx);
extern rtx        gen_absv1024hi2                                    (rtx, rtx);
extern rtx        gen_absv2048hi2                                    (rtx, rtx);
extern rtx        gen_absv1si2                                       (rtx, rtx);
extern rtx        gen_absv2si2                                       (rtx, rtx);
extern rtx        gen_absv4si2                                       (rtx, rtx);
extern rtx        gen_absv8si2                                       (rtx, rtx);
extern rtx        gen_absv16si2                                      (rtx, rtx);
extern rtx        gen_absv32si2                                      (rtx, rtx);
extern rtx        gen_absv64si2                                      (rtx, rtx);
extern rtx        gen_absv128si2                                     (rtx, rtx);
extern rtx        gen_absv256si2                                     (rtx, rtx);
extern rtx        gen_absv512si2                                     (rtx, rtx);
extern rtx        gen_absv1024si2                                    (rtx, rtx);
extern rtx        gen_absv1di2                                       (rtx, rtx);
extern rtx        gen_absv2di2                                       (rtx, rtx);
extern rtx        gen_absv4di2                                       (rtx, rtx);
extern rtx        gen_absv8di2                                       (rtx, rtx);
extern rtx        gen_absv16di2                                      (rtx, rtx);
extern rtx        gen_absv32di2                                      (rtx, rtx);
extern rtx        gen_absv64di2                                      (rtx, rtx);
extern rtx        gen_absv128di2                                     (rtx, rtx);
extern rtx        gen_absv256di2                                     (rtx, rtx);
extern rtx        gen_absv512di2                                     (rtx, rtx);
extern rtx        gen_select_vlrvvm8qisi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm4qisi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm2qisi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm1qisi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm8hisi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm4hisi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm2hisi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm1hisi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm8sisi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm4sisi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm2sisi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm1sisi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm8disi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm4disi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm2disi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm1disi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvmf2qisi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvmf4qisi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvmf8qisi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvmf2hisi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvmf4hisi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvmf2sisi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm8hfsi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm4hfsi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm2hfsi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm1hfsi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvmf2hfsi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvmf4hfsi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm8sfsi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm4sfsi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm2sfsi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm1sfsi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvmf2sfsi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm8dfsi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm4dfsi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm2dfsi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm1dfsi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm8bfsi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm4bfsi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm2bfsi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm1bfsi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvmf2bfsi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvmf4bfsi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm8qidi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm4qidi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm2qidi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm1qidi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm8hidi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm4hidi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm2hidi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm1hidi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm8sidi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm4sidi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm2sidi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm1sidi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm8didi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm4didi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm2didi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm1didi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvmf2qidi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvmf4qidi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvmf8qidi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvmf2hidi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvmf4hidi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvmf2sidi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm8hfdi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm4hfdi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm2hfdi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm1hfdi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvmf2hfdi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvmf4hfdi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm8sfdi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm4sfdi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm2sfdi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm1sfdi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvmf2sfdi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm8dfdi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm4dfdi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm2dfdi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm1dfdi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm8bfdi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm4bfdi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm2bfdi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvm1bfdi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvmf2bfdi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_select_vlrvvmf4bfdi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm8qi                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm4qi                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm2qi                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm1qi                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm8hi                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm4hi                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm2hi                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm1hi                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm8si                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm4si                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm2si                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm1si                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm8di                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm4di                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm2di                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm1di                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvmf2qi                                (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvmf4qi                                (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvmf8qi                                (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvmf2hi                                (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvmf4hi                                (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvmf2si                                (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm8hf                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm4hf                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm2hf                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm1hf                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvmf2hf                                (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvmf4hf                                (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm8sf                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm4sf                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm2sf                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm1sf                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvmf2sf                                (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm8df                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm4df                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm2df                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setrvvm1df                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setv1qi                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv2qi                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv4qi                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv8qi                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv16qi                                   (rtx, rtx, rtx);
extern rtx        gen_vec_setv32qi                                   (rtx, rtx, rtx);
extern rtx        gen_vec_setv64qi                                   (rtx, rtx, rtx);
extern rtx        gen_vec_setv128qi                                  (rtx, rtx, rtx);
extern rtx        gen_vec_setv256qi                                  (rtx, rtx, rtx);
extern rtx        gen_vec_setv512qi                                  (rtx, rtx, rtx);
extern rtx        gen_vec_setv1024qi                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setv2048qi                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setv4096qi                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setv1hi                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv2hi                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv4hi                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv8hi                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv16hi                                   (rtx, rtx, rtx);
extern rtx        gen_vec_setv32hi                                   (rtx, rtx, rtx);
extern rtx        gen_vec_setv64hi                                   (rtx, rtx, rtx);
extern rtx        gen_vec_setv128hi                                  (rtx, rtx, rtx);
extern rtx        gen_vec_setv256hi                                  (rtx, rtx, rtx);
extern rtx        gen_vec_setv512hi                                  (rtx, rtx, rtx);
extern rtx        gen_vec_setv1024hi                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setv2048hi                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setv1si                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv2si                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv4si                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv8si                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv16si                                   (rtx, rtx, rtx);
extern rtx        gen_vec_setv32si                                   (rtx, rtx, rtx);
extern rtx        gen_vec_setv64si                                   (rtx, rtx, rtx);
extern rtx        gen_vec_setv128si                                  (rtx, rtx, rtx);
extern rtx        gen_vec_setv256si                                  (rtx, rtx, rtx);
extern rtx        gen_vec_setv512si                                  (rtx, rtx, rtx);
extern rtx        gen_vec_setv1024si                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setv1di                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv2di                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv4di                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv8di                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv16di                                   (rtx, rtx, rtx);
extern rtx        gen_vec_setv32di                                   (rtx, rtx, rtx);
extern rtx        gen_vec_setv64di                                   (rtx, rtx, rtx);
extern rtx        gen_vec_setv128di                                  (rtx, rtx, rtx);
extern rtx        gen_vec_setv256di                                  (rtx, rtx, rtx);
extern rtx        gen_vec_setv512di                                  (rtx, rtx, rtx);
extern rtx        gen_vec_setv1hf                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv2hf                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv4hf                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv8hf                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv16hf                                   (rtx, rtx, rtx);
extern rtx        gen_vec_setv32hf                                   (rtx, rtx, rtx);
extern rtx        gen_vec_setv64hf                                   (rtx, rtx, rtx);
extern rtx        gen_vec_setv128hf                                  (rtx, rtx, rtx);
extern rtx        gen_vec_setv256hf                                  (rtx, rtx, rtx);
extern rtx        gen_vec_setv512hf                                  (rtx, rtx, rtx);
extern rtx        gen_vec_setv1024hf                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setv2048hf                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setv1sf                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv2sf                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv4sf                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv8sf                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv16sf                                   (rtx, rtx, rtx);
extern rtx        gen_vec_setv32sf                                   (rtx, rtx, rtx);
extern rtx        gen_vec_setv64sf                                   (rtx, rtx, rtx);
extern rtx        gen_vec_setv128sf                                  (rtx, rtx, rtx);
extern rtx        gen_vec_setv256sf                                  (rtx, rtx, rtx);
extern rtx        gen_vec_setv512sf                                  (rtx, rtx, rtx);
extern rtx        gen_vec_setv1024sf                                 (rtx, rtx, rtx);
extern rtx        gen_vec_setv1df                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv2df                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv4df                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv8df                                    (rtx, rtx, rtx);
extern rtx        gen_vec_setv16df                                   (rtx, rtx, rtx);
extern rtx        gen_vec_setv32df                                   (rtx, rtx, rtx);
extern rtx        gen_vec_setv64df                                   (rtx, rtx, rtx);
extern rtx        gen_vec_setv128df                                  (rtx, rtx, rtx);
extern rtx        gen_vec_setv256df                                  (rtx, rtx, rtx);
extern rtx        gen_vec_setv512df                                  (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm8qiqi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm4qiqi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm2qiqi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm1qiqi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm8hihi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm4hihi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm2hihi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm1hihi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm8sisi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm4sisi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm2sisi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm1sisi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm8didi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm4didi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm2didi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm1didi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvmf2qiqi                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvmf4qiqi                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvmf8qiqi                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvmf2hihi                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvmf4hihi                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvmf2sisi                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm8hfhf                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm4hfhf                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm2hfhf                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm1hfhf                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvmf2hfhf                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvmf4hfhf                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm8sfsf                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm4sfsf                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm2sfsf                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm1sfsf                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvmf2sfsf                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm8dfdf                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm4dfdf                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm2dfdf                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm1dfdf                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv1qiqi                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv2qiqi                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4qiqi                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv8qiqi                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv16qiqi                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv32qiqi                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv64qiqi                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv128qiqi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv256qiqi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv512qiqi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv1024qiqi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv2048qiqi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4096qiqi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv1hihi                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv2hihi                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4hihi                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv8hihi                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv16hihi                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv32hihi                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv64hihi                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv128hihi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv256hihi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv512hihi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv1024hihi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv2048hihi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv1sisi                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv2sisi                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4sisi                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv8sisi                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv16sisi                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv32sisi                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv64sisi                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv128sisi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv256sisi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv512sisi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv1024sisi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv1didi                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv2didi                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4didi                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv8didi                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv16didi                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv32didi                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv64didi                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv128didi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv256didi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv512didi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv1hfhf                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv2hfhf                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4hfhf                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv8hfhf                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv16hfhf                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv32hfhf                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv64hfhf                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv128hfhf                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv256hfhf                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv512hfhf                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv1024hfhf                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv2048hfhf                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv1sfsf                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv2sfsf                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4sfsf                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv8sfsf                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv16sfsf                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv32sfsf                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv64sfsf                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv128sfsf                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv256sfsf                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv512sfsf                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv1024sfsf                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv1dfdf                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv2dfdf                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4dfdf                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv8dfdf                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv16dfdf                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv32dfdf                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv64dfdf                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv128dfdf                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv256dfdf                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv512dfdf                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvmf64biqi                         (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvmf32biqi                         (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvmf16biqi                         (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvmf8biqi                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvmf4biqi                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvmf2biqi                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm1biqi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv1biqi                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv2biqi                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4biqi                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv8biqi                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv16biqi                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv32biqi                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv64biqi                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv128biqi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv256biqi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv512biqi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv1024biqi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv2048biqi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4096biqi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvmf64bibi                         (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvmf32bibi                         (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvmf16bibi                         (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvmf8bibi                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvmf4bibi                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvmf2bibi                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractrvvm1bibi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv1bibi                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv2bibi                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4bibi                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv8bibi                              (rtx, rtx, rtx);
extern rtx        gen_vec_extractv16bibi                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv32bibi                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv64bibi                             (rtx, rtx, rtx);
extern rtx        gen_vec_extractv128bibi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv256bibi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv512bibi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv1024bibi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv2048bibi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4096bibi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv2qiv1qi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4qiv2qi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv8qiv4qi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv16qiv8qi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv2hiv1hi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4hiv2hi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv8hiv4hi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv16hiv8hi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv2siv1si                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4siv2si                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv8siv4si                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv16siv8si                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv2div1di                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4div2di                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv8div4di                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv16div8di                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv2sfv1sf                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4sfv2sf                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv8sfv4sf                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv16sfv8sf                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv2dfv1df                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4dfv2df                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv8dfv4df                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv16dfv8df                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv32qiv16qi                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractv64qiv32qi                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractv128qiv64qi                         (rtx, rtx, rtx);
extern rtx        gen_vec_extractv256qiv128qi                        (rtx, rtx, rtx);
extern rtx        gen_vec_extractv512qiv256qi                        (rtx, rtx, rtx);
extern rtx        gen_vec_extractv1024qiv512qi                       (rtx, rtx, rtx);
extern rtx        gen_vec_extractv2048qiv1024qi                      (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4096qiv2048qi                      (rtx, rtx, rtx);
extern rtx        gen_vec_extractv32hiv16hi                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractv64hiv32hi                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractv128hiv64hi                         (rtx, rtx, rtx);
extern rtx        gen_vec_extractv256hiv128hi                        (rtx, rtx, rtx);
extern rtx        gen_vec_extractv512hiv256hi                        (rtx, rtx, rtx);
extern rtx        gen_vec_extractv1024hiv512hi                       (rtx, rtx, rtx);
extern rtx        gen_vec_extractv2048hiv1024hi                      (rtx, rtx, rtx);
extern rtx        gen_vec_extractv32siv16si                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractv64siv32si                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractv128siv64si                         (rtx, rtx, rtx);
extern rtx        gen_vec_extractv256siv128si                        (rtx, rtx, rtx);
extern rtx        gen_vec_extractv512siv256si                        (rtx, rtx, rtx);
extern rtx        gen_vec_extractv1024siv512si                       (rtx, rtx, rtx);
extern rtx        gen_vec_extractv32div16di                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractv64div32di                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractv128div64di                         (rtx, rtx, rtx);
extern rtx        gen_vec_extractv256div128di                        (rtx, rtx, rtx);
extern rtx        gen_vec_extractv512div256di                        (rtx, rtx, rtx);
extern rtx        gen_vec_extractv32sfv16sf                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractv64sfv32sf                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractv128sfv64sf                         (rtx, rtx, rtx);
extern rtx        gen_vec_extractv256sfv128sf                        (rtx, rtx, rtx);
extern rtx        gen_vec_extractv512sfv256sf                        (rtx, rtx, rtx);
extern rtx        gen_vec_extractv1024sfv512sf                       (rtx, rtx, rtx);
extern rtx        gen_vec_extractv32dfv16df                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractv64dfv32df                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractv128dfv64df                         (rtx, rtx, rtx);
extern rtx        gen_vec_extractv256dfv128df                        (rtx, rtx, rtx);
extern rtx        gen_vec_extractv512dfv256df                        (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4qiv1qi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv8qiv2qi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv16qiv4qi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4hiv1hi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv8hiv2hi                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv16hiv4hi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4siv1si                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv8siv2si                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv16siv4si                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4div1di                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv8div2di                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv16div4di                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4sfv1sf                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv8sfv2sf                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv16sfv4sf                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4dfv1df                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv8dfv2df                            (rtx, rtx, rtx);
extern rtx        gen_vec_extractv16dfv4df                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv32qiv8qi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv64qiv16qi                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractv128qiv32qi                         (rtx, rtx, rtx);
extern rtx        gen_vec_extractv256qiv64qi                         (rtx, rtx, rtx);
extern rtx        gen_vec_extractv512qiv128qi                        (rtx, rtx, rtx);
extern rtx        gen_vec_extractv1024qiv256qi                       (rtx, rtx, rtx);
extern rtx        gen_vec_extractv2048qiv512qi                       (rtx, rtx, rtx);
extern rtx        gen_vec_extractv4096qiv1024qi                      (rtx, rtx, rtx);
extern rtx        gen_vec_extractv32hiv8hi                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv64hiv16hi                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractv128hiv32hi                         (rtx, rtx, rtx);
extern rtx        gen_vec_extractv256hiv64hi                         (rtx, rtx, rtx);
extern rtx        gen_vec_extractv512hiv128hi                        (rtx, rtx, rtx);
extern rtx        gen_vec_extractv1024hiv256hi                       (rtx, rtx, rtx);
extern rtx        gen_vec_extractv2048hiv512hi                       (rtx, rtx, rtx);
extern rtx        gen_vec_extractv32siv8si                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv64siv16si                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractv128siv32si                         (rtx, rtx, rtx);
extern rtx        gen_vec_extractv256siv64si                         (rtx, rtx, rtx);
extern rtx        gen_vec_extractv512siv128si                        (rtx, rtx, rtx);
extern rtx        gen_vec_extractv1024siv256si                       (rtx, rtx, rtx);
extern rtx        gen_vec_extractv32div8di                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv64div16di                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractv128div32di                         (rtx, rtx, rtx);
extern rtx        gen_vec_extractv256div64di                         (rtx, rtx, rtx);
extern rtx        gen_vec_extractv512div128di                        (rtx, rtx, rtx);
extern rtx        gen_vec_extractv32sfv8sf                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv64sfv16sf                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractv128sfv32sf                         (rtx, rtx, rtx);
extern rtx        gen_vec_extractv256sfv64sf                         (rtx, rtx, rtx);
extern rtx        gen_vec_extractv512sfv128sf                        (rtx, rtx, rtx);
extern rtx        gen_vec_extractv1024sfv256sf                       (rtx, rtx, rtx);
extern rtx        gen_vec_extractv32dfv8df                           (rtx, rtx, rtx);
extern rtx        gen_vec_extractv64dfv16df                          (rtx, rtx, rtx);
extern rtx        gen_vec_extractv128dfv32df                         (rtx, rtx, rtx);
extern rtx        gen_vec_extractv256dfv64df                         (rtx, rtx, rtx);
extern rtx        gen_vec_extractv512dfv128df                        (rtx, rtx, rtx);
extern rtx        gen_xorsignrvvm8hf3                                (rtx, rtx, rtx);
extern rtx        gen_xorsignrvvm4hf3                                (rtx, rtx, rtx);
extern rtx        gen_xorsignrvvm2hf3                                (rtx, rtx, rtx);
extern rtx        gen_xorsignrvvm1hf3                                (rtx, rtx, rtx);
extern rtx        gen_xorsignrvvmf2hf3                               (rtx, rtx, rtx);
extern rtx        gen_xorsignrvvmf4hf3                               (rtx, rtx, rtx);
extern rtx        gen_xorsignrvvm8sf3                                (rtx, rtx, rtx);
extern rtx        gen_xorsignrvvm4sf3                                (rtx, rtx, rtx);
extern rtx        gen_xorsignrvvm2sf3                                (rtx, rtx, rtx);
extern rtx        gen_xorsignrvvm1sf3                                (rtx, rtx, rtx);
extern rtx        gen_xorsignrvvmf2sf3                               (rtx, rtx, rtx);
extern rtx        gen_xorsignrvvm8df3                                (rtx, rtx, rtx);
extern rtx        gen_xorsignrvvm4df3                                (rtx, rtx, rtx);
extern rtx        gen_xorsignrvvm2df3                                (rtx, rtx, rtx);
extern rtx        gen_xorsignrvvm1df3                                (rtx, rtx, rtx);
extern rtx        gen_xorsignv1hf3                                   (rtx, rtx, rtx);
extern rtx        gen_xorsignv2hf3                                   (rtx, rtx, rtx);
extern rtx        gen_xorsignv4hf3                                   (rtx, rtx, rtx);
extern rtx        gen_xorsignv8hf3                                   (rtx, rtx, rtx);
extern rtx        gen_xorsignv16hf3                                  (rtx, rtx, rtx);
extern rtx        gen_xorsignv32hf3                                  (rtx, rtx, rtx);
extern rtx        gen_xorsignv64hf3                                  (rtx, rtx, rtx);
extern rtx        gen_xorsignv128hf3                                 (rtx, rtx, rtx);
extern rtx        gen_xorsignv256hf3                                 (rtx, rtx, rtx);
extern rtx        gen_xorsignv512hf3                                 (rtx, rtx, rtx);
extern rtx        gen_xorsignv1024hf3                                (rtx, rtx, rtx);
extern rtx        gen_xorsignv2048hf3                                (rtx, rtx, rtx);
extern rtx        gen_xorsignv1sf3                                   (rtx, rtx, rtx);
extern rtx        gen_xorsignv2sf3                                   (rtx, rtx, rtx);
extern rtx        gen_xorsignv4sf3                                   (rtx, rtx, rtx);
extern rtx        gen_xorsignv8sf3                                   (rtx, rtx, rtx);
extern rtx        gen_xorsignv16sf3                                  (rtx, rtx, rtx);
extern rtx        gen_xorsignv32sf3                                  (rtx, rtx, rtx);
extern rtx        gen_xorsignv64sf3                                  (rtx, rtx, rtx);
extern rtx        gen_xorsignv128sf3                                 (rtx, rtx, rtx);
extern rtx        gen_xorsignv256sf3                                 (rtx, rtx, rtx);
extern rtx        gen_xorsignv512sf3                                 (rtx, rtx, rtx);
extern rtx        gen_xorsignv1024sf3                                (rtx, rtx, rtx);
extern rtx        gen_xorsignv1df3                                   (rtx, rtx, rtx);
extern rtx        gen_xorsignv2df3                                   (rtx, rtx, rtx);
extern rtx        gen_xorsignv4df3                                   (rtx, rtx, rtx);
extern rtx        gen_xorsignv8df3                                   (rtx, rtx, rtx);
extern rtx        gen_xorsignv16df3                                  (rtx, rtx, rtx);
extern rtx        gen_xorsignv32df3                                  (rtx, rtx, rtx);
extern rtx        gen_xorsignv64df3                                  (rtx, rtx, rtx);
extern rtx        gen_xorsignv128df3                                 (rtx, rtx, rtx);
extern rtx        gen_xorsignv256df3                                 (rtx, rtx, rtx);
extern rtx        gen_xorsignv512df3                                 (rtx, rtx, rtx);
extern rtx        gen_popcountrvvm8qi2                               (rtx, rtx);
extern rtx        gen_popcountrvvm4qi2                               (rtx, rtx);
extern rtx        gen_popcountrvvm2qi2                               (rtx, rtx);
extern rtx        gen_popcountrvvm1qi2                               (rtx, rtx);
extern rtx        gen_popcountrvvm8hi2                               (rtx, rtx);
extern rtx        gen_popcountrvvm4hi2                               (rtx, rtx);
extern rtx        gen_popcountrvvm2hi2                               (rtx, rtx);
extern rtx        gen_popcountrvvm1hi2                               (rtx, rtx);
extern rtx        gen_popcountrvvm8si2                               (rtx, rtx);
extern rtx        gen_popcountrvvm4si2                               (rtx, rtx);
extern rtx        gen_popcountrvvm2si2                               (rtx, rtx);
extern rtx        gen_popcountrvvm1si2                               (rtx, rtx);
extern rtx        gen_popcountrvvm8di2                               (rtx, rtx);
extern rtx        gen_popcountrvvm4di2                               (rtx, rtx);
extern rtx        gen_popcountrvvm2di2                               (rtx, rtx);
extern rtx        gen_popcountrvvm1di2                               (rtx, rtx);
extern rtx        gen_popcountrvvmf2qi2                              (rtx, rtx);
extern rtx        gen_popcountrvvmf4qi2                              (rtx, rtx);
extern rtx        gen_popcountrvvmf8qi2                              (rtx, rtx);
extern rtx        gen_popcountrvvmf2hi2                              (rtx, rtx);
extern rtx        gen_popcountrvvmf4hi2                              (rtx, rtx);
extern rtx        gen_popcountrvvmf2si2                              (rtx, rtx);
extern rtx        gen_popcountv1qi2                                  (rtx, rtx);
extern rtx        gen_popcountv2qi2                                  (rtx, rtx);
extern rtx        gen_popcountv4qi2                                  (rtx, rtx);
extern rtx        gen_popcountv8qi2                                  (rtx, rtx);
extern rtx        gen_popcountv16qi2                                 (rtx, rtx);
extern rtx        gen_popcountv32qi2                                 (rtx, rtx);
extern rtx        gen_popcountv64qi2                                 (rtx, rtx);
extern rtx        gen_popcountv128qi2                                (rtx, rtx);
extern rtx        gen_popcountv256qi2                                (rtx, rtx);
extern rtx        gen_popcountv512qi2                                (rtx, rtx);
extern rtx        gen_popcountv1024qi2                               (rtx, rtx);
extern rtx        gen_popcountv2048qi2                               (rtx, rtx);
extern rtx        gen_popcountv4096qi2                               (rtx, rtx);
extern rtx        gen_popcountv1hi2                                  (rtx, rtx);
extern rtx        gen_popcountv2hi2                                  (rtx, rtx);
extern rtx        gen_popcountv4hi2                                  (rtx, rtx);
extern rtx        gen_popcountv8hi2                                  (rtx, rtx);
extern rtx        gen_popcountv16hi2                                 (rtx, rtx);
extern rtx        gen_popcountv32hi2                                 (rtx, rtx);
extern rtx        gen_popcountv64hi2                                 (rtx, rtx);
extern rtx        gen_popcountv128hi2                                (rtx, rtx);
extern rtx        gen_popcountv256hi2                                (rtx, rtx);
extern rtx        gen_popcountv512hi2                                (rtx, rtx);
extern rtx        gen_popcountv1024hi2                               (rtx, rtx);
extern rtx        gen_popcountv2048hi2                               (rtx, rtx);
extern rtx        gen_popcountv1si2                                  (rtx, rtx);
extern rtx        gen_popcountv2si2                                  (rtx, rtx);
extern rtx        gen_popcountv4si2                                  (rtx, rtx);
extern rtx        gen_popcountv8si2                                  (rtx, rtx);
extern rtx        gen_popcountv16si2                                 (rtx, rtx);
extern rtx        gen_popcountv32si2                                 (rtx, rtx);
extern rtx        gen_popcountv64si2                                 (rtx, rtx);
extern rtx        gen_popcountv128si2                                (rtx, rtx);
extern rtx        gen_popcountv256si2                                (rtx, rtx);
extern rtx        gen_popcountv512si2                                (rtx, rtx);
extern rtx        gen_popcountv1024si2                               (rtx, rtx);
extern rtx        gen_popcountv1di2                                  (rtx, rtx);
extern rtx        gen_popcountv2di2                                  (rtx, rtx);
extern rtx        gen_popcountv4di2                                  (rtx, rtx);
extern rtx        gen_popcountv8di2                                  (rtx, rtx);
extern rtx        gen_popcountv16di2                                 (rtx, rtx);
extern rtx        gen_popcountv32di2                                 (rtx, rtx);
extern rtx        gen_popcountv64di2                                 (rtx, rtx);
extern rtx        gen_popcountv128di2                                (rtx, rtx);
extern rtx        gen_popcountv256di2                                (rtx, rtx);
extern rtx        gen_popcountv512di2                                (rtx, rtx);
extern rtx        gen_ctzrvvm8qi2                                    (rtx, rtx);
extern rtx        gen_ctzrvvm4qi2                                    (rtx, rtx);
extern rtx        gen_ctzrvvm2qi2                                    (rtx, rtx);
extern rtx        gen_ctzrvvm1qi2                                    (rtx, rtx);
extern rtx        gen_ctzrvvm8hi2                                    (rtx, rtx);
extern rtx        gen_ctzrvvm4hi2                                    (rtx, rtx);
extern rtx        gen_ctzrvvm2hi2                                    (rtx, rtx);
extern rtx        gen_ctzrvvm1hi2                                    (rtx, rtx);
extern rtx        gen_ctzrvvm8si2                                    (rtx, rtx);
extern rtx        gen_ctzrvvm4si2                                    (rtx, rtx);
extern rtx        gen_ctzrvvm2si2                                    (rtx, rtx);
extern rtx        gen_ctzrvvm1si2                                    (rtx, rtx);
extern rtx        gen_ctzrvvm8di2                                    (rtx, rtx);
extern rtx        gen_ctzrvvm4di2                                    (rtx, rtx);
extern rtx        gen_ctzrvvm2di2                                    (rtx, rtx);
extern rtx        gen_ctzrvvm1di2                                    (rtx, rtx);
extern rtx        gen_ctzrvvmf2qi2                                   (rtx, rtx);
extern rtx        gen_ctzrvvmf4qi2                                   (rtx, rtx);
extern rtx        gen_ctzrvvmf8qi2                                   (rtx, rtx);
extern rtx        gen_ctzrvvmf2hi2                                   (rtx, rtx);
extern rtx        gen_ctzrvvmf4hi2                                   (rtx, rtx);
extern rtx        gen_ctzrvvmf2si2                                   (rtx, rtx);
extern rtx        gen_ctzv1qi2                                       (rtx, rtx);
extern rtx        gen_ctzv2qi2                                       (rtx, rtx);
extern rtx        gen_ctzv4qi2                                       (rtx, rtx);
extern rtx        gen_ctzv8qi2                                       (rtx, rtx);
extern rtx        gen_ctzv16qi2                                      (rtx, rtx);
extern rtx        gen_ctzv32qi2                                      (rtx, rtx);
extern rtx        gen_ctzv64qi2                                      (rtx, rtx);
extern rtx        gen_ctzv128qi2                                     (rtx, rtx);
extern rtx        gen_ctzv256qi2                                     (rtx, rtx);
extern rtx        gen_ctzv512qi2                                     (rtx, rtx);
extern rtx        gen_ctzv1024qi2                                    (rtx, rtx);
extern rtx        gen_ctzv2048qi2                                    (rtx, rtx);
extern rtx        gen_ctzv4096qi2                                    (rtx, rtx);
extern rtx        gen_ctzv1hi2                                       (rtx, rtx);
extern rtx        gen_ctzv2hi2                                       (rtx, rtx);
extern rtx        gen_ctzv4hi2                                       (rtx, rtx);
extern rtx        gen_ctzv8hi2                                       (rtx, rtx);
extern rtx        gen_ctzv16hi2                                      (rtx, rtx);
extern rtx        gen_ctzv32hi2                                      (rtx, rtx);
extern rtx        gen_ctzv64hi2                                      (rtx, rtx);
extern rtx        gen_ctzv128hi2                                     (rtx, rtx);
extern rtx        gen_ctzv256hi2                                     (rtx, rtx);
extern rtx        gen_ctzv512hi2                                     (rtx, rtx);
extern rtx        gen_ctzv1024hi2                                    (rtx, rtx);
extern rtx        gen_ctzv2048hi2                                    (rtx, rtx);
extern rtx        gen_ctzv1si2                                       (rtx, rtx);
extern rtx        gen_ctzv2si2                                       (rtx, rtx);
extern rtx        gen_ctzv4si2                                       (rtx, rtx);
extern rtx        gen_ctzv8si2                                       (rtx, rtx);
extern rtx        gen_ctzv16si2                                      (rtx, rtx);
extern rtx        gen_ctzv32si2                                      (rtx, rtx);
extern rtx        gen_ctzv64si2                                      (rtx, rtx);
extern rtx        gen_ctzv128si2                                     (rtx, rtx);
extern rtx        gen_ctzv256si2                                     (rtx, rtx);
extern rtx        gen_ctzv512si2                                     (rtx, rtx);
extern rtx        gen_ctzv1024si2                                    (rtx, rtx);
extern rtx        gen_ctzv1di2                                       (rtx, rtx);
extern rtx        gen_ctzv2di2                                       (rtx, rtx);
extern rtx        gen_ctzv4di2                                       (rtx, rtx);
extern rtx        gen_ctzv8di2                                       (rtx, rtx);
extern rtx        gen_ctzv16di2                                      (rtx, rtx);
extern rtx        gen_ctzv32di2                                      (rtx, rtx);
extern rtx        gen_ctzv64di2                                      (rtx, rtx);
extern rtx        gen_ctzv128di2                                     (rtx, rtx);
extern rtx        gen_ctzv256di2                                     (rtx, rtx);
extern rtx        gen_ctzv512di2                                     (rtx, rtx);
extern rtx        gen_clzrvvm8qi2                                    (rtx, rtx);
extern rtx        gen_clzrvvm4qi2                                    (rtx, rtx);
extern rtx        gen_clzrvvm2qi2                                    (rtx, rtx);
extern rtx        gen_clzrvvm1qi2                                    (rtx, rtx);
extern rtx        gen_clzrvvm8hi2                                    (rtx, rtx);
extern rtx        gen_clzrvvm4hi2                                    (rtx, rtx);
extern rtx        gen_clzrvvm2hi2                                    (rtx, rtx);
extern rtx        gen_clzrvvm1hi2                                    (rtx, rtx);
extern rtx        gen_clzrvvm8si2                                    (rtx, rtx);
extern rtx        gen_clzrvvm4si2                                    (rtx, rtx);
extern rtx        gen_clzrvvm2si2                                    (rtx, rtx);
extern rtx        gen_clzrvvm1si2                                    (rtx, rtx);
extern rtx        gen_clzrvvm8di2                                    (rtx, rtx);
extern rtx        gen_clzrvvm4di2                                    (rtx, rtx);
extern rtx        gen_clzrvvm2di2                                    (rtx, rtx);
extern rtx        gen_clzrvvm1di2                                    (rtx, rtx);
extern rtx        gen_clzrvvmf2qi2                                   (rtx, rtx);
extern rtx        gen_clzrvvmf4qi2                                   (rtx, rtx);
extern rtx        gen_clzrvvmf8qi2                                   (rtx, rtx);
extern rtx        gen_clzrvvmf2hi2                                   (rtx, rtx);
extern rtx        gen_clzrvvmf4hi2                                   (rtx, rtx);
extern rtx        gen_clzrvvmf2si2                                   (rtx, rtx);
extern rtx        gen_clzv1qi2                                       (rtx, rtx);
extern rtx        gen_clzv2qi2                                       (rtx, rtx);
extern rtx        gen_clzv4qi2                                       (rtx, rtx);
extern rtx        gen_clzv8qi2                                       (rtx, rtx);
extern rtx        gen_clzv16qi2                                      (rtx, rtx);
extern rtx        gen_clzv32qi2                                      (rtx, rtx);
extern rtx        gen_clzv64qi2                                      (rtx, rtx);
extern rtx        gen_clzv128qi2                                     (rtx, rtx);
extern rtx        gen_clzv256qi2                                     (rtx, rtx);
extern rtx        gen_clzv512qi2                                     (rtx, rtx);
extern rtx        gen_clzv1024qi2                                    (rtx, rtx);
extern rtx        gen_clzv2048qi2                                    (rtx, rtx);
extern rtx        gen_clzv4096qi2                                    (rtx, rtx);
extern rtx        gen_clzv1hi2                                       (rtx, rtx);
extern rtx        gen_clzv2hi2                                       (rtx, rtx);
extern rtx        gen_clzv4hi2                                       (rtx, rtx);
extern rtx        gen_clzv8hi2                                       (rtx, rtx);
extern rtx        gen_clzv16hi2                                      (rtx, rtx);
extern rtx        gen_clzv32hi2                                      (rtx, rtx);
extern rtx        gen_clzv64hi2                                      (rtx, rtx);
extern rtx        gen_clzv128hi2                                     (rtx, rtx);
extern rtx        gen_clzv256hi2                                     (rtx, rtx);
extern rtx        gen_clzv512hi2                                     (rtx, rtx);
extern rtx        gen_clzv1024hi2                                    (rtx, rtx);
extern rtx        gen_clzv2048hi2                                    (rtx, rtx);
extern rtx        gen_clzv1si2                                       (rtx, rtx);
extern rtx        gen_clzv2si2                                       (rtx, rtx);
extern rtx        gen_clzv4si2                                       (rtx, rtx);
extern rtx        gen_clzv8si2                                       (rtx, rtx);
extern rtx        gen_clzv16si2                                      (rtx, rtx);
extern rtx        gen_clzv32si2                                      (rtx, rtx);
extern rtx        gen_clzv64si2                                      (rtx, rtx);
extern rtx        gen_clzv128si2                                     (rtx, rtx);
extern rtx        gen_clzv256si2                                     (rtx, rtx);
extern rtx        gen_clzv512si2                                     (rtx, rtx);
extern rtx        gen_clzv1024si2                                    (rtx, rtx);
extern rtx        gen_clzv1di2                                       (rtx, rtx);
extern rtx        gen_clzv2di2                                       (rtx, rtx);
extern rtx        gen_clzv4di2                                       (rtx, rtx);
extern rtx        gen_clzv8di2                                       (rtx, rtx);
extern rtx        gen_clzv16di2                                      (rtx, rtx);
extern rtx        gen_clzv32di2                                      (rtx, rtx);
extern rtx        gen_clzv64di2                                      (rtx, rtx);
extern rtx        gen_clzv128di2                                     (rtx, rtx);
extern rtx        gen_clzv256di2                                     (rtx, rtx);
extern rtx        gen_clzv512di2                                     (rtx, rtx);
extern rtx        gen_cond_negrvvm8qi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplrvvm8qi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm4qi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplrvvm4qi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm2qi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplrvvm2qi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm1qi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplrvvm1qi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm8hi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplrvvm8hi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm4hi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplrvvm4hi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm2hi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplrvvm2hi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm1hi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplrvvm1hi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm8si                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplrvvm8si                           (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm4si                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplrvvm4si                           (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm2si                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplrvvm2si                           (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm1si                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplrvvm1si                           (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm8di                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplrvvm8di                           (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm4di                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplrvvm4di                           (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm2di                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplrvvm2di                           (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm1di                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplrvvm1di                           (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvmf2qi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplrvvmf2qi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvmf4qi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplrvvmf4qi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvmf8qi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplrvvmf8qi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvmf2hi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplrvvmf2hi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvmf4hi                               (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplrvvmf4hi                          (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvmf2si                               (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplrvvmf2si                          (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv1qi                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv1qi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv2qi                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv2qi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv4qi                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv4qi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv8qi                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv8qi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv16qi                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv16qi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv32qi                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv32qi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv64qi                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv64qi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv128qi                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv128qi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv256qi                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv256qi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv512qi                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv512qi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv1024qi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv1024qi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv2048qi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv2048qi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv4096qi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv4096qi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv1hi                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv1hi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv2hi                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv2hi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv4hi                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv4hi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv8hi                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv8hi                              (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv16hi                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv16hi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv32hi                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv32hi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv64hi                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv64hi                             (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv128hi                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv128hi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv256hi                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv256hi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv512hi                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv512hi                            (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv1024hi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv1024hi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv2048hi                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv2048hi                           (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv1si                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv1si                              (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv2si                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv2si                              (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv4si                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv4si                              (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv8si                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv8si                              (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv16si                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv16si                             (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv32si                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv32si                             (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv64si                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv64si                             (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv128si                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv128si                            (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv256si                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv256si                            (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv512si                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv512si                            (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv1024si                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv1024si                           (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv1di                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv1di                              (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv2di                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv2di                              (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv4di                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv4di                              (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv8di                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv8di                              (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv16di                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv16di                             (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv32di                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv32di                             (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv64di                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv64di                             (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv128di                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv128di                            (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv256di                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv256di                            (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv512di                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_one_cmplv512di                            (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm8qi                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplrvvm8qi                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm4qi                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplrvvm4qi                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm2qi                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplrvvm2qi                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm1qi                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplrvvm1qi                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm8hi                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplrvvm8hi                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm4hi                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplrvvm4hi                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm2hi                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplrvvm2hi                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm1hi                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplrvvm1hi                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm8si                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplrvvm8si                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplrvvm4si                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplrvvm2si                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplrvvm1si                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm8di                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplrvvm8di                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm4di                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplrvvm4di                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm2di                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplrvvm2di                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm1di                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplrvvm1di                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvmf2qi                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplrvvmf2qi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvmf4qi                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplrvvmf4qi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvmf8qi                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplrvvmf8qi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvmf2hi                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplrvvmf2hi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvmf4hi                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplrvvmf4hi                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplrvvmf2si                      (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv1qi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv1qi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv2qi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv2qi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv4qi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv4qi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv8qi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv8qi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv16qi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv16qi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv32qi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv32qi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv64qi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv64qi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv128qi                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv128qi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv256qi                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv256qi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv512qi                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv512qi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv1024qi                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv1024qi                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv2048qi                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv2048qi                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv4096qi                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv4096qi                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv1hi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv1hi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv2hi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv2hi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv4hi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv4hi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv8hi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv8hi                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv16hi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv16hi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv32hi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv32hi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv64hi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv64hi                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv128hi                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv128hi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv256hi                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv256hi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv512hi                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv512hi                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv1024hi                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv1024hi                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv2048hi                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv2048hi                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv1si                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv1si                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv2si                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv2si                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv4si                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv4si                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv8si                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv8si                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv16si                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv16si                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv32si                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv32si                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv64si                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv64si                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv128si                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv128si                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv256si                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv256si                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv512si                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv512si                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv1024si                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv1024si                       (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv1di                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv1di                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv2di                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv2di                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv4di                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv4di                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv8di                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv8di                          (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv16di                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv16di                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv32di                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv32di                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv64di                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv64di                         (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv128di                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv128di                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv256di                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv256di                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv512di                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_one_cmplv512di                        (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm8hf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absrvvm8hf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm4hf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absrvvm4hf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm2hf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absrvvm2hf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm1hf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absrvvm1hf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvmf2hf                               (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absrvvmf2hf                               (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvmf4hf                               (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absrvvmf4hf                               (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm8sf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absrvvm8sf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm4sf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absrvvm4sf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm2sf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absrvvm2sf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm1sf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absrvvm1sf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvmf2sf                               (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absrvvmf2sf                               (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm8df                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absrvvm8df                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm4df                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absrvvm4df                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm2df                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absrvvm2df                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negrvvm1df                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absrvvm1df                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv1hf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv1hf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv2hf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv2hf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv4hf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv4hf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv8hf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv8hf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv16hf                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv16hf                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv32hf                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv32hf                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv64hf                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv64hf                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv128hf                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv128hf                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv256hf                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv256hf                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv512hf                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv512hf                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv1024hf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv1024hf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv2048hf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv2048hf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv1sf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv1sf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv2sf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv2sf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv4sf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv4sf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv8sf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv8sf                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv16sf                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv16sf                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv32sf                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv32sf                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv64sf                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv64sf                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv128sf                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv128sf                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv256sf                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv256sf                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv512sf                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv512sf                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv1024sf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv1024sf                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv1df                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv1df                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv2df                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv2df                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv4df                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv4df                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv8df                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv8df                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv16df                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv16df                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv32df                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv32df                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv64df                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv64df                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv128df                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv128df                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv256df                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv256df                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_negv512df                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_absv512df                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm8hf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absrvvm8hf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm4hf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absrvvm4hf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm2hf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absrvvm2hf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm1hf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absrvvm1hf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvmf2hf                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absrvvmf2hf                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvmf4hf                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absrvvmf4hf                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm8sf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absrvvm8sf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm4sf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absrvvm4sf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm2sf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absrvvm2sf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm1sf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absrvvm1sf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvmf2sf                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absrvvmf2sf                           (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm8df                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absrvvm8df                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm4df                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absrvvm4df                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm2df                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absrvvm2df                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negrvvm1df                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absrvvm1df                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv1hf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv1hf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv2hf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv2hf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv4hf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv4hf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv8hf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv8hf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv16hf                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv16hf                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv32hf                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv32hf                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv64hf                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv64hf                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv128hf                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv128hf                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv256hf                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv256hf                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv512hf                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv512hf                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv1024hf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv1024hf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv2048hf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv2048hf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv1sf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv1sf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv2sf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv2sf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv4sf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv4sf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv8sf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv8sf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv16sf                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv16sf                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv32sf                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv32sf                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv64sf                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv64sf                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv128sf                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv128sf                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv256sf                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv256sf                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv512sf                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv512sf                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv1024sf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv1024sf                            (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv1df                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv1df                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv2df                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv2df                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv4df                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv4df                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv8df                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv8df                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv16df                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv16df                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv32df                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv32df                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv64df                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv64df                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv128df                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv128df                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv256df                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv256df                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_negv512df                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_absv512df                             (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlrvvm8qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrrvvm8qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrrvvm8qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlrvvm4qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrrvvm4qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrrvvm4qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlrvvm2qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrrvvm2qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrrvvm2qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlrvvm1qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrrvvm1qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrrvvm1qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlrvvm8hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrrvvm8hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrrvvm8hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlrvvm4hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrrvvm4hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrrvvm4hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlrvvm2hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrrvvm2hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrrvvm2hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlrvvm1hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrrvvm1hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrrvvm1hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlrvvm8si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrrvvm8si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrrvvm8si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlrvvm4si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrrvvm4si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrrvvm4si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlrvvm2si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrrvvm2si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrrvvm2si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlrvvm1si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrrvvm1si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrrvvm1si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlrvvm8di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrrvvm8di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrrvvm8di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlrvvm4di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrrvvm4di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrrvvm4di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlrvvm2di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrrvvm2di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrrvvm2di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlrvvm1di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrrvvm1di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrrvvm1di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlrvvmf2si                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrrvvmf2si                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrrvvmf2si                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv1qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv1qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv1qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv2qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv2qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv2qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv4qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv4qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv4qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv8qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv8qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv8qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv16qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv16qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv16qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv32qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv32qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv32qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv64qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv64qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv64qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv128qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv128qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv128qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv256qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv256qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv256qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv512qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv512qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv512qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv1024qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv1024qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv1024qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv2048qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv2048qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv2048qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv4096qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv4096qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv4096qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv1hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv1hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv1hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv2hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv2hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv2hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv4hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv4hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv4hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv8hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv8hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv8hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv16hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv16hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv16hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv32hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv32hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv32hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv64hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv64hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv64hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv128hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv128hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv128hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv256hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv256hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv256hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv512hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv512hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv512hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv1024hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv1024hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv1024hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv2048hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv2048hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv2048hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv1si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv1si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv1si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv2si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv2si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv2si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv4si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv4si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv4si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv8si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv8si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv8si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv16si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv16si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv16si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv32si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv32si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv32si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv64si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv64si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv64si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv128si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv128si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv128si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv256si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv256si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv256si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv512si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv512si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv512si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv1024si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv1024si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv1024si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv1di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv1di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv1di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv2di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv2di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv2di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv4di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv4di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv4di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv8di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv8di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv8di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv16di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv16di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv16di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv32di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv32di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv32di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv64di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv64di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv64di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv128di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv128di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv128di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv256di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv256di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv256di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashlv512di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_ashrv512di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_lshrv512di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlrvvm8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrrvvm8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrrvvm8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlrvvm4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrrvvm4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrrvvm4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlrvvm2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrrvvm2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrrvvm2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlrvvm1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrrvvm1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrrvvm1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlrvvm8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrrvvm8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrrvvm8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlrvvm4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrrvvm4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrrvvm4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlrvvm2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrrvvm2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrrvvm2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlrvvm1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrrvvm1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrrvvm1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlrvvm8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrrvvm8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrrvvm8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlrvvm4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrrvvm4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrrvvm4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlrvvm2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrrvvm2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrrvvm2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlrvvm1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrrvvm1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrrvvm1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlrvvm8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrrvvm8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrrvvm8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlrvvm4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrrvvm4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrrvvm4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlrvvm2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrrvvm2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrrvvm2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlrvvm1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrrvvm1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrrvvm1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlrvvmf2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrrvvmf2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrrvvmf2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlrvvmf4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrrvvmf4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrrvvmf4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlrvvmf8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrrvvmf8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrrvvmf8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlrvvmf2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrrvvmf2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrrvvmf2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlrvvmf4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrrvvmf4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrrvvmf4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlrvvmf2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrrvvmf2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrrvvmf2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv16qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv16qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv16qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv32qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv32qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv32qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv64qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv64qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv64qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv128qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv128qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv128qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv256qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv256qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv256qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv512qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv512qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv512qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv1024qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv1024qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv1024qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv2048qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv2048qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv2048qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv4096qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv4096qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv4096qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv16hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv16hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv16hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv32hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv32hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv32hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv64hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv64hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv64hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv128hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv128hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv128hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv256hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv256hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv256hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv512hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv512hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv512hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv1024hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv1024hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv1024hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv2048hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv2048hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv2048hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv16si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv16si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv16si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv32si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv32si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv32si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv64si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv64si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv64si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv128si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv128si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv128si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv256si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv256si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv256si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv512si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv512si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv512si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv1024si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv1024si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv1024si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv16di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv16di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv16di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv32di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv32di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv32di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv64di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv64di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv64di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv128di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv128di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv128di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv256di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv256di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv256di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashlv512di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_ashrv512di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_lshrv512di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm8qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm8qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andrvvm8qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorrvvm8qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorrvvm8qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm8qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxrvvm8qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm8qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminrvvm8qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm8qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm8qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivrvvm8qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modrvvm8qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodrvvm8qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm4qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm4qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andrvvm4qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorrvvm4qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorrvvm4qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm4qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxrvvm4qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm4qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminrvvm4qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm4qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm4qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivrvvm4qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modrvvm4qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodrvvm4qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm2qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm2qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andrvvm2qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorrvvm2qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorrvvm2qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm2qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxrvvm2qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm2qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminrvvm2qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm2qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm2qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivrvvm2qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modrvvm2qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodrvvm2qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm1qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm1qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andrvvm1qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorrvvm1qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorrvvm1qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm1qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxrvvm1qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm1qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminrvvm1qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm1qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm1qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivrvvm1qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modrvvm1qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodrvvm1qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm8hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm8hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andrvvm8hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorrvvm8hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorrvvm8hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm8hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxrvvm8hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm8hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminrvvm8hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm8hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm8hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivrvvm8hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modrvvm8hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodrvvm8hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm4hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm4hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andrvvm4hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorrvvm4hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorrvvm4hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm4hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxrvvm4hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm4hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminrvvm4hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm4hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm4hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivrvvm4hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modrvvm4hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodrvvm4hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm2hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm2hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andrvvm2hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorrvvm2hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorrvvm2hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm2hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxrvvm2hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm2hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminrvvm2hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm2hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm2hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivrvvm2hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modrvvm2hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodrvvm2hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm1hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm1hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andrvvm1hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorrvvm1hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorrvvm1hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm1hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxrvvm1hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm1hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminrvvm1hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm1hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm1hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivrvvm1hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modrvvm1hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodrvvm1hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm8si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm8si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andrvvm8si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorrvvm8si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorrvvm8si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm8si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxrvvm8si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm8si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminrvvm8si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm8si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm8si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivrvvm8si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modrvvm8si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodrvvm8si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm4si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm4si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andrvvm4si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorrvvm4si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorrvvm4si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm4si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxrvvm4si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm4si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminrvvm4si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm4si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm4si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivrvvm4si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modrvvm4si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodrvvm4si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm2si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm2si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andrvvm2si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorrvvm2si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorrvvm2si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm2si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxrvvm2si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm2si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminrvvm2si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm2si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm2si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivrvvm2si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modrvvm2si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodrvvm2si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm1si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm1si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andrvvm1si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorrvvm1si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorrvvm1si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm1si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxrvvm1si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm1si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminrvvm1si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm1si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm1si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivrvvm1si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modrvvm1si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodrvvm1si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm8di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm8di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andrvvm8di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorrvvm8di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorrvvm8di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm8di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxrvvm8di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm8di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminrvvm8di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm8di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm8di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivrvvm8di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modrvvm8di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodrvvm8di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm4di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm4di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andrvvm4di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorrvvm4di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorrvvm4di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm4di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxrvvm4di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm4di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminrvvm4di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm4di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm4di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivrvvm4di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modrvvm4di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodrvvm4di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm2di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm2di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andrvvm2di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorrvvm2di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorrvvm2di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm2di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxrvvm2di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm2di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminrvvm2di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm2di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm2di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivrvvm2di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modrvvm2di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodrvvm2di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm1di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm1di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andrvvm1di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorrvvm1di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorrvvm1di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm1di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxrvvm1di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm1di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminrvvm1di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm1di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm1di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivrvvm1di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modrvvm1di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodrvvm1di                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvmf2qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvmf2qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andrvvmf2qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorrvvmf2qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorrvvmf2qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvmf2qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvmf2qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modrvvmf2qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodrvvmf2qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvmf4qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvmf4qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andrvvmf4qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorrvvmf4qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorrvvmf4qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvmf4qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvmf4qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modrvvmf4qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodrvvmf4qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvmf8qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvmf8qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andrvvmf8qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorrvvmf8qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorrvvmf8qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvmf8qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvmf8qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modrvvmf8qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodrvvmf8qi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvmf2hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvmf2hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andrvvmf2hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorrvvmf2hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorrvvmf2hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvmf2hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvmf2hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modrvvmf2hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodrvvmf2hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvmf4hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvmf4hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andrvvmf4hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorrvvmf4hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorrvvmf4hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvmf4hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvmf4hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modrvvmf4hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodrvvmf4hi                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvmf2si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvmf2si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andrvvmf2si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorrvvmf2si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorrvvmf2si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvmf2si                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxrvvmf2si                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvmf2si                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminrvvmf2si                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvmf2si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvmf2si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivrvvmf2si                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modrvvmf2si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodrvvmf2si                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv1qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv1qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv1qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv1qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv1qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv1qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv1qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv1qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv1qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv1qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv1qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv1qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv1qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv1qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv2qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv2qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv2qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv2qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv2qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv2qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv2qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv2qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv2qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv2qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv2qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv2qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv2qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv2qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv4qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv4qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv4qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv4qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv4qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv4qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv4qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv4qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv4qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv4qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv4qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv4qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv4qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv4qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv8qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv8qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv8qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv8qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv8qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv8qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv8qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv8qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv8qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv8qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv8qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv8qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv8qi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv8qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv16qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv16qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv16qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv16qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv16qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv16qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv16qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv16qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv16qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv16qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv16qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv16qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv16qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv16qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv32qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv32qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv32qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv32qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv32qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv32qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv32qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv32qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv32qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv32qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv32qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv32qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv32qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv32qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv64qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv64qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv64qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv64qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv64qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv64qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv64qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv64qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv64qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv64qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv64qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv64qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv64qi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv64qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv128qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv128qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv128qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv128qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv128qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv128qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv128qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv128qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv128qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv128qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv128qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv128qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv128qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv128qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv256qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv256qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv256qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv256qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv256qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv256qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv256qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv256qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv256qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv256qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv256qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv256qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv256qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv256qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv512qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv512qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv512qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv512qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv512qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv512qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv512qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv512qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv512qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv512qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv512qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv512qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv512qi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv512qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv1024qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv1024qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv1024qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv1024qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv1024qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv1024qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv1024qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv1024qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv1024qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv1024qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv1024qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv1024qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv1024qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv1024qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv2048qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv2048qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv2048qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv2048qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv2048qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv2048qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv2048qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv2048qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv2048qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv2048qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv2048qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv2048qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv2048qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv2048qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv4096qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv4096qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv4096qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv4096qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv4096qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv4096qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv4096qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv4096qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv4096qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv4096qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv4096qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv4096qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv4096qi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv4096qi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv1hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv1hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv1hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv1hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv1hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv1hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv1hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv1hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv1hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv1hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv1hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv1hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv1hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv1hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv2hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv2hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv2hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv2hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv2hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv2hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv2hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv2hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv2hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv2hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv2hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv2hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv2hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv2hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv4hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv4hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv4hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv4hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv4hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv4hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv4hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv4hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv4hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv4hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv4hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv4hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv4hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv4hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv8hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv8hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv8hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv8hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv8hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv8hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv8hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv8hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv8hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv8hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv8hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv8hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv8hi                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv8hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv16hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv16hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv16hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv16hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv16hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv16hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv16hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv16hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv16hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv16hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv16hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv16hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv16hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv16hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv32hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv32hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv32hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv32hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv32hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv32hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv32hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv32hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv32hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv32hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv32hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv32hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv32hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv32hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv64hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv64hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv64hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv64hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv64hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv64hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv64hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv64hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv64hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv64hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv64hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv64hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv64hi                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv64hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv128hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv128hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv128hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv128hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv128hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv128hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv128hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv128hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv128hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv128hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv128hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv128hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv128hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv128hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv256hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv256hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv256hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv256hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv256hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv256hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv256hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv256hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv256hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv256hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv256hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv256hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv256hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv256hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv512hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv512hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv512hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv512hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv512hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv512hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv512hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv512hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv512hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv512hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv512hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv512hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv512hi                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv512hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv1024hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv1024hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv1024hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv1024hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv1024hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv1024hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv1024hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv1024hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv1024hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv1024hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv1024hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv1024hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv1024hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv1024hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv2048hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv2048hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv2048hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv2048hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv2048hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv2048hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv2048hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv2048hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv2048hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv2048hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv2048hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv2048hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv2048hi                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv2048hi                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv1si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv1si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv1si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv1si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv1si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv1si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv1si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv1si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv1si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv1si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv1si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv1si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv1si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv1si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv2si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv2si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv2si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv2si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv2si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv2si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv2si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv2si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv2si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv2si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv2si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv2si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv2si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv2si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv4si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv4si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv4si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv4si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv4si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv4si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv4si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv4si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv4si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv4si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv4si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv4si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv4si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv4si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv8si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv8si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv8si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv8si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv8si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv8si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv8si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv8si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv8si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv8si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv8si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv8si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv8si                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv8si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv16si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv16si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv16si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv16si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv16si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv16si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv16si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv16si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv16si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv16si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv16si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv16si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv16si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv16si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv32si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv32si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv32si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv32si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv32si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv32si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv32si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv32si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv32si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv32si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv32si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv32si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv32si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv32si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv64si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv64si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv64si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv64si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv64si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv64si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv64si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv64si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv64si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv64si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv64si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv64si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv64si                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv64si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv128si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv128si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv128si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv128si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv128si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv128si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv128si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv128si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv128si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv128si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv128si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv128si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv128si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv128si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv256si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv256si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv256si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv256si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv256si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv256si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv256si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv256si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv256si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv256si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv256si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv256si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv256si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv256si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv512si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv512si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv512si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv512si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv512si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv512si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv512si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv512si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv512si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv512si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv512si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv512si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv512si                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv512si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv1024si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv1024si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv1024si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv1024si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv1024si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv1024si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv1024si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv1024si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv1024si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv1024si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv1024si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv1024si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv1024si                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv1024si                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv1di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv1di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv1di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv1di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv1di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv1di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv1di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv1di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv1di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv1di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv1di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv1di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv1di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv1di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv2di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv2di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv2di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv2di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv2di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv2di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv2di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv2di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv2di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv2di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv2di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv2di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv2di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv2di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv4di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv4di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv4di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv4di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv4di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv4di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv4di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv4di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv4di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv4di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv4di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv4di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv4di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv4di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv8di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv8di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv8di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv8di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv8di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv8di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv8di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv8di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv8di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv8di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv8di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv8di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv8di                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv8di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv16di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv16di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv16di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv16di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv16di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv16di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv16di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv16di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv16di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv16di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv16di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv16di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv16di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv16di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv32di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv32di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv32di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv32di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv32di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv32di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv32di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv32di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv32di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv32di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv32di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv32di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv32di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv32di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv64di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv64di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv64di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv64di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv64di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv64di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv64di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv64di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv64di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv64di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv64di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv64di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv64di                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv64di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv128di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv128di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv128di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv128di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv128di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv128di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv128di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv128di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv128di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv128di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv128di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv128di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv128di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv128di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv256di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv256di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv256di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv256di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv256di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv256di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv256di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv256di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv256di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv256di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv256di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv256di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv256di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv256di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv512di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv512di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_andv512di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_iorv512di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_xorv512di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv512di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umaxv512di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv512di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_uminv512di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv512di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv512di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_udivv512di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_modv512di                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_umodv512di                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andrvvm8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorrvvm8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorrvvm8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxrvvm8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminrvvm8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivrvvm8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modrvvm8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodrvvm8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andrvvm4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorrvvm4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorrvvm4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxrvvm4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminrvvm4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivrvvm4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modrvvm4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodrvvm4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andrvvm2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorrvvm2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorrvvm2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxrvvm2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminrvvm2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivrvvm2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modrvvm2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodrvvm2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andrvvm1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorrvvm1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorrvvm1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxrvvm1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminrvvm1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivrvvm1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modrvvm1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodrvvm1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andrvvm8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorrvvm8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorrvvm8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxrvvm8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminrvvm8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivrvvm8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modrvvm8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodrvvm8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andrvvm4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorrvvm4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorrvvm4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxrvvm4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminrvvm4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivrvvm4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modrvvm4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodrvvm4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andrvvm2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorrvvm2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorrvvm2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxrvvm2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminrvvm2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivrvvm2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modrvvm2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodrvvm2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andrvvm1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorrvvm1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorrvvm1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxrvvm1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminrvvm1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivrvvm1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modrvvm1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodrvvm1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andrvvm8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorrvvm8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorrvvm8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxrvvm8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminrvvm8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivrvvm8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modrvvm8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodrvvm8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andrvvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorrvvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorrvvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxrvvm4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminrvvm4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivrvvm4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modrvvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodrvvm4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andrvvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorrvvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorrvvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxrvvm2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminrvvm2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivrvvm2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modrvvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodrvvm2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andrvvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorrvvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorrvvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxrvvm1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminrvvm1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivrvvm1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modrvvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodrvvm1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andrvvm8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorrvvm8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorrvvm8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxrvvm8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminrvvm8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivrvvm8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modrvvm8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodrvvm8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andrvvm4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorrvvm4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorrvvm4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxrvvm4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminrvvm4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivrvvm4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modrvvm4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodrvvm4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andrvvm2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorrvvm2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorrvvm2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxrvvm2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminrvvm2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivrvvm2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modrvvm2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodrvvm2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andrvvm1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorrvvm1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorrvvm1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxrvvm1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminrvvm1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivrvvm1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modrvvm1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodrvvm1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvmf2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvmf2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andrvvmf2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorrvvmf2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorrvvmf2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvmf2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxrvvmf2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvmf2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminrvvmf2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvmf2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvmf2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivrvvmf2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modrvvmf2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodrvvmf2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvmf4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvmf4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andrvvmf4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorrvvmf4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorrvvmf4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvmf4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxrvvmf4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvmf4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminrvvmf4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvmf4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvmf4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivrvvmf4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modrvvmf4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodrvvmf4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvmf8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvmf8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andrvvmf8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorrvvmf8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorrvvmf8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvmf8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxrvvmf8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvmf8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminrvvmf8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvmf8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvmf8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivrvvmf8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modrvvmf8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodrvvmf8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvmf2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvmf2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andrvvmf2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorrvvmf2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorrvvmf2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvmf2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxrvvmf2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvmf2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminrvvmf2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvmf2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvmf2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivrvvmf2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modrvvmf2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodrvvmf2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvmf4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvmf4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andrvvmf4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorrvvmf4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorrvvmf4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvmf4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxrvvmf4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvmf4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminrvvmf4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvmf4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvmf4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivrvvmf4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modrvvmf4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodrvvmf4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andrvvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorrvvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorrvvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvmf2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxrvvmf2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvmf2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminrvvmf2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivrvvmf2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modrvvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodrvvmf2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv16qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv16qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv16qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv16qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv16qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv16qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv16qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv16qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv16qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv16qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv16qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv16qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv16qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv16qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv32qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv32qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv32qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv32qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv32qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv32qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv32qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv32qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv32qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv32qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv32qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv32qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv32qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv32qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv64qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv64qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv64qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv64qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv64qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv64qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv64qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv64qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv64qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv64qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv64qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv64qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv64qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv64qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv128qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv128qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv128qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv128qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv128qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv128qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv128qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv128qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv128qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv128qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv128qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv128qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv128qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv128qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv256qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv256qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv256qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv256qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv256qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv256qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv256qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv256qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv256qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv256qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv256qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv256qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv256qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv256qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv512qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv512qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv512qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv512qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv512qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv512qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv512qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv512qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv512qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv512qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv512qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv512qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv512qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv512qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv1024qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv1024qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv1024qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv1024qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv1024qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv1024qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv1024qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv1024qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv1024qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv1024qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv1024qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv1024qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv1024qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv1024qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv2048qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv2048qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv2048qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv2048qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv2048qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv2048qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv2048qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv2048qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv2048qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv2048qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv2048qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv2048qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv2048qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv2048qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv4096qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv4096qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv4096qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv4096qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv4096qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv4096qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv4096qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv4096qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv4096qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv4096qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv4096qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv4096qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv4096qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv4096qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv16hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv16hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv16hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv16hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv16hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv16hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv16hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv16hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv16hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv16hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv16hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv16hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv16hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv16hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv32hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv32hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv32hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv32hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv32hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv32hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv32hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv32hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv32hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv32hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv32hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv32hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv32hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv32hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv64hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv64hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv64hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv64hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv64hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv64hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv64hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv64hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv64hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv64hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv64hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv64hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv64hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv64hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv128hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv128hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv128hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv128hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv128hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv128hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv128hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv128hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv128hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv128hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv128hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv128hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv128hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv128hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv256hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv256hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv256hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv256hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv256hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv256hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv256hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv256hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv256hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv256hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv256hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv256hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv256hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv256hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv512hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv512hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv512hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv512hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv512hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv512hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv512hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv512hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv512hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv512hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv512hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv512hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv512hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv512hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv1024hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv1024hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv1024hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv1024hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv1024hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv1024hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv1024hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv1024hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv1024hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv1024hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv1024hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv1024hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv1024hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv1024hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv2048hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv2048hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv2048hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv2048hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv2048hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv2048hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv2048hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv2048hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv2048hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv2048hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv2048hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv2048hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv2048hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv2048hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv16si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv16si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv16si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv16si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv16si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv16si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv16si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv16si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv16si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv16si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv16si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv16si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv16si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv16si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv32si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv32si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv32si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv32si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv32si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv32si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv32si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv32si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv32si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv32si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv32si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv32si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv32si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv32si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv64si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv64si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv64si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv64si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv64si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv64si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv64si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv64si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv64si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv64si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv64si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv64si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv64si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv64si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv128si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv128si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv128si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv128si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv128si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv128si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv128si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv128si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv128si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv128si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv128si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv128si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv128si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv128si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv256si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv256si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv256si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv256si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv256si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv256si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv256si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv256si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv256si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv256si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv256si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv256si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv256si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv256si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv512si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv512si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv512si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv512si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv512si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv512si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv512si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv512si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv512si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv512si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv512si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv512si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv512si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv512si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv1024si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv1024si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv1024si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv1024si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv1024si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv1024si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv1024si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv1024si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv1024si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv1024si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv1024si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv1024si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv1024si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv1024si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv16di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv16di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv16di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv16di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv16di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv16di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv16di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv16di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv16di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv16di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv16di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv16di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv16di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv16di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv32di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv32di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv32di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv32di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv32di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv32di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv32di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv32di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv32di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv32di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv32di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv32di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv32di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv32di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv64di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv64di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv64di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv64di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv64di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv64di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv64di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv64di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv64di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv64di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv64di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv64di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv64di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv64di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv128di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv128di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv128di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv128di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv128di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv128di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv128di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv128di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv128di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv128di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv128di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv128di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv128di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv128di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv256di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv256di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv256di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv256di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv256di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv256di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv256di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv256di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv256di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv256di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv256di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv256di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv256di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv256di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv512di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv512di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_andv512di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_iorv512di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_xorv512di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv512di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umaxv512di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv512di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_uminv512di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv512di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv512di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_udivv512di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_modv512di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_umodv512di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm8hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm8hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm8hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm8hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm4hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm4hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm4hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm4hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm2hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm2hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm2hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm2hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm1hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm1hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm1hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm1hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvmf2hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvmf2hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvmf2hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvmf2hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvmf4hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvmf4hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvmf4hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvmf4hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm8sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm8sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm8sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm8sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm4sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm4sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm4sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm4sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm2sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm2sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm2sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm2sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm1sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm1sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm1sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm1sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvmf2sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvmf2sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvmf2sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvmf2sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm8df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm8df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm8df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm8df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm4df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm4df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm4df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm4df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm2df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm2df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm2df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm2df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addrvvm1df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulrvvm1df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subrvvm1df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divrvvm1df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv1hf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv1hf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv1hf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv1hf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv2hf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv2hf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv2hf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv2hf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv4hf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv4hf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv4hf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv4hf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv8hf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv8hf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv8hf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv8hf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv16hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv16hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv16hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv16hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv32hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv32hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv32hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv32hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv64hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv64hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv64hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv64hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv128hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv128hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv128hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv128hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv256hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv256hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv256hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv256hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv512hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv512hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv512hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv512hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv1024hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv1024hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv1024hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv1024hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv2048hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv2048hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv2048hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv2048hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv1sf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv1sf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv1sf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv1sf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv2sf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv2sf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv2sf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv2sf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv4sf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv4sf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv4sf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv4sf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv8sf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv8sf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv8sf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv8sf                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv16sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv16sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv16sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv16sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv32sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv32sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv32sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv32sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv64sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv64sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv64sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv64sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv128sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv128sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv128sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv128sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv256sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv256sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv256sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv256sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv512sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv512sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv512sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv512sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv1024sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv1024sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv1024sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv1024sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv1df                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv1df                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv1df                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv1df                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv2df                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv2df                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv2df                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv2df                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv4df                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv4df                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv4df                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv4df                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv8df                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv8df                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv8df                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv8df                                   (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv16df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv16df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv16df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv16df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv32df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv32df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv32df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv32df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv64df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv64df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv64df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv64df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv128df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv128df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv128df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv128df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv256df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv256df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv256df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv256df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_addv512df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_mulv512df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_subv512df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_divv512df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm8hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm8hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm8hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm8hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm4hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm4hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm4hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm4hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm2hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm2hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm2hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm2hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm1hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm1hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm1hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm1hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvmf2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvmf2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvmf2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvmf2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvmf4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvmf4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvmf4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvmf4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm8sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm8sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm8sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm8sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm4sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm4sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm4sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm4sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm2sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm2sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm2sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm2sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm1sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm1sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm1sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm1sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvmf2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvmf2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvmf2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvmf2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm8df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm8df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm8df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm8df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm4df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm4df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm4df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm4df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm2df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm2df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm2df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm2df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addrvvm1df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulrvvm1df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subrvvm1df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divrvvm1df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv1hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv1hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv1hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv1hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv8hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv8hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv8hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv8hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv16hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv16hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv16hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv16hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv32hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv32hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv32hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv32hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv64hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv64hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv64hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv64hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv128hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv128hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv128hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv128hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv256hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv256hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv256hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv256hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv512hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv512hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv512hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv512hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv1024hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv1024hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv1024hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv1024hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv2048hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv2048hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv2048hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv2048hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv1sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv1sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv1sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv1sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv4sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv4sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv4sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv4sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv8sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv8sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv8sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv8sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv16sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv16sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv16sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv16sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv32sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv32sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv32sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv32sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv64sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv64sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv64sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv64sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv128sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv128sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv128sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv128sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv256sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv256sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv256sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv256sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv512sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv512sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv512sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv512sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv1024sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv1024sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv1024sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv1024sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv1df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv1df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv1df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv1df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv2df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv2df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv2df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv2df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv4df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv4df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv4df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv4df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv8df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv8df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv8df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv8df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv16df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv16df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv16df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv16df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv32df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv32df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv32df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv32df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv64df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv64df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv64df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv64df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv128df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv128df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv128df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv128df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv256df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv256df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv256df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv256df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_addv512df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_mulv512df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_subv512df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_divv512df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm8hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm8hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm4hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm4hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm2hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm2hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm1hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm1hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvmf2hf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvmf2hf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvmf4hf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvmf4hf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm8sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm8sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm4sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm4sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm2sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm2sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm1sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm1sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvmf2sf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvmf2sf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm8df                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm8df                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm4df                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm4df                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm2df                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm2df                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxrvvm1df                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminrvvm1df                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv1hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv1hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv2hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv2hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv4hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv4hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv8hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv8hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv16hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv16hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv32hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv32hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv64hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv64hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv128hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv128hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv256hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv256hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv512hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv512hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv1024hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv1024hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv2048hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv2048hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv1sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv1sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv2sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv2sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv4sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv4sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv8sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv8sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv16sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv16sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv32sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv32sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv64sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv64sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv128sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv128sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv256sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv256sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv512sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv512sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv1024sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv1024sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv1df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv1df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv2df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv2df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv4df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv4df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv8df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv8df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv16df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv16df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv32df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv32df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv64df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv64df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv128df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv128df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv256df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv256df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_smaxv512df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_sminv512df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm8hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm8hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm1hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm1hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvmf2hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvmf2hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvmf4hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvmf4hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm8sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm8sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm4sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm4sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm1sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm1sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvmf2sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvmf2sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm8df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm8df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm4df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm4df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm2df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm2df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxrvvm1df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminrvvm1df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv1hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv1hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv2hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv2hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv4hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv4hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv8hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv8hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv16hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv16hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv32hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv32hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv64hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv64hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv128hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv128hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv256hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv256hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv512hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv512hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv1024hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv1024hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv2048hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv2048hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv1sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv1sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv2sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv2sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv4sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv4sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv8sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv8sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv16sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv16sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv32sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv32sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv64sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv64sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv128sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv128sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv256sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv256sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv512sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv512sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv1024sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv1024sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv1df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv1df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv2df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv2df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv4df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv4df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv8df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv8df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv16df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv16df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv32df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv32df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv64df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv64df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv128df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv128df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv256df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv256df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_smaxv512df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_sminv512df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxrvvm8hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminrvvm8hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxrvvm4hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminrvvm4hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxrvvm2hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminrvvm2hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxrvvm1hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminrvvm1hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxrvvmf2hf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminrvvmf2hf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxrvvmf4hf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminrvvmf4hf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxrvvm8sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminrvvm8sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxrvvm4sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminrvvm4sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxrvvm2sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminrvvm2sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxrvvm1sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminrvvm1sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxrvvmf2sf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminrvvmf2sf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxrvvm8df                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminrvvm8df                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxrvvm4df                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminrvvm4df                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxrvvm2df                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminrvvm2df                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxrvvm1df                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminrvvm1df                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv1hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv1hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv2hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv2hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv4hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv4hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv8hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv8hf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv16hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv16hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv32hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv32hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv64hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv64hf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv128hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv128hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv256hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv256hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv512hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv512hf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv1024hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv1024hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv2048hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv2048hf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv1sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv1sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv2sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv2sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv4sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv4sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv8sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv8sf                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv16sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv16sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv32sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv32sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv64sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv64sf                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv128sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv128sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv256sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv256sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv512sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv512sf                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv1024sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv1024sf                               (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv1df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv1df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv2df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv2df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv4df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv4df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv8df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv8df                                  (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv16df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv16df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv32df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv32df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv64df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv64df                                 (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv128df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv128df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv256df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv256df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmaxv512df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fminv512df                                (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxrvvm8hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminrvvm8hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxrvvm4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminrvvm4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxrvvm2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminrvvm2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxrvvm1hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminrvvm1hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxrvvmf2hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminrvvmf2hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxrvvmf4hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminrvvmf4hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxrvvm8sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminrvvm8sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxrvvm4sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminrvvm4sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxrvvm2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminrvvm2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxrvvm1sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminrvvm1sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxrvvmf2sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminrvvmf2sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxrvvm8df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminrvvm8df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxrvvm4df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminrvvm4df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxrvvm2df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminrvvm2df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxrvvm1df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminrvvm1df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv1hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv1hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv2hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv2hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv4hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv4hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv8hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv8hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv16hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv16hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv32hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv32hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv64hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv64hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv128hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv128hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv256hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv256hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv512hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv512hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv1024hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv1024hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv2048hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv2048hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv1sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv1sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv2sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv2sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv4sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv4sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv8sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv8sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv16sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv16sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv32sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv32sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv64sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv64sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv128sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv128sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv256sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv256sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv512sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv512sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv1024sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv1024sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv1df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv1df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv2df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv2df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv4df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv4df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv8df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv8df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv16df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv16df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv32df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv32df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv64df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv64df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv128df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv128df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv256df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv256df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmaxv512df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fminv512df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignrvvm8hf                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignrvvm4hf                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignrvvm2hf                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignrvvm1hf                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignrvvmf2hf                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignrvvmf4hf                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignrvvm8sf                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignrvvm4sf                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignrvvm2sf                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignrvvm1sf                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignrvvmf2sf                          (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignrvvm8df                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignrvvm4df                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignrvvm2df                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignrvvm1df                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv1hf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv2hf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv4hf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv8hf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv16hf                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv32hf                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv64hf                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv128hf                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv256hf                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv512hf                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv1024hf                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv2048hf                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv1sf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv2sf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv4sf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv8sf                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv16sf                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv32sf                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv64sf                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv128sf                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv256sf                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv512sf                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv1024sf                           (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv1df                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv2df                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv4df                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv8df                              (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv16df                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv32df                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv64df                             (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv128df                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv256df                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_copysignv512df                            (rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm8qi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm4qi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm2qi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm1qi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm8hi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm4hi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm2hi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm1hi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm8si                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm4si                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm2si                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm1si                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm8di                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm4di                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm2di                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm1di                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvmf2qi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvmf4qi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvmf8qi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvmf2hi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvmf4hi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvmf2si                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav1qi                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav2qi                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav4qi                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav8qi                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav16qi                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav32qi                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav64qi                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav128qi                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav256qi                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav512qi                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav1024qi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav2048qi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav4096qi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav1hi                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav2hi                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav4hi                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav8hi                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav16hi                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav32hi                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav64hi                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav128hi                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav256hi                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav512hi                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav1024hi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav2048hi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav1si                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav2si                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav4si                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav8si                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav16si                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav32si                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav64si                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav128si                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav256si                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav512si                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav1024si                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav1di                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav2di                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav4di                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav8di                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav16di                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav32di                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav64di                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav128di                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav256di                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav512di                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm8qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm4qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm2qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm1qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm8hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm4hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm2hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm1hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm8si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm4si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm2si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm1si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm8di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm4di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm2di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm1di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvmf2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvmf4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvmf8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvmf2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvmf4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvmf2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav1qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav2qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav4qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav8qi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav16qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav32qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav64qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav128qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav256qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav512qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav1024qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav2048qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav4096qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav1hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav2hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav4hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav8hi                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav16hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav32hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav64hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav128hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav256hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav512hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav1024hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav2048hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav1si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav2si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav4si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav8si                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav16si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav32si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav64si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav128si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav256si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav512si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav1024si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav1di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav2di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav4di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav8di                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav16di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav32di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav64di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav128di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav256di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav512di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm8qi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm4qi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm2qi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm1qi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm8hi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm4hi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm2hi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm1hi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm8si                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm4si                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm2si                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm1si                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm8di                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm4di                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm2di                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm1di                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvmf2qi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvmf4qi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvmf8qi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvmf2hi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvmf4hi                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvmf2si                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav1qi                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav2qi                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav4qi                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav8qi                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav16qi                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav32qi                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav64qi                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav128qi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav256qi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav512qi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav1024qi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav2048qi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav4096qi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav1hi                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav2hi                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav4hi                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav8hi                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav16hi                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav32hi                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav64hi                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav128hi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav256hi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav512hi                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav1024hi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav2048hi                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav1si                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav2si                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav4si                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav8si                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav16si                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav32si                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav64si                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav128si                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav256si                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav512si                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav1024si                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav1di                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav2di                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav4di                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav8di                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav16di                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav32di                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav64di                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav128di                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav256di                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav512di                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm8qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm4qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm2qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm1qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm8hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm4hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm2hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm1hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm8si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm4si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm2si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm1si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm8di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm4di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm2di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm1di                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvmf2qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvmf4qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvmf8qi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvmf2hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvmf4hi                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvmf2si                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav1qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav2qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav4qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav8qi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav16qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav32qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav64qi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav128qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav256qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav512qi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav1024qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav2048qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav4096qi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav1hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav2hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav4hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav8hi                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav16hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav32hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav64hi                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav128hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav256hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav512hi                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav1024hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav2048hi                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav1si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav2si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav4si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav8si                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav16si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav32si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav64si                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav128si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav256si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav512si                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav1024si                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav1di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav2di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav4di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav8di                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav16di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav32di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav64di                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav128di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav256di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav512di                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm8hf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm4hf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm2hf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm1hf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvmf2hf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvmf4hf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm8sf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm4sf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm2sf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm1sf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvmf2sf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm8df                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm4df                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm2df                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmarvvm1df                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav1hf                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav2hf                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav4hf                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav8hf                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav16hf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav32hf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav64hf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav128hf                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav256hf                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav512hf                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav1024hf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav2048hf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav1sf                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav2sf                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav4sf                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav8sf                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav16sf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav32sf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav64sf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav128sf                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav256sf                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav512sf                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav1024sf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav1df                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav2df                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav4df                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav8df                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav16df                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav32df                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav64df                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav128df                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav256df                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmav512df                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm8hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm4hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm2hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm1hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvmf2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvmf4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm8sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm4sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm2sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm1sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvmf2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm8df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm4df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm2df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmarvvm1df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav1hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav8hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav16hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav32hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav64hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav128hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav256hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav512hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav1024hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav2048hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav1sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav4sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav8sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav16sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav32sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav64sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav128sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav256sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav512sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav1024sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav1df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav2df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav4df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav8df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav16df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav32df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav64df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav128df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav256df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmav512df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm8hf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm4hf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm2hf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm1hf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvmf2hf                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvmf4hf                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm8sf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm4sf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm2sf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm1sf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvmf2sf                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm8df                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm4df                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm2df                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmarvvm1df                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav1hf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav2hf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav4hf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav8hf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav16hf                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav32hf                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav64hf                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav128hf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav256hf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav512hf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav1024hf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav2048hf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav1sf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav2sf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav4sf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav8sf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav16sf                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav32sf                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav64sf                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav128sf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav256sf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav512sf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav1024sf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav1df                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav2df                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav4df                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav8df                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav16df                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav32df                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav64df                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav128df                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav256df                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmav512df                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm8hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm1hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvmf2hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvmf4hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm8sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm4sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm1sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvmf2sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm8df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm4df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm2df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmarvvm1df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav1hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav2hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav4hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav8hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav16hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav32hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav64hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav128hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav256hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav512hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav1024hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav2048hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav1sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav2sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav4sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav8sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav16sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav32sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav64sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav128sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav256sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav512sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav1024sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav1df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav2df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav4df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav8df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav16df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav32df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav64df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav128df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav256df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmav512df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsrvvm8hf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsrvvm4hf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsrvvm2hf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsrvvm1hf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsrvvmf2hf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsrvvmf4hf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsrvvm8sf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsrvvm4sf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsrvvm2sf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsrvvm1sf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsrvvmf2sf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsrvvm8df                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsrvvm4df                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsrvvm2df                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsrvvm1df                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv1hf                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv2hf                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv4hf                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv8hf                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv16hf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv32hf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv64hf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv128hf                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv256hf                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv512hf                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv1024hf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv2048hf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv1sf                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv2sf                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv4sf                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv8sf                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv16sf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv32sf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv64sf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv128sf                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv256sf                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv512sf                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv1024sf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv1df                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv2df                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv4df                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv8df                                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv16df                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv32df                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv64df                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv128df                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv256df                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fmsv512df                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsrvvm8hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsrvvm4hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsrvvm2hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsrvvm1hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsrvvmf2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsrvvmf4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsrvvm8sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsrvvm4sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsrvvm2sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsrvvm1sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsrvvmf2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsrvvm8df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsrvvm4df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsrvvm2df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsrvvm1df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv1hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv2hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv4hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv8hf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv16hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv32hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv64hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv128hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv256hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv512hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv1024hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv2048hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv1sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv2sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv4sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv8sf                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv16sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv32sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv64sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv128sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv256sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv512sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv1024sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv1df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv2df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv4df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv8df                               (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv16df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv32df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv64df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv128df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv256df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fmsv512df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsrvvm8hf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsrvvm4hf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsrvvm2hf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsrvvm1hf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsrvvmf2hf                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsrvvmf4hf                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsrvvm8sf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsrvvm4sf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsrvvm2sf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsrvvm1sf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsrvvmf2sf                              (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsrvvm8df                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsrvvm4df                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsrvvm2df                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsrvvm1df                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv1hf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv2hf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv4hf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv8hf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv16hf                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv32hf                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv64hf                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv128hf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv256hf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv512hf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv1024hf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv2048hf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv1sf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv2sf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv4sf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv8sf                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv16sf                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv32sf                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv64sf                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv128sf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv256sf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv512sf                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv1024sf                               (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv1df                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv2df                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv4df                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv8df                                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv16df                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv32df                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv64df                                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv128df                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv256df                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_fnmsv512df                                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsrvvm8hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsrvvm4hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsrvvm2hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsrvvm1hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsrvvmf2hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsrvvmf4hf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsrvvm8sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsrvvm4sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsrvvm2sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsrvvm1sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsrvvmf2sf                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsrvvm8df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsrvvm4df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsrvvm2df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsrvvm1df                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv1hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv2hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv4hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv8hf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv16hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv32hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv64hf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv128hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv256hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv512hf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv1024hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv2048hf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv1sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv2sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv4sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv8sf                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv16sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv32sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv64sf                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv128sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv256sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv512sf                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv1024sf                           (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv1df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv2df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv4df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv8df                              (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv16df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv32df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv64df                             (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv128df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv256df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_fnmsv512df                            (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm8qi                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm4qi                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm2qi                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm1qi                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm8hi                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm4hi                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm2hi                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm1hi                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm8si                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm4si                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm2si                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm1si                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm8di                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm4di                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm2di                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm1di                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvmf2qi                       (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvmf4qi                       (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvmf8qi                       (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvmf2hi                       (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvmf4hi                       (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvmf2si                       (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v1qi                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v2qi                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v4qi                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v8qi                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v16qi                          (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v32qi                          (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v64qi                          (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v128qi                         (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v256qi                         (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v512qi                         (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v1024qi                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v2048qi                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v4096qi                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v1hi                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v2hi                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v4hi                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v8hi                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v16hi                          (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v32hi                          (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v64hi                          (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v128hi                         (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v256hi                         (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v512hi                         (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v1024hi                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v2048hi                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v1si                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v2si                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v4si                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v8si                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v16si                          (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v32si                          (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v64si                          (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v128si                         (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v256si                         (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v512si                         (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v1024si                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v1di                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v2di                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v4di                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v8di                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v16di                          (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v32di                          (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v64di                          (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v128di                         (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v256di                         (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v512di                         (rtx, rtx);
extern rtx        gen_reduc_umax_scal_rvvm8qi                        (rtx, rtx);
extern rtx        gen_reduc_umax_scal_rvvm4qi                        (rtx, rtx);
extern rtx        gen_reduc_umax_scal_rvvm2qi                        (rtx, rtx);
extern rtx        gen_reduc_umax_scal_rvvm1qi                        (rtx, rtx);
extern rtx        gen_reduc_umax_scal_rvvm8hi                        (rtx, rtx);
extern rtx        gen_reduc_umax_scal_rvvm4hi                        (rtx, rtx);
extern rtx        gen_reduc_umax_scal_rvvm2hi                        (rtx, rtx);
extern rtx        gen_reduc_umax_scal_rvvm1hi                        (rtx, rtx);
extern rtx        gen_reduc_umax_scal_rvvm8si                        (rtx, rtx);
extern rtx        gen_reduc_umax_scal_rvvm4si                        (rtx, rtx);
extern rtx        gen_reduc_umax_scal_rvvm2si                        (rtx, rtx);
extern rtx        gen_reduc_umax_scal_rvvm1si                        (rtx, rtx);
extern rtx        gen_reduc_umax_scal_rvvm8di                        (rtx, rtx);
extern rtx        gen_reduc_umax_scal_rvvm4di                        (rtx, rtx);
extern rtx        gen_reduc_umax_scal_rvvm2di                        (rtx, rtx);
extern rtx        gen_reduc_umax_scal_rvvm1di                        (rtx, rtx);
extern rtx        gen_reduc_umax_scal_rvvmf2qi                       (rtx, rtx);
extern rtx        gen_reduc_umax_scal_rvvmf4qi                       (rtx, rtx);
extern rtx        gen_reduc_umax_scal_rvvmf8qi                       (rtx, rtx);
extern rtx        gen_reduc_umax_scal_rvvmf2hi                       (rtx, rtx);
extern rtx        gen_reduc_umax_scal_rvvmf4hi                       (rtx, rtx);
extern rtx        gen_reduc_umax_scal_rvvmf2si                       (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v1qi                           (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v2qi                           (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v4qi                           (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v8qi                           (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v16qi                          (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v32qi                          (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v64qi                          (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v128qi                         (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v256qi                         (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v512qi                         (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v1024qi                        (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v2048qi                        (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v4096qi                        (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v1hi                           (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v2hi                           (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v4hi                           (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v8hi                           (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v16hi                          (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v32hi                          (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v64hi                          (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v128hi                         (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v256hi                         (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v512hi                         (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v1024hi                        (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v2048hi                        (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v1si                           (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v2si                           (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v4si                           (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v8si                           (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v16si                          (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v32si                          (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v64si                          (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v128si                         (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v256si                         (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v512si                         (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v1024si                        (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v1di                           (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v2di                           (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v4di                           (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v8di                           (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v16di                          (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v32di                          (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v64di                          (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v128di                         (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v256di                         (rtx, rtx);
extern rtx        gen_reduc_umax_scal_v512di                         (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm8qi                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm4qi                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm2qi                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm1qi                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm8hi                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm4hi                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm2hi                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm1hi                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm8si                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm4si                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm2si                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm1si                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm8di                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm4di                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm2di                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm1di                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvmf2qi                       (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvmf4qi                       (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvmf8qi                       (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvmf2hi                       (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvmf4hi                       (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvmf2si                       (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v1qi                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v2qi                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v4qi                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v8qi                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v16qi                          (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v32qi                          (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v64qi                          (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v128qi                         (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v256qi                         (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v512qi                         (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v1024qi                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v2048qi                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v4096qi                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v1hi                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v2hi                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v4hi                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v8hi                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v16hi                          (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v32hi                          (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v64hi                          (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v128hi                         (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v256hi                         (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v512hi                         (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v1024hi                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v2048hi                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v1si                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v2si                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v4si                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v8si                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v16si                          (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v32si                          (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v64si                          (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v128si                         (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v256si                         (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v512si                         (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v1024si                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v1di                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v2di                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v4di                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v8di                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v16di                          (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v32di                          (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v64di                          (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v128di                         (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v256di                         (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v512di                         (rtx, rtx);
extern rtx        gen_reduc_umin_scal_rvvm8qi                        (rtx, rtx);
extern rtx        gen_reduc_umin_scal_rvvm4qi                        (rtx, rtx);
extern rtx        gen_reduc_umin_scal_rvvm2qi                        (rtx, rtx);
extern rtx        gen_reduc_umin_scal_rvvm1qi                        (rtx, rtx);
extern rtx        gen_reduc_umin_scal_rvvm8hi                        (rtx, rtx);
extern rtx        gen_reduc_umin_scal_rvvm4hi                        (rtx, rtx);
extern rtx        gen_reduc_umin_scal_rvvm2hi                        (rtx, rtx);
extern rtx        gen_reduc_umin_scal_rvvm1hi                        (rtx, rtx);
extern rtx        gen_reduc_umin_scal_rvvm8si                        (rtx, rtx);
extern rtx        gen_reduc_umin_scal_rvvm4si                        (rtx, rtx);
extern rtx        gen_reduc_umin_scal_rvvm2si                        (rtx, rtx);
extern rtx        gen_reduc_umin_scal_rvvm1si                        (rtx, rtx);
extern rtx        gen_reduc_umin_scal_rvvm8di                        (rtx, rtx);
extern rtx        gen_reduc_umin_scal_rvvm4di                        (rtx, rtx);
extern rtx        gen_reduc_umin_scal_rvvm2di                        (rtx, rtx);
extern rtx        gen_reduc_umin_scal_rvvm1di                        (rtx, rtx);
extern rtx        gen_reduc_umin_scal_rvvmf2qi                       (rtx, rtx);
extern rtx        gen_reduc_umin_scal_rvvmf4qi                       (rtx, rtx);
extern rtx        gen_reduc_umin_scal_rvvmf8qi                       (rtx, rtx);
extern rtx        gen_reduc_umin_scal_rvvmf2hi                       (rtx, rtx);
extern rtx        gen_reduc_umin_scal_rvvmf4hi                       (rtx, rtx);
extern rtx        gen_reduc_umin_scal_rvvmf2si                       (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v1qi                           (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v2qi                           (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v4qi                           (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v8qi                           (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v16qi                          (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v32qi                          (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v64qi                          (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v128qi                         (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v256qi                         (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v512qi                         (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v1024qi                        (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v2048qi                        (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v4096qi                        (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v1hi                           (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v2hi                           (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v4hi                           (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v8hi                           (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v16hi                          (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v32hi                          (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v64hi                          (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v128hi                         (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v256hi                         (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v512hi                         (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v1024hi                        (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v2048hi                        (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v1si                           (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v2si                           (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v4si                           (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v8si                           (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v16si                          (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v32si                          (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v64si                          (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v128si                         (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v256si                         (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v512si                         (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v1024si                        (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v1di                           (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v2di                           (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v4di                           (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v8di                           (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v16di                          (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v32di                          (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v64di                          (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v128di                         (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v256di                         (rtx, rtx);
extern rtx        gen_reduc_umin_scal_v512di                         (rtx, rtx);
extern rtx        gen_reduc_and_scal_rvvm8qi                         (rtx, rtx);
extern rtx        gen_reduc_and_scal_rvvm4qi                         (rtx, rtx);
extern rtx        gen_reduc_and_scal_rvvm2qi                         (rtx, rtx);
extern rtx        gen_reduc_and_scal_rvvm1qi                         (rtx, rtx);
extern rtx        gen_reduc_and_scal_rvvm8hi                         (rtx, rtx);
extern rtx        gen_reduc_and_scal_rvvm4hi                         (rtx, rtx);
extern rtx        gen_reduc_and_scal_rvvm2hi                         (rtx, rtx);
extern rtx        gen_reduc_and_scal_rvvm1hi                         (rtx, rtx);
extern rtx        gen_reduc_and_scal_rvvm8si                         (rtx, rtx);
extern rtx        gen_reduc_and_scal_rvvm4si                         (rtx, rtx);
extern rtx        gen_reduc_and_scal_rvvm2si                         (rtx, rtx);
extern rtx        gen_reduc_and_scal_rvvm1si                         (rtx, rtx);
extern rtx        gen_reduc_and_scal_rvvm8di                         (rtx, rtx);
extern rtx        gen_reduc_and_scal_rvvm4di                         (rtx, rtx);
extern rtx        gen_reduc_and_scal_rvvm2di                         (rtx, rtx);
extern rtx        gen_reduc_and_scal_rvvm1di                         (rtx, rtx);
extern rtx        gen_reduc_and_scal_rvvmf2qi                        (rtx, rtx);
extern rtx        gen_reduc_and_scal_rvvmf4qi                        (rtx, rtx);
extern rtx        gen_reduc_and_scal_rvvmf8qi                        (rtx, rtx);
extern rtx        gen_reduc_and_scal_rvvmf2hi                        (rtx, rtx);
extern rtx        gen_reduc_and_scal_rvvmf4hi                        (rtx, rtx);
extern rtx        gen_reduc_and_scal_rvvmf2si                        (rtx, rtx);
extern rtx        gen_reduc_and_scal_v1qi                            (rtx, rtx);
extern rtx        gen_reduc_and_scal_v2qi                            (rtx, rtx);
extern rtx        gen_reduc_and_scal_v4qi                            (rtx, rtx);
extern rtx        gen_reduc_and_scal_v8qi                            (rtx, rtx);
extern rtx        gen_reduc_and_scal_v16qi                           (rtx, rtx);
extern rtx        gen_reduc_and_scal_v32qi                           (rtx, rtx);
extern rtx        gen_reduc_and_scal_v64qi                           (rtx, rtx);
extern rtx        gen_reduc_and_scal_v128qi                          (rtx, rtx);
extern rtx        gen_reduc_and_scal_v256qi                          (rtx, rtx);
extern rtx        gen_reduc_and_scal_v512qi                          (rtx, rtx);
extern rtx        gen_reduc_and_scal_v1024qi                         (rtx, rtx);
extern rtx        gen_reduc_and_scal_v2048qi                         (rtx, rtx);
extern rtx        gen_reduc_and_scal_v4096qi                         (rtx, rtx);
extern rtx        gen_reduc_and_scal_v1hi                            (rtx, rtx);
extern rtx        gen_reduc_and_scal_v2hi                            (rtx, rtx);
extern rtx        gen_reduc_and_scal_v4hi                            (rtx, rtx);
extern rtx        gen_reduc_and_scal_v8hi                            (rtx, rtx);
extern rtx        gen_reduc_and_scal_v16hi                           (rtx, rtx);
extern rtx        gen_reduc_and_scal_v32hi                           (rtx, rtx);
extern rtx        gen_reduc_and_scal_v64hi                           (rtx, rtx);
extern rtx        gen_reduc_and_scal_v128hi                          (rtx, rtx);
extern rtx        gen_reduc_and_scal_v256hi                          (rtx, rtx);
extern rtx        gen_reduc_and_scal_v512hi                          (rtx, rtx);
extern rtx        gen_reduc_and_scal_v1024hi                         (rtx, rtx);
extern rtx        gen_reduc_and_scal_v2048hi                         (rtx, rtx);
extern rtx        gen_reduc_and_scal_v1si                            (rtx, rtx);
extern rtx        gen_reduc_and_scal_v2si                            (rtx, rtx);
extern rtx        gen_reduc_and_scal_v4si                            (rtx, rtx);
extern rtx        gen_reduc_and_scal_v8si                            (rtx, rtx);
extern rtx        gen_reduc_and_scal_v16si                           (rtx, rtx);
extern rtx        gen_reduc_and_scal_v32si                           (rtx, rtx);
extern rtx        gen_reduc_and_scal_v64si                           (rtx, rtx);
extern rtx        gen_reduc_and_scal_v128si                          (rtx, rtx);
extern rtx        gen_reduc_and_scal_v256si                          (rtx, rtx);
extern rtx        gen_reduc_and_scal_v512si                          (rtx, rtx);
extern rtx        gen_reduc_and_scal_v1024si                         (rtx, rtx);
extern rtx        gen_reduc_and_scal_v1di                            (rtx, rtx);
extern rtx        gen_reduc_and_scal_v2di                            (rtx, rtx);
extern rtx        gen_reduc_and_scal_v4di                            (rtx, rtx);
extern rtx        gen_reduc_and_scal_v8di                            (rtx, rtx);
extern rtx        gen_reduc_and_scal_v16di                           (rtx, rtx);
extern rtx        gen_reduc_and_scal_v32di                           (rtx, rtx);
extern rtx        gen_reduc_and_scal_v64di                           (rtx, rtx);
extern rtx        gen_reduc_and_scal_v128di                          (rtx, rtx);
extern rtx        gen_reduc_and_scal_v256di                          (rtx, rtx);
extern rtx        gen_reduc_and_scal_v512di                          (rtx, rtx);
extern rtx        gen_reduc_ior_scal_rvvm8qi                         (rtx, rtx);
extern rtx        gen_reduc_ior_scal_rvvm4qi                         (rtx, rtx);
extern rtx        gen_reduc_ior_scal_rvvm2qi                         (rtx, rtx);
extern rtx        gen_reduc_ior_scal_rvvm1qi                         (rtx, rtx);
extern rtx        gen_reduc_ior_scal_rvvm8hi                         (rtx, rtx);
extern rtx        gen_reduc_ior_scal_rvvm4hi                         (rtx, rtx);
extern rtx        gen_reduc_ior_scal_rvvm2hi                         (rtx, rtx);
extern rtx        gen_reduc_ior_scal_rvvm1hi                         (rtx, rtx);
extern rtx        gen_reduc_ior_scal_rvvm8si                         (rtx, rtx);
extern rtx        gen_reduc_ior_scal_rvvm4si                         (rtx, rtx);
extern rtx        gen_reduc_ior_scal_rvvm2si                         (rtx, rtx);
extern rtx        gen_reduc_ior_scal_rvvm1si                         (rtx, rtx);
extern rtx        gen_reduc_ior_scal_rvvm8di                         (rtx, rtx);
extern rtx        gen_reduc_ior_scal_rvvm4di                         (rtx, rtx);
extern rtx        gen_reduc_ior_scal_rvvm2di                         (rtx, rtx);
extern rtx        gen_reduc_ior_scal_rvvm1di                         (rtx, rtx);
extern rtx        gen_reduc_ior_scal_rvvmf2qi                        (rtx, rtx);
extern rtx        gen_reduc_ior_scal_rvvmf4qi                        (rtx, rtx);
extern rtx        gen_reduc_ior_scal_rvvmf8qi                        (rtx, rtx);
extern rtx        gen_reduc_ior_scal_rvvmf2hi                        (rtx, rtx);
extern rtx        gen_reduc_ior_scal_rvvmf4hi                        (rtx, rtx);
extern rtx        gen_reduc_ior_scal_rvvmf2si                        (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v1qi                            (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v2qi                            (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v4qi                            (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v8qi                            (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v16qi                           (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v32qi                           (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v64qi                           (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v128qi                          (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v256qi                          (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v512qi                          (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v1024qi                         (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v2048qi                         (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v4096qi                         (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v1hi                            (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v2hi                            (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v4hi                            (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v8hi                            (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v16hi                           (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v32hi                           (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v64hi                           (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v128hi                          (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v256hi                          (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v512hi                          (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v1024hi                         (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v2048hi                         (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v1si                            (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v2si                            (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v4si                            (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v8si                            (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v16si                           (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v32si                           (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v64si                           (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v128si                          (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v256si                          (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v512si                          (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v1024si                         (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v1di                            (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v2di                            (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v4di                            (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v8di                            (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v16di                           (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v32di                           (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v64di                           (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v128di                          (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v256di                          (rtx, rtx);
extern rtx        gen_reduc_ior_scal_v512di                          (rtx, rtx);
extern rtx        gen_reduc_xor_scal_rvvm8qi                         (rtx, rtx);
extern rtx        gen_reduc_xor_scal_rvvm4qi                         (rtx, rtx);
extern rtx        gen_reduc_xor_scal_rvvm2qi                         (rtx, rtx);
extern rtx        gen_reduc_xor_scal_rvvm1qi                         (rtx, rtx);
extern rtx        gen_reduc_xor_scal_rvvm8hi                         (rtx, rtx);
extern rtx        gen_reduc_xor_scal_rvvm4hi                         (rtx, rtx);
extern rtx        gen_reduc_xor_scal_rvvm2hi                         (rtx, rtx);
extern rtx        gen_reduc_xor_scal_rvvm1hi                         (rtx, rtx);
extern rtx        gen_reduc_xor_scal_rvvm8si                         (rtx, rtx);
extern rtx        gen_reduc_xor_scal_rvvm4si                         (rtx, rtx);
extern rtx        gen_reduc_xor_scal_rvvm2si                         (rtx, rtx);
extern rtx        gen_reduc_xor_scal_rvvm1si                         (rtx, rtx);
extern rtx        gen_reduc_xor_scal_rvvm8di                         (rtx, rtx);
extern rtx        gen_reduc_xor_scal_rvvm4di                         (rtx, rtx);
extern rtx        gen_reduc_xor_scal_rvvm2di                         (rtx, rtx);
extern rtx        gen_reduc_xor_scal_rvvm1di                         (rtx, rtx);
extern rtx        gen_reduc_xor_scal_rvvmf2qi                        (rtx, rtx);
extern rtx        gen_reduc_xor_scal_rvvmf4qi                        (rtx, rtx);
extern rtx        gen_reduc_xor_scal_rvvmf8qi                        (rtx, rtx);
extern rtx        gen_reduc_xor_scal_rvvmf2hi                        (rtx, rtx);
extern rtx        gen_reduc_xor_scal_rvvmf4hi                        (rtx, rtx);
extern rtx        gen_reduc_xor_scal_rvvmf2si                        (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v1qi                            (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v2qi                            (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v4qi                            (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v8qi                            (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v16qi                           (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v32qi                           (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v64qi                           (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v128qi                          (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v256qi                          (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v512qi                          (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v1024qi                         (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v2048qi                         (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v4096qi                         (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v1hi                            (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v2hi                            (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v4hi                            (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v8hi                            (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v16hi                           (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v32hi                           (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v64hi                           (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v128hi                          (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v256hi                          (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v512hi                          (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v1024hi                         (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v2048hi                         (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v1si                            (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v2si                            (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v4si                            (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v8si                            (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v16si                           (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v32si                           (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v64si                           (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v128si                          (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v256si                          (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v512si                          (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v1024si                         (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v1di                            (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v2di                            (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v4di                            (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v8di                            (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v16di                           (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v32di                           (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v64di                           (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v128di                          (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v256di                          (rtx, rtx);
extern rtx        gen_reduc_xor_scal_v512di                          (rtx, rtx);
extern rtx        gen_reduc_sbool_and_scal_rvvmf64bi                 (rtx, rtx);
extern rtx        gen_reduc_sbool_and_scal_rvvmf32bi                 (rtx, rtx);
extern rtx        gen_reduc_sbool_and_scal_rvvmf16bi                 (rtx, rtx);
extern rtx        gen_reduc_sbool_and_scal_rvvmf8bi                  (rtx, rtx);
extern rtx        gen_reduc_sbool_and_scal_rvvmf4bi                  (rtx, rtx);
extern rtx        gen_reduc_sbool_and_scal_rvvmf2bi                  (rtx, rtx);
extern rtx        gen_reduc_sbool_and_scal_rvvm1bi                   (rtx, rtx);
extern rtx        gen_reduc_sbool_and_scal_v1bi                      (rtx, rtx);
extern rtx        gen_reduc_sbool_and_scal_v2bi                      (rtx, rtx);
extern rtx        gen_reduc_sbool_and_scal_v4bi                      (rtx, rtx);
extern rtx        gen_reduc_sbool_and_scal_v8bi                      (rtx, rtx);
extern rtx        gen_reduc_sbool_and_scal_v16bi                     (rtx, rtx);
extern rtx        gen_reduc_sbool_and_scal_v32bi                     (rtx, rtx);
extern rtx        gen_reduc_sbool_and_scal_v64bi                     (rtx, rtx);
extern rtx        gen_reduc_sbool_and_scal_v128bi                    (rtx, rtx);
extern rtx        gen_reduc_sbool_and_scal_v256bi                    (rtx, rtx);
extern rtx        gen_reduc_sbool_and_scal_v512bi                    (rtx, rtx);
extern rtx        gen_reduc_sbool_and_scal_v1024bi                   (rtx, rtx);
extern rtx        gen_reduc_sbool_and_scal_v2048bi                   (rtx, rtx);
extern rtx        gen_reduc_sbool_and_scal_v4096bi                   (rtx, rtx);
extern rtx        gen_reduc_sbool_ior_scal_rvvmf64bi                 (rtx, rtx);
extern rtx        gen_reduc_sbool_ior_scal_rvvmf32bi                 (rtx, rtx);
extern rtx        gen_reduc_sbool_ior_scal_rvvmf16bi                 (rtx, rtx);
extern rtx        gen_reduc_sbool_ior_scal_rvvmf8bi                  (rtx, rtx);
extern rtx        gen_reduc_sbool_ior_scal_rvvmf4bi                  (rtx, rtx);
extern rtx        gen_reduc_sbool_ior_scal_rvvmf2bi                  (rtx, rtx);
extern rtx        gen_reduc_sbool_ior_scal_rvvm1bi                   (rtx, rtx);
extern rtx        gen_reduc_sbool_ior_scal_v1bi                      (rtx, rtx);
extern rtx        gen_reduc_sbool_ior_scal_v2bi                      (rtx, rtx);
extern rtx        gen_reduc_sbool_ior_scal_v4bi                      (rtx, rtx);
extern rtx        gen_reduc_sbool_ior_scal_v8bi                      (rtx, rtx);
extern rtx        gen_reduc_sbool_ior_scal_v16bi                     (rtx, rtx);
extern rtx        gen_reduc_sbool_ior_scal_v32bi                     (rtx, rtx);
extern rtx        gen_reduc_sbool_ior_scal_v64bi                     (rtx, rtx);
extern rtx        gen_reduc_sbool_ior_scal_v128bi                    (rtx, rtx);
extern rtx        gen_reduc_sbool_ior_scal_v256bi                    (rtx, rtx);
extern rtx        gen_reduc_sbool_ior_scal_v512bi                    (rtx, rtx);
extern rtx        gen_reduc_sbool_ior_scal_v1024bi                   (rtx, rtx);
extern rtx        gen_reduc_sbool_ior_scal_v2048bi                   (rtx, rtx);
extern rtx        gen_reduc_sbool_ior_scal_v4096bi                   (rtx, rtx);
extern rtx        gen_reduc_sbool_xor_scal_rvvmf64bi                 (rtx, rtx);
extern rtx        gen_reduc_sbool_xor_scal_rvvmf32bi                 (rtx, rtx);
extern rtx        gen_reduc_sbool_xor_scal_rvvmf16bi                 (rtx, rtx);
extern rtx        gen_reduc_sbool_xor_scal_rvvmf8bi                  (rtx, rtx);
extern rtx        gen_reduc_sbool_xor_scal_rvvmf4bi                  (rtx, rtx);
extern rtx        gen_reduc_sbool_xor_scal_rvvmf2bi                  (rtx, rtx);
extern rtx        gen_reduc_sbool_xor_scal_rvvm1bi                   (rtx, rtx);
extern rtx        gen_reduc_sbool_xor_scal_v1bi                      (rtx, rtx);
extern rtx        gen_reduc_sbool_xor_scal_v2bi                      (rtx, rtx);
extern rtx        gen_reduc_sbool_xor_scal_v4bi                      (rtx, rtx);
extern rtx        gen_reduc_sbool_xor_scal_v8bi                      (rtx, rtx);
extern rtx        gen_reduc_sbool_xor_scal_v16bi                     (rtx, rtx);
extern rtx        gen_reduc_sbool_xor_scal_v32bi                     (rtx, rtx);
extern rtx        gen_reduc_sbool_xor_scal_v64bi                     (rtx, rtx);
extern rtx        gen_reduc_sbool_xor_scal_v128bi                    (rtx, rtx);
extern rtx        gen_reduc_sbool_xor_scal_v256bi                    (rtx, rtx);
extern rtx        gen_reduc_sbool_xor_scal_v512bi                    (rtx, rtx);
extern rtx        gen_reduc_sbool_xor_scal_v1024bi                   (rtx, rtx);
extern rtx        gen_reduc_sbool_xor_scal_v2048bi                   (rtx, rtx);
extern rtx        gen_reduc_sbool_xor_scal_v4096bi                   (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm8hf                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm4hf                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm2hf                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm1hf                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvmf2hf                       (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvmf4hf                       (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm8sf                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm4sf                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm2sf                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm1sf                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvmf2sf                       (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm8df                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm4df                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm2df                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_rvvm1df                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v1hf                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v2hf                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v4hf                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v8hf                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v16hf                          (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v32hf                          (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v64hf                          (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v128hf                         (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v256hf                         (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v512hf                         (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v1024hf                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v2048hf                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v1sf                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v2sf                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v4sf                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v8sf                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v16sf                          (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v32sf                          (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v64sf                          (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v128sf                         (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v256sf                         (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v512sf                         (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v1024sf                        (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v1df                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v2df                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v4df                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v8df                           (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v16df                          (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v32df                          (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v64df                          (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v128df                         (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v256df                         (rtx, rtx);
extern rtx        gen_reduc_smax_scal_v512df                         (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm8hf                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm4hf                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm2hf                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm1hf                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvmf2hf                       (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvmf4hf                       (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm8sf                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm4sf                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm2sf                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm1sf                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvmf2sf                       (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm8df                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm4df                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm2df                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_rvvm1df                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v1hf                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v2hf                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v4hf                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v8hf                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v16hf                          (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v32hf                          (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v64hf                          (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v128hf                         (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v256hf                         (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v512hf                         (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v1024hf                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v2048hf                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v1sf                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v2sf                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v4sf                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v8sf                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v16sf                          (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v32sf                          (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v64sf                          (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v128sf                         (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v256sf                         (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v512sf                         (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v1024sf                        (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v1df                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v2df                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v4df                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v8df                           (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v16df                          (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v32df                          (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v64df                          (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v128df                         (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v256df                         (rtx, rtx);
extern rtx        gen_reduc_smin_scal_v512df                         (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_rvvm8hf                        (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_rvvm4hf                        (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_rvvm2hf                        (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_rvvm1hf                        (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_rvvmf2hf                       (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_rvvmf4hf                       (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_rvvm8sf                        (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_rvvm4sf                        (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_rvvm2sf                        (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_rvvm1sf                        (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_rvvmf2sf                       (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_rvvm8df                        (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_rvvm4df                        (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_rvvm2df                        (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_rvvm1df                        (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v1hf                           (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v2hf                           (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v4hf                           (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v8hf                           (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v16hf                          (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v32hf                          (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v64hf                          (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v128hf                         (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v256hf                         (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v512hf                         (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v1024hf                        (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v2048hf                        (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v1sf                           (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v2sf                           (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v4sf                           (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v8sf                           (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v16sf                          (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v32sf                          (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v64sf                          (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v128sf                         (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v256sf                         (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v512sf                         (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v1024sf                        (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v1df                           (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v2df                           (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v4df                           (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v8df                           (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v16df                          (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v32df                          (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v64df                          (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v128df                         (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v256df                         (rtx, rtx);
extern rtx        gen_reduc_fmax_scal_v512df                         (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_rvvm8hf                        (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_rvvm4hf                        (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_rvvm2hf                        (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_rvvm1hf                        (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_rvvmf2hf                       (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_rvvmf4hf                       (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_rvvm8sf                        (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_rvvm4sf                        (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_rvvm2sf                        (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_rvvm1sf                        (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_rvvmf2sf                       (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_rvvm8df                        (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_rvvm4df                        (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_rvvm2df                        (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_rvvm1df                        (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v1hf                           (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v2hf                           (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v4hf                           (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v8hf                           (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v16hf                          (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v32hf                          (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v64hf                          (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v128hf                         (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v256hf                         (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v512hf                         (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v1024hf                        (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v2048hf                        (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v1sf                           (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v2sf                           (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v4sf                           (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v8sf                           (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v16sf                          (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v32sf                          (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v64sf                          (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v128sf                         (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v256sf                         (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v512sf                         (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v1024sf                        (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v1df                           (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v2df                           (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v4df                           (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v8df                           (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v16df                          (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v32df                          (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v64df                          (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v128df                         (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v256df                         (rtx, rtx);
extern rtx        gen_reduc_fmin_scal_v512df                         (rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm8qi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm4qi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm2qi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm1qi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm8hi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm4hi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm2hi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm1hi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm8si                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm4si                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm2si                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm1si                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm8di                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm4di                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm2di                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm1di                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvmf2qi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvmf4qi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvmf8qi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvmf2hi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvmf4hi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvmf2si                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm8hf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm4hf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm2hf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm1hf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvmf2hf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvmf4hf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm8sf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm4sf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm2sf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm1sf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvmf2sf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm8df                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm4df                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm2df                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm1df                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm8bf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm4bf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm2bf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvm1bf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvmf2bf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_len_fold_extract_last_rvvmf4bf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_avgrvvm4qi3_floor                              (rtx, rtx, rtx);
extern rtx        gen_avgrvvm2qi3_floor                              (rtx, rtx, rtx);
extern rtx        gen_avgrvvm1qi3_floor                              (rtx, rtx, rtx);
extern rtx        gen_avgrvvmf2qi3_floor                             (rtx, rtx, rtx);
extern rtx        gen_avgrvvmf4qi3_floor                             (rtx, rtx, rtx);
extern rtx        gen_avgrvvmf8qi3_floor                             (rtx, rtx, rtx);
extern rtx        gen_avgrvvm4hi3_floor                              (rtx, rtx, rtx);
extern rtx        gen_avgrvvm2hi3_floor                              (rtx, rtx, rtx);
extern rtx        gen_avgrvvm1hi3_floor                              (rtx, rtx, rtx);
extern rtx        gen_avgrvvmf2hi3_floor                             (rtx, rtx, rtx);
extern rtx        gen_avgrvvmf4hi3_floor                             (rtx, rtx, rtx);
extern rtx        gen_avgrvvm4si3_floor                              (rtx, rtx, rtx);
extern rtx        gen_avgrvvm2si3_floor                              (rtx, rtx, rtx);
extern rtx        gen_avgrvvm1si3_floor                              (rtx, rtx, rtx);
extern rtx        gen_avgrvvmf2si3_floor                             (rtx, rtx, rtx);
extern rtx        gen_avgv1qi3_floor                                 (rtx, rtx, rtx);
extern rtx        gen_avgv2qi3_floor                                 (rtx, rtx, rtx);
extern rtx        gen_avgv4qi3_floor                                 (rtx, rtx, rtx);
extern rtx        gen_avgv8qi3_floor                                 (rtx, rtx, rtx);
extern rtx        gen_avgv16qi3_floor                                (rtx, rtx, rtx);
extern rtx        gen_avgv32qi3_floor                                (rtx, rtx, rtx);
extern rtx        gen_avgv64qi3_floor                                (rtx, rtx, rtx);
extern rtx        gen_avgv128qi3_floor                               (rtx, rtx, rtx);
extern rtx        gen_avgv256qi3_floor                               (rtx, rtx, rtx);
extern rtx        gen_avgv512qi3_floor                               (rtx, rtx, rtx);
extern rtx        gen_avgv1024qi3_floor                              (rtx, rtx, rtx);
extern rtx        gen_avgv2048qi3_floor                              (rtx, rtx, rtx);
extern rtx        gen_avgv1hi3_floor                                 (rtx, rtx, rtx);
extern rtx        gen_avgv2hi3_floor                                 (rtx, rtx, rtx);
extern rtx        gen_avgv4hi3_floor                                 (rtx, rtx, rtx);
extern rtx        gen_avgv8hi3_floor                                 (rtx, rtx, rtx);
extern rtx        gen_avgv16hi3_floor                                (rtx, rtx, rtx);
extern rtx        gen_avgv32hi3_floor                                (rtx, rtx, rtx);
extern rtx        gen_avgv64hi3_floor                                (rtx, rtx, rtx);
extern rtx        gen_avgv128hi3_floor                               (rtx, rtx, rtx);
extern rtx        gen_avgv256hi3_floor                               (rtx, rtx, rtx);
extern rtx        gen_avgv512hi3_floor                               (rtx, rtx, rtx);
extern rtx        gen_avgv1024hi3_floor                              (rtx, rtx, rtx);
extern rtx        gen_avgv1si3_floor                                 (rtx, rtx, rtx);
extern rtx        gen_avgv2si3_floor                                 (rtx, rtx, rtx);
extern rtx        gen_avgv4si3_floor                                 (rtx, rtx, rtx);
extern rtx        gen_avgv8si3_floor                                 (rtx, rtx, rtx);
extern rtx        gen_avgv16si3_floor                                (rtx, rtx, rtx);
extern rtx        gen_avgv32si3_floor                                (rtx, rtx, rtx);
extern rtx        gen_avgv64si3_floor                                (rtx, rtx, rtx);
extern rtx        gen_avgv128si3_floor                               (rtx, rtx, rtx);
extern rtx        gen_avgv256si3_floor                               (rtx, rtx, rtx);
extern rtx        gen_avgv512si3_floor                               (rtx, rtx, rtx);
extern rtx        gen_avgrvvm8di3_floor                              (rtx, rtx, rtx);
extern rtx        gen_avgrvvm4di3_floor                              (rtx, rtx, rtx);
extern rtx        gen_avgrvvm2di3_floor                              (rtx, rtx, rtx);
extern rtx        gen_avgrvvm1di3_floor                              (rtx, rtx, rtx);
extern rtx        gen_avgv1di3_floor                                 (rtx, rtx, rtx);
extern rtx        gen_avgv2di3_floor                                 (rtx, rtx, rtx);
extern rtx        gen_avgv4di3_floor                                 (rtx, rtx, rtx);
extern rtx        gen_avgv8di3_floor                                 (rtx, rtx, rtx);
extern rtx        gen_avgv16di3_floor                                (rtx, rtx, rtx);
extern rtx        gen_avgv32di3_floor                                (rtx, rtx, rtx);
extern rtx        gen_avgv64di3_floor                                (rtx, rtx, rtx);
extern rtx        gen_avgv128di3_floor                               (rtx, rtx, rtx);
extern rtx        gen_avgv256di3_floor                               (rtx, rtx, rtx);
extern rtx        gen_avgv512di3_floor                               (rtx, rtx, rtx);
extern rtx        gen_avgrvvm4qi3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_avgrvvm2qi3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_avgrvvm1qi3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_avgrvvmf2qi3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_avgrvvmf4qi3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_avgrvvmf8qi3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_avgrvvm4hi3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_avgrvvm2hi3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_avgrvvm1hi3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_avgrvvmf2hi3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_avgrvvmf4hi3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_avgrvvm4si3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_avgrvvm2si3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_avgrvvm1si3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_avgrvvmf2si3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_avgv1qi3_ceil                                  (rtx, rtx, rtx);
extern rtx        gen_avgv2qi3_ceil                                  (rtx, rtx, rtx);
extern rtx        gen_avgv4qi3_ceil                                  (rtx, rtx, rtx);
extern rtx        gen_avgv8qi3_ceil                                  (rtx, rtx, rtx);
extern rtx        gen_avgv16qi3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_avgv32qi3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_avgv64qi3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_avgv128qi3_ceil                                (rtx, rtx, rtx);
extern rtx        gen_avgv256qi3_ceil                                (rtx, rtx, rtx);
extern rtx        gen_avgv512qi3_ceil                                (rtx, rtx, rtx);
extern rtx        gen_avgv1024qi3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_avgv2048qi3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_avgv1hi3_ceil                                  (rtx, rtx, rtx);
extern rtx        gen_avgv2hi3_ceil                                  (rtx, rtx, rtx);
extern rtx        gen_avgv4hi3_ceil                                  (rtx, rtx, rtx);
extern rtx        gen_avgv8hi3_ceil                                  (rtx, rtx, rtx);
extern rtx        gen_avgv16hi3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_avgv32hi3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_avgv64hi3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_avgv128hi3_ceil                                (rtx, rtx, rtx);
extern rtx        gen_avgv256hi3_ceil                                (rtx, rtx, rtx);
extern rtx        gen_avgv512hi3_ceil                                (rtx, rtx, rtx);
extern rtx        gen_avgv1024hi3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_avgv1si3_ceil                                  (rtx, rtx, rtx);
extern rtx        gen_avgv2si3_ceil                                  (rtx, rtx, rtx);
extern rtx        gen_avgv4si3_ceil                                  (rtx, rtx, rtx);
extern rtx        gen_avgv8si3_ceil                                  (rtx, rtx, rtx);
extern rtx        gen_avgv16si3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_avgv32si3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_avgv64si3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_avgv128si3_ceil                                (rtx, rtx, rtx);
extern rtx        gen_avgv256si3_ceil                                (rtx, rtx, rtx);
extern rtx        gen_avgv512si3_ceil                                (rtx, rtx, rtx);
extern rtx        gen_avgrvvm8di3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_avgrvvm4di3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_avgrvvm2di3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_avgrvvm1di3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_avgv1di3_ceil                                  (rtx, rtx, rtx);
extern rtx        gen_avgv2di3_ceil                                  (rtx, rtx, rtx);
extern rtx        gen_avgv4di3_ceil                                  (rtx, rtx, rtx);
extern rtx        gen_avgv8di3_ceil                                  (rtx, rtx, rtx);
extern rtx        gen_avgv16di3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_avgv32di3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_avgv64di3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_avgv128di3_ceil                                (rtx, rtx, rtx);
extern rtx        gen_avgv256di3_ceil                                (rtx, rtx, rtx);
extern rtx        gen_avgv512di3_ceil                                (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm8qi3_floor                             (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm4qi3_floor                             (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm2qi3_floor                             (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm1qi3_floor                             (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm8hi3_floor                             (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm4hi3_floor                             (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm2hi3_floor                             (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm1hi3_floor                             (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm8si3_floor                             (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm4si3_floor                             (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm2si3_floor                             (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm1si3_floor                             (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm8di3_floor                             (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm4di3_floor                             (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm2di3_floor                             (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm1di3_floor                             (rtx, rtx, rtx);
extern rtx        gen_uavgrvvmf2qi3_floor                            (rtx, rtx, rtx);
extern rtx        gen_uavgrvvmf4qi3_floor                            (rtx, rtx, rtx);
extern rtx        gen_uavgrvvmf8qi3_floor                            (rtx, rtx, rtx);
extern rtx        gen_uavgrvvmf2hi3_floor                            (rtx, rtx, rtx);
extern rtx        gen_uavgrvvmf4hi3_floor                            (rtx, rtx, rtx);
extern rtx        gen_uavgrvvmf2si3_floor                            (rtx, rtx, rtx);
extern rtx        gen_uavgv1qi3_floor                                (rtx, rtx, rtx);
extern rtx        gen_uavgv2qi3_floor                                (rtx, rtx, rtx);
extern rtx        gen_uavgv4qi3_floor                                (rtx, rtx, rtx);
extern rtx        gen_uavgv8qi3_floor                                (rtx, rtx, rtx);
extern rtx        gen_uavgv16qi3_floor                               (rtx, rtx, rtx);
extern rtx        gen_uavgv32qi3_floor                               (rtx, rtx, rtx);
extern rtx        gen_uavgv64qi3_floor                               (rtx, rtx, rtx);
extern rtx        gen_uavgv128qi3_floor                              (rtx, rtx, rtx);
extern rtx        gen_uavgv256qi3_floor                              (rtx, rtx, rtx);
extern rtx        gen_uavgv512qi3_floor                              (rtx, rtx, rtx);
extern rtx        gen_uavgv1024qi3_floor                             (rtx, rtx, rtx);
extern rtx        gen_uavgv2048qi3_floor                             (rtx, rtx, rtx);
extern rtx        gen_uavgv4096qi3_floor                             (rtx, rtx, rtx);
extern rtx        gen_uavgv1hi3_floor                                (rtx, rtx, rtx);
extern rtx        gen_uavgv2hi3_floor                                (rtx, rtx, rtx);
extern rtx        gen_uavgv4hi3_floor                                (rtx, rtx, rtx);
extern rtx        gen_uavgv8hi3_floor                                (rtx, rtx, rtx);
extern rtx        gen_uavgv16hi3_floor                               (rtx, rtx, rtx);
extern rtx        gen_uavgv32hi3_floor                               (rtx, rtx, rtx);
extern rtx        gen_uavgv64hi3_floor                               (rtx, rtx, rtx);
extern rtx        gen_uavgv128hi3_floor                              (rtx, rtx, rtx);
extern rtx        gen_uavgv256hi3_floor                              (rtx, rtx, rtx);
extern rtx        gen_uavgv512hi3_floor                              (rtx, rtx, rtx);
extern rtx        gen_uavgv1024hi3_floor                             (rtx, rtx, rtx);
extern rtx        gen_uavgv2048hi3_floor                             (rtx, rtx, rtx);
extern rtx        gen_uavgv1si3_floor                                (rtx, rtx, rtx);
extern rtx        gen_uavgv2si3_floor                                (rtx, rtx, rtx);
extern rtx        gen_uavgv4si3_floor                                (rtx, rtx, rtx);
extern rtx        gen_uavgv8si3_floor                                (rtx, rtx, rtx);
extern rtx        gen_uavgv16si3_floor                               (rtx, rtx, rtx);
extern rtx        gen_uavgv32si3_floor                               (rtx, rtx, rtx);
extern rtx        gen_uavgv64si3_floor                               (rtx, rtx, rtx);
extern rtx        gen_uavgv128si3_floor                              (rtx, rtx, rtx);
extern rtx        gen_uavgv256si3_floor                              (rtx, rtx, rtx);
extern rtx        gen_uavgv512si3_floor                              (rtx, rtx, rtx);
extern rtx        gen_uavgv1024si3_floor                             (rtx, rtx, rtx);
extern rtx        gen_uavgv1di3_floor                                (rtx, rtx, rtx);
extern rtx        gen_uavgv2di3_floor                                (rtx, rtx, rtx);
extern rtx        gen_uavgv4di3_floor                                (rtx, rtx, rtx);
extern rtx        gen_uavgv8di3_floor                                (rtx, rtx, rtx);
extern rtx        gen_uavgv16di3_floor                               (rtx, rtx, rtx);
extern rtx        gen_uavgv32di3_floor                               (rtx, rtx, rtx);
extern rtx        gen_uavgv64di3_floor                               (rtx, rtx, rtx);
extern rtx        gen_uavgv128di3_floor                              (rtx, rtx, rtx);
extern rtx        gen_uavgv256di3_floor                              (rtx, rtx, rtx);
extern rtx        gen_uavgv512di3_floor                              (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm8qi3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm4qi3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm2qi3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm1qi3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm8hi3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm4hi3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm2hi3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm1hi3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm8si3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm4si3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm2si3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm1si3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm8di3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm4di3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm2di3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_uavgrvvm1di3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_uavgrvvmf2qi3_ceil                             (rtx, rtx, rtx);
extern rtx        gen_uavgrvvmf4qi3_ceil                             (rtx, rtx, rtx);
extern rtx        gen_uavgrvvmf8qi3_ceil                             (rtx, rtx, rtx);
extern rtx        gen_uavgrvvmf2hi3_ceil                             (rtx, rtx, rtx);
extern rtx        gen_uavgrvvmf4hi3_ceil                             (rtx, rtx, rtx);
extern rtx        gen_uavgrvvmf2si3_ceil                             (rtx, rtx, rtx);
extern rtx        gen_uavgv1qi3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_uavgv2qi3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_uavgv4qi3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_uavgv8qi3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_uavgv16qi3_ceil                                (rtx, rtx, rtx);
extern rtx        gen_uavgv32qi3_ceil                                (rtx, rtx, rtx);
extern rtx        gen_uavgv64qi3_ceil                                (rtx, rtx, rtx);
extern rtx        gen_uavgv128qi3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_uavgv256qi3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_uavgv512qi3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_uavgv1024qi3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_uavgv2048qi3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_uavgv4096qi3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_uavgv1hi3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_uavgv2hi3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_uavgv4hi3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_uavgv8hi3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_uavgv16hi3_ceil                                (rtx, rtx, rtx);
extern rtx        gen_uavgv32hi3_ceil                                (rtx, rtx, rtx);
extern rtx        gen_uavgv64hi3_ceil                                (rtx, rtx, rtx);
extern rtx        gen_uavgv128hi3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_uavgv256hi3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_uavgv512hi3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_uavgv1024hi3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_uavgv2048hi3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_uavgv1si3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_uavgv2si3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_uavgv4si3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_uavgv8si3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_uavgv16si3_ceil                                (rtx, rtx, rtx);
extern rtx        gen_uavgv32si3_ceil                                (rtx, rtx, rtx);
extern rtx        gen_uavgv64si3_ceil                                (rtx, rtx, rtx);
extern rtx        gen_uavgv128si3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_uavgv256si3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_uavgv512si3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_uavgv1024si3_ceil                              (rtx, rtx, rtx);
extern rtx        gen_uavgv1di3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_uavgv2di3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_uavgv4di3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_uavgv8di3_ceil                                 (rtx, rtx, rtx);
extern rtx        gen_uavgv16di3_ceil                                (rtx, rtx, rtx);
extern rtx        gen_uavgv32di3_ceil                                (rtx, rtx, rtx);
extern rtx        gen_uavgv64di3_ceil                                (rtx, rtx, rtx);
extern rtx        gen_uavgv128di3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_uavgv256di3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_uavgv512di3_ceil                               (rtx, rtx, rtx);
extern rtx        gen_ceilrvvm8hf2                                   (rtx, rtx);
extern rtx        gen_ceilrvvm4hf2                                   (rtx, rtx);
extern rtx        gen_ceilrvvm2hf2                                   (rtx, rtx);
extern rtx        gen_ceilrvvm1hf2                                   (rtx, rtx);
extern rtx        gen_ceilrvvmf2hf2                                  (rtx, rtx);
extern rtx        gen_ceilrvvmf4hf2                                  (rtx, rtx);
extern rtx        gen_ceilrvvm8sf2                                   (rtx, rtx);
extern rtx        gen_ceilrvvm4sf2                                   (rtx, rtx);
extern rtx        gen_ceilrvvm2sf2                                   (rtx, rtx);
extern rtx        gen_ceilrvvm1sf2                                   (rtx, rtx);
extern rtx        gen_ceilrvvmf2sf2                                  (rtx, rtx);
extern rtx        gen_ceilrvvm8df2                                   (rtx, rtx);
extern rtx        gen_ceilrvvm4df2                                   (rtx, rtx);
extern rtx        gen_ceilrvvm2df2                                   (rtx, rtx);
extern rtx        gen_ceilrvvm1df2                                   (rtx, rtx);
extern rtx        gen_ceilv1hf2                                      (rtx, rtx);
extern rtx        gen_ceilv2hf2                                      (rtx, rtx);
extern rtx        gen_ceilv4hf2                                      (rtx, rtx);
extern rtx        gen_ceilv8hf2                                      (rtx, rtx);
extern rtx        gen_ceilv16hf2                                     (rtx, rtx);
extern rtx        gen_ceilv32hf2                                     (rtx, rtx);
extern rtx        gen_ceilv64hf2                                     (rtx, rtx);
extern rtx        gen_ceilv128hf2                                    (rtx, rtx);
extern rtx        gen_ceilv256hf2                                    (rtx, rtx);
extern rtx        gen_ceilv512hf2                                    (rtx, rtx);
extern rtx        gen_ceilv1024hf2                                   (rtx, rtx);
extern rtx        gen_ceilv2048hf2                                   (rtx, rtx);
extern rtx        gen_ceilv1sf2                                      (rtx, rtx);
extern rtx        gen_ceilv2sf2                                      (rtx, rtx);
extern rtx        gen_ceilv4sf2                                      (rtx, rtx);
extern rtx        gen_ceilv8sf2                                      (rtx, rtx);
extern rtx        gen_ceilv16sf2                                     (rtx, rtx);
extern rtx        gen_ceilv32sf2                                     (rtx, rtx);
extern rtx        gen_ceilv64sf2                                     (rtx, rtx);
extern rtx        gen_ceilv128sf2                                    (rtx, rtx);
extern rtx        gen_ceilv256sf2                                    (rtx, rtx);
extern rtx        gen_ceilv512sf2                                    (rtx, rtx);
extern rtx        gen_ceilv1024sf2                                   (rtx, rtx);
extern rtx        gen_ceilv1df2                                      (rtx, rtx);
extern rtx        gen_ceilv2df2                                      (rtx, rtx);
extern rtx        gen_ceilv4df2                                      (rtx, rtx);
extern rtx        gen_ceilv8df2                                      (rtx, rtx);
extern rtx        gen_ceilv16df2                                     (rtx, rtx);
extern rtx        gen_ceilv32df2                                     (rtx, rtx);
extern rtx        gen_ceilv64df2                                     (rtx, rtx);
extern rtx        gen_ceilv128df2                                    (rtx, rtx);
extern rtx        gen_ceilv256df2                                    (rtx, rtx);
extern rtx        gen_ceilv512df2                                    (rtx, rtx);
extern rtx        gen_floorrvvm8hf2                                  (rtx, rtx);
extern rtx        gen_floorrvvm4hf2                                  (rtx, rtx);
extern rtx        gen_floorrvvm2hf2                                  (rtx, rtx);
extern rtx        gen_floorrvvm1hf2                                  (rtx, rtx);
extern rtx        gen_floorrvvmf2hf2                                 (rtx, rtx);
extern rtx        gen_floorrvvmf4hf2                                 (rtx, rtx);
extern rtx        gen_floorrvvm8sf2                                  (rtx, rtx);
extern rtx        gen_floorrvvm4sf2                                  (rtx, rtx);
extern rtx        gen_floorrvvm2sf2                                  (rtx, rtx);
extern rtx        gen_floorrvvm1sf2                                  (rtx, rtx);
extern rtx        gen_floorrvvmf2sf2                                 (rtx, rtx);
extern rtx        gen_floorrvvm8df2                                  (rtx, rtx);
extern rtx        gen_floorrvvm4df2                                  (rtx, rtx);
extern rtx        gen_floorrvvm2df2                                  (rtx, rtx);
extern rtx        gen_floorrvvm1df2                                  (rtx, rtx);
extern rtx        gen_floorv1hf2                                     (rtx, rtx);
extern rtx        gen_floorv2hf2                                     (rtx, rtx);
extern rtx        gen_floorv4hf2                                     (rtx, rtx);
extern rtx        gen_floorv8hf2                                     (rtx, rtx);
extern rtx        gen_floorv16hf2                                    (rtx, rtx);
extern rtx        gen_floorv32hf2                                    (rtx, rtx);
extern rtx        gen_floorv64hf2                                    (rtx, rtx);
extern rtx        gen_floorv128hf2                                   (rtx, rtx);
extern rtx        gen_floorv256hf2                                   (rtx, rtx);
extern rtx        gen_floorv512hf2                                   (rtx, rtx);
extern rtx        gen_floorv1024hf2                                  (rtx, rtx);
extern rtx        gen_floorv2048hf2                                  (rtx, rtx);
extern rtx        gen_floorv1sf2                                     (rtx, rtx);
extern rtx        gen_floorv2sf2                                     (rtx, rtx);
extern rtx        gen_floorv4sf2                                     (rtx, rtx);
extern rtx        gen_floorv8sf2                                     (rtx, rtx);
extern rtx        gen_floorv16sf2                                    (rtx, rtx);
extern rtx        gen_floorv32sf2                                    (rtx, rtx);
extern rtx        gen_floorv64sf2                                    (rtx, rtx);
extern rtx        gen_floorv128sf2                                   (rtx, rtx);
extern rtx        gen_floorv256sf2                                   (rtx, rtx);
extern rtx        gen_floorv512sf2                                   (rtx, rtx);
extern rtx        gen_floorv1024sf2                                  (rtx, rtx);
extern rtx        gen_floorv1df2                                     (rtx, rtx);
extern rtx        gen_floorv2df2                                     (rtx, rtx);
extern rtx        gen_floorv4df2                                     (rtx, rtx);
extern rtx        gen_floorv8df2                                     (rtx, rtx);
extern rtx        gen_floorv16df2                                    (rtx, rtx);
extern rtx        gen_floorv32df2                                    (rtx, rtx);
extern rtx        gen_floorv64df2                                    (rtx, rtx);
extern rtx        gen_floorv128df2                                   (rtx, rtx);
extern rtx        gen_floorv256df2                                   (rtx, rtx);
extern rtx        gen_floorv512df2                                   (rtx, rtx);
extern rtx        gen_nearbyintrvvm8hf2                              (rtx, rtx);
extern rtx        gen_nearbyintrvvm4hf2                              (rtx, rtx);
extern rtx        gen_nearbyintrvvm2hf2                              (rtx, rtx);
extern rtx        gen_nearbyintrvvm1hf2                              (rtx, rtx);
extern rtx        gen_nearbyintrvvmf2hf2                             (rtx, rtx);
extern rtx        gen_nearbyintrvvmf4hf2                             (rtx, rtx);
extern rtx        gen_nearbyintrvvm8sf2                              (rtx, rtx);
extern rtx        gen_nearbyintrvvm4sf2                              (rtx, rtx);
extern rtx        gen_nearbyintrvvm2sf2                              (rtx, rtx);
extern rtx        gen_nearbyintrvvm1sf2                              (rtx, rtx);
extern rtx        gen_nearbyintrvvmf2sf2                             (rtx, rtx);
extern rtx        gen_nearbyintrvvm8df2                              (rtx, rtx);
extern rtx        gen_nearbyintrvvm4df2                              (rtx, rtx);
extern rtx        gen_nearbyintrvvm2df2                              (rtx, rtx);
extern rtx        gen_nearbyintrvvm1df2                              (rtx, rtx);
extern rtx        gen_nearbyintv1hf2                                 (rtx, rtx);
extern rtx        gen_nearbyintv2hf2                                 (rtx, rtx);
extern rtx        gen_nearbyintv4hf2                                 (rtx, rtx);
extern rtx        gen_nearbyintv8hf2                                 (rtx, rtx);
extern rtx        gen_nearbyintv16hf2                                (rtx, rtx);
extern rtx        gen_nearbyintv32hf2                                (rtx, rtx);
extern rtx        gen_nearbyintv64hf2                                (rtx, rtx);
extern rtx        gen_nearbyintv128hf2                               (rtx, rtx);
extern rtx        gen_nearbyintv256hf2                               (rtx, rtx);
extern rtx        gen_nearbyintv512hf2                               (rtx, rtx);
extern rtx        gen_nearbyintv1024hf2                              (rtx, rtx);
extern rtx        gen_nearbyintv2048hf2                              (rtx, rtx);
extern rtx        gen_nearbyintv1sf2                                 (rtx, rtx);
extern rtx        gen_nearbyintv2sf2                                 (rtx, rtx);
extern rtx        gen_nearbyintv4sf2                                 (rtx, rtx);
extern rtx        gen_nearbyintv8sf2                                 (rtx, rtx);
extern rtx        gen_nearbyintv16sf2                                (rtx, rtx);
extern rtx        gen_nearbyintv32sf2                                (rtx, rtx);
extern rtx        gen_nearbyintv64sf2                                (rtx, rtx);
extern rtx        gen_nearbyintv128sf2                               (rtx, rtx);
extern rtx        gen_nearbyintv256sf2                               (rtx, rtx);
extern rtx        gen_nearbyintv512sf2                               (rtx, rtx);
extern rtx        gen_nearbyintv1024sf2                              (rtx, rtx);
extern rtx        gen_nearbyintv1df2                                 (rtx, rtx);
extern rtx        gen_nearbyintv2df2                                 (rtx, rtx);
extern rtx        gen_nearbyintv4df2                                 (rtx, rtx);
extern rtx        gen_nearbyintv8df2                                 (rtx, rtx);
extern rtx        gen_nearbyintv16df2                                (rtx, rtx);
extern rtx        gen_nearbyintv32df2                                (rtx, rtx);
extern rtx        gen_nearbyintv64df2                                (rtx, rtx);
extern rtx        gen_nearbyintv128df2                               (rtx, rtx);
extern rtx        gen_nearbyintv256df2                               (rtx, rtx);
extern rtx        gen_nearbyintv512df2                               (rtx, rtx);
extern rtx        gen_rintrvvm8hf2                                   (rtx, rtx);
extern rtx        gen_rintrvvm4hf2                                   (rtx, rtx);
extern rtx        gen_rintrvvm2hf2                                   (rtx, rtx);
extern rtx        gen_rintrvvm1hf2                                   (rtx, rtx);
extern rtx        gen_rintrvvmf2hf2                                  (rtx, rtx);
extern rtx        gen_rintrvvmf4hf2                                  (rtx, rtx);
extern rtx        gen_rintrvvm8sf2                                   (rtx, rtx);
extern rtx        gen_rintrvvm4sf2                                   (rtx, rtx);
extern rtx        gen_rintrvvm2sf2                                   (rtx, rtx);
extern rtx        gen_rintrvvm1sf2                                   (rtx, rtx);
extern rtx        gen_rintrvvmf2sf2                                  (rtx, rtx);
extern rtx        gen_rintrvvm8df2                                   (rtx, rtx);
extern rtx        gen_rintrvvm4df2                                   (rtx, rtx);
extern rtx        gen_rintrvvm2df2                                   (rtx, rtx);
extern rtx        gen_rintrvvm1df2                                   (rtx, rtx);
extern rtx        gen_rintv1hf2                                      (rtx, rtx);
extern rtx        gen_rintv2hf2                                      (rtx, rtx);
extern rtx        gen_rintv4hf2                                      (rtx, rtx);
extern rtx        gen_rintv8hf2                                      (rtx, rtx);
extern rtx        gen_rintv16hf2                                     (rtx, rtx);
extern rtx        gen_rintv32hf2                                     (rtx, rtx);
extern rtx        gen_rintv64hf2                                     (rtx, rtx);
extern rtx        gen_rintv128hf2                                    (rtx, rtx);
extern rtx        gen_rintv256hf2                                    (rtx, rtx);
extern rtx        gen_rintv512hf2                                    (rtx, rtx);
extern rtx        gen_rintv1024hf2                                   (rtx, rtx);
extern rtx        gen_rintv2048hf2                                   (rtx, rtx);
extern rtx        gen_rintv1sf2                                      (rtx, rtx);
extern rtx        gen_rintv2sf2                                      (rtx, rtx);
extern rtx        gen_rintv4sf2                                      (rtx, rtx);
extern rtx        gen_rintv8sf2                                      (rtx, rtx);
extern rtx        gen_rintv16sf2                                     (rtx, rtx);
extern rtx        gen_rintv32sf2                                     (rtx, rtx);
extern rtx        gen_rintv64sf2                                     (rtx, rtx);
extern rtx        gen_rintv128sf2                                    (rtx, rtx);
extern rtx        gen_rintv256sf2                                    (rtx, rtx);
extern rtx        gen_rintv512sf2                                    (rtx, rtx);
extern rtx        gen_rintv1024sf2                                   (rtx, rtx);
extern rtx        gen_rintv1df2                                      (rtx, rtx);
extern rtx        gen_rintv2df2                                      (rtx, rtx);
extern rtx        gen_rintv4df2                                      (rtx, rtx);
extern rtx        gen_rintv8df2                                      (rtx, rtx);
extern rtx        gen_rintv16df2                                     (rtx, rtx);
extern rtx        gen_rintv32df2                                     (rtx, rtx);
extern rtx        gen_rintv64df2                                     (rtx, rtx);
extern rtx        gen_rintv128df2                                    (rtx, rtx);
extern rtx        gen_rintv256df2                                    (rtx, rtx);
extern rtx        gen_rintv512df2                                    (rtx, rtx);
extern rtx        gen_roundrvvm8hf2                                  (rtx, rtx);
extern rtx        gen_roundrvvm4hf2                                  (rtx, rtx);
extern rtx        gen_roundrvvm2hf2                                  (rtx, rtx);
extern rtx        gen_roundrvvm1hf2                                  (rtx, rtx);
extern rtx        gen_roundrvvmf2hf2                                 (rtx, rtx);
extern rtx        gen_roundrvvmf4hf2                                 (rtx, rtx);
extern rtx        gen_roundrvvm8sf2                                  (rtx, rtx);
extern rtx        gen_roundrvvm4sf2                                  (rtx, rtx);
extern rtx        gen_roundrvvm2sf2                                  (rtx, rtx);
extern rtx        gen_roundrvvm1sf2                                  (rtx, rtx);
extern rtx        gen_roundrvvmf2sf2                                 (rtx, rtx);
extern rtx        gen_roundrvvm8df2                                  (rtx, rtx);
extern rtx        gen_roundrvvm4df2                                  (rtx, rtx);
extern rtx        gen_roundrvvm2df2                                  (rtx, rtx);
extern rtx        gen_roundrvvm1df2                                  (rtx, rtx);
extern rtx        gen_roundv1hf2                                     (rtx, rtx);
extern rtx        gen_roundv2hf2                                     (rtx, rtx);
extern rtx        gen_roundv4hf2                                     (rtx, rtx);
extern rtx        gen_roundv8hf2                                     (rtx, rtx);
extern rtx        gen_roundv16hf2                                    (rtx, rtx);
extern rtx        gen_roundv32hf2                                    (rtx, rtx);
extern rtx        gen_roundv64hf2                                    (rtx, rtx);
extern rtx        gen_roundv128hf2                                   (rtx, rtx);
extern rtx        gen_roundv256hf2                                   (rtx, rtx);
extern rtx        gen_roundv512hf2                                   (rtx, rtx);
extern rtx        gen_roundv1024hf2                                  (rtx, rtx);
extern rtx        gen_roundv2048hf2                                  (rtx, rtx);
extern rtx        gen_roundv1sf2                                     (rtx, rtx);
extern rtx        gen_roundv2sf2                                     (rtx, rtx);
extern rtx        gen_roundv4sf2                                     (rtx, rtx);
extern rtx        gen_roundv8sf2                                     (rtx, rtx);
extern rtx        gen_roundv16sf2                                    (rtx, rtx);
extern rtx        gen_roundv32sf2                                    (rtx, rtx);
extern rtx        gen_roundv64sf2                                    (rtx, rtx);
extern rtx        gen_roundv128sf2                                   (rtx, rtx);
extern rtx        gen_roundv256sf2                                   (rtx, rtx);
extern rtx        gen_roundv512sf2                                   (rtx, rtx);
extern rtx        gen_roundv1024sf2                                  (rtx, rtx);
extern rtx        gen_roundv1df2                                     (rtx, rtx);
extern rtx        gen_roundv2df2                                     (rtx, rtx);
extern rtx        gen_roundv4df2                                     (rtx, rtx);
extern rtx        gen_roundv8df2                                     (rtx, rtx);
extern rtx        gen_roundv16df2                                    (rtx, rtx);
extern rtx        gen_roundv32df2                                    (rtx, rtx);
extern rtx        gen_roundv64df2                                    (rtx, rtx);
extern rtx        gen_roundv128df2                                   (rtx, rtx);
extern rtx        gen_roundv256df2                                   (rtx, rtx);
extern rtx        gen_roundv512df2                                   (rtx, rtx);
extern rtx        gen_btruncrvvm8hf2                                 (rtx, rtx);
extern rtx        gen_btruncrvvm4hf2                                 (rtx, rtx);
extern rtx        gen_btruncrvvm2hf2                                 (rtx, rtx);
extern rtx        gen_btruncrvvm1hf2                                 (rtx, rtx);
extern rtx        gen_btruncrvvmf2hf2                                (rtx, rtx);
extern rtx        gen_btruncrvvmf4hf2                                (rtx, rtx);
extern rtx        gen_btruncrvvm8sf2                                 (rtx, rtx);
extern rtx        gen_btruncrvvm4sf2                                 (rtx, rtx);
extern rtx        gen_btruncrvvm2sf2                                 (rtx, rtx);
extern rtx        gen_btruncrvvm1sf2                                 (rtx, rtx);
extern rtx        gen_btruncrvvmf2sf2                                (rtx, rtx);
extern rtx        gen_btruncrvvm8df2                                 (rtx, rtx);
extern rtx        gen_btruncrvvm4df2                                 (rtx, rtx);
extern rtx        gen_btruncrvvm2df2                                 (rtx, rtx);
extern rtx        gen_btruncrvvm1df2                                 (rtx, rtx);
extern rtx        gen_btruncv1hf2                                    (rtx, rtx);
extern rtx        gen_btruncv2hf2                                    (rtx, rtx);
extern rtx        gen_btruncv4hf2                                    (rtx, rtx);
extern rtx        gen_btruncv8hf2                                    (rtx, rtx);
extern rtx        gen_btruncv16hf2                                   (rtx, rtx);
extern rtx        gen_btruncv32hf2                                   (rtx, rtx);
extern rtx        gen_btruncv64hf2                                   (rtx, rtx);
extern rtx        gen_btruncv128hf2                                  (rtx, rtx);
extern rtx        gen_btruncv256hf2                                  (rtx, rtx);
extern rtx        gen_btruncv512hf2                                  (rtx, rtx);
extern rtx        gen_btruncv1024hf2                                 (rtx, rtx);
extern rtx        gen_btruncv2048hf2                                 (rtx, rtx);
extern rtx        gen_btruncv1sf2                                    (rtx, rtx);
extern rtx        gen_btruncv2sf2                                    (rtx, rtx);
extern rtx        gen_btruncv4sf2                                    (rtx, rtx);
extern rtx        gen_btruncv8sf2                                    (rtx, rtx);
extern rtx        gen_btruncv16sf2                                   (rtx, rtx);
extern rtx        gen_btruncv32sf2                                   (rtx, rtx);
extern rtx        gen_btruncv64sf2                                   (rtx, rtx);
extern rtx        gen_btruncv128sf2                                  (rtx, rtx);
extern rtx        gen_btruncv256sf2                                  (rtx, rtx);
extern rtx        gen_btruncv512sf2                                  (rtx, rtx);
extern rtx        gen_btruncv1024sf2                                 (rtx, rtx);
extern rtx        gen_btruncv1df2                                    (rtx, rtx);
extern rtx        gen_btruncv2df2                                    (rtx, rtx);
extern rtx        gen_btruncv4df2                                    (rtx, rtx);
extern rtx        gen_btruncv8df2                                    (rtx, rtx);
extern rtx        gen_btruncv16df2                                   (rtx, rtx);
extern rtx        gen_btruncv32df2                                   (rtx, rtx);
extern rtx        gen_btruncv64df2                                   (rtx, rtx);
extern rtx        gen_btruncv128df2                                  (rtx, rtx);
extern rtx        gen_btruncv256df2                                  (rtx, rtx);
extern rtx        gen_btruncv512df2                                  (rtx, rtx);
extern rtx        gen_roundevenrvvm8hf2                              (rtx, rtx);
extern rtx        gen_roundevenrvvm4hf2                              (rtx, rtx);
extern rtx        gen_roundevenrvvm2hf2                              (rtx, rtx);
extern rtx        gen_roundevenrvvm1hf2                              (rtx, rtx);
extern rtx        gen_roundevenrvvmf2hf2                             (rtx, rtx);
extern rtx        gen_roundevenrvvmf4hf2                             (rtx, rtx);
extern rtx        gen_roundevenrvvm8sf2                              (rtx, rtx);
extern rtx        gen_roundevenrvvm4sf2                              (rtx, rtx);
extern rtx        gen_roundevenrvvm2sf2                              (rtx, rtx);
extern rtx        gen_roundevenrvvm1sf2                              (rtx, rtx);
extern rtx        gen_roundevenrvvmf2sf2                             (rtx, rtx);
extern rtx        gen_roundevenrvvm8df2                              (rtx, rtx);
extern rtx        gen_roundevenrvvm4df2                              (rtx, rtx);
extern rtx        gen_roundevenrvvm2df2                              (rtx, rtx);
extern rtx        gen_roundevenrvvm1df2                              (rtx, rtx);
extern rtx        gen_roundevenv1hf2                                 (rtx, rtx);
extern rtx        gen_roundevenv2hf2                                 (rtx, rtx);
extern rtx        gen_roundevenv4hf2                                 (rtx, rtx);
extern rtx        gen_roundevenv8hf2                                 (rtx, rtx);
extern rtx        gen_roundevenv16hf2                                (rtx, rtx);
extern rtx        gen_roundevenv32hf2                                (rtx, rtx);
extern rtx        gen_roundevenv64hf2                                (rtx, rtx);
extern rtx        gen_roundevenv128hf2                               (rtx, rtx);
extern rtx        gen_roundevenv256hf2                               (rtx, rtx);
extern rtx        gen_roundevenv512hf2                               (rtx, rtx);
extern rtx        gen_roundevenv1024hf2                              (rtx, rtx);
extern rtx        gen_roundevenv2048hf2                              (rtx, rtx);
extern rtx        gen_roundevenv1sf2                                 (rtx, rtx);
extern rtx        gen_roundevenv2sf2                                 (rtx, rtx);
extern rtx        gen_roundevenv4sf2                                 (rtx, rtx);
extern rtx        gen_roundevenv8sf2                                 (rtx, rtx);
extern rtx        gen_roundevenv16sf2                                (rtx, rtx);
extern rtx        gen_roundevenv32sf2                                (rtx, rtx);
extern rtx        gen_roundevenv64sf2                                (rtx, rtx);
extern rtx        gen_roundevenv128sf2                               (rtx, rtx);
extern rtx        gen_roundevenv256sf2                               (rtx, rtx);
extern rtx        gen_roundevenv512sf2                               (rtx, rtx);
extern rtx        gen_roundevenv1024sf2                              (rtx, rtx);
extern rtx        gen_roundevenv1df2                                 (rtx, rtx);
extern rtx        gen_roundevenv2df2                                 (rtx, rtx);
extern rtx        gen_roundevenv4df2                                 (rtx, rtx);
extern rtx        gen_roundevenv8df2                                 (rtx, rtx);
extern rtx        gen_roundevenv16df2                                (rtx, rtx);
extern rtx        gen_roundevenv32df2                                (rtx, rtx);
extern rtx        gen_roundevenv64df2                                (rtx, rtx);
extern rtx        gen_roundevenv128df2                               (rtx, rtx);
extern rtx        gen_roundevenv256df2                               (rtx, rtx);
extern rtx        gen_roundevenv512df2                               (rtx, rtx);
extern rtx        gen_lrintrvvm4hfrvvm8si2                           (rtx, rtx);
extern rtx        gen_lrintrvvm2hfrvvm4si2                           (rtx, rtx);
extern rtx        gen_lrintrvvm1hfrvvm2si2                           (rtx, rtx);
extern rtx        gen_lrintrvvmf2hfrvvm1si2                          (rtx, rtx);
extern rtx        gen_lrintrvvmf4hfrvvmf2si2                         (rtx, rtx);
extern rtx        gen_lrintrvvm8sfrvvm8si2                           (rtx, rtx);
extern rtx        gen_lrintrvvm4sfrvvm4si2                           (rtx, rtx);
extern rtx        gen_lrintrvvm2sfrvvm2si2                           (rtx, rtx);
extern rtx        gen_lrintrvvm1sfrvvm1si2                           (rtx, rtx);
extern rtx        gen_lrintrvvmf2sfrvvmf2si2                         (rtx, rtx);
extern rtx        gen_lrintrvvm8dfrvvm4si2                           (rtx, rtx);
extern rtx        gen_lrintrvvm4dfrvvm2si2                           (rtx, rtx);
extern rtx        gen_lrintrvvm2dfrvvm1si2                           (rtx, rtx);
extern rtx        gen_lrintrvvm1dfrvvmf2si2                          (rtx, rtx);
extern rtx        gen_lrintv1hfv1si2                                 (rtx, rtx);
extern rtx        gen_lrintv2hfv2si2                                 (rtx, rtx);
extern rtx        gen_lrintv4hfv4si2                                 (rtx, rtx);
extern rtx        gen_lrintv8hfv8si2                                 (rtx, rtx);
extern rtx        gen_lrintv16hfv16si2                               (rtx, rtx);
extern rtx        gen_lrintv32hfv32si2                               (rtx, rtx);
extern rtx        gen_lrintv64hfv64si2                               (rtx, rtx);
extern rtx        gen_lrintv128hfv128si2                             (rtx, rtx);
extern rtx        gen_lrintv256hfv256si2                             (rtx, rtx);
extern rtx        gen_lrintv512hfv512si2                             (rtx, rtx);
extern rtx        gen_lrintv1024hfv1024si2                           (rtx, rtx);
extern rtx        gen_lrintv1sfv1si2                                 (rtx, rtx);
extern rtx        gen_lrintv2sfv2si2                                 (rtx, rtx);
extern rtx        gen_lrintv4sfv4si2                                 (rtx, rtx);
extern rtx        gen_lrintv8sfv8si2                                 (rtx, rtx);
extern rtx        gen_lrintv16sfv16si2                               (rtx, rtx);
extern rtx        gen_lrintv32sfv32si2                               (rtx, rtx);
extern rtx        gen_lrintv64sfv64si2                               (rtx, rtx);
extern rtx        gen_lrintv128sfv128si2                             (rtx, rtx);
extern rtx        gen_lrintv256sfv256si2                             (rtx, rtx);
extern rtx        gen_lrintv512sfv512si2                             (rtx, rtx);
extern rtx        gen_lrintv1024sfv1024si2                           (rtx, rtx);
extern rtx        gen_lrintv1dfv1si2                                 (rtx, rtx);
extern rtx        gen_lrintv2dfv2si2                                 (rtx, rtx);
extern rtx        gen_lrintv4dfv4si2                                 (rtx, rtx);
extern rtx        gen_lrintv8dfv8si2                                 (rtx, rtx);
extern rtx        gen_lrintv16dfv16si2                               (rtx, rtx);
extern rtx        gen_lrintv32dfv32si2                               (rtx, rtx);
extern rtx        gen_lrintv64dfv64si2                               (rtx, rtx);
extern rtx        gen_lrintv128dfv128si2                             (rtx, rtx);
extern rtx        gen_lrintv256dfv256si2                             (rtx, rtx);
extern rtx        gen_lrintv512dfv512si2                             (rtx, rtx);
extern rtx        gen_lrintrvvm2hfrvvm8di2                           (rtx, rtx);
extern rtx        gen_lrintrvvm1hfrvvm4di2                           (rtx, rtx);
extern rtx        gen_lrintrvvmf2hfrvvm2di2                          (rtx, rtx);
extern rtx        gen_lrintrvvmf4hfrvvm1di2                          (rtx, rtx);
extern rtx        gen_lrintrvvm4sfrvvm8di2                           (rtx, rtx);
extern rtx        gen_lrintrvvm2sfrvvm4di2                           (rtx, rtx);
extern rtx        gen_lrintrvvm1sfrvvm2di2                           (rtx, rtx);
extern rtx        gen_lrintrvvmf2sfrvvm1di2                          (rtx, rtx);
extern rtx        gen_lrintrvvm8dfrvvm8di2                           (rtx, rtx);
extern rtx        gen_lrintrvvm4dfrvvm4di2                           (rtx, rtx);
extern rtx        gen_lrintrvvm2dfrvvm2di2                           (rtx, rtx);
extern rtx        gen_lrintrvvm1dfrvvm1di2                           (rtx, rtx);
extern rtx        gen_lrintv1hfv1di2                                 (rtx, rtx);
extern rtx        gen_lrintv2hfv2di2                                 (rtx, rtx);
extern rtx        gen_lrintv4hfv4di2                                 (rtx, rtx);
extern rtx        gen_lrintv8hfv8di2                                 (rtx, rtx);
extern rtx        gen_lrintv16hfv16di2                               (rtx, rtx);
extern rtx        gen_lrintv32hfv32di2                               (rtx, rtx);
extern rtx        gen_lrintv64hfv64di2                               (rtx, rtx);
extern rtx        gen_lrintv128hfv128di2                             (rtx, rtx);
extern rtx        gen_lrintv256hfv256di2                             (rtx, rtx);
extern rtx        gen_lrintv512hfv512di2                             (rtx, rtx);
extern rtx        gen_lrintv1sfv1di2                                 (rtx, rtx);
extern rtx        gen_lrintv2sfv2di2                                 (rtx, rtx);
extern rtx        gen_lrintv4sfv4di2                                 (rtx, rtx);
extern rtx        gen_lrintv8sfv8di2                                 (rtx, rtx);
extern rtx        gen_lrintv16sfv16di2                               (rtx, rtx);
extern rtx        gen_lrintv32sfv32di2                               (rtx, rtx);
extern rtx        gen_lrintv64sfv64di2                               (rtx, rtx);
extern rtx        gen_lrintv128sfv128di2                             (rtx, rtx);
extern rtx        gen_lrintv256sfv256di2                             (rtx, rtx);
extern rtx        gen_lrintv512sfv512di2                             (rtx, rtx);
extern rtx        gen_lrintv1dfv1di2                                 (rtx, rtx);
extern rtx        gen_lrintv2dfv2di2                                 (rtx, rtx);
extern rtx        gen_lrintv4dfv4di2                                 (rtx, rtx);
extern rtx        gen_lrintv8dfv8di2                                 (rtx, rtx);
extern rtx        gen_lrintv16dfv16di2                               (rtx, rtx);
extern rtx        gen_lrintv32dfv32di2                               (rtx, rtx);
extern rtx        gen_lrintv64dfv64di2                               (rtx, rtx);
extern rtx        gen_lrintv128dfv128di2                             (rtx, rtx);
extern rtx        gen_lrintv256dfv256di2                             (rtx, rtx);
extern rtx        gen_lrintv512dfv512di2                             (rtx, rtx);
extern rtx        gen_lroundrvvm4hfrvvm8si2                          (rtx, rtx);
extern rtx        gen_lroundrvvm2hfrvvm4si2                          (rtx, rtx);
extern rtx        gen_lroundrvvm1hfrvvm2si2                          (rtx, rtx);
extern rtx        gen_lroundrvvmf2hfrvvm1si2                         (rtx, rtx);
extern rtx        gen_lroundrvvmf4hfrvvmf2si2                        (rtx, rtx);
extern rtx        gen_lroundrvvm8sfrvvm8si2                          (rtx, rtx);
extern rtx        gen_lroundrvvm4sfrvvm4si2                          (rtx, rtx);
extern rtx        gen_lroundrvvm2sfrvvm2si2                          (rtx, rtx);
extern rtx        gen_lroundrvvm1sfrvvm1si2                          (rtx, rtx);
extern rtx        gen_lroundrvvmf2sfrvvmf2si2                        (rtx, rtx);
extern rtx        gen_lroundrvvm8dfrvvm4si2                          (rtx, rtx);
extern rtx        gen_lroundrvvm4dfrvvm2si2                          (rtx, rtx);
extern rtx        gen_lroundrvvm2dfrvvm1si2                          (rtx, rtx);
extern rtx        gen_lroundrvvm1dfrvvmf2si2                         (rtx, rtx);
extern rtx        gen_lroundv1hfv1si2                                (rtx, rtx);
extern rtx        gen_lroundv2hfv2si2                                (rtx, rtx);
extern rtx        gen_lroundv4hfv4si2                                (rtx, rtx);
extern rtx        gen_lroundv8hfv8si2                                (rtx, rtx);
extern rtx        gen_lroundv16hfv16si2                              (rtx, rtx);
extern rtx        gen_lroundv32hfv32si2                              (rtx, rtx);
extern rtx        gen_lroundv64hfv64si2                              (rtx, rtx);
extern rtx        gen_lroundv128hfv128si2                            (rtx, rtx);
extern rtx        gen_lroundv256hfv256si2                            (rtx, rtx);
extern rtx        gen_lroundv512hfv512si2                            (rtx, rtx);
extern rtx        gen_lroundv1024hfv1024si2                          (rtx, rtx);
extern rtx        gen_lroundv1sfv1si2                                (rtx, rtx);
extern rtx        gen_lroundv2sfv2si2                                (rtx, rtx);
extern rtx        gen_lroundv4sfv4si2                                (rtx, rtx);
extern rtx        gen_lroundv8sfv8si2                                (rtx, rtx);
extern rtx        gen_lroundv16sfv16si2                              (rtx, rtx);
extern rtx        gen_lroundv32sfv32si2                              (rtx, rtx);
extern rtx        gen_lroundv64sfv64si2                              (rtx, rtx);
extern rtx        gen_lroundv128sfv128si2                            (rtx, rtx);
extern rtx        gen_lroundv256sfv256si2                            (rtx, rtx);
extern rtx        gen_lroundv512sfv512si2                            (rtx, rtx);
extern rtx        gen_lroundv1024sfv1024si2                          (rtx, rtx);
extern rtx        gen_lroundv1dfv1si2                                (rtx, rtx);
extern rtx        gen_lroundv2dfv2si2                                (rtx, rtx);
extern rtx        gen_lroundv4dfv4si2                                (rtx, rtx);
extern rtx        gen_lroundv8dfv8si2                                (rtx, rtx);
extern rtx        gen_lroundv16dfv16si2                              (rtx, rtx);
extern rtx        gen_lroundv32dfv32si2                              (rtx, rtx);
extern rtx        gen_lroundv64dfv64si2                              (rtx, rtx);
extern rtx        gen_lroundv128dfv128si2                            (rtx, rtx);
extern rtx        gen_lroundv256dfv256si2                            (rtx, rtx);
extern rtx        gen_lroundv512dfv512si2                            (rtx, rtx);
extern rtx        gen_lroundrvvm2hfrvvm8di2                          (rtx, rtx);
extern rtx        gen_lroundrvvm1hfrvvm4di2                          (rtx, rtx);
extern rtx        gen_lroundrvvmf2hfrvvm2di2                         (rtx, rtx);
extern rtx        gen_lroundrvvmf4hfrvvm1di2                         (rtx, rtx);
extern rtx        gen_lroundrvvm4sfrvvm8di2                          (rtx, rtx);
extern rtx        gen_lroundrvvm2sfrvvm4di2                          (rtx, rtx);
extern rtx        gen_lroundrvvm1sfrvvm2di2                          (rtx, rtx);
extern rtx        gen_lroundrvvmf2sfrvvm1di2                         (rtx, rtx);
extern rtx        gen_lroundrvvm8dfrvvm8di2                          (rtx, rtx);
extern rtx        gen_lroundrvvm4dfrvvm4di2                          (rtx, rtx);
extern rtx        gen_lroundrvvm2dfrvvm2di2                          (rtx, rtx);
extern rtx        gen_lroundrvvm1dfrvvm1di2                          (rtx, rtx);
extern rtx        gen_lroundv1hfv1di2                                (rtx, rtx);
extern rtx        gen_lroundv2hfv2di2                                (rtx, rtx);
extern rtx        gen_lroundv4hfv4di2                                (rtx, rtx);
extern rtx        gen_lroundv8hfv8di2                                (rtx, rtx);
extern rtx        gen_lroundv16hfv16di2                              (rtx, rtx);
extern rtx        gen_lroundv32hfv32di2                              (rtx, rtx);
extern rtx        gen_lroundv64hfv64di2                              (rtx, rtx);
extern rtx        gen_lroundv128hfv128di2                            (rtx, rtx);
extern rtx        gen_lroundv256hfv256di2                            (rtx, rtx);
extern rtx        gen_lroundv512hfv512di2                            (rtx, rtx);
extern rtx        gen_lroundv1sfv1di2                                (rtx, rtx);
extern rtx        gen_lroundv2sfv2di2                                (rtx, rtx);
extern rtx        gen_lroundv4sfv4di2                                (rtx, rtx);
extern rtx        gen_lroundv8sfv8di2                                (rtx, rtx);
extern rtx        gen_lroundv16sfv16di2                              (rtx, rtx);
extern rtx        gen_lroundv32sfv32di2                              (rtx, rtx);
extern rtx        gen_lroundv64sfv64di2                              (rtx, rtx);
extern rtx        gen_lroundv128sfv128di2                            (rtx, rtx);
extern rtx        gen_lroundv256sfv256di2                            (rtx, rtx);
extern rtx        gen_lroundv512sfv512di2                            (rtx, rtx);
extern rtx        gen_lroundv1dfv1di2                                (rtx, rtx);
extern rtx        gen_lroundv2dfv2di2                                (rtx, rtx);
extern rtx        gen_lroundv4dfv4di2                                (rtx, rtx);
extern rtx        gen_lroundv8dfv8di2                                (rtx, rtx);
extern rtx        gen_lroundv16dfv16di2                              (rtx, rtx);
extern rtx        gen_lroundv32dfv32di2                              (rtx, rtx);
extern rtx        gen_lroundv64dfv64di2                              (rtx, rtx);
extern rtx        gen_lroundv128dfv128di2                            (rtx, rtx);
extern rtx        gen_lroundv256dfv256di2                            (rtx, rtx);
extern rtx        gen_lroundv512dfv512di2                            (rtx, rtx);
extern rtx        gen_lceilrvvm4hfrvvm8si2                           (rtx, rtx);
extern rtx        gen_lceilrvvm2hfrvvm4si2                           (rtx, rtx);
extern rtx        gen_lceilrvvm1hfrvvm2si2                           (rtx, rtx);
extern rtx        gen_lceilrvvmf2hfrvvm1si2                          (rtx, rtx);
extern rtx        gen_lceilrvvmf4hfrvvmf2si2                         (rtx, rtx);
extern rtx        gen_lceilrvvm8sfrvvm8si2                           (rtx, rtx);
extern rtx        gen_lceilrvvm4sfrvvm4si2                           (rtx, rtx);
extern rtx        gen_lceilrvvm2sfrvvm2si2                           (rtx, rtx);
extern rtx        gen_lceilrvvm1sfrvvm1si2                           (rtx, rtx);
extern rtx        gen_lceilrvvmf2sfrvvmf2si2                         (rtx, rtx);
extern rtx        gen_lceilrvvm8dfrvvm4si2                           (rtx, rtx);
extern rtx        gen_lceilrvvm4dfrvvm2si2                           (rtx, rtx);
extern rtx        gen_lceilrvvm2dfrvvm1si2                           (rtx, rtx);
extern rtx        gen_lceilrvvm1dfrvvmf2si2                          (rtx, rtx);
extern rtx        gen_lceilv1hfv1si2                                 (rtx, rtx);
extern rtx        gen_lceilv2hfv2si2                                 (rtx, rtx);
extern rtx        gen_lceilv4hfv4si2                                 (rtx, rtx);
extern rtx        gen_lceilv8hfv8si2                                 (rtx, rtx);
extern rtx        gen_lceilv16hfv16si2                               (rtx, rtx);
extern rtx        gen_lceilv32hfv32si2                               (rtx, rtx);
extern rtx        gen_lceilv64hfv64si2                               (rtx, rtx);
extern rtx        gen_lceilv128hfv128si2                             (rtx, rtx);
extern rtx        gen_lceilv256hfv256si2                             (rtx, rtx);
extern rtx        gen_lceilv512hfv512si2                             (rtx, rtx);
extern rtx        gen_lceilv1024hfv1024si2                           (rtx, rtx);
extern rtx        gen_lceilv1sfv1si2                                 (rtx, rtx);
extern rtx        gen_lceilv2sfv2si2                                 (rtx, rtx);
extern rtx        gen_lceilv4sfv4si2                                 (rtx, rtx);
extern rtx        gen_lceilv8sfv8si2                                 (rtx, rtx);
extern rtx        gen_lceilv16sfv16si2                               (rtx, rtx);
extern rtx        gen_lceilv32sfv32si2                               (rtx, rtx);
extern rtx        gen_lceilv64sfv64si2                               (rtx, rtx);
extern rtx        gen_lceilv128sfv128si2                             (rtx, rtx);
extern rtx        gen_lceilv256sfv256si2                             (rtx, rtx);
extern rtx        gen_lceilv512sfv512si2                             (rtx, rtx);
extern rtx        gen_lceilv1024sfv1024si2                           (rtx, rtx);
extern rtx        gen_lceilv1dfv1si2                                 (rtx, rtx);
extern rtx        gen_lceilv2dfv2si2                                 (rtx, rtx);
extern rtx        gen_lceilv4dfv4si2                                 (rtx, rtx);
extern rtx        gen_lceilv8dfv8si2                                 (rtx, rtx);
extern rtx        gen_lceilv16dfv16si2                               (rtx, rtx);
extern rtx        gen_lceilv32dfv32si2                               (rtx, rtx);
extern rtx        gen_lceilv64dfv64si2                               (rtx, rtx);
extern rtx        gen_lceilv128dfv128si2                             (rtx, rtx);
extern rtx        gen_lceilv256dfv256si2                             (rtx, rtx);
extern rtx        gen_lceilv512dfv512si2                             (rtx, rtx);
extern rtx        gen_lceilrvvm2hfrvvm8di2                           (rtx, rtx);
extern rtx        gen_lceilrvvm1hfrvvm4di2                           (rtx, rtx);
extern rtx        gen_lceilrvvmf2hfrvvm2di2                          (rtx, rtx);
extern rtx        gen_lceilrvvmf4hfrvvm1di2                          (rtx, rtx);
extern rtx        gen_lceilrvvm4sfrvvm8di2                           (rtx, rtx);
extern rtx        gen_lceilrvvm2sfrvvm4di2                           (rtx, rtx);
extern rtx        gen_lceilrvvm1sfrvvm2di2                           (rtx, rtx);
extern rtx        gen_lceilrvvmf2sfrvvm1di2                          (rtx, rtx);
extern rtx        gen_lceilrvvm8dfrvvm8di2                           (rtx, rtx);
extern rtx        gen_lceilrvvm4dfrvvm4di2                           (rtx, rtx);
extern rtx        gen_lceilrvvm2dfrvvm2di2                           (rtx, rtx);
extern rtx        gen_lceilrvvm1dfrvvm1di2                           (rtx, rtx);
extern rtx        gen_lceilv1hfv1di2                                 (rtx, rtx);
extern rtx        gen_lceilv2hfv2di2                                 (rtx, rtx);
extern rtx        gen_lceilv4hfv4di2                                 (rtx, rtx);
extern rtx        gen_lceilv8hfv8di2                                 (rtx, rtx);
extern rtx        gen_lceilv16hfv16di2                               (rtx, rtx);
extern rtx        gen_lceilv32hfv32di2                               (rtx, rtx);
extern rtx        gen_lceilv64hfv64di2                               (rtx, rtx);
extern rtx        gen_lceilv128hfv128di2                             (rtx, rtx);
extern rtx        gen_lceilv256hfv256di2                             (rtx, rtx);
extern rtx        gen_lceilv512hfv512di2                             (rtx, rtx);
extern rtx        gen_lceilv1sfv1di2                                 (rtx, rtx);
extern rtx        gen_lceilv2sfv2di2                                 (rtx, rtx);
extern rtx        gen_lceilv4sfv4di2                                 (rtx, rtx);
extern rtx        gen_lceilv8sfv8di2                                 (rtx, rtx);
extern rtx        gen_lceilv16sfv16di2                               (rtx, rtx);
extern rtx        gen_lceilv32sfv32di2                               (rtx, rtx);
extern rtx        gen_lceilv64sfv64di2                               (rtx, rtx);
extern rtx        gen_lceilv128sfv128di2                             (rtx, rtx);
extern rtx        gen_lceilv256sfv256di2                             (rtx, rtx);
extern rtx        gen_lceilv512sfv512di2                             (rtx, rtx);
extern rtx        gen_lceilv1dfv1di2                                 (rtx, rtx);
extern rtx        gen_lceilv2dfv2di2                                 (rtx, rtx);
extern rtx        gen_lceilv4dfv4di2                                 (rtx, rtx);
extern rtx        gen_lceilv8dfv8di2                                 (rtx, rtx);
extern rtx        gen_lceilv16dfv16di2                               (rtx, rtx);
extern rtx        gen_lceilv32dfv32di2                               (rtx, rtx);
extern rtx        gen_lceilv64dfv64di2                               (rtx, rtx);
extern rtx        gen_lceilv128dfv128di2                             (rtx, rtx);
extern rtx        gen_lceilv256dfv256di2                             (rtx, rtx);
extern rtx        gen_lceilv512dfv512di2                             (rtx, rtx);
extern rtx        gen_lfloorrvvm4hfrvvm8si2                          (rtx, rtx);
extern rtx        gen_lfloorrvvm2hfrvvm4si2                          (rtx, rtx);
extern rtx        gen_lfloorrvvm1hfrvvm2si2                          (rtx, rtx);
extern rtx        gen_lfloorrvvmf2hfrvvm1si2                         (rtx, rtx);
extern rtx        gen_lfloorrvvmf4hfrvvmf2si2                        (rtx, rtx);
extern rtx        gen_lfloorrvvm8sfrvvm8si2                          (rtx, rtx);
extern rtx        gen_lfloorrvvm4sfrvvm4si2                          (rtx, rtx);
extern rtx        gen_lfloorrvvm2sfrvvm2si2                          (rtx, rtx);
extern rtx        gen_lfloorrvvm1sfrvvm1si2                          (rtx, rtx);
extern rtx        gen_lfloorrvvmf2sfrvvmf2si2                        (rtx, rtx);
extern rtx        gen_lfloorrvvm8dfrvvm4si2                          (rtx, rtx);
extern rtx        gen_lfloorrvvm4dfrvvm2si2                          (rtx, rtx);
extern rtx        gen_lfloorrvvm2dfrvvm1si2                          (rtx, rtx);
extern rtx        gen_lfloorrvvm1dfrvvmf2si2                         (rtx, rtx);
extern rtx        gen_lfloorv1hfv1si2                                (rtx, rtx);
extern rtx        gen_lfloorv2hfv2si2                                (rtx, rtx);
extern rtx        gen_lfloorv4hfv4si2                                (rtx, rtx);
extern rtx        gen_lfloorv8hfv8si2                                (rtx, rtx);
extern rtx        gen_lfloorv16hfv16si2                              (rtx, rtx);
extern rtx        gen_lfloorv32hfv32si2                              (rtx, rtx);
extern rtx        gen_lfloorv64hfv64si2                              (rtx, rtx);
extern rtx        gen_lfloorv128hfv128si2                            (rtx, rtx);
extern rtx        gen_lfloorv256hfv256si2                            (rtx, rtx);
extern rtx        gen_lfloorv512hfv512si2                            (rtx, rtx);
extern rtx        gen_lfloorv1024hfv1024si2                          (rtx, rtx);
extern rtx        gen_lfloorv1sfv1si2                                (rtx, rtx);
extern rtx        gen_lfloorv2sfv2si2                                (rtx, rtx);
extern rtx        gen_lfloorv4sfv4si2                                (rtx, rtx);
extern rtx        gen_lfloorv8sfv8si2                                (rtx, rtx);
extern rtx        gen_lfloorv16sfv16si2                              (rtx, rtx);
extern rtx        gen_lfloorv32sfv32si2                              (rtx, rtx);
extern rtx        gen_lfloorv64sfv64si2                              (rtx, rtx);
extern rtx        gen_lfloorv128sfv128si2                            (rtx, rtx);
extern rtx        gen_lfloorv256sfv256si2                            (rtx, rtx);
extern rtx        gen_lfloorv512sfv512si2                            (rtx, rtx);
extern rtx        gen_lfloorv1024sfv1024si2                          (rtx, rtx);
extern rtx        gen_lfloorv1dfv1si2                                (rtx, rtx);
extern rtx        gen_lfloorv2dfv2si2                                (rtx, rtx);
extern rtx        gen_lfloorv4dfv4si2                                (rtx, rtx);
extern rtx        gen_lfloorv8dfv8si2                                (rtx, rtx);
extern rtx        gen_lfloorv16dfv16si2                              (rtx, rtx);
extern rtx        gen_lfloorv32dfv32si2                              (rtx, rtx);
extern rtx        gen_lfloorv64dfv64si2                              (rtx, rtx);
extern rtx        gen_lfloorv128dfv128si2                            (rtx, rtx);
extern rtx        gen_lfloorv256dfv256si2                            (rtx, rtx);
extern rtx        gen_lfloorv512dfv512si2                            (rtx, rtx);
extern rtx        gen_lfloorrvvm2hfrvvm8di2                          (rtx, rtx);
extern rtx        gen_lfloorrvvm1hfrvvm4di2                          (rtx, rtx);
extern rtx        gen_lfloorrvvmf2hfrvvm2di2                         (rtx, rtx);
extern rtx        gen_lfloorrvvmf4hfrvvm1di2                         (rtx, rtx);
extern rtx        gen_lfloorrvvm4sfrvvm8di2                          (rtx, rtx);
extern rtx        gen_lfloorrvvm2sfrvvm4di2                          (rtx, rtx);
extern rtx        gen_lfloorrvvm1sfrvvm2di2                          (rtx, rtx);
extern rtx        gen_lfloorrvvmf2sfrvvm1di2                         (rtx, rtx);
extern rtx        gen_lfloorrvvm8dfrvvm8di2                          (rtx, rtx);
extern rtx        gen_lfloorrvvm4dfrvvm4di2                          (rtx, rtx);
extern rtx        gen_lfloorrvvm2dfrvvm2di2                          (rtx, rtx);
extern rtx        gen_lfloorrvvm1dfrvvm1di2                          (rtx, rtx);
extern rtx        gen_lfloorv1hfv1di2                                (rtx, rtx);
extern rtx        gen_lfloorv2hfv2di2                                (rtx, rtx);
extern rtx        gen_lfloorv4hfv4di2                                (rtx, rtx);
extern rtx        gen_lfloorv8hfv8di2                                (rtx, rtx);
extern rtx        gen_lfloorv16hfv16di2                              (rtx, rtx);
extern rtx        gen_lfloorv32hfv32di2                              (rtx, rtx);
extern rtx        gen_lfloorv64hfv64di2                              (rtx, rtx);
extern rtx        gen_lfloorv128hfv128di2                            (rtx, rtx);
extern rtx        gen_lfloorv256hfv256di2                            (rtx, rtx);
extern rtx        gen_lfloorv512hfv512di2                            (rtx, rtx);
extern rtx        gen_lfloorv1sfv1di2                                (rtx, rtx);
extern rtx        gen_lfloorv2sfv2di2                                (rtx, rtx);
extern rtx        gen_lfloorv4sfv4di2                                (rtx, rtx);
extern rtx        gen_lfloorv8sfv8di2                                (rtx, rtx);
extern rtx        gen_lfloorv16sfv16di2                              (rtx, rtx);
extern rtx        gen_lfloorv32sfv32di2                              (rtx, rtx);
extern rtx        gen_lfloorv64sfv64di2                              (rtx, rtx);
extern rtx        gen_lfloorv128sfv128di2                            (rtx, rtx);
extern rtx        gen_lfloorv256sfv256di2                            (rtx, rtx);
extern rtx        gen_lfloorv512sfv512di2                            (rtx, rtx);
extern rtx        gen_lfloorv1dfv1di2                                (rtx, rtx);
extern rtx        gen_lfloorv2dfv2di2                                (rtx, rtx);
extern rtx        gen_lfloorv4dfv4di2                                (rtx, rtx);
extern rtx        gen_lfloorv8dfv8di2                                (rtx, rtx);
extern rtx        gen_lfloorv16dfv16di2                              (rtx, rtx);
extern rtx        gen_lfloorv32dfv32di2                              (rtx, rtx);
extern rtx        gen_lfloorv64dfv64di2                              (rtx, rtx);
extern rtx        gen_lfloorv128dfv128di2                            (rtx, rtx);
extern rtx        gen_lfloorv256dfv256di2                            (rtx, rtx);
extern rtx        gen_lfloorv512dfv512di2                            (rtx, rtx);
extern rtx        gen_rawmemchrqi                                    (rtx, rtx, rtx);
extern rtx        gen_rawmemchrhi                                    (rtx, rtx, rtx);
extern rtx        gen_rawmemchrsi                                    (rtx, rtx, rtx);
extern rtx        gen_rawmemchrdi                                    (rtx, rtx, rtx);
extern rtx        gen_usaddrvvm8qi3                                  (rtx, rtx, rtx);
extern rtx        gen_usaddrvvm4qi3                                  (rtx, rtx, rtx);
extern rtx        gen_usaddrvvm2qi3                                  (rtx, rtx, rtx);
extern rtx        gen_usaddrvvm1qi3                                  (rtx, rtx, rtx);
extern rtx        gen_usaddrvvm8hi3                                  (rtx, rtx, rtx);
extern rtx        gen_usaddrvvm4hi3                                  (rtx, rtx, rtx);
extern rtx        gen_usaddrvvm2hi3                                  (rtx, rtx, rtx);
extern rtx        gen_usaddrvvm1hi3                                  (rtx, rtx, rtx);
extern rtx        gen_usaddrvvm8si3                                  (rtx, rtx, rtx);
extern rtx        gen_usaddrvvm4si3                                  (rtx, rtx, rtx);
extern rtx        gen_usaddrvvm2si3                                  (rtx, rtx, rtx);
extern rtx        gen_usaddrvvm1si3                                  (rtx, rtx, rtx);
extern rtx        gen_usaddrvvm8di3                                  (rtx, rtx, rtx);
extern rtx        gen_usaddrvvm4di3                                  (rtx, rtx, rtx);
extern rtx        gen_usaddrvvm2di3                                  (rtx, rtx, rtx);
extern rtx        gen_usaddrvvm1di3                                  (rtx, rtx, rtx);
extern rtx        gen_usaddrvvmf2qi3                                 (rtx, rtx, rtx);
extern rtx        gen_usaddrvvmf4qi3                                 (rtx, rtx, rtx);
extern rtx        gen_usaddrvvmf8qi3                                 (rtx, rtx, rtx);
extern rtx        gen_usaddrvvmf2hi3                                 (rtx, rtx, rtx);
extern rtx        gen_usaddrvvmf4hi3                                 (rtx, rtx, rtx);
extern rtx        gen_usaddrvvmf2si3                                 (rtx, rtx, rtx);
extern rtx        gen_usaddv1qi3                                     (rtx, rtx, rtx);
extern rtx        gen_usaddv2qi3                                     (rtx, rtx, rtx);
extern rtx        gen_usaddv4qi3                                     (rtx, rtx, rtx);
extern rtx        gen_usaddv8qi3                                     (rtx, rtx, rtx);
extern rtx        gen_usaddv16qi3                                    (rtx, rtx, rtx);
extern rtx        gen_usaddv32qi3                                    (rtx, rtx, rtx);
extern rtx        gen_usaddv64qi3                                    (rtx, rtx, rtx);
extern rtx        gen_usaddv128qi3                                   (rtx, rtx, rtx);
extern rtx        gen_usaddv256qi3                                   (rtx, rtx, rtx);
extern rtx        gen_usaddv512qi3                                   (rtx, rtx, rtx);
extern rtx        gen_usaddv1024qi3                                  (rtx, rtx, rtx);
extern rtx        gen_usaddv2048qi3                                  (rtx, rtx, rtx);
extern rtx        gen_usaddv4096qi3                                  (rtx, rtx, rtx);
extern rtx        gen_usaddv1hi3                                     (rtx, rtx, rtx);
extern rtx        gen_usaddv2hi3                                     (rtx, rtx, rtx);
extern rtx        gen_usaddv4hi3                                     (rtx, rtx, rtx);
extern rtx        gen_usaddv8hi3                                     (rtx, rtx, rtx);
extern rtx        gen_usaddv16hi3                                    (rtx, rtx, rtx);
extern rtx        gen_usaddv32hi3                                    (rtx, rtx, rtx);
extern rtx        gen_usaddv64hi3                                    (rtx, rtx, rtx);
extern rtx        gen_usaddv128hi3                                   (rtx, rtx, rtx);
extern rtx        gen_usaddv256hi3                                   (rtx, rtx, rtx);
extern rtx        gen_usaddv512hi3                                   (rtx, rtx, rtx);
extern rtx        gen_usaddv1024hi3                                  (rtx, rtx, rtx);
extern rtx        gen_usaddv2048hi3                                  (rtx, rtx, rtx);
extern rtx        gen_usaddv1si3                                     (rtx, rtx, rtx);
extern rtx        gen_usaddv2si3                                     (rtx, rtx, rtx);
extern rtx        gen_usaddv4si3                                     (rtx, rtx, rtx);
extern rtx        gen_usaddv8si3                                     (rtx, rtx, rtx);
extern rtx        gen_usaddv16si3                                    (rtx, rtx, rtx);
extern rtx        gen_usaddv32si3                                    (rtx, rtx, rtx);
extern rtx        gen_usaddv64si3                                    (rtx, rtx, rtx);
extern rtx        gen_usaddv128si3                                   (rtx, rtx, rtx);
extern rtx        gen_usaddv256si3                                   (rtx, rtx, rtx);
extern rtx        gen_usaddv512si3                                   (rtx, rtx, rtx);
extern rtx        gen_usaddv1024si3                                  (rtx, rtx, rtx);
extern rtx        gen_usaddv1di3                                     (rtx, rtx, rtx);
extern rtx        gen_usaddv2di3                                     (rtx, rtx, rtx);
extern rtx        gen_usaddv4di3                                     (rtx, rtx, rtx);
extern rtx        gen_usaddv8di3                                     (rtx, rtx, rtx);
extern rtx        gen_usaddv16di3                                    (rtx, rtx, rtx);
extern rtx        gen_usaddv32di3                                    (rtx, rtx, rtx);
extern rtx        gen_usaddv64di3                                    (rtx, rtx, rtx);
extern rtx        gen_usaddv128di3                                   (rtx, rtx, rtx);
extern rtx        gen_usaddv256di3                                   (rtx, rtx, rtx);
extern rtx        gen_usaddv512di3                                   (rtx, rtx, rtx);
extern rtx        gen_ssaddrvvm8qi3                                  (rtx, rtx, rtx);
extern rtx        gen_ssaddrvvm4qi3                                  (rtx, rtx, rtx);
extern rtx        gen_ssaddrvvm2qi3                                  (rtx, rtx, rtx);
extern rtx        gen_ssaddrvvm1qi3                                  (rtx, rtx, rtx);
extern rtx        gen_ssaddrvvm8hi3                                  (rtx, rtx, rtx);
extern rtx        gen_ssaddrvvm4hi3                                  (rtx, rtx, rtx);
extern rtx        gen_ssaddrvvm2hi3                                  (rtx, rtx, rtx);
extern rtx        gen_ssaddrvvm1hi3                                  (rtx, rtx, rtx);
extern rtx        gen_ssaddrvvm8si3                                  (rtx, rtx, rtx);
extern rtx        gen_ssaddrvvm4si3                                  (rtx, rtx, rtx);
extern rtx        gen_ssaddrvvm2si3                                  (rtx, rtx, rtx);
extern rtx        gen_ssaddrvvm1si3                                  (rtx, rtx, rtx);
extern rtx        gen_ssaddrvvm8di3                                  (rtx, rtx, rtx);
extern rtx        gen_ssaddrvvm4di3                                  (rtx, rtx, rtx);
extern rtx        gen_ssaddrvvm2di3                                  (rtx, rtx, rtx);
extern rtx        gen_ssaddrvvm1di3                                  (rtx, rtx, rtx);
extern rtx        gen_ssaddrvvmf2qi3                                 (rtx, rtx, rtx);
extern rtx        gen_ssaddrvvmf4qi3                                 (rtx, rtx, rtx);
extern rtx        gen_ssaddrvvmf8qi3                                 (rtx, rtx, rtx);
extern rtx        gen_ssaddrvvmf2hi3                                 (rtx, rtx, rtx);
extern rtx        gen_ssaddrvvmf4hi3                                 (rtx, rtx, rtx);
extern rtx        gen_ssaddrvvmf2si3                                 (rtx, rtx, rtx);
extern rtx        gen_ssaddv1qi3                                     (rtx, rtx, rtx);
extern rtx        gen_ssaddv2qi3                                     (rtx, rtx, rtx);
extern rtx        gen_ssaddv4qi3                                     (rtx, rtx, rtx);
extern rtx        gen_ssaddv8qi3                                     (rtx, rtx, rtx);
extern rtx        gen_ssaddv16qi3                                    (rtx, rtx, rtx);
extern rtx        gen_ssaddv32qi3                                    (rtx, rtx, rtx);
extern rtx        gen_ssaddv64qi3                                    (rtx, rtx, rtx);
extern rtx        gen_ssaddv128qi3                                   (rtx, rtx, rtx);
extern rtx        gen_ssaddv256qi3                                   (rtx, rtx, rtx);
extern rtx        gen_ssaddv512qi3                                   (rtx, rtx, rtx);
extern rtx        gen_ssaddv1024qi3                                  (rtx, rtx, rtx);
extern rtx        gen_ssaddv2048qi3                                  (rtx, rtx, rtx);
extern rtx        gen_ssaddv4096qi3                                  (rtx, rtx, rtx);
extern rtx        gen_ssaddv1hi3                                     (rtx, rtx, rtx);
extern rtx        gen_ssaddv2hi3                                     (rtx, rtx, rtx);
extern rtx        gen_ssaddv4hi3                                     (rtx, rtx, rtx);
extern rtx        gen_ssaddv8hi3                                     (rtx, rtx, rtx);
extern rtx        gen_ssaddv16hi3                                    (rtx, rtx, rtx);
extern rtx        gen_ssaddv32hi3                                    (rtx, rtx, rtx);
extern rtx        gen_ssaddv64hi3                                    (rtx, rtx, rtx);
extern rtx        gen_ssaddv128hi3                                   (rtx, rtx, rtx);
extern rtx        gen_ssaddv256hi3                                   (rtx, rtx, rtx);
extern rtx        gen_ssaddv512hi3                                   (rtx, rtx, rtx);
extern rtx        gen_ssaddv1024hi3                                  (rtx, rtx, rtx);
extern rtx        gen_ssaddv2048hi3                                  (rtx, rtx, rtx);
extern rtx        gen_ssaddv1si3                                     (rtx, rtx, rtx);
extern rtx        gen_ssaddv2si3                                     (rtx, rtx, rtx);
extern rtx        gen_ssaddv4si3                                     (rtx, rtx, rtx);
extern rtx        gen_ssaddv8si3                                     (rtx, rtx, rtx);
extern rtx        gen_ssaddv16si3                                    (rtx, rtx, rtx);
extern rtx        gen_ssaddv32si3                                    (rtx, rtx, rtx);
extern rtx        gen_ssaddv64si3                                    (rtx, rtx, rtx);
extern rtx        gen_ssaddv128si3                                   (rtx, rtx, rtx);
extern rtx        gen_ssaddv256si3                                   (rtx, rtx, rtx);
extern rtx        gen_ssaddv512si3                                   (rtx, rtx, rtx);
extern rtx        gen_ssaddv1024si3                                  (rtx, rtx, rtx);
extern rtx        gen_ssaddv1di3                                     (rtx, rtx, rtx);
extern rtx        gen_ssaddv2di3                                     (rtx, rtx, rtx);
extern rtx        gen_ssaddv4di3                                     (rtx, rtx, rtx);
extern rtx        gen_ssaddv8di3                                     (rtx, rtx, rtx);
extern rtx        gen_ssaddv16di3                                    (rtx, rtx, rtx);
extern rtx        gen_ssaddv32di3                                    (rtx, rtx, rtx);
extern rtx        gen_ssaddv64di3                                    (rtx, rtx, rtx);
extern rtx        gen_ssaddv128di3                                   (rtx, rtx, rtx);
extern rtx        gen_ssaddv256di3                                   (rtx, rtx, rtx);
extern rtx        gen_ssaddv512di3                                   (rtx, rtx, rtx);
extern rtx        gen_ussubrvvm8qi3                                  (rtx, rtx, rtx);
extern rtx        gen_ussubrvvm4qi3                                  (rtx, rtx, rtx);
extern rtx        gen_ussubrvvm2qi3                                  (rtx, rtx, rtx);
extern rtx        gen_ussubrvvm1qi3                                  (rtx, rtx, rtx);
extern rtx        gen_ussubrvvm8hi3                                  (rtx, rtx, rtx);
extern rtx        gen_ussubrvvm4hi3                                  (rtx, rtx, rtx);
extern rtx        gen_ussubrvvm2hi3                                  (rtx, rtx, rtx);
extern rtx        gen_ussubrvvm1hi3                                  (rtx, rtx, rtx);
extern rtx        gen_ussubrvvm8si3                                  (rtx, rtx, rtx);
extern rtx        gen_ussubrvvm4si3                                  (rtx, rtx, rtx);
extern rtx        gen_ussubrvvm2si3                                  (rtx, rtx, rtx);
extern rtx        gen_ussubrvvm1si3                                  (rtx, rtx, rtx);
extern rtx        gen_ussubrvvm8di3                                  (rtx, rtx, rtx);
extern rtx        gen_ussubrvvm4di3                                  (rtx, rtx, rtx);
extern rtx        gen_ussubrvvm2di3                                  (rtx, rtx, rtx);
extern rtx        gen_ussubrvvm1di3                                  (rtx, rtx, rtx);
extern rtx        gen_ussubrvvmf2qi3                                 (rtx, rtx, rtx);
extern rtx        gen_ussubrvvmf4qi3                                 (rtx, rtx, rtx);
extern rtx        gen_ussubrvvmf8qi3                                 (rtx, rtx, rtx);
extern rtx        gen_ussubrvvmf2hi3                                 (rtx, rtx, rtx);
extern rtx        gen_ussubrvvmf4hi3                                 (rtx, rtx, rtx);
extern rtx        gen_ussubrvvmf2si3                                 (rtx, rtx, rtx);
extern rtx        gen_ussubv1qi3                                     (rtx, rtx, rtx);
extern rtx        gen_ussubv2qi3                                     (rtx, rtx, rtx);
extern rtx        gen_ussubv4qi3                                     (rtx, rtx, rtx);
extern rtx        gen_ussubv8qi3                                     (rtx, rtx, rtx);
extern rtx        gen_ussubv16qi3                                    (rtx, rtx, rtx);
extern rtx        gen_ussubv32qi3                                    (rtx, rtx, rtx);
extern rtx        gen_ussubv64qi3                                    (rtx, rtx, rtx);
extern rtx        gen_ussubv128qi3                                   (rtx, rtx, rtx);
extern rtx        gen_ussubv256qi3                                   (rtx, rtx, rtx);
extern rtx        gen_ussubv512qi3                                   (rtx, rtx, rtx);
extern rtx        gen_ussubv1024qi3                                  (rtx, rtx, rtx);
extern rtx        gen_ussubv2048qi3                                  (rtx, rtx, rtx);
extern rtx        gen_ussubv4096qi3                                  (rtx, rtx, rtx);
extern rtx        gen_ussubv1hi3                                     (rtx, rtx, rtx);
extern rtx        gen_ussubv2hi3                                     (rtx, rtx, rtx);
extern rtx        gen_ussubv4hi3                                     (rtx, rtx, rtx);
extern rtx        gen_ussubv8hi3                                     (rtx, rtx, rtx);
extern rtx        gen_ussubv16hi3                                    (rtx, rtx, rtx);
extern rtx        gen_ussubv32hi3                                    (rtx, rtx, rtx);
extern rtx        gen_ussubv64hi3                                    (rtx, rtx, rtx);
extern rtx        gen_ussubv128hi3                                   (rtx, rtx, rtx);
extern rtx        gen_ussubv256hi3                                   (rtx, rtx, rtx);
extern rtx        gen_ussubv512hi3                                   (rtx, rtx, rtx);
extern rtx        gen_ussubv1024hi3                                  (rtx, rtx, rtx);
extern rtx        gen_ussubv2048hi3                                  (rtx, rtx, rtx);
extern rtx        gen_ussubv1si3                                     (rtx, rtx, rtx);
extern rtx        gen_ussubv2si3                                     (rtx, rtx, rtx);
extern rtx        gen_ussubv4si3                                     (rtx, rtx, rtx);
extern rtx        gen_ussubv8si3                                     (rtx, rtx, rtx);
extern rtx        gen_ussubv16si3                                    (rtx, rtx, rtx);
extern rtx        gen_ussubv32si3                                    (rtx, rtx, rtx);
extern rtx        gen_ussubv64si3                                    (rtx, rtx, rtx);
extern rtx        gen_ussubv128si3                                   (rtx, rtx, rtx);
extern rtx        gen_ussubv256si3                                   (rtx, rtx, rtx);
extern rtx        gen_ussubv512si3                                   (rtx, rtx, rtx);
extern rtx        gen_ussubv1024si3                                  (rtx, rtx, rtx);
extern rtx        gen_ussubv1di3                                     (rtx, rtx, rtx);
extern rtx        gen_ussubv2di3                                     (rtx, rtx, rtx);
extern rtx        gen_ussubv4di3                                     (rtx, rtx, rtx);
extern rtx        gen_ussubv8di3                                     (rtx, rtx, rtx);
extern rtx        gen_ussubv16di3                                    (rtx, rtx, rtx);
extern rtx        gen_ussubv32di3                                    (rtx, rtx, rtx);
extern rtx        gen_ussubv64di3                                    (rtx, rtx, rtx);
extern rtx        gen_ussubv128di3                                   (rtx, rtx, rtx);
extern rtx        gen_ussubv256di3                                   (rtx, rtx, rtx);
extern rtx        gen_ussubv512di3                                   (rtx, rtx, rtx);
extern rtx        gen_sssubrvvm8qi3                                  (rtx, rtx, rtx);
extern rtx        gen_sssubrvvm4qi3                                  (rtx, rtx, rtx);
extern rtx        gen_sssubrvvm2qi3                                  (rtx, rtx, rtx);
extern rtx        gen_sssubrvvm1qi3                                  (rtx, rtx, rtx);
extern rtx        gen_sssubrvvm8hi3                                  (rtx, rtx, rtx);
extern rtx        gen_sssubrvvm4hi3                                  (rtx, rtx, rtx);
extern rtx        gen_sssubrvvm2hi3                                  (rtx, rtx, rtx);
extern rtx        gen_sssubrvvm1hi3                                  (rtx, rtx, rtx);
extern rtx        gen_sssubrvvm8si3                                  (rtx, rtx, rtx);
extern rtx        gen_sssubrvvm4si3                                  (rtx, rtx, rtx);
extern rtx        gen_sssubrvvm2si3                                  (rtx, rtx, rtx);
extern rtx        gen_sssubrvvm1si3                                  (rtx, rtx, rtx);
extern rtx        gen_sssubrvvm8di3                                  (rtx, rtx, rtx);
extern rtx        gen_sssubrvvm4di3                                  (rtx, rtx, rtx);
extern rtx        gen_sssubrvvm2di3                                  (rtx, rtx, rtx);
extern rtx        gen_sssubrvvm1di3                                  (rtx, rtx, rtx);
extern rtx        gen_sssubrvvmf2qi3                                 (rtx, rtx, rtx);
extern rtx        gen_sssubrvvmf4qi3                                 (rtx, rtx, rtx);
extern rtx        gen_sssubrvvmf8qi3                                 (rtx, rtx, rtx);
extern rtx        gen_sssubrvvmf2hi3                                 (rtx, rtx, rtx);
extern rtx        gen_sssubrvvmf4hi3                                 (rtx, rtx, rtx);
extern rtx        gen_sssubrvvmf2si3                                 (rtx, rtx, rtx);
extern rtx        gen_sssubv1qi3                                     (rtx, rtx, rtx);
extern rtx        gen_sssubv2qi3                                     (rtx, rtx, rtx);
extern rtx        gen_sssubv4qi3                                     (rtx, rtx, rtx);
extern rtx        gen_sssubv8qi3                                     (rtx, rtx, rtx);
extern rtx        gen_sssubv16qi3                                    (rtx, rtx, rtx);
extern rtx        gen_sssubv32qi3                                    (rtx, rtx, rtx);
extern rtx        gen_sssubv64qi3                                    (rtx, rtx, rtx);
extern rtx        gen_sssubv128qi3                                   (rtx, rtx, rtx);
extern rtx        gen_sssubv256qi3                                   (rtx, rtx, rtx);
extern rtx        gen_sssubv512qi3                                   (rtx, rtx, rtx);
extern rtx        gen_sssubv1024qi3                                  (rtx, rtx, rtx);
extern rtx        gen_sssubv2048qi3                                  (rtx, rtx, rtx);
extern rtx        gen_sssubv4096qi3                                  (rtx, rtx, rtx);
extern rtx        gen_sssubv1hi3                                     (rtx, rtx, rtx);
extern rtx        gen_sssubv2hi3                                     (rtx, rtx, rtx);
extern rtx        gen_sssubv4hi3                                     (rtx, rtx, rtx);
extern rtx        gen_sssubv8hi3                                     (rtx, rtx, rtx);
extern rtx        gen_sssubv16hi3                                    (rtx, rtx, rtx);
extern rtx        gen_sssubv32hi3                                    (rtx, rtx, rtx);
extern rtx        gen_sssubv64hi3                                    (rtx, rtx, rtx);
extern rtx        gen_sssubv128hi3                                   (rtx, rtx, rtx);
extern rtx        gen_sssubv256hi3                                   (rtx, rtx, rtx);
extern rtx        gen_sssubv512hi3                                   (rtx, rtx, rtx);
extern rtx        gen_sssubv1024hi3                                  (rtx, rtx, rtx);
extern rtx        gen_sssubv2048hi3                                  (rtx, rtx, rtx);
extern rtx        gen_sssubv1si3                                     (rtx, rtx, rtx);
extern rtx        gen_sssubv2si3                                     (rtx, rtx, rtx);
extern rtx        gen_sssubv4si3                                     (rtx, rtx, rtx);
extern rtx        gen_sssubv8si3                                     (rtx, rtx, rtx);
extern rtx        gen_sssubv16si3                                    (rtx, rtx, rtx);
extern rtx        gen_sssubv32si3                                    (rtx, rtx, rtx);
extern rtx        gen_sssubv64si3                                    (rtx, rtx, rtx);
extern rtx        gen_sssubv128si3                                   (rtx, rtx, rtx);
extern rtx        gen_sssubv256si3                                   (rtx, rtx, rtx);
extern rtx        gen_sssubv512si3                                   (rtx, rtx, rtx);
extern rtx        gen_sssubv1024si3                                  (rtx, rtx, rtx);
extern rtx        gen_sssubv1di3                                     (rtx, rtx, rtx);
extern rtx        gen_sssubv2di3                                     (rtx, rtx, rtx);
extern rtx        gen_sssubv4di3                                     (rtx, rtx, rtx);
extern rtx        gen_sssubv8di3                                     (rtx, rtx, rtx);
extern rtx        gen_sssubv16di3                                    (rtx, rtx, rtx);
extern rtx        gen_sssubv32di3                                    (rtx, rtx, rtx);
extern rtx        gen_sssubv64di3                                    (rtx, rtx, rtx);
extern rtx        gen_sssubv128di3                                   (rtx, rtx, rtx);
extern rtx        gen_sssubv256di3                                   (rtx, rtx, rtx);
extern rtx        gen_sssubv512di3                                   (rtx, rtx, rtx);
extern rtx        gen_ustruncrvvm8hirvvm4qi2                         (rtx, rtx);
extern rtx        gen_ustruncrvvm4hirvvm2qi2                         (rtx, rtx);
extern rtx        gen_ustruncrvvm2hirvvm1qi2                         (rtx, rtx);
extern rtx        gen_ustruncrvvm1hirvvmf2qi2                        (rtx, rtx);
extern rtx        gen_ustruncrvvmf2hirvvmf4qi2                       (rtx, rtx);
extern rtx        gen_ustruncrvvmf4hirvvmf8qi2                       (rtx, rtx);
extern rtx        gen_ustruncrvvm8sirvvm4hi2                         (rtx, rtx);
extern rtx        gen_ustruncrvvm4sirvvm2hi2                         (rtx, rtx);
extern rtx        gen_ustruncrvvm2sirvvm1hi2                         (rtx, rtx);
extern rtx        gen_ustruncrvvm1sirvvmf2hi2                        (rtx, rtx);
extern rtx        gen_ustruncrvvmf2sirvvmf4hi2                       (rtx, rtx);
extern rtx        gen_ustruncrvvm8dirvvm4si2                         (rtx, rtx);
extern rtx        gen_ustruncrvvm4dirvvm2si2                         (rtx, rtx);
extern rtx        gen_ustruncrvvm2dirvvm1si2                         (rtx, rtx);
extern rtx        gen_ustruncrvvm1dirvvmf2si2                        (rtx, rtx);
extern rtx        gen_ustruncv1hiv1qi2                               (rtx, rtx);
extern rtx        gen_ustruncv2hiv2qi2                               (rtx, rtx);
extern rtx        gen_ustruncv4hiv4qi2                               (rtx, rtx);
extern rtx        gen_ustruncv8hiv8qi2                               (rtx, rtx);
extern rtx        gen_ustruncv16hiv16qi2                             (rtx, rtx);
extern rtx        gen_ustruncv32hiv32qi2                             (rtx, rtx);
extern rtx        gen_ustruncv64hiv64qi2                             (rtx, rtx);
extern rtx        gen_ustruncv128hiv128qi2                           (rtx, rtx);
extern rtx        gen_ustruncv256hiv256qi2                           (rtx, rtx);
extern rtx        gen_ustruncv512hiv512qi2                           (rtx, rtx);
extern rtx        gen_ustruncv1024hiv1024qi2                         (rtx, rtx);
extern rtx        gen_ustruncv2048hiv2048qi2                         (rtx, rtx);
extern rtx        gen_ustruncv1siv1hi2                               (rtx, rtx);
extern rtx        gen_ustruncv2siv2hi2                               (rtx, rtx);
extern rtx        gen_ustruncv4siv4hi2                               (rtx, rtx);
extern rtx        gen_ustruncv8siv8hi2                               (rtx, rtx);
extern rtx        gen_ustruncv16siv16hi2                             (rtx, rtx);
extern rtx        gen_ustruncv32siv32hi2                             (rtx, rtx);
extern rtx        gen_ustruncv64siv64hi2                             (rtx, rtx);
extern rtx        gen_ustruncv128siv128hi2                           (rtx, rtx);
extern rtx        gen_ustruncv256siv256hi2                           (rtx, rtx);
extern rtx        gen_ustruncv512siv512hi2                           (rtx, rtx);
extern rtx        gen_ustruncv1024siv1024hi2                         (rtx, rtx);
extern rtx        gen_ustruncv1div1si2                               (rtx, rtx);
extern rtx        gen_ustruncv2div2si2                               (rtx, rtx);
extern rtx        gen_ustruncv4div4si2                               (rtx, rtx);
extern rtx        gen_ustruncv8div8si2                               (rtx, rtx);
extern rtx        gen_ustruncv16div16si2                             (rtx, rtx);
extern rtx        gen_ustruncv32div32si2                             (rtx, rtx);
extern rtx        gen_ustruncv64div64si2                             (rtx, rtx);
extern rtx        gen_ustruncv128div128si2                           (rtx, rtx);
extern rtx        gen_ustruncv256div256si2                           (rtx, rtx);
extern rtx        gen_ustruncv512div512si2                           (rtx, rtx);
extern rtx        gen_ustruncrvvm8sirvvm2qi2                         (rtx, rtx);
extern rtx        gen_ustruncrvvm4sirvvm1qi2                         (rtx, rtx);
extern rtx        gen_ustruncrvvm2sirvvmf2qi2                        (rtx, rtx);
extern rtx        gen_ustruncrvvm1sirvvmf4qi2                        (rtx, rtx);
extern rtx        gen_ustruncrvvmf2sirvvmf8qi2                       (rtx, rtx);
extern rtx        gen_ustruncrvvm8dirvvm2hi2                         (rtx, rtx);
extern rtx        gen_ustruncrvvm4dirvvm1hi2                         (rtx, rtx);
extern rtx        gen_ustruncrvvm2dirvvmf2hi2                        (rtx, rtx);
extern rtx        gen_ustruncrvvm1dirvvmf4hi2                        (rtx, rtx);
extern rtx        gen_ustruncv1siv1qi2                               (rtx, rtx);
extern rtx        gen_ustruncv2siv2qi2                               (rtx, rtx);
extern rtx        gen_ustruncv4siv4qi2                               (rtx, rtx);
extern rtx        gen_ustruncv8siv8qi2                               (rtx, rtx);
extern rtx        gen_ustruncv16siv16qi2                             (rtx, rtx);
extern rtx        gen_ustruncv32siv32qi2                             (rtx, rtx);
extern rtx        gen_ustruncv64siv64qi2                             (rtx, rtx);
extern rtx        gen_ustruncv128siv128qi2                           (rtx, rtx);
extern rtx        gen_ustruncv256siv256qi2                           (rtx, rtx);
extern rtx        gen_ustruncv512siv512qi2                           (rtx, rtx);
extern rtx        gen_ustruncv1024siv1024qi2                         (rtx, rtx);
extern rtx        gen_ustruncv1div1hi2                               (rtx, rtx);
extern rtx        gen_ustruncv2div2hi2                               (rtx, rtx);
extern rtx        gen_ustruncv4div4hi2                               (rtx, rtx);
extern rtx        gen_ustruncv8div8hi2                               (rtx, rtx);
extern rtx        gen_ustruncv16div16hi2                             (rtx, rtx);
extern rtx        gen_ustruncv32div32hi2                             (rtx, rtx);
extern rtx        gen_ustruncv64div64hi2                             (rtx, rtx);
extern rtx        gen_ustruncv128div128hi2                           (rtx, rtx);
extern rtx        gen_ustruncv256div256hi2                           (rtx, rtx);
extern rtx        gen_ustruncv512div512hi2                           (rtx, rtx);
extern rtx        gen_ustruncrvvm8dirvvm1qi2                         (rtx, rtx);
extern rtx        gen_ustruncrvvm4dirvvmf2qi2                        (rtx, rtx);
extern rtx        gen_ustruncrvvm2dirvvmf4qi2                        (rtx, rtx);
extern rtx        gen_ustruncrvvm1dirvvmf8qi2                        (rtx, rtx);
extern rtx        gen_ustruncv1div1qi2                               (rtx, rtx);
extern rtx        gen_ustruncv2div2qi2                               (rtx, rtx);
extern rtx        gen_ustruncv4div4qi2                               (rtx, rtx);
extern rtx        gen_ustruncv8div8qi2                               (rtx, rtx);
extern rtx        gen_ustruncv16div16qi2                             (rtx, rtx);
extern rtx        gen_ustruncv32div32qi2                             (rtx, rtx);
extern rtx        gen_ustruncv64div64qi2                             (rtx, rtx);
extern rtx        gen_ustruncv128div128qi2                           (rtx, rtx);
extern rtx        gen_ustruncv256div256qi2                           (rtx, rtx);
extern rtx        gen_ustruncv512div512qi2                           (rtx, rtx);
extern rtx        gen_sstruncrvvm8hirvvm4qi2                         (rtx, rtx);
extern rtx        gen_sstruncrvvm4hirvvm2qi2                         (rtx, rtx);
extern rtx        gen_sstruncrvvm2hirvvm1qi2                         (rtx, rtx);
extern rtx        gen_sstruncrvvm1hirvvmf2qi2                        (rtx, rtx);
extern rtx        gen_sstruncrvvmf2hirvvmf4qi2                       (rtx, rtx);
extern rtx        gen_sstruncrvvmf4hirvvmf8qi2                       (rtx, rtx);
extern rtx        gen_sstruncrvvm8sirvvm4hi2                         (rtx, rtx);
extern rtx        gen_sstruncrvvm4sirvvm2hi2                         (rtx, rtx);
extern rtx        gen_sstruncrvvm2sirvvm1hi2                         (rtx, rtx);
extern rtx        gen_sstruncrvvm1sirvvmf2hi2                        (rtx, rtx);
extern rtx        gen_sstruncrvvmf2sirvvmf4hi2                       (rtx, rtx);
extern rtx        gen_sstruncrvvm8dirvvm4si2                         (rtx, rtx);
extern rtx        gen_sstruncrvvm4dirvvm2si2                         (rtx, rtx);
extern rtx        gen_sstruncrvvm2dirvvm1si2                         (rtx, rtx);
extern rtx        gen_sstruncrvvm1dirvvmf2si2                        (rtx, rtx);
extern rtx        gen_sstruncv1hiv1qi2                               (rtx, rtx);
extern rtx        gen_sstruncv2hiv2qi2                               (rtx, rtx);
extern rtx        gen_sstruncv4hiv4qi2                               (rtx, rtx);
extern rtx        gen_sstruncv8hiv8qi2                               (rtx, rtx);
extern rtx        gen_sstruncv16hiv16qi2                             (rtx, rtx);
extern rtx        gen_sstruncv32hiv32qi2                             (rtx, rtx);
extern rtx        gen_sstruncv64hiv64qi2                             (rtx, rtx);
extern rtx        gen_sstruncv128hiv128qi2                           (rtx, rtx);
extern rtx        gen_sstruncv256hiv256qi2                           (rtx, rtx);
extern rtx        gen_sstruncv512hiv512qi2                           (rtx, rtx);
extern rtx        gen_sstruncv1024hiv1024qi2                         (rtx, rtx);
extern rtx        gen_sstruncv2048hiv2048qi2                         (rtx, rtx);
extern rtx        gen_sstruncv1siv1hi2                               (rtx, rtx);
extern rtx        gen_sstruncv2siv2hi2                               (rtx, rtx);
extern rtx        gen_sstruncv4siv4hi2                               (rtx, rtx);
extern rtx        gen_sstruncv8siv8hi2                               (rtx, rtx);
extern rtx        gen_sstruncv16siv16hi2                             (rtx, rtx);
extern rtx        gen_sstruncv32siv32hi2                             (rtx, rtx);
extern rtx        gen_sstruncv64siv64hi2                             (rtx, rtx);
extern rtx        gen_sstruncv128siv128hi2                           (rtx, rtx);
extern rtx        gen_sstruncv256siv256hi2                           (rtx, rtx);
extern rtx        gen_sstruncv512siv512hi2                           (rtx, rtx);
extern rtx        gen_sstruncv1024siv1024hi2                         (rtx, rtx);
extern rtx        gen_sstruncv1div1si2                               (rtx, rtx);
extern rtx        gen_sstruncv2div2si2                               (rtx, rtx);
extern rtx        gen_sstruncv4div4si2                               (rtx, rtx);
extern rtx        gen_sstruncv8div8si2                               (rtx, rtx);
extern rtx        gen_sstruncv16div16si2                             (rtx, rtx);
extern rtx        gen_sstruncv32div32si2                             (rtx, rtx);
extern rtx        gen_sstruncv64div64si2                             (rtx, rtx);
extern rtx        gen_sstruncv128div128si2                           (rtx, rtx);
extern rtx        gen_sstruncv256div256si2                           (rtx, rtx);
extern rtx        gen_sstruncv512div512si2                           (rtx, rtx);
extern rtx        gen_sstruncrvvm8sirvvm2qi2                         (rtx, rtx);
extern rtx        gen_sstruncrvvm4sirvvm1qi2                         (rtx, rtx);
extern rtx        gen_sstruncrvvm2sirvvmf2qi2                        (rtx, rtx);
extern rtx        gen_sstruncrvvm1sirvvmf4qi2                        (rtx, rtx);
extern rtx        gen_sstruncrvvmf2sirvvmf8qi2                       (rtx, rtx);
extern rtx        gen_sstruncrvvm8dirvvm2hi2                         (rtx, rtx);
extern rtx        gen_sstruncrvvm4dirvvm1hi2                         (rtx, rtx);
extern rtx        gen_sstruncrvvm2dirvvmf2hi2                        (rtx, rtx);
extern rtx        gen_sstruncrvvm1dirvvmf4hi2                        (rtx, rtx);
extern rtx        gen_sstruncv1siv1qi2                               (rtx, rtx);
extern rtx        gen_sstruncv2siv2qi2                               (rtx, rtx);
extern rtx        gen_sstruncv4siv4qi2                               (rtx, rtx);
extern rtx        gen_sstruncv8siv8qi2                               (rtx, rtx);
extern rtx        gen_sstruncv16siv16qi2                             (rtx, rtx);
extern rtx        gen_sstruncv32siv32qi2                             (rtx, rtx);
extern rtx        gen_sstruncv64siv64qi2                             (rtx, rtx);
extern rtx        gen_sstruncv128siv128qi2                           (rtx, rtx);
extern rtx        gen_sstruncv256siv256qi2                           (rtx, rtx);
extern rtx        gen_sstruncv512siv512qi2                           (rtx, rtx);
extern rtx        gen_sstruncv1024siv1024qi2                         (rtx, rtx);
extern rtx        gen_sstruncv1div1hi2                               (rtx, rtx);
extern rtx        gen_sstruncv2div2hi2                               (rtx, rtx);
extern rtx        gen_sstruncv4div4hi2                               (rtx, rtx);
extern rtx        gen_sstruncv8div8hi2                               (rtx, rtx);
extern rtx        gen_sstruncv16div16hi2                             (rtx, rtx);
extern rtx        gen_sstruncv32div32hi2                             (rtx, rtx);
extern rtx        gen_sstruncv64div64hi2                             (rtx, rtx);
extern rtx        gen_sstruncv128div128hi2                           (rtx, rtx);
extern rtx        gen_sstruncv256div256hi2                           (rtx, rtx);
extern rtx        gen_sstruncv512div512hi2                           (rtx, rtx);
extern rtx        gen_sstruncrvvm8dirvvm1qi2                         (rtx, rtx);
extern rtx        gen_sstruncrvvm4dirvvmf2qi2                        (rtx, rtx);
extern rtx        gen_sstruncrvvm2dirvvmf4qi2                        (rtx, rtx);
extern rtx        gen_sstruncrvvm1dirvvmf8qi2                        (rtx, rtx);
extern rtx        gen_sstruncv1div1qi2                               (rtx, rtx);
extern rtx        gen_sstruncv2div2qi2                               (rtx, rtx);
extern rtx        gen_sstruncv4div4qi2                               (rtx, rtx);
extern rtx        gen_sstruncv8div8qi2                               (rtx, rtx);
extern rtx        gen_sstruncv16div16qi2                             (rtx, rtx);
extern rtx        gen_sstruncv32div32qi2                             (rtx, rtx);
extern rtx        gen_sstruncv64div64qi2                             (rtx, rtx);
extern rtx        gen_sstruncv128div128qi2                           (rtx, rtx);
extern rtx        gen_sstruncv256div256qi2                           (rtx, rtx);
extern rtx        gen_sstruncv512div512qi2                           (rtx, rtx);
extern rtx        gen_cbranchrvvmf64bi4                              (rtx, rtx, rtx, rtx);
extern rtx        gen_cbranchrvvmf32bi4                              (rtx, rtx, rtx, rtx);
extern rtx        gen_cbranchrvvmf16bi4                              (rtx, rtx, rtx, rtx);
extern rtx        gen_cbranchrvvmf8bi4                               (rtx, rtx, rtx, rtx);
extern rtx        gen_cbranchrvvmf4bi4                               (rtx, rtx, rtx, rtx);
extern rtx        gen_cbranchrvvmf2bi4                               (rtx, rtx, rtx, rtx);
extern rtx        gen_cbranchrvvm1bi4                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cbranchv1bi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cbranchv2bi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cbranchv4bi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cbranchv8bi4                                   (rtx, rtx, rtx, rtx);
extern rtx        gen_cbranchv16bi4                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cbranchv32bi4                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cbranchv64bi4                                  (rtx, rtx, rtx, rtx);
extern rtx        gen_cbranchv128bi4                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cbranchv256bi4                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cbranchv512bi4                                 (rtx, rtx, rtx, rtx);
extern rtx        gen_cbranchv1024bi4                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cbranchv2048bi4                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cbranchv4096bi4                                (rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm8qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm8qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm4qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm4qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm2qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm2qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm1qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm1qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm8hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm8hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm4hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm4hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm2hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm2hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm1hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm1hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm8si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm8si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm4si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm4si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm2si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm2si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm1si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm1si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm8di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm8di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm4di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm4di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm2di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm2di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm1di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm1di                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvmf2qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvmf2qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvmf4qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvmf4qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvmf8qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvmf8qi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvmf2hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvmf2hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvmf4hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvmf4hi               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvmf2si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvmf2si               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv1qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv1qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv2qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv2qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv4qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv4qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv8qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv8qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv16qi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv16qi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv32qi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv32qi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv64qi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv64qi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv128qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv128qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv256qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv256qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv512qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv512qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv1024qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv1024qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv2048qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv2048qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv4096qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv4096qi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv1hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv1hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv2hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv2hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv4hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv4hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv8hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv8hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv16hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv16hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv32hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv32hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv64hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv64hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv128hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv128hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv256hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv256hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv512hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv512hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv1024hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv1024hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv2048hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv2048hi                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv1si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv1si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv2si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv2si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv4si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv4si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv8si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv8si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv16si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv16si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv32si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv32si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv64si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv64si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv128si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv128si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv256si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv256si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv512si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv512si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv1024si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv1024si                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv1di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv1di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv2di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv2di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv4di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv4di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv8di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv8di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv16di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv16di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv32di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv32di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv64di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv64di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv128di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv128di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv256di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv256di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv512di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv512di                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm8hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm8hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm4hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm4hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm2hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm2hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm1hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm1hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvmf2hf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvmf2hf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvmf4hf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvmf4hf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm8sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm8sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm4sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm4sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm2sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm2sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm1sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm1sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvmf2sf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvmf2sf               (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm8df                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm8df                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm4df                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm4df                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm2df                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm2df                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allrvvm1df                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyrvvm1df                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv1hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv1hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv2hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv2hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv4hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv4hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv8hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv8hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv16hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv16hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv32hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv32hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv64hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv64hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv128hf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv128hf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv256hf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv256hf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv512hf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv512hf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv1024hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv1024hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv2048hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv2048hf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv1sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv1sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv2sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv2sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv4sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv4sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv8sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv8sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv16sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv16sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv32sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv32sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv64sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv64sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv128sf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv128sf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv256sf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv256sf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv512sf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv512sf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv1024sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv1024sf                (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv1df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv1df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv2df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv2df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv4df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv4df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv8df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv8df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv16df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv16df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv32df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv32df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv64df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv64df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv128df                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv128df                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv256df                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv256df                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_allv512df                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_cond_len_vec_cbranch_anyv512df                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_vrotlrvvm8qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotrrvvm8qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotlrvvm4qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotrrvvm4qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotlrvvm2qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotrrvvm2qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotlrvvm1qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotrrvvm1qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotlrvvm8hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotrrvvm8hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotlrvvm4hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotrrvvm4hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotlrvvm2hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotrrvvm2hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotlrvvm1hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotrrvvm1hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotlrvvm8si3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotrrvvm8si3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotlrvvm4si3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotrrvvm4si3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotlrvvm2si3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotrrvvm2si3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotlrvvm1si3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotrrvvm1si3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotlrvvm8di3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotrrvvm8di3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotlrvvm4di3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotrrvvm4di3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotlrvvm2di3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotrrvvm2di3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotlrvvm1di3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotrrvvm1di3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotlrvvmf2qi3                                 (rtx, rtx, rtx);
extern rtx        gen_vrotrrvvmf2qi3                                 (rtx, rtx, rtx);
extern rtx        gen_vrotlrvvmf4qi3                                 (rtx, rtx, rtx);
extern rtx        gen_vrotrrvvmf4qi3                                 (rtx, rtx, rtx);
extern rtx        gen_vrotlrvvmf8qi3                                 (rtx, rtx, rtx);
extern rtx        gen_vrotrrvvmf8qi3                                 (rtx, rtx, rtx);
extern rtx        gen_vrotlrvvmf2hi3                                 (rtx, rtx, rtx);
extern rtx        gen_vrotrrvvmf2hi3                                 (rtx, rtx, rtx);
extern rtx        gen_vrotlrvvmf4hi3                                 (rtx, rtx, rtx);
extern rtx        gen_vrotrrvvmf4hi3                                 (rtx, rtx, rtx);
extern rtx        gen_vrotlrvvmf2si3                                 (rtx, rtx, rtx);
extern rtx        gen_vrotrrvvmf2si3                                 (rtx, rtx, rtx);
extern rtx        gen_vrotlv1qi3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotrv1qi3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotlv2qi3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotrv2qi3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotlv4qi3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotrv4qi3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotlv8qi3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotrv8qi3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotlv16qi3                                    (rtx, rtx, rtx);
extern rtx        gen_vrotrv16qi3                                    (rtx, rtx, rtx);
extern rtx        gen_vrotlv32qi3                                    (rtx, rtx, rtx);
extern rtx        gen_vrotrv32qi3                                    (rtx, rtx, rtx);
extern rtx        gen_vrotlv64qi3                                    (rtx, rtx, rtx);
extern rtx        gen_vrotrv64qi3                                    (rtx, rtx, rtx);
extern rtx        gen_vrotlv128qi3                                   (rtx, rtx, rtx);
extern rtx        gen_vrotrv128qi3                                   (rtx, rtx, rtx);
extern rtx        gen_vrotlv256qi3                                   (rtx, rtx, rtx);
extern rtx        gen_vrotrv256qi3                                   (rtx, rtx, rtx);
extern rtx        gen_vrotlv512qi3                                   (rtx, rtx, rtx);
extern rtx        gen_vrotrv512qi3                                   (rtx, rtx, rtx);
extern rtx        gen_vrotlv1024qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotrv1024qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotlv2048qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotrv2048qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotlv4096qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotrv4096qi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotlv1hi3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotrv1hi3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotlv2hi3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotrv2hi3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotlv4hi3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotrv4hi3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotlv8hi3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotrv8hi3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotlv16hi3                                    (rtx, rtx, rtx);
extern rtx        gen_vrotrv16hi3                                    (rtx, rtx, rtx);
extern rtx        gen_vrotlv32hi3                                    (rtx, rtx, rtx);
extern rtx        gen_vrotrv32hi3                                    (rtx, rtx, rtx);
extern rtx        gen_vrotlv64hi3                                    (rtx, rtx, rtx);
extern rtx        gen_vrotrv64hi3                                    (rtx, rtx, rtx);
extern rtx        gen_vrotlv128hi3                                   (rtx, rtx, rtx);
extern rtx        gen_vrotrv128hi3                                   (rtx, rtx, rtx);
extern rtx        gen_vrotlv256hi3                                   (rtx, rtx, rtx);
extern rtx        gen_vrotrv256hi3                                   (rtx, rtx, rtx);
extern rtx        gen_vrotlv512hi3                                   (rtx, rtx, rtx);
extern rtx        gen_vrotrv512hi3                                   (rtx, rtx, rtx);
extern rtx        gen_vrotlv1024hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotrv1024hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotlv2048hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotrv2048hi3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotlv1si3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotrv1si3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotlv2si3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotrv2si3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotlv4si3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotrv4si3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotlv8si3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotrv8si3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotlv16si3                                    (rtx, rtx, rtx);
extern rtx        gen_vrotrv16si3                                    (rtx, rtx, rtx);
extern rtx        gen_vrotlv32si3                                    (rtx, rtx, rtx);
extern rtx        gen_vrotrv32si3                                    (rtx, rtx, rtx);
extern rtx        gen_vrotlv64si3                                    (rtx, rtx, rtx);
extern rtx        gen_vrotrv64si3                                    (rtx, rtx, rtx);
extern rtx        gen_vrotlv128si3                                   (rtx, rtx, rtx);
extern rtx        gen_vrotrv128si3                                   (rtx, rtx, rtx);
extern rtx        gen_vrotlv256si3                                   (rtx, rtx, rtx);
extern rtx        gen_vrotrv256si3                                   (rtx, rtx, rtx);
extern rtx        gen_vrotlv512si3                                   (rtx, rtx, rtx);
extern rtx        gen_vrotrv512si3                                   (rtx, rtx, rtx);
extern rtx        gen_vrotlv1024si3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotrv1024si3                                  (rtx, rtx, rtx);
extern rtx        gen_vrotlv1di3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotrv1di3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotlv2di3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotrv2di3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotlv4di3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotrv4di3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotlv8di3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotrv8di3                                     (rtx, rtx, rtx);
extern rtx        gen_vrotlv16di3                                    (rtx, rtx, rtx);
extern rtx        gen_vrotrv16di3                                    (rtx, rtx, rtx);
extern rtx        gen_vrotlv32di3                                    (rtx, rtx, rtx);
extern rtx        gen_vrotrv32di3                                    (rtx, rtx, rtx);
extern rtx        gen_vrotlv64di3                                    (rtx, rtx, rtx);
extern rtx        gen_vrotrv64di3                                    (rtx, rtx, rtx);
extern rtx        gen_vrotlv128di3                                   (rtx, rtx, rtx);
extern rtx        gen_vrotrv128di3                                   (rtx, rtx, rtx);
extern rtx        gen_vrotlv256di3                                   (rtx, rtx, rtx);
extern rtx        gen_vrotrv256di3                                   (rtx, rtx, rtx);
extern rtx        gen_vrotlv512di3                                   (rtx, rtx, rtx);
extern rtx        gen_vrotrv512di3                                   (rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm8qi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm4qi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm2qi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm1qi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm8hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm4hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm2hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm1hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm8si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm4si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm2si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm1si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm8di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm4di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm2di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm1di                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvmf2qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvmf4qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvmf8qi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvmf2hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvmf4hi                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvmf2si                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm8hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm4hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm2hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm1hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvmf2hf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvmf4hf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm8sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm4sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm2sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm1sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvmf2sf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm8df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm4df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm2df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm1df                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm8bf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm4bf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm2bf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvm1bf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvmf2bf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_rvvmf4bf                 (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v1qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v2qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v4qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v8qi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v16qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v32qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v64qi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v128qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v256qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v512qi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v1024qi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v2048qi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v4096qi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v1hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v2hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v4hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v8hi                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v16hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v32hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v64hi                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v128hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v256hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v512hi                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v1024hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v2048hi                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v1si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v2si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v4si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v8si                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v16si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v32si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v64si                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v128si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v256si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v512si                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v1024si                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v1di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v2di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v4di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v8di                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v16di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v32di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v64di                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v128di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v256di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v512di                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v1hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v2hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v4hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v8hf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v16hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v32hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v64hf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v128hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v256hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v512hf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v1024hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v2048hf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v1sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v2sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v4sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v8sf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v16sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v32sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v64sf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v128sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v256sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v512sf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v1024sf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v1df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v2df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v4df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v8df                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v16df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v32df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v64df                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v128df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v256df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v512df                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v1bf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v2bf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v4bf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v8bf                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v16bf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v32bf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v64bf                    (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v128bf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v256bf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v512bf                   (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v1024bf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_load_v2048bf                  (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm8qi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm4qi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm2qi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm1qi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm8hi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm4hi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm2hi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm1hi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm8si                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm4si                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm2si                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm1si                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm8di                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm4di                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm2di                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm1di                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvmf2qi                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvmf4qi                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvmf8qi                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvmf2hi                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvmf4hi                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvmf2si                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm8hf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm4hf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm2hf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm1hf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvmf2hf                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvmf4hf                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm8sf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm4sf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm2sf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm1sf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvmf2sf                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm8df                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm4df                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm2df                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm1df                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm8bf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm4bf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm2bf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvm1bf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvmf2bf                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_rvvmf4bf                (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v1qi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v2qi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v4qi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v8qi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v16qi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v32qi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v64qi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v128qi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v256qi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v512qi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v1024qi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v2048qi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v4096qi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v1hi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v2hi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v4hi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v8hi                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v16hi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v32hi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v64hi                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v128hi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v256hi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v512hi                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v1024hi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v2048hi                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v1si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v2si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v4si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v8si                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v16si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v32si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v64si                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v128si                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v256si                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v512si                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v1024si                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v1di                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v2di                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v4di                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v8di                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v16di                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v32di                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v64di                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v128di                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v256di                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v512di                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v1hf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v2hf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v4hf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v8hf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v16hf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v32hf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v64hf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v128hf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v256hf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v512hf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v1024hf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v2048hf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v1sf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v2sf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v4sf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v8sf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v16sf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v32sf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v64sf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v128sf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v256sf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v512sf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v1024sf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v1df                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v2df                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v4df                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v8df                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v16df                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v32df                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v64df                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v128df                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v256df                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v512df                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v1bf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v2bf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v4bf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v8bf                    (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v16bf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v32bf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v64bf                   (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v128bf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v256bf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v512bf                  (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v1024bf                 (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_mask_len_strided_store_v2048bf                 (rtx, rtx, rtx, rtx, rtx, rtx);
static inline rtx gen_uabdrvvm8qi3                                   (rtx, rtx, rtx);
static inline rtx
gen_uabdrvvm8qi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdrvvm4qi3                                   (rtx, rtx, rtx);
static inline rtx
gen_uabdrvvm4qi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdrvvm2qi3                                   (rtx, rtx, rtx);
static inline rtx
gen_uabdrvvm2qi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdrvvm1qi3                                   (rtx, rtx, rtx);
static inline rtx
gen_uabdrvvm1qi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdrvvm8hi3                                   (rtx, rtx, rtx);
static inline rtx
gen_uabdrvvm8hi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdrvvm4hi3                                   (rtx, rtx, rtx);
static inline rtx
gen_uabdrvvm4hi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdrvvm2hi3                                   (rtx, rtx, rtx);
static inline rtx
gen_uabdrvvm2hi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdrvvm1hi3                                   (rtx, rtx, rtx);
static inline rtx
gen_uabdrvvm1hi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdrvvm8si3                                   (rtx, rtx, rtx);
static inline rtx
gen_uabdrvvm8si3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdrvvm4si3                                   (rtx, rtx, rtx);
static inline rtx
gen_uabdrvvm4si3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdrvvm2si3                                   (rtx, rtx, rtx);
static inline rtx
gen_uabdrvvm2si3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdrvvm1si3                                   (rtx, rtx, rtx);
static inline rtx
gen_uabdrvvm1si3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdrvvm8di3                                   (rtx, rtx, rtx);
static inline rtx
gen_uabdrvvm8di3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdrvvm4di3                                   (rtx, rtx, rtx);
static inline rtx
gen_uabdrvvm4di3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdrvvm2di3                                   (rtx, rtx, rtx);
static inline rtx
gen_uabdrvvm2di3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdrvvm1di3                                   (rtx, rtx, rtx);
static inline rtx
gen_uabdrvvm1di3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdrvvmf2qi3                                  (rtx, rtx, rtx);
static inline rtx
gen_uabdrvvmf2qi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdrvvmf4qi3                                  (rtx, rtx, rtx);
static inline rtx
gen_uabdrvvmf4qi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdrvvmf8qi3                                  (rtx, rtx, rtx);
static inline rtx
gen_uabdrvvmf8qi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdrvvmf2hi3                                  (rtx, rtx, rtx);
static inline rtx
gen_uabdrvvmf2hi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdrvvmf4hi3                                  (rtx, rtx, rtx);
static inline rtx
gen_uabdrvvmf4hi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdrvvmf2si3                                  (rtx, rtx, rtx);
static inline rtx
gen_uabdrvvmf2si3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv1qi3                                      (rtx, rtx, rtx);
static inline rtx
gen_uabdv1qi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv2qi3                                      (rtx, rtx, rtx);
static inline rtx
gen_uabdv2qi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv4qi3                                      (rtx, rtx, rtx);
static inline rtx
gen_uabdv4qi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv8qi3                                      (rtx, rtx, rtx);
static inline rtx
gen_uabdv8qi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv16qi3                                     (rtx, rtx, rtx);
static inline rtx
gen_uabdv16qi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv32qi3                                     (rtx, rtx, rtx);
static inline rtx
gen_uabdv32qi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv64qi3                                     (rtx, rtx, rtx);
static inline rtx
gen_uabdv64qi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv128qi3                                    (rtx, rtx, rtx);
static inline rtx
gen_uabdv128qi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv256qi3                                    (rtx, rtx, rtx);
static inline rtx
gen_uabdv256qi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv512qi3                                    (rtx, rtx, rtx);
static inline rtx
gen_uabdv512qi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv1024qi3                                   (rtx, rtx, rtx);
static inline rtx
gen_uabdv1024qi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv2048qi3                                   (rtx, rtx, rtx);
static inline rtx
gen_uabdv2048qi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv4096qi3                                   (rtx, rtx, rtx);
static inline rtx
gen_uabdv4096qi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv1hi3                                      (rtx, rtx, rtx);
static inline rtx
gen_uabdv1hi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv2hi3                                      (rtx, rtx, rtx);
static inline rtx
gen_uabdv2hi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv4hi3                                      (rtx, rtx, rtx);
static inline rtx
gen_uabdv4hi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv8hi3                                      (rtx, rtx, rtx);
static inline rtx
gen_uabdv8hi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv16hi3                                     (rtx, rtx, rtx);
static inline rtx
gen_uabdv16hi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv32hi3                                     (rtx, rtx, rtx);
static inline rtx
gen_uabdv32hi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv64hi3                                     (rtx, rtx, rtx);
static inline rtx
gen_uabdv64hi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv128hi3                                    (rtx, rtx, rtx);
static inline rtx
gen_uabdv128hi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv256hi3                                    (rtx, rtx, rtx);
static inline rtx
gen_uabdv256hi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv512hi3                                    (rtx, rtx, rtx);
static inline rtx
gen_uabdv512hi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv1024hi3                                   (rtx, rtx, rtx);
static inline rtx
gen_uabdv1024hi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv2048hi3                                   (rtx, rtx, rtx);
static inline rtx
gen_uabdv2048hi3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv1si3                                      (rtx, rtx, rtx);
static inline rtx
gen_uabdv1si3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv2si3                                      (rtx, rtx, rtx);
static inline rtx
gen_uabdv2si3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv4si3                                      (rtx, rtx, rtx);
static inline rtx
gen_uabdv4si3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv8si3                                      (rtx, rtx, rtx);
static inline rtx
gen_uabdv8si3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv16si3                                     (rtx, rtx, rtx);
static inline rtx
gen_uabdv16si3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv32si3                                     (rtx, rtx, rtx);
static inline rtx
gen_uabdv32si3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv64si3                                     (rtx, rtx, rtx);
static inline rtx
gen_uabdv64si3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv128si3                                    (rtx, rtx, rtx);
static inline rtx
gen_uabdv128si3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv256si3                                    (rtx, rtx, rtx);
static inline rtx
gen_uabdv256si3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv512si3                                    (rtx, rtx, rtx);
static inline rtx
gen_uabdv512si3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv1024si3                                   (rtx, rtx, rtx);
static inline rtx
gen_uabdv1024si3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv1di3                                      (rtx, rtx, rtx);
static inline rtx
gen_uabdv1di3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv2di3                                      (rtx, rtx, rtx);
static inline rtx
gen_uabdv2di3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv4di3                                      (rtx, rtx, rtx);
static inline rtx
gen_uabdv4di3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv8di3                                      (rtx, rtx, rtx);
static inline rtx
gen_uabdv8di3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv16di3                                     (rtx, rtx, rtx);
static inline rtx
gen_uabdv16di3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv32di3                                     (rtx, rtx, rtx);
static inline rtx
gen_uabdv32di3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv64di3                                     (rtx, rtx, rtx);
static inline rtx
gen_uabdv64di3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv128di3                                    (rtx, rtx, rtx);
static inline rtx
gen_uabdv128di3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv256di3                                    (rtx, rtx, rtx);
static inline rtx
gen_uabdv256di3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
static inline rtx gen_uabdv512di3                                    (rtx, rtx, rtx);
static inline rtx
gen_uabdv512di3(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c))
{
  return 0;
}
extern rtx        gen_pred_vandnrvvm8di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm4di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm2di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnrvvm1di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv1di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv2di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv4di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv8di_scalar                          (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv16di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv32di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv64di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv128di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv256di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vandnv512di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulrvvm8di_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhrvvm8di_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulrvvm4di_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhrvvm4di_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulrvvm2di_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhrvvm2di_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulrvvm1di_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhrvvm1di_scalar                     (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulv1di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhv1di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulv2di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhv2di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulv4di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhv4di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulv8di_scalar                         (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhv8di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulv16di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhv16di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulv32di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhv32di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulv64di_scalar                        (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhv64di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulv128di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhv128di_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulv256di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhv256di_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulv512di_scalar                       (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx        gen_pred_vclmulhv512di_scalar                      (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx);

#endif /* GCC_INSN_FLAGS_H */
